Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | 5d0d715 | 2010-10-13 11:13:21 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
Joerg Roedel | 63ce3ae | 2015-02-04 16:12:55 +0100 | [diff] [blame] | 3 | * Author: Joerg Roedel <jroedel@suse.de> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 20 | #include <linux/ratelimit.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 21 | #include <linux/pci.h> |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 22 | #include <linux/pci-ats.h> |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 23 | #include <linux/bitmap.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/slab.h> |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 25 | #include <linux/debugfs.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 26 | #include <linux/scatterlist.h> |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 27 | #include <linux/dma-mapping.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 28 | #include <linux/iommu-helper.h> |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 29 | #include <linux/iommu.h> |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 30 | #include <linux/delay.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 31 | #include <linux/amd-iommu.h> |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 32 | #include <linux/notifier.h> |
| 33 | #include <linux/export.h> |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 34 | #include <linux/irq.h> |
| 35 | #include <linux/msi.h> |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 36 | #include <linux/dma-contiguous.h> |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 37 | #include <linux/irqdomain.h> |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 38 | #include <linux/percpu.h> |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 39 | #include <asm/irq_remapping.h> |
| 40 | #include <asm/io_apic.h> |
| 41 | #include <asm/apic.h> |
| 42 | #include <asm/hw_irq.h> |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 43 | #include <asm/msidef.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 44 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 45 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 46 | #include <asm/gart.h> |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 47 | #include <asm/dma.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 48 | |
| 49 | #include "amd_iommu_proto.h" |
| 50 | #include "amd_iommu_types.h" |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 51 | #include "irq_remapping.h" |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 52 | |
| 53 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 54 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 55 | #define LOOP_TIMEOUT 100000 |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 56 | |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 57 | /* |
| 58 | * This bitmap is used to advertise the page sizes our hardware support |
| 59 | * to the IOMMU core, which will then use this information to split |
| 60 | * physically contiguous memory regions it is mapping into page sizes |
| 61 | * that we support. |
| 62 | * |
Joerg Roedel | 954e3dd | 2012-12-02 15:35:37 +0100 | [diff] [blame] | 63 | * 512GB Pages are not supported due to a hardware bug |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 64 | */ |
Joerg Roedel | 954e3dd | 2012-12-02 15:35:37 +0100 | [diff] [blame] | 65 | #define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38)) |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 66 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 67 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 68 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 69 | /* List of all available dev_data structures */ |
| 70 | static LIST_HEAD(dev_data_list); |
| 71 | static DEFINE_SPINLOCK(dev_data_list_lock); |
| 72 | |
Joerg Roedel | 6efed63 | 2012-06-14 15:52:58 +0200 | [diff] [blame] | 73 | LIST_HEAD(ioapic_map); |
| 74 | LIST_HEAD(hpet_map); |
Wan Zongshun | 2a0cb4e | 2016-04-01 09:06:00 -0400 | [diff] [blame^] | 75 | LIST_HEAD(acpihid_map); |
Joerg Roedel | 6efed63 | 2012-06-14 15:52:58 +0200 | [diff] [blame] | 76 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 77 | /* |
| 78 | * Domain for untranslated devices - only allocated |
| 79 | * if iommu=pt passed on kernel cmd line. |
| 80 | */ |
Thierry Reding | b22f643 | 2014-06-27 09:03:12 +0200 | [diff] [blame] | 81 | static const struct iommu_ops amd_iommu_ops; |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 82 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 83 | static ATOMIC_NOTIFIER_HEAD(ppr_notifier); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 84 | int amd_iommu_max_glx_val = -1; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 85 | |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 86 | static struct dma_map_ops amd_iommu_dma_ops; |
| 87 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 88 | /* |
Joerg Roedel | 50917e2 | 2014-08-05 16:38:38 +0200 | [diff] [blame] | 89 | * This struct contains device specific data for the IOMMU |
| 90 | */ |
| 91 | struct iommu_dev_data { |
| 92 | struct list_head list; /* For domain->dev_list */ |
| 93 | struct list_head dev_data_list; /* For global dev_data_list */ |
Joerg Roedel | 50917e2 | 2014-08-05 16:38:38 +0200 | [diff] [blame] | 94 | struct protection_domain *domain; /* Domain the device is bound to */ |
Joerg Roedel | 50917e2 | 2014-08-05 16:38:38 +0200 | [diff] [blame] | 95 | u16 devid; /* PCI Device ID */ |
| 96 | bool iommu_v2; /* Device can make use of IOMMUv2 */ |
Joerg Roedel | 1e6a7b0 | 2015-07-28 16:58:48 +0200 | [diff] [blame] | 97 | bool passthrough; /* Device is identity mapped */ |
Joerg Roedel | 50917e2 | 2014-08-05 16:38:38 +0200 | [diff] [blame] | 98 | struct { |
| 99 | bool enabled; |
| 100 | int qdep; |
| 101 | } ats; /* ATS state */ |
| 102 | bool pri_tlp; /* PASID TLB required for |
| 103 | PPR completions */ |
| 104 | u32 errata; /* Bitmap for errata to apply */ |
| 105 | }; |
| 106 | |
| 107 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 108 | * general struct to manage commands send to an IOMMU |
| 109 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 110 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 111 | u32 data[4]; |
| 112 | }; |
| 113 | |
Joerg Roedel | 05152a0 | 2012-06-15 16:53:51 +0200 | [diff] [blame] | 114 | struct kmem_cache *amd_iommu_irq_cache; |
| 115 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 116 | static void update_domain(struct protection_domain *domain); |
Joerg Roedel | 7a5a566 | 2015-06-30 08:56:11 +0200 | [diff] [blame] | 117 | static int protection_domain_init(struct protection_domain *domain); |
Joerg Roedel | b6809ee | 2016-02-26 16:48:59 +0100 | [diff] [blame] | 118 | static void detach_device(struct device *dev); |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 119 | |
Joerg Roedel | 007b74b | 2015-12-21 12:53:54 +0100 | [diff] [blame] | 120 | /* |
| 121 | * For dynamic growth the aperture size is split into ranges of 128MB of |
| 122 | * DMA address space each. This struct represents one such range. |
| 123 | */ |
| 124 | struct aperture_range { |
| 125 | |
Joerg Roedel | 08c5fb9 | 2015-12-21 13:04:49 +0100 | [diff] [blame] | 126 | spinlock_t bitmap_lock; |
| 127 | |
Joerg Roedel | 007b74b | 2015-12-21 12:53:54 +0100 | [diff] [blame] | 128 | /* address allocation bitmap */ |
| 129 | unsigned long *bitmap; |
Joerg Roedel | ae62d49 | 2015-12-21 16:28:45 +0100 | [diff] [blame] | 130 | unsigned long offset; |
Joerg Roedel | 60e6a7c | 2015-12-21 16:53:17 +0100 | [diff] [blame] | 131 | unsigned long next_bit; |
Joerg Roedel | 007b74b | 2015-12-21 12:53:54 +0100 | [diff] [blame] | 132 | |
| 133 | /* |
| 134 | * Array of PTE pages for the aperture. In this array we save all the |
| 135 | * leaf pages of the domain page table used for the aperture. This way |
| 136 | * we don't need to walk the page table to find a specific PTE. We can |
| 137 | * just calculate its address in constant time. |
| 138 | */ |
| 139 | u64 *pte_pages[64]; |
Joerg Roedel | 007b74b | 2015-12-21 12:53:54 +0100 | [diff] [blame] | 140 | }; |
| 141 | |
| 142 | /* |
| 143 | * Data container for a dma_ops specific protection domain |
| 144 | */ |
| 145 | struct dma_ops_domain { |
| 146 | /* generic protection domain information */ |
| 147 | struct protection_domain domain; |
| 148 | |
| 149 | /* size of the aperture for the mappings */ |
| 150 | unsigned long aperture_size; |
| 151 | |
Joerg Roedel | ebaecb4 | 2015-12-21 18:11:32 +0100 | [diff] [blame] | 152 | /* aperture index we start searching for free addresses */ |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 153 | u32 __percpu *next_index; |
Joerg Roedel | 007b74b | 2015-12-21 12:53:54 +0100 | [diff] [blame] | 154 | |
| 155 | /* address space relevant data */ |
| 156 | struct aperture_range *aperture[APERTURE_MAX_RANGES]; |
Joerg Roedel | 007b74b | 2015-12-21 12:53:54 +0100 | [diff] [blame] | 157 | }; |
| 158 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 159 | /**************************************************************************** |
| 160 | * |
| 161 | * Helper functions |
| 162 | * |
| 163 | ****************************************************************************/ |
| 164 | |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 165 | static struct protection_domain *to_pdomain(struct iommu_domain *dom) |
| 166 | { |
| 167 | return container_of(dom, struct protection_domain, domain); |
| 168 | } |
| 169 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 170 | static struct iommu_dev_data *alloc_dev_data(u16 devid) |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 171 | { |
| 172 | struct iommu_dev_data *dev_data; |
| 173 | unsigned long flags; |
| 174 | |
| 175 | dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL); |
| 176 | if (!dev_data) |
| 177 | return NULL; |
| 178 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 179 | dev_data->devid = devid; |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 180 | |
| 181 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 182 | list_add_tail(&dev_data->dev_data_list, &dev_data_list); |
| 183 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 184 | |
| 185 | return dev_data; |
| 186 | } |
| 187 | |
Joerg Roedel | 3b03bb7 | 2011-06-09 18:53:25 +0200 | [diff] [blame] | 188 | static struct iommu_dev_data *search_dev_data(u16 devid) |
| 189 | { |
| 190 | struct iommu_dev_data *dev_data; |
| 191 | unsigned long flags; |
| 192 | |
| 193 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 194 | list_for_each_entry(dev_data, &dev_data_list, dev_data_list) { |
| 195 | if (dev_data->devid == devid) |
| 196 | goto out_unlock; |
| 197 | } |
| 198 | |
| 199 | dev_data = NULL; |
| 200 | |
| 201 | out_unlock: |
| 202 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 203 | |
| 204 | return dev_data; |
| 205 | } |
| 206 | |
| 207 | static struct iommu_dev_data *find_dev_data(u16 devid) |
| 208 | { |
| 209 | struct iommu_dev_data *dev_data; |
| 210 | |
| 211 | dev_data = search_dev_data(devid); |
| 212 | |
| 213 | if (dev_data == NULL) |
| 214 | dev_data = alloc_dev_data(devid); |
| 215 | |
| 216 | return dev_data; |
| 217 | } |
| 218 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 219 | static inline u16 get_device_id(struct device *dev) |
| 220 | { |
| 221 | struct pci_dev *pdev = to_pci_dev(dev); |
| 222 | |
Shuah Khan | 6f2729b | 2013-02-27 17:07:30 -0700 | [diff] [blame] | 223 | return PCI_DEVID(pdev->bus->number, pdev->devfn); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 224 | } |
| 225 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 226 | static struct iommu_dev_data *get_dev_data(struct device *dev) |
| 227 | { |
| 228 | return dev->archdata.iommu; |
| 229 | } |
| 230 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 231 | static bool pci_iommuv2_capable(struct pci_dev *pdev) |
| 232 | { |
| 233 | static const int caps[] = { |
| 234 | PCI_EXT_CAP_ID_ATS, |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 235 | PCI_EXT_CAP_ID_PRI, |
| 236 | PCI_EXT_CAP_ID_PASID, |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 237 | }; |
| 238 | int i, pos; |
| 239 | |
| 240 | for (i = 0; i < 3; ++i) { |
| 241 | pos = pci_find_ext_capability(pdev, caps[i]); |
| 242 | if (pos == 0) |
| 243 | return false; |
| 244 | } |
| 245 | |
| 246 | return true; |
| 247 | } |
| 248 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 249 | static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum) |
| 250 | { |
| 251 | struct iommu_dev_data *dev_data; |
| 252 | |
| 253 | dev_data = get_dev_data(&pdev->dev); |
| 254 | |
| 255 | return dev_data->errata & (1 << erratum) ? true : false; |
| 256 | } |
| 257 | |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 258 | /* |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 259 | * This function actually applies the mapping to the page table of the |
| 260 | * dma_ops domain. |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 261 | */ |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 262 | static void alloc_unity_mapping(struct dma_ops_domain *dma_dom, |
| 263 | struct unity_map_entry *e) |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 264 | { |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 265 | u64 addr; |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 266 | |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 267 | for (addr = e->address_start; addr < e->address_end; |
| 268 | addr += PAGE_SIZE) { |
| 269 | if (addr < dma_dom->aperture_size) |
| 270 | __set_bit(addr >> PAGE_SHIFT, |
| 271 | dma_dom->aperture[0]->bitmap); |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 272 | } |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 273 | } |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 274 | |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 275 | /* |
| 276 | * Inits the unity mappings required for a specific device |
| 277 | */ |
| 278 | static void init_unity_mappings_for_device(struct device *dev, |
| 279 | struct dma_ops_domain *dma_dom) |
| 280 | { |
| 281 | struct unity_map_entry *e; |
| 282 | u16 devid; |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 283 | |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 284 | devid = get_device_id(dev); |
| 285 | |
| 286 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 287 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 288 | continue; |
| 289 | alloc_unity_mapping(dma_dom, e); |
| 290 | } |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 291 | } |
| 292 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 293 | /* |
| 294 | * This function checks if the driver got a valid device from the caller to |
| 295 | * avoid dereferencing invalid pointers. |
| 296 | */ |
| 297 | static bool check_device(struct device *dev) |
| 298 | { |
| 299 | u16 devid; |
| 300 | |
| 301 | if (!dev || !dev->dma_mask) |
| 302 | return false; |
| 303 | |
Yijing Wang | b82a227 | 2013-12-05 19:42:41 +0800 | [diff] [blame] | 304 | /* No PCI device */ |
| 305 | if (!dev_is_pci(dev)) |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 306 | return false; |
| 307 | |
| 308 | devid = get_device_id(dev); |
| 309 | |
| 310 | /* Out of our scope? */ |
| 311 | if (devid > amd_iommu_last_bdf) |
| 312 | return false; |
| 313 | |
| 314 | if (amd_iommu_rlookup_table[devid] == NULL) |
| 315 | return false; |
| 316 | |
| 317 | return true; |
| 318 | } |
| 319 | |
Alex Williamson | 25b11ce | 2014-09-19 10:03:13 -0600 | [diff] [blame] | 320 | static void init_iommu_group(struct device *dev) |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 321 | { |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 322 | struct dma_ops_domain *dma_domain; |
| 323 | struct iommu_domain *domain; |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 324 | struct iommu_group *group; |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 325 | |
Alex Williamson | 65d5352 | 2014-07-03 09:51:30 -0600 | [diff] [blame] | 326 | group = iommu_group_get_for_dev(dev); |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 327 | if (IS_ERR(group)) |
| 328 | return; |
| 329 | |
| 330 | domain = iommu_group_default_domain(group); |
| 331 | if (!domain) |
| 332 | goto out; |
| 333 | |
| 334 | dma_domain = to_pdomain(domain)->priv; |
| 335 | |
| 336 | init_unity_mappings_for_device(dev, dma_domain); |
| 337 | out: |
| 338 | iommu_group_put(group); |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | static int iommu_init_device(struct device *dev) |
| 342 | { |
| 343 | struct pci_dev *pdev = to_pci_dev(dev); |
| 344 | struct iommu_dev_data *dev_data; |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 345 | |
| 346 | if (dev->archdata.iommu) |
| 347 | return 0; |
| 348 | |
| 349 | dev_data = find_dev_data(get_device_id(dev)); |
| 350 | if (!dev_data) |
| 351 | return -ENOMEM; |
| 352 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 353 | if (pci_iommuv2_capable(pdev)) { |
| 354 | struct amd_iommu *iommu; |
| 355 | |
| 356 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 357 | dev_data->iommu_v2 = iommu->is_iommu_v2; |
| 358 | } |
| 359 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 360 | dev->archdata.iommu = dev_data; |
| 361 | |
Alex Williamson | 066f2e9 | 2014-06-12 16:12:37 -0600 | [diff] [blame] | 362 | iommu_device_link(amd_iommu_rlookup_table[dev_data->devid]->iommu_dev, |
| 363 | dev); |
| 364 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 365 | return 0; |
| 366 | } |
| 367 | |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 368 | static void iommu_ignore_device(struct device *dev) |
| 369 | { |
| 370 | u16 devid, alias; |
| 371 | |
| 372 | devid = get_device_id(dev); |
| 373 | alias = amd_iommu_alias_table[devid]; |
| 374 | |
| 375 | memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry)); |
| 376 | memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry)); |
| 377 | |
| 378 | amd_iommu_rlookup_table[devid] = NULL; |
| 379 | amd_iommu_rlookup_table[alias] = NULL; |
| 380 | } |
| 381 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 382 | static void iommu_uninit_device(struct device *dev) |
| 383 | { |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 384 | struct iommu_dev_data *dev_data = search_dev_data(get_device_id(dev)); |
| 385 | |
| 386 | if (!dev_data) |
| 387 | return; |
| 388 | |
Joerg Roedel | b6809ee | 2016-02-26 16:48:59 +0100 | [diff] [blame] | 389 | if (dev_data->domain) |
| 390 | detach_device(dev); |
| 391 | |
Alex Williamson | 066f2e9 | 2014-06-12 16:12:37 -0600 | [diff] [blame] | 392 | iommu_device_unlink(amd_iommu_rlookup_table[dev_data->devid]->iommu_dev, |
| 393 | dev); |
| 394 | |
Alex Williamson | 9dcd613 | 2012-05-30 14:19:07 -0600 | [diff] [blame] | 395 | iommu_group_remove_device(dev); |
| 396 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 397 | /* Remove dma-ops */ |
| 398 | dev->archdata.dma_ops = NULL; |
| 399 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 400 | /* |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 401 | * We keep dev_data around for unplugged devices and reuse it when the |
| 402 | * device is re-plugged - not doing so would introduce a ton of races. |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 403 | */ |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 404 | } |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 405 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 406 | #ifdef CONFIG_AMD_IOMMU_STATS |
| 407 | |
| 408 | /* |
| 409 | * Initialization code for statistics collection |
| 410 | */ |
| 411 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 412 | DECLARE_STATS_COUNTER(compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 413 | DECLARE_STATS_COUNTER(cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 414 | DECLARE_STATS_COUNTER(cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 415 | DECLARE_STATS_COUNTER(cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 416 | DECLARE_STATS_COUNTER(cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 417 | DECLARE_STATS_COUNTER(cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 418 | DECLARE_STATS_COUNTER(cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 419 | DECLARE_STATS_COUNTER(cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 420 | DECLARE_STATS_COUNTER(domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 421 | DECLARE_STATS_COUNTER(domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 422 | DECLARE_STATS_COUNTER(alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 423 | DECLARE_STATS_COUNTER(total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 424 | DECLARE_STATS_COUNTER(complete_ppr); |
| 425 | DECLARE_STATS_COUNTER(invalidate_iotlb); |
| 426 | DECLARE_STATS_COUNTER(invalidate_iotlb_all); |
| 427 | DECLARE_STATS_COUNTER(pri_requests); |
| 428 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 429 | static struct dentry *stats_dir; |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 430 | static struct dentry *de_fflush; |
| 431 | |
| 432 | static void amd_iommu_stats_add(struct __iommu_counter *cnt) |
| 433 | { |
| 434 | if (stats_dir == NULL) |
| 435 | return; |
| 436 | |
| 437 | cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir, |
| 438 | &cnt->value); |
| 439 | } |
| 440 | |
| 441 | static void amd_iommu_stats_init(void) |
| 442 | { |
| 443 | stats_dir = debugfs_create_dir("amd-iommu", NULL); |
| 444 | if (stats_dir == NULL) |
| 445 | return; |
| 446 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 447 | de_fflush = debugfs_create_bool("fullflush", 0444, stats_dir, |
Dan Carpenter | 3775d48 | 2012-06-27 12:09:18 +0300 | [diff] [blame] | 448 | &amd_iommu_unmap_flush); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 449 | |
| 450 | amd_iommu_stats_add(&compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 451 | amd_iommu_stats_add(&cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 452 | amd_iommu_stats_add(&cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 453 | amd_iommu_stats_add(&cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 454 | amd_iommu_stats_add(&cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 455 | amd_iommu_stats_add(&cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 456 | amd_iommu_stats_add(&cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 457 | amd_iommu_stats_add(&cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 458 | amd_iommu_stats_add(&domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 459 | amd_iommu_stats_add(&domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 460 | amd_iommu_stats_add(&alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 461 | amd_iommu_stats_add(&total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 462 | amd_iommu_stats_add(&complete_ppr); |
| 463 | amd_iommu_stats_add(&invalidate_iotlb); |
| 464 | amd_iommu_stats_add(&invalidate_iotlb_all); |
| 465 | amd_iommu_stats_add(&pri_requests); |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | #endif |
| 469 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 470 | /**************************************************************************** |
| 471 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 472 | * Interrupt handling functions |
| 473 | * |
| 474 | ****************************************************************************/ |
| 475 | |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 476 | static void dump_dte_entry(u16 devid) |
| 477 | { |
| 478 | int i; |
| 479 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 480 | for (i = 0; i < 4; ++i) |
| 481 | pr_err("AMD-Vi: DTE[%d]: %016llx\n", i, |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 482 | amd_iommu_dev_table[devid].data[i]); |
| 483 | } |
| 484 | |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 485 | static void dump_command(unsigned long phys_addr) |
| 486 | { |
| 487 | struct iommu_cmd *cmd = phys_to_virt(phys_addr); |
| 488 | int i; |
| 489 | |
| 490 | for (i = 0; i < 4; ++i) |
| 491 | pr_err("AMD-Vi: CMD[%d]: %08x\n", i, cmd->data[i]); |
| 492 | } |
| 493 | |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 494 | static void iommu_print_event(struct amd_iommu *iommu, void *__evt) |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 495 | { |
Joerg Roedel | 3d06fca | 2012-04-12 14:12:00 +0200 | [diff] [blame] | 496 | int type, devid, domid, flags; |
| 497 | volatile u32 *event = __evt; |
| 498 | int count = 0; |
| 499 | u64 address; |
| 500 | |
| 501 | retry: |
| 502 | type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 503 | devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 504 | domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 505 | flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 506 | address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 507 | |
| 508 | if (type == 0) { |
| 509 | /* Did we hit the erratum? */ |
| 510 | if (++count == LOOP_TIMEOUT) { |
| 511 | pr_err("AMD-Vi: No event written to event log\n"); |
| 512 | return; |
| 513 | } |
| 514 | udelay(1); |
| 515 | goto retry; |
| 516 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 517 | |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 518 | printk(KERN_ERR "AMD-Vi: Event logged ["); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 519 | |
| 520 | switch (type) { |
| 521 | case EVENT_TYPE_ILL_DEV: |
| 522 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 523 | "address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 524 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 525 | address, flags); |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 526 | dump_dte_entry(devid); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 527 | break; |
| 528 | case EVENT_TYPE_IO_FAULT: |
| 529 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 530 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 531 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 532 | domid, address, flags); |
| 533 | break; |
| 534 | case EVENT_TYPE_DEV_TAB_ERR: |
| 535 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 536 | "address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 537 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 538 | address, flags); |
| 539 | break; |
| 540 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 541 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 542 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 543 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 544 | domid, address, flags); |
| 545 | break; |
| 546 | case EVENT_TYPE_ILL_CMD: |
| 547 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 548 | dump_command(address); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 549 | break; |
| 550 | case EVENT_TYPE_CMD_HARD_ERR: |
| 551 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 552 | "flags=0x%04x]\n", address, flags); |
| 553 | break; |
| 554 | case EVENT_TYPE_IOTLB_INV_TO: |
| 555 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 556 | "address=0x%016llx]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 557 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 558 | address); |
| 559 | break; |
| 560 | case EVENT_TYPE_INV_DEV_REQ: |
| 561 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 562 | "address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 563 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 564 | address, flags); |
| 565 | break; |
| 566 | default: |
| 567 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 568 | } |
Joerg Roedel | 3d06fca | 2012-04-12 14:12:00 +0200 | [diff] [blame] | 569 | |
| 570 | memset(__evt, 0, 4 * sizeof(u32)); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 571 | } |
| 572 | |
| 573 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 574 | { |
| 575 | u32 head, tail; |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 576 | |
| 577 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 578 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 579 | |
| 580 | while (head != tail) { |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 581 | iommu_print_event(iommu, iommu->evt_buf + head); |
Joerg Roedel | deba4bc | 2015-10-20 17:33:41 +0200 | [diff] [blame] | 582 | head = (head + EVENT_ENTRY_SIZE) % EVT_BUFFER_SIZE; |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 583 | } |
| 584 | |
| 585 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 586 | } |
| 587 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 588 | static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw) |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 589 | { |
| 590 | struct amd_iommu_fault fault; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 591 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 592 | INC_STATS_COUNTER(pri_requests); |
| 593 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 594 | if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) { |
| 595 | pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n"); |
| 596 | return; |
| 597 | } |
| 598 | |
| 599 | fault.address = raw[1]; |
| 600 | fault.pasid = PPR_PASID(raw[0]); |
| 601 | fault.device_id = PPR_DEVID(raw[0]); |
| 602 | fault.tag = PPR_TAG(raw[0]); |
| 603 | fault.flags = PPR_FLAGS(raw[0]); |
| 604 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 605 | atomic_notifier_call_chain(&ppr_notifier, 0, &fault); |
| 606 | } |
| 607 | |
| 608 | static void iommu_poll_ppr_log(struct amd_iommu *iommu) |
| 609 | { |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 610 | u32 head, tail; |
| 611 | |
| 612 | if (iommu->ppr_log == NULL) |
| 613 | return; |
| 614 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 615 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
| 616 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 617 | |
| 618 | while (head != tail) { |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 619 | volatile u64 *raw; |
| 620 | u64 entry[2]; |
| 621 | int i; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 622 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 623 | raw = (u64 *)(iommu->ppr_log + head); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 624 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 625 | /* |
| 626 | * Hardware bug: Interrupt may arrive before the entry is |
| 627 | * written to memory. If this happens we need to wait for the |
| 628 | * entry to arrive. |
| 629 | */ |
| 630 | for (i = 0; i < LOOP_TIMEOUT; ++i) { |
| 631 | if (PPR_REQ_TYPE(raw[0]) != 0) |
| 632 | break; |
| 633 | udelay(1); |
| 634 | } |
| 635 | |
| 636 | /* Avoid memcpy function-call overhead */ |
| 637 | entry[0] = raw[0]; |
| 638 | entry[1] = raw[1]; |
| 639 | |
| 640 | /* |
| 641 | * To detect the hardware bug we need to clear the entry |
| 642 | * back to zero. |
| 643 | */ |
| 644 | raw[0] = raw[1] = 0UL; |
| 645 | |
| 646 | /* Update head pointer of hardware ring-buffer */ |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 647 | head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE; |
| 648 | writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 649 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 650 | /* Handle PPR entry */ |
| 651 | iommu_handle_ppr_entry(iommu, entry); |
| 652 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 653 | /* Refresh ring-buffer information */ |
| 654 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 655 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 656 | } |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 657 | } |
| 658 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 659 | irqreturn_t amd_iommu_int_thread(int irq, void *data) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 660 | { |
Suravee Suthikulpanit | 3f398bc | 2013-04-22 16:32:34 -0500 | [diff] [blame] | 661 | struct amd_iommu *iommu = (struct amd_iommu *) data; |
| 662 | u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 663 | |
Suravee Suthikulpanit | 3f398bc | 2013-04-22 16:32:34 -0500 | [diff] [blame] | 664 | while (status & (MMIO_STATUS_EVT_INT_MASK | MMIO_STATUS_PPR_INT_MASK)) { |
| 665 | /* Enable EVT and PPR interrupts again */ |
| 666 | writel((MMIO_STATUS_EVT_INT_MASK | MMIO_STATUS_PPR_INT_MASK), |
| 667 | iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 668 | |
| 669 | if (status & MMIO_STATUS_EVT_INT_MASK) { |
| 670 | pr_devel("AMD-Vi: Processing IOMMU Event Log\n"); |
| 671 | iommu_poll_events(iommu); |
| 672 | } |
| 673 | |
| 674 | if (status & MMIO_STATUS_PPR_INT_MASK) { |
| 675 | pr_devel("AMD-Vi: Processing IOMMU PPR Log\n"); |
| 676 | iommu_poll_ppr_log(iommu); |
| 677 | } |
| 678 | |
| 679 | /* |
| 680 | * Hardware bug: ERBT1312 |
| 681 | * When re-enabling interrupt (by writing 1 |
| 682 | * to clear the bit), the hardware might also try to set |
| 683 | * the interrupt bit in the event status register. |
| 684 | * In this scenario, the bit will be set, and disable |
| 685 | * subsequent interrupts. |
| 686 | * |
| 687 | * Workaround: The IOMMU driver should read back the |
| 688 | * status register and check if the interrupt bits are cleared. |
| 689 | * If not, driver will need to go through the interrupt handler |
| 690 | * again and re-clear the bits |
| 691 | */ |
| 692 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 693 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 694 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 695 | } |
| 696 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 697 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 698 | { |
| 699 | return IRQ_WAKE_THREAD; |
| 700 | } |
| 701 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 702 | /**************************************************************************** |
| 703 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 704 | * IOMMU command queuing functions |
| 705 | * |
| 706 | ****************************************************************************/ |
| 707 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 708 | static int wait_on_sem(volatile u64 *sem) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 709 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 710 | int i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 711 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 712 | while (*sem == 0 && i < LOOP_TIMEOUT) { |
| 713 | udelay(1); |
| 714 | i += 1; |
| 715 | } |
| 716 | |
| 717 | if (i == LOOP_TIMEOUT) { |
| 718 | pr_alert("AMD-Vi: Completion-Wait loop timed out\n"); |
| 719 | return -EIO; |
| 720 | } |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 721 | |
| 722 | return 0; |
| 723 | } |
| 724 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 725 | static void copy_cmd_to_buffer(struct amd_iommu *iommu, |
| 726 | struct iommu_cmd *cmd, |
| 727 | u32 tail) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 728 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 729 | u8 *target; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 730 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 731 | target = iommu->cmd_buf + tail; |
Joerg Roedel | deba4bc | 2015-10-20 17:33:41 +0200 | [diff] [blame] | 732 | tail = (tail + sizeof(*cmd)) % CMD_BUFFER_SIZE; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 733 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 734 | /* Copy command to buffer */ |
| 735 | memcpy(target, cmd, sizeof(*cmd)); |
| 736 | |
| 737 | /* Tell the IOMMU about it */ |
| 738 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 739 | } |
| 740 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 741 | static void build_completion_wait(struct iommu_cmd *cmd, u64 address) |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 742 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 743 | WARN_ON(address & 0x7ULL); |
| 744 | |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 745 | memset(cmd, 0, sizeof(*cmd)); |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 746 | cmd->data[0] = lower_32_bits(__pa(address)) | CMD_COMPL_WAIT_STORE_MASK; |
| 747 | cmd->data[1] = upper_32_bits(__pa(address)); |
| 748 | cmd->data[2] = 1; |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 749 | CMD_SET_TYPE(cmd, CMD_COMPL_WAIT); |
| 750 | } |
| 751 | |
Joerg Roedel | 94fe79e | 2011-04-06 11:07:21 +0200 | [diff] [blame] | 752 | static void build_inv_dte(struct iommu_cmd *cmd, u16 devid) |
| 753 | { |
| 754 | memset(cmd, 0, sizeof(*cmd)); |
| 755 | cmd->data[0] = devid; |
| 756 | CMD_SET_TYPE(cmd, CMD_INV_DEV_ENTRY); |
| 757 | } |
| 758 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 759 | static void build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 760 | size_t size, u16 domid, int pde) |
| 761 | { |
| 762 | u64 pages; |
Quentin Lambert | ae0cbbb | 2015-02-04 11:40:07 +0100 | [diff] [blame] | 763 | bool s; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 764 | |
| 765 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
Quentin Lambert | ae0cbbb | 2015-02-04 11:40:07 +0100 | [diff] [blame] | 766 | s = false; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 767 | |
| 768 | if (pages > 1) { |
| 769 | /* |
| 770 | * If we have to flush more than one page, flush all |
| 771 | * TLB entries for this domain |
| 772 | */ |
| 773 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
Quentin Lambert | ae0cbbb | 2015-02-04 11:40:07 +0100 | [diff] [blame] | 774 | s = true; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 775 | } |
| 776 | |
| 777 | address &= PAGE_MASK; |
| 778 | |
| 779 | memset(cmd, 0, sizeof(*cmd)); |
| 780 | cmd->data[1] |= domid; |
| 781 | cmd->data[2] = lower_32_bits(address); |
| 782 | cmd->data[3] = upper_32_bits(address); |
| 783 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 784 | if (s) /* size bit - we flush more than one 4kb page */ |
| 785 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 786 | if (pde) /* PDE bit - we want to flush everything, not only the PTEs */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 787 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 788 | } |
| 789 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 790 | static void build_inv_iotlb_pages(struct iommu_cmd *cmd, u16 devid, int qdep, |
| 791 | u64 address, size_t size) |
| 792 | { |
| 793 | u64 pages; |
Quentin Lambert | ae0cbbb | 2015-02-04 11:40:07 +0100 | [diff] [blame] | 794 | bool s; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 795 | |
| 796 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
Quentin Lambert | ae0cbbb | 2015-02-04 11:40:07 +0100 | [diff] [blame] | 797 | s = false; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 798 | |
| 799 | if (pages > 1) { |
| 800 | /* |
| 801 | * If we have to flush more than one page, flush all |
| 802 | * TLB entries for this domain |
| 803 | */ |
| 804 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
Quentin Lambert | ae0cbbb | 2015-02-04 11:40:07 +0100 | [diff] [blame] | 805 | s = true; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 806 | } |
| 807 | |
| 808 | address &= PAGE_MASK; |
| 809 | |
| 810 | memset(cmd, 0, sizeof(*cmd)); |
| 811 | cmd->data[0] = devid; |
| 812 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 813 | cmd->data[1] = devid; |
| 814 | cmd->data[2] = lower_32_bits(address); |
| 815 | cmd->data[3] = upper_32_bits(address); |
| 816 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 817 | if (s) |
| 818 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 819 | } |
| 820 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 821 | static void build_inv_iommu_pasid(struct iommu_cmd *cmd, u16 domid, int pasid, |
| 822 | u64 address, bool size) |
| 823 | { |
| 824 | memset(cmd, 0, sizeof(*cmd)); |
| 825 | |
| 826 | address &= ~(0xfffULL); |
| 827 | |
Suravee Suthikulpanit | a919a01 | 2014-03-05 18:54:18 -0600 | [diff] [blame] | 828 | cmd->data[0] = pasid; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 829 | cmd->data[1] = domid; |
| 830 | cmd->data[2] = lower_32_bits(address); |
| 831 | cmd->data[3] = upper_32_bits(address); |
| 832 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 833 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 834 | if (size) |
| 835 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 836 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 837 | } |
| 838 | |
| 839 | static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 840 | int qdep, u64 address, bool size) |
| 841 | { |
| 842 | memset(cmd, 0, sizeof(*cmd)); |
| 843 | |
| 844 | address &= ~(0xfffULL); |
| 845 | |
| 846 | cmd->data[0] = devid; |
Jay Cornwall | e8d2d82 | 2014-02-26 15:49:31 -0600 | [diff] [blame] | 847 | cmd->data[0] |= ((pasid >> 8) & 0xff) << 16; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 848 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 849 | cmd->data[1] = devid; |
Jay Cornwall | e8d2d82 | 2014-02-26 15:49:31 -0600 | [diff] [blame] | 850 | cmd->data[1] |= (pasid & 0xff) << 16; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 851 | cmd->data[2] = lower_32_bits(address); |
| 852 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 853 | cmd->data[3] = upper_32_bits(address); |
| 854 | if (size) |
| 855 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 856 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 857 | } |
| 858 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 859 | static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 860 | int status, int tag, bool gn) |
| 861 | { |
| 862 | memset(cmd, 0, sizeof(*cmd)); |
| 863 | |
| 864 | cmd->data[0] = devid; |
| 865 | if (gn) { |
Suravee Suthikulpanit | a919a01 | 2014-03-05 18:54:18 -0600 | [diff] [blame] | 866 | cmd->data[1] = pasid; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 867 | cmd->data[2] = CMD_INV_IOMMU_PAGES_GN_MASK; |
| 868 | } |
| 869 | cmd->data[3] = tag & 0x1ff; |
| 870 | cmd->data[3] |= (status & PPR_STATUS_MASK) << PPR_STATUS_SHIFT; |
| 871 | |
| 872 | CMD_SET_TYPE(cmd, CMD_COMPLETE_PPR); |
| 873 | } |
| 874 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 875 | static void build_inv_all(struct iommu_cmd *cmd) |
| 876 | { |
| 877 | memset(cmd, 0, sizeof(*cmd)); |
| 878 | CMD_SET_TYPE(cmd, CMD_INV_ALL); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 879 | } |
| 880 | |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 881 | static void build_inv_irt(struct iommu_cmd *cmd, u16 devid) |
| 882 | { |
| 883 | memset(cmd, 0, sizeof(*cmd)); |
| 884 | cmd->data[0] = devid; |
| 885 | CMD_SET_TYPE(cmd, CMD_INV_IRT); |
| 886 | } |
| 887 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 888 | /* |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 889 | * Writes the command to the IOMMUs command buffer and informs the |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 890 | * hardware about the new command. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 891 | */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 892 | static int iommu_queue_command_sync(struct amd_iommu *iommu, |
| 893 | struct iommu_cmd *cmd, |
| 894 | bool sync) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 895 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 896 | u32 left, tail, head, next_tail; |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 897 | unsigned long flags; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 898 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 899 | again: |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 900 | spin_lock_irqsave(&iommu->lock, flags); |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 901 | |
| 902 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 903 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
Joerg Roedel | deba4bc | 2015-10-20 17:33:41 +0200 | [diff] [blame] | 904 | next_tail = (tail + sizeof(*cmd)) % CMD_BUFFER_SIZE; |
| 905 | left = (head - next_tail) % CMD_BUFFER_SIZE; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 906 | |
| 907 | if (left <= 2) { |
| 908 | struct iommu_cmd sync_cmd; |
| 909 | volatile u64 sem = 0; |
| 910 | int ret; |
| 911 | |
| 912 | build_completion_wait(&sync_cmd, (u64)&sem); |
| 913 | copy_cmd_to_buffer(iommu, &sync_cmd, tail); |
| 914 | |
| 915 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 916 | |
| 917 | if ((ret = wait_on_sem(&sem)) != 0) |
| 918 | return ret; |
| 919 | |
| 920 | goto again; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 921 | } |
| 922 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 923 | copy_cmd_to_buffer(iommu, cmd, tail); |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 924 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 925 | /* We need to sync now to make sure all commands are processed */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 926 | iommu->need_sync = sync; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 927 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 928 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 929 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 930 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 931 | } |
| 932 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 933 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
| 934 | { |
| 935 | return iommu_queue_command_sync(iommu, cmd, true); |
| 936 | } |
| 937 | |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 938 | /* |
| 939 | * This function queues a completion wait command into the command |
| 940 | * buffer of an IOMMU |
| 941 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 942 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 943 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 944 | struct iommu_cmd cmd; |
| 945 | volatile u64 sem = 0; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 946 | int ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 947 | |
| 948 | if (!iommu->need_sync) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 949 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 950 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 951 | build_completion_wait(&cmd, (u64)&sem); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 952 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 953 | ret = iommu_queue_command_sync(iommu, &cmd, false); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 954 | if (ret) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 955 | return ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 956 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 957 | return wait_on_sem(&sem); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 958 | } |
| 959 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 960 | static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 961 | { |
| 962 | struct iommu_cmd cmd; |
| 963 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 964 | build_inv_dte(&cmd, devid); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 965 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 966 | return iommu_queue_command(iommu, &cmd); |
| 967 | } |
| 968 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 969 | static void iommu_flush_dte_all(struct amd_iommu *iommu) |
| 970 | { |
| 971 | u32 devid; |
| 972 | |
| 973 | for (devid = 0; devid <= 0xffff; ++devid) |
| 974 | iommu_flush_dte(iommu, devid); |
| 975 | |
| 976 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 977 | } |
| 978 | |
| 979 | /* |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 980 | * This function uses heavy locking and may disable irqs for some time. But |
| 981 | * this is no issue because it is only called during resume. |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 982 | */ |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 983 | static void iommu_flush_tlb_all(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 984 | { |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 985 | u32 dom_id; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 986 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 987 | for (dom_id = 0; dom_id <= 0xffff; ++dom_id) { |
| 988 | struct iommu_cmd cmd; |
| 989 | build_inv_iommu_pages(&cmd, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 990 | dom_id, 1); |
| 991 | iommu_queue_command(iommu, &cmd); |
| 992 | } |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 993 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 994 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 995 | } |
| 996 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 997 | static void iommu_flush_all(struct amd_iommu *iommu) |
| 998 | { |
| 999 | struct iommu_cmd cmd; |
| 1000 | |
| 1001 | build_inv_all(&cmd); |
| 1002 | |
| 1003 | iommu_queue_command(iommu, &cmd); |
| 1004 | iommu_completion_wait(iommu); |
| 1005 | } |
| 1006 | |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1007 | static void iommu_flush_irt(struct amd_iommu *iommu, u16 devid) |
| 1008 | { |
| 1009 | struct iommu_cmd cmd; |
| 1010 | |
| 1011 | build_inv_irt(&cmd, devid); |
| 1012 | |
| 1013 | iommu_queue_command(iommu, &cmd); |
| 1014 | } |
| 1015 | |
| 1016 | static void iommu_flush_irt_all(struct amd_iommu *iommu) |
| 1017 | { |
| 1018 | u32 devid; |
| 1019 | |
| 1020 | for (devid = 0; devid <= MAX_DEV_TABLE_ENTRIES; devid++) |
| 1021 | iommu_flush_irt(iommu, devid); |
| 1022 | |
| 1023 | iommu_completion_wait(iommu); |
| 1024 | } |
| 1025 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1026 | void iommu_flush_all_caches(struct amd_iommu *iommu) |
| 1027 | { |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1028 | if (iommu_feature(iommu, FEATURE_IA)) { |
| 1029 | iommu_flush_all(iommu); |
| 1030 | } else { |
| 1031 | iommu_flush_dte_all(iommu); |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1032 | iommu_flush_irt_all(iommu); |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1033 | iommu_flush_tlb_all(iommu); |
| 1034 | } |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1035 | } |
| 1036 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1037 | /* |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1038 | * Command send function for flushing on-device TLB |
| 1039 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1040 | static int device_flush_iotlb(struct iommu_dev_data *dev_data, |
| 1041 | u64 address, size_t size) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1042 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1043 | struct amd_iommu *iommu; |
| 1044 | struct iommu_cmd cmd; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1045 | int qdep; |
| 1046 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1047 | qdep = dev_data->ats.qdep; |
| 1048 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1049 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1050 | build_inv_iotlb_pages(&cmd, dev_data->devid, qdep, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1051 | |
| 1052 | return iommu_queue_command(iommu, &cmd); |
| 1053 | } |
| 1054 | |
| 1055 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1056 | * Command send function for invalidating a device table entry |
| 1057 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1058 | static int device_flush_dte(struct iommu_dev_data *dev_data) |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1059 | { |
| 1060 | struct amd_iommu *iommu; |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 1061 | u16 alias; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1062 | int ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1063 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1064 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 1065 | alias = amd_iommu_alias_table[dev_data->devid]; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1066 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 1067 | ret = iommu_flush_dte(iommu, dev_data->devid); |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 1068 | if (!ret && alias != dev_data->devid) |
| 1069 | ret = iommu_flush_dte(iommu, alias); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1070 | if (ret) |
| 1071 | return ret; |
| 1072 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1073 | if (dev_data->ats.enabled) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1074 | ret = device_flush_iotlb(dev_data, 0, ~0UL); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1075 | |
| 1076 | return ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1077 | } |
| 1078 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1079 | /* |
| 1080 | * TLB invalidation function which is called from the mapping functions. |
| 1081 | * It invalidates a single PTE if the range to flush is within a single |
| 1082 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 1083 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1084 | static void __domain_flush_pages(struct protection_domain *domain, |
| 1085 | u64 address, size_t size, int pde) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1086 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1087 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1088 | struct iommu_cmd cmd; |
| 1089 | int ret = 0, i; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1090 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1091 | build_inv_iommu_pages(&cmd, address, size, domain->id, pde); |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 1092 | |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1093 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1094 | if (!domain->dev_iommu[i]) |
| 1095 | continue; |
| 1096 | |
| 1097 | /* |
| 1098 | * Devices of this domain are behind this IOMMU |
| 1099 | * We need a TLB flush |
| 1100 | */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1101 | ret |= iommu_queue_command(amd_iommus[i], &cmd); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1102 | } |
| 1103 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1104 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1105 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1106 | if (!dev_data->ats.enabled) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1107 | continue; |
| 1108 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1109 | ret |= device_flush_iotlb(dev_data, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1110 | } |
| 1111 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1112 | WARN_ON(ret); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1113 | } |
| 1114 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1115 | static void domain_flush_pages(struct protection_domain *domain, |
| 1116 | u64 address, size_t size) |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1117 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1118 | __domain_flush_pages(domain, address, size, 0); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1119 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1120 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1121 | /* Flush the whole IO/TLB for a given protection domain */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1122 | static void domain_flush_tlb(struct protection_domain *domain) |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1123 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1124 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1125 | } |
| 1126 | |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1127 | /* Flush the whole IO/TLB for a given protection domain - including PDE */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1128 | static void domain_flush_tlb_pde(struct protection_domain *domain) |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1129 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1130 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1); |
| 1131 | } |
| 1132 | |
| 1133 | static void domain_flush_complete(struct protection_domain *domain) |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1134 | { |
| 1135 | int i; |
| 1136 | |
| 1137 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1138 | if (!domain->dev_iommu[i]) |
| 1139 | continue; |
| 1140 | |
| 1141 | /* |
| 1142 | * Devices of this domain are behind this IOMMU |
| 1143 | * We need to wait for completion of all commands. |
| 1144 | */ |
| 1145 | iommu_completion_wait(amd_iommus[i]); |
| 1146 | } |
| 1147 | } |
| 1148 | |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1149 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1150 | /* |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1151 | * This function flushes the DTEs for all devices in domain |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1152 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1153 | static void domain_flush_devices(struct protection_domain *domain) |
Joerg Roedel | bfd1be1 | 2009-05-05 15:33:57 +0200 | [diff] [blame] | 1154 | { |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1155 | struct iommu_dev_data *dev_data; |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1156 | |
| 1157 | list_for_each_entry(dev_data, &domain->dev_list, list) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1158 | device_flush_dte(dev_data); |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1159 | } |
| 1160 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1161 | /**************************************************************************** |
| 1162 | * |
| 1163 | * The functions below are used the create the page table mappings for |
| 1164 | * unity mapped regions. |
| 1165 | * |
| 1166 | ****************************************************************************/ |
| 1167 | |
| 1168 | /* |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1169 | * This function is used to add another level to an IO page table. Adding |
| 1170 | * another level increases the size of the address space by 9 bits to a size up |
| 1171 | * to 64 bits. |
| 1172 | */ |
| 1173 | static bool increase_address_space(struct protection_domain *domain, |
| 1174 | gfp_t gfp) |
| 1175 | { |
| 1176 | u64 *pte; |
| 1177 | |
| 1178 | if (domain->mode == PAGE_MODE_6_LEVEL) |
| 1179 | /* address space already 64 bit large */ |
| 1180 | return false; |
| 1181 | |
| 1182 | pte = (void *)get_zeroed_page(gfp); |
| 1183 | if (!pte) |
| 1184 | return false; |
| 1185 | |
| 1186 | *pte = PM_LEVEL_PDE(domain->mode, |
| 1187 | virt_to_phys(domain->pt_root)); |
| 1188 | domain->pt_root = pte; |
| 1189 | domain->mode += 1; |
| 1190 | domain->updated = true; |
| 1191 | |
| 1192 | return true; |
| 1193 | } |
| 1194 | |
| 1195 | static u64 *alloc_pte(struct protection_domain *domain, |
| 1196 | unsigned long address, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1197 | unsigned long page_size, |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1198 | u64 **pte_page, |
| 1199 | gfp_t gfp) |
| 1200 | { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1201 | int level, end_lvl; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1202 | u64 *pte, *page; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1203 | |
| 1204 | BUG_ON(!is_power_of_2(page_size)); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1205 | |
| 1206 | while (address > PM_LEVEL_SIZE(domain->mode)) |
| 1207 | increase_address_space(domain, gfp); |
| 1208 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1209 | level = domain->mode - 1; |
| 1210 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1211 | address = PAGE_SIZE_ALIGN(address, page_size); |
| 1212 | end_lvl = PAGE_SIZE_LEVEL(page_size); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1213 | |
| 1214 | while (level > end_lvl) { |
Joerg Roedel | 7bfa5bd | 2015-12-21 19:07:50 +0100 | [diff] [blame] | 1215 | u64 __pte, __npte; |
| 1216 | |
| 1217 | __pte = *pte; |
| 1218 | |
| 1219 | if (!IOMMU_PTE_PRESENT(__pte)) { |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1220 | page = (u64 *)get_zeroed_page(gfp); |
| 1221 | if (!page) |
| 1222 | return NULL; |
Joerg Roedel | 7bfa5bd | 2015-12-21 19:07:50 +0100 | [diff] [blame] | 1223 | |
| 1224 | __npte = PM_LEVEL_PDE(level, virt_to_phys(page)); |
| 1225 | |
| 1226 | if (cmpxchg64(pte, __pte, __npte)) { |
| 1227 | free_page((unsigned long)page); |
| 1228 | continue; |
| 1229 | } |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1230 | } |
| 1231 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1232 | /* No level skipping support yet */ |
| 1233 | if (PM_PTE_LEVEL(*pte) != level) |
| 1234 | return NULL; |
| 1235 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1236 | level -= 1; |
| 1237 | |
| 1238 | pte = IOMMU_PTE_PAGE(*pte); |
| 1239 | |
| 1240 | if (pte_page && level == end_lvl) |
| 1241 | *pte_page = pte; |
| 1242 | |
| 1243 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
| 1244 | } |
| 1245 | |
| 1246 | return pte; |
| 1247 | } |
| 1248 | |
| 1249 | /* |
| 1250 | * This function checks if there is a PTE for a given dma address. If |
| 1251 | * there is one, it returns the pointer to it. |
| 1252 | */ |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 1253 | static u64 *fetch_pte(struct protection_domain *domain, |
| 1254 | unsigned long address, |
| 1255 | unsigned long *page_size) |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1256 | { |
| 1257 | int level; |
| 1258 | u64 *pte; |
| 1259 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1260 | if (address > PM_LEVEL_SIZE(domain->mode)) |
| 1261 | return NULL; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1262 | |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 1263 | level = domain->mode - 1; |
| 1264 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1265 | *page_size = PTE_LEVEL_PAGE_SIZE(level); |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1266 | |
| 1267 | while (level > 0) { |
| 1268 | |
| 1269 | /* Not Present */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1270 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1271 | return NULL; |
| 1272 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1273 | /* Large PTE */ |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 1274 | if (PM_PTE_LEVEL(*pte) == 7 || |
| 1275 | PM_PTE_LEVEL(*pte) == 0) |
| 1276 | break; |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1277 | |
| 1278 | /* No level skipping support yet */ |
| 1279 | if (PM_PTE_LEVEL(*pte) != level) |
| 1280 | return NULL; |
| 1281 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1282 | level -= 1; |
| 1283 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1284 | /* Walk to the next level */ |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 1285 | pte = IOMMU_PTE_PAGE(*pte); |
| 1286 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
| 1287 | *page_size = PTE_LEVEL_PAGE_SIZE(level); |
| 1288 | } |
| 1289 | |
| 1290 | if (PM_PTE_LEVEL(*pte) == 0x07) { |
| 1291 | unsigned long pte_mask; |
| 1292 | |
| 1293 | /* |
| 1294 | * If we have a series of large PTEs, make |
| 1295 | * sure to return a pointer to the first one. |
| 1296 | */ |
| 1297 | *page_size = pte_mask = PTE_PAGE_SIZE(*pte); |
| 1298 | pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1); |
| 1299 | pte = (u64 *)(((unsigned long)pte) & pte_mask); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1300 | } |
| 1301 | |
| 1302 | return pte; |
| 1303 | } |
| 1304 | |
| 1305 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1306 | * Generic mapping functions. It maps a physical address into a DMA |
| 1307 | * address space. It allocates the page table pages if necessary. |
| 1308 | * In the future it can be extended to a generic mapping function |
| 1309 | * supporting all features of AMD IOMMU page tables like level skipping |
| 1310 | * and full 64 bit address spaces. |
| 1311 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 1312 | static int iommu_map_page(struct protection_domain *dom, |
| 1313 | unsigned long bus_addr, |
| 1314 | unsigned long phys_addr, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1315 | int prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1316 | unsigned long page_size) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1317 | { |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 1318 | u64 __pte, *pte; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1319 | int i, count; |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1320 | |
Joerg Roedel | d4b0366 | 2015-04-01 14:58:52 +0200 | [diff] [blame] | 1321 | BUG_ON(!IS_ALIGNED(bus_addr, page_size)); |
| 1322 | BUG_ON(!IS_ALIGNED(phys_addr, page_size)); |
| 1323 | |
Joerg Roedel | bad1cac | 2009-09-02 16:52:23 +0200 | [diff] [blame] | 1324 | if (!(prot & IOMMU_PROT_MASK)) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1325 | return -EINVAL; |
| 1326 | |
Joerg Roedel | d4b0366 | 2015-04-01 14:58:52 +0200 | [diff] [blame] | 1327 | count = PAGE_SIZE_PTE_COUNT(page_size); |
| 1328 | pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1329 | |
Maurizio Lombardi | 63eaa75 | 2014-09-11 12:28:03 +0200 | [diff] [blame] | 1330 | if (!pte) |
| 1331 | return -ENOMEM; |
| 1332 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1333 | for (i = 0; i < count; ++i) |
| 1334 | if (IOMMU_PTE_PRESENT(pte[i])) |
| 1335 | return -EBUSY; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1336 | |
Joerg Roedel | d4b0366 | 2015-04-01 14:58:52 +0200 | [diff] [blame] | 1337 | if (count > 1) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1338 | __pte = PAGE_SIZE_PTE(phys_addr, page_size); |
| 1339 | __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1340 | } else |
| 1341 | __pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1342 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1343 | if (prot & IOMMU_PROT_IR) |
| 1344 | __pte |= IOMMU_PTE_IR; |
| 1345 | if (prot & IOMMU_PROT_IW) |
| 1346 | __pte |= IOMMU_PTE_IW; |
| 1347 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1348 | for (i = 0; i < count; ++i) |
| 1349 | pte[i] = __pte; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1350 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1351 | update_domain(dom); |
| 1352 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1353 | return 0; |
| 1354 | } |
| 1355 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1356 | static unsigned long iommu_unmap_page(struct protection_domain *dom, |
| 1357 | unsigned long bus_addr, |
| 1358 | unsigned long page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1359 | { |
Joerg Roedel | 71b390e | 2015-04-01 14:58:49 +0200 | [diff] [blame] | 1360 | unsigned long long unmapped; |
| 1361 | unsigned long unmap_size; |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1362 | u64 *pte; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1363 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1364 | BUG_ON(!is_power_of_2(page_size)); |
| 1365 | |
| 1366 | unmapped = 0; |
| 1367 | |
| 1368 | while (unmapped < page_size) { |
| 1369 | |
Joerg Roedel | 71b390e | 2015-04-01 14:58:49 +0200 | [diff] [blame] | 1370 | pte = fetch_pte(dom, bus_addr, &unmap_size); |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1371 | |
Joerg Roedel | 71b390e | 2015-04-01 14:58:49 +0200 | [diff] [blame] | 1372 | if (pte) { |
| 1373 | int i, count; |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1374 | |
Joerg Roedel | 71b390e | 2015-04-01 14:58:49 +0200 | [diff] [blame] | 1375 | count = PAGE_SIZE_PTE_COUNT(unmap_size); |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1376 | for (i = 0; i < count; i++) |
| 1377 | pte[i] = 0ULL; |
| 1378 | } |
| 1379 | |
| 1380 | bus_addr = (bus_addr & ~(unmap_size - 1)) + unmap_size; |
| 1381 | unmapped += unmap_size; |
| 1382 | } |
| 1383 | |
Alex Williamson | 60d0ca3 | 2013-06-21 14:33:19 -0600 | [diff] [blame] | 1384 | BUG_ON(unmapped && !is_power_of_2(unmapped)); |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1385 | |
| 1386 | return unmapped; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1387 | } |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1388 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1389 | /**************************************************************************** |
| 1390 | * |
| 1391 | * The next functions belong to the address allocator for the dma_ops |
| 1392 | * interface functions. They work like the allocators in the other IOMMU |
| 1393 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 1394 | * the aperture. Maybe it could be enhanced in the future to a more |
| 1395 | * efficient allocator. |
| 1396 | * |
| 1397 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1398 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1399 | /* |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1400 | * The address allocator core functions. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1401 | * |
| 1402 | * called with domain->lock held |
| 1403 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1404 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1405 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1406 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 1407 | * ranges. |
| 1408 | */ |
| 1409 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 1410 | unsigned long start_page, |
| 1411 | unsigned int pages) |
| 1412 | { |
| 1413 | unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT; |
| 1414 | |
| 1415 | if (start_page + pages > last_page) |
| 1416 | pages = last_page - start_page; |
| 1417 | |
| 1418 | for (i = start_page; i < start_page + pages; ++i) { |
| 1419 | int index = i / APERTURE_RANGE_PAGES; |
| 1420 | int page = i % APERTURE_RANGE_PAGES; |
| 1421 | __set_bit(page, dom->aperture[index]->bitmap); |
| 1422 | } |
| 1423 | } |
| 1424 | |
| 1425 | /* |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1426 | * This function is used to add a new aperture range to an existing |
| 1427 | * aperture in case of dma_ops domain allocation or address allocation |
| 1428 | * failure. |
| 1429 | */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1430 | static int alloc_new_range(struct dma_ops_domain *dma_dom, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1431 | bool populate, gfp_t gfp) |
| 1432 | { |
| 1433 | int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; |
Joerg Roedel | 5d7c94c | 2015-04-01 14:58:50 +0200 | [diff] [blame] | 1434 | unsigned long i, old_size, pte_pgsize; |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1435 | struct aperture_range *range; |
| 1436 | struct amd_iommu *iommu; |
| 1437 | unsigned long flags; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1438 | |
Joerg Roedel | f5e9705 | 2009-05-22 12:31:53 +0200 | [diff] [blame] | 1439 | #ifdef CONFIG_IOMMU_STRESS |
| 1440 | populate = false; |
| 1441 | #endif |
| 1442 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1443 | if (index >= APERTURE_MAX_RANGES) |
| 1444 | return -ENOMEM; |
| 1445 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1446 | range = kzalloc(sizeof(struct aperture_range), gfp); |
| 1447 | if (!range) |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1448 | return -ENOMEM; |
| 1449 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1450 | range->bitmap = (void *)get_zeroed_page(gfp); |
| 1451 | if (!range->bitmap) |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1452 | goto out_free; |
| 1453 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1454 | range->offset = dma_dom->aperture_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1455 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1456 | spin_lock_init(&range->bitmap_lock); |
Joerg Roedel | 08c5fb9 | 2015-12-21 13:04:49 +0100 | [diff] [blame] | 1457 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1458 | if (populate) { |
| 1459 | unsigned long address = dma_dom->aperture_size; |
| 1460 | int i, num_ptes = APERTURE_RANGE_PAGES / 512; |
| 1461 | u64 *pte, *pte_page; |
| 1462 | |
| 1463 | for (i = 0; i < num_ptes; ++i) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1464 | pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1465 | &pte_page, gfp); |
| 1466 | if (!pte) |
| 1467 | goto out_free; |
| 1468 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1469 | range->pte_pages[i] = pte_page; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1470 | |
| 1471 | address += APERTURE_RANGE_SIZE / 64; |
| 1472 | } |
| 1473 | } |
| 1474 | |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 1475 | spin_lock_irqsave(&dma_dom->domain.lock, flags); |
| 1476 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1477 | /* First take the bitmap_lock and then publish the range */ |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 1478 | spin_lock(&range->bitmap_lock); |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1479 | |
| 1480 | old_size = dma_dom->aperture_size; |
| 1481 | dma_dom->aperture[index] = range; |
| 1482 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1483 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1484 | /* Reserve address range used for MSI messages */ |
| 1485 | if (old_size < MSI_ADDR_BASE_LO && |
| 1486 | dma_dom->aperture_size > MSI_ADDR_BASE_LO) { |
| 1487 | unsigned long spage; |
| 1488 | int pages; |
| 1489 | |
| 1490 | pages = iommu_num_pages(MSI_ADDR_BASE_LO, 0x10000, PAGE_SIZE); |
| 1491 | spage = MSI_ADDR_BASE_LO >> PAGE_SHIFT; |
| 1492 | |
| 1493 | dma_ops_reserve_addresses(dma_dom, spage, pages); |
| 1494 | } |
| 1495 | |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1496 | /* Initialize the exclusion range if necessary */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1497 | for_each_iommu(iommu) { |
| 1498 | if (iommu->exclusion_start && |
| 1499 | iommu->exclusion_start >= dma_dom->aperture[index]->offset |
| 1500 | && iommu->exclusion_start < dma_dom->aperture_size) { |
| 1501 | unsigned long startpage; |
| 1502 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 1503 | iommu->exclusion_length, |
| 1504 | PAGE_SIZE); |
| 1505 | startpage = iommu->exclusion_start >> PAGE_SHIFT; |
| 1506 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 1507 | } |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1508 | } |
| 1509 | |
| 1510 | /* |
| 1511 | * Check for areas already mapped as present in the new aperture |
| 1512 | * range and mark those pages as reserved in the allocator. Such |
| 1513 | * mappings may already exist as a result of requested unity |
| 1514 | * mappings for devices. |
| 1515 | */ |
| 1516 | for (i = dma_dom->aperture[index]->offset; |
| 1517 | i < dma_dom->aperture_size; |
Joerg Roedel | 5d7c94c | 2015-04-01 14:58:50 +0200 | [diff] [blame] | 1518 | i += pte_pgsize) { |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 1519 | u64 *pte = fetch_pte(&dma_dom->domain, i, &pte_pgsize); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1520 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
| 1521 | continue; |
| 1522 | |
Joerg Roedel | 5d7c94c | 2015-04-01 14:58:50 +0200 | [diff] [blame] | 1523 | dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT, |
| 1524 | pte_pgsize >> 12); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1525 | } |
| 1526 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1527 | update_domain(&dma_dom->domain); |
| 1528 | |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 1529 | spin_unlock(&range->bitmap_lock); |
| 1530 | |
| 1531 | spin_unlock_irqrestore(&dma_dom->domain.lock, flags); |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1532 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1533 | return 0; |
| 1534 | |
| 1535 | out_free: |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1536 | update_domain(&dma_dom->domain); |
| 1537 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1538 | free_page((unsigned long)range->bitmap); |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1539 | |
Joerg Roedel | a73c156 | 2015-12-21 19:25:56 +0100 | [diff] [blame] | 1540 | kfree(range); |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1541 | |
| 1542 | return -ENOMEM; |
| 1543 | } |
| 1544 | |
Joerg Roedel | ccb50e0 | 2015-12-21 17:49:34 +0100 | [diff] [blame] | 1545 | static dma_addr_t dma_ops_aperture_alloc(struct dma_ops_domain *dom, |
| 1546 | struct aperture_range *range, |
Joerg Roedel | a0f5144 | 2015-12-21 16:20:09 +0100 | [diff] [blame] | 1547 | unsigned long pages, |
Joerg Roedel | a0f5144 | 2015-12-21 16:20:09 +0100 | [diff] [blame] | 1548 | unsigned long dma_mask, |
| 1549 | unsigned long boundary_size, |
Joerg Roedel | 7b5e25b | 2015-12-22 13:38:12 +0100 | [diff] [blame] | 1550 | unsigned long align_mask, |
| 1551 | bool trylock) |
Joerg Roedel | a0f5144 | 2015-12-21 16:20:09 +0100 | [diff] [blame] | 1552 | { |
| 1553 | unsigned long offset, limit, flags; |
| 1554 | dma_addr_t address; |
Joerg Roedel | ccb50e0 | 2015-12-21 17:49:34 +0100 | [diff] [blame] | 1555 | bool flush = false; |
Joerg Roedel | a0f5144 | 2015-12-21 16:20:09 +0100 | [diff] [blame] | 1556 | |
| 1557 | offset = range->offset >> PAGE_SHIFT; |
| 1558 | limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset, |
| 1559 | dma_mask >> PAGE_SHIFT); |
| 1560 | |
Joerg Roedel | 7b5e25b | 2015-12-22 13:38:12 +0100 | [diff] [blame] | 1561 | if (trylock) { |
| 1562 | if (!spin_trylock_irqsave(&range->bitmap_lock, flags)) |
| 1563 | return -1; |
| 1564 | } else { |
| 1565 | spin_lock_irqsave(&range->bitmap_lock, flags); |
| 1566 | } |
| 1567 | |
Joerg Roedel | 60e6a7c | 2015-12-21 16:53:17 +0100 | [diff] [blame] | 1568 | address = iommu_area_alloc(range->bitmap, limit, range->next_bit, |
| 1569 | pages, offset, boundary_size, align_mask); |
Joerg Roedel | ccb50e0 | 2015-12-21 17:49:34 +0100 | [diff] [blame] | 1570 | if (address == -1) { |
Joerg Roedel | 60e6a7c | 2015-12-21 16:53:17 +0100 | [diff] [blame] | 1571 | /* Nothing found, retry one time */ |
| 1572 | address = iommu_area_alloc(range->bitmap, limit, |
| 1573 | 0, pages, offset, boundary_size, |
| 1574 | align_mask); |
Joerg Roedel | ccb50e0 | 2015-12-21 17:49:34 +0100 | [diff] [blame] | 1575 | flush = true; |
| 1576 | } |
Joerg Roedel | 60e6a7c | 2015-12-21 16:53:17 +0100 | [diff] [blame] | 1577 | |
| 1578 | if (address != -1) |
| 1579 | range->next_bit = address + pages; |
| 1580 | |
Joerg Roedel | a0f5144 | 2015-12-21 16:20:09 +0100 | [diff] [blame] | 1581 | spin_unlock_irqrestore(&range->bitmap_lock, flags); |
| 1582 | |
Joerg Roedel | ccb50e0 | 2015-12-21 17:49:34 +0100 | [diff] [blame] | 1583 | if (flush) { |
| 1584 | domain_flush_tlb(&dom->domain); |
| 1585 | domain_flush_complete(&dom->domain); |
| 1586 | } |
| 1587 | |
Joerg Roedel | a0f5144 | 2015-12-21 16:20:09 +0100 | [diff] [blame] | 1588 | return address; |
| 1589 | } |
| 1590 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1591 | static unsigned long dma_ops_area_alloc(struct device *dev, |
| 1592 | struct dma_ops_domain *dom, |
| 1593 | unsigned int pages, |
| 1594 | unsigned long align_mask, |
Joerg Roedel | 05ab49e | 2015-12-21 17:58:26 +0100 | [diff] [blame] | 1595 | u64 dma_mask) |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1596 | { |
Joerg Roedel | ab7032b | 2015-12-21 18:47:11 +0100 | [diff] [blame] | 1597 | unsigned long boundary_size, mask; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1598 | unsigned long address = -1; |
Joerg Roedel | 7b5e25b | 2015-12-22 13:38:12 +0100 | [diff] [blame] | 1599 | bool first = true; |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1600 | u32 start, i; |
| 1601 | |
| 1602 | preempt_disable(); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1603 | |
Joerg Roedel | e6aabee | 2015-05-27 09:26:09 +0200 | [diff] [blame] | 1604 | mask = dma_get_seg_boundary(dev); |
| 1605 | |
Joerg Roedel | 7b5e25b | 2015-12-22 13:38:12 +0100 | [diff] [blame] | 1606 | again: |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1607 | start = this_cpu_read(*dom->next_index); |
| 1608 | |
| 1609 | /* Sanity check - is it really necessary? */ |
| 1610 | if (unlikely(start > APERTURE_MAX_RANGES)) { |
| 1611 | start = 0; |
| 1612 | this_cpu_write(*dom->next_index, 0); |
| 1613 | } |
| 1614 | |
Joerg Roedel | e6aabee | 2015-05-27 09:26:09 +0200 | [diff] [blame] | 1615 | boundary_size = mask + 1 ? ALIGN(mask + 1, PAGE_SIZE) >> PAGE_SHIFT : |
| 1616 | 1UL << (BITS_PER_LONG - PAGE_SHIFT); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1617 | |
Joerg Roedel | 2a87442 | 2015-12-21 18:34:47 +0100 | [diff] [blame] | 1618 | for (i = 0; i < APERTURE_MAX_RANGES; ++i) { |
| 1619 | struct aperture_range *range; |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1620 | int index; |
Joerg Roedel | ccb50e0 | 2015-12-21 17:49:34 +0100 | [diff] [blame] | 1621 | |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1622 | index = (start + i) % APERTURE_MAX_RANGES; |
| 1623 | |
| 1624 | range = dom->aperture[index]; |
Joerg Roedel | 2a87442 | 2015-12-21 18:34:47 +0100 | [diff] [blame] | 1625 | |
| 1626 | if (!range || range->offset >= dma_mask) |
| 1627 | continue; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1628 | |
Joerg Roedel | 2a87442 | 2015-12-21 18:34:47 +0100 | [diff] [blame] | 1629 | address = dma_ops_aperture_alloc(dom, range, pages, |
Joerg Roedel | 60e6a7c | 2015-12-21 16:53:17 +0100 | [diff] [blame] | 1630 | dma_mask, boundary_size, |
Joerg Roedel | 7b5e25b | 2015-12-22 13:38:12 +0100 | [diff] [blame] | 1631 | align_mask, first); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1632 | if (address != -1) { |
Joerg Roedel | 2a87442 | 2015-12-21 18:34:47 +0100 | [diff] [blame] | 1633 | address = range->offset + (address << PAGE_SHIFT); |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1634 | this_cpu_write(*dom->next_index, index); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1635 | break; |
| 1636 | } |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1637 | } |
| 1638 | |
Joerg Roedel | 7b5e25b | 2015-12-22 13:38:12 +0100 | [diff] [blame] | 1639 | if (address == -1 && first) { |
| 1640 | first = false; |
| 1641 | goto again; |
| 1642 | } |
| 1643 | |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1644 | preempt_enable(); |
| 1645 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1646 | return address; |
| 1647 | } |
| 1648 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1649 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 1650 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1651 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1652 | unsigned long align_mask, |
| 1653 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1654 | { |
Joerg Roedel | 266a3bd | 2015-12-21 18:54:24 +0100 | [diff] [blame] | 1655 | unsigned long address = -1; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1656 | |
Joerg Roedel | 266a3bd | 2015-12-21 18:54:24 +0100 | [diff] [blame] | 1657 | while (address == -1) { |
| 1658 | address = dma_ops_area_alloc(dev, dom, pages, |
| 1659 | align_mask, dma_mask); |
| 1660 | |
Joerg Roedel | 7bfa5bd | 2015-12-21 19:07:50 +0100 | [diff] [blame] | 1661 | if (address == -1 && alloc_new_range(dom, false, GFP_ATOMIC)) |
Joerg Roedel | 266a3bd | 2015-12-21 18:54:24 +0100 | [diff] [blame] | 1662 | break; |
| 1663 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1664 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1665 | if (unlikely(address == -1)) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 1666 | address = DMA_ERROR_CODE; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1667 | |
| 1668 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 1669 | |
| 1670 | return address; |
| 1671 | } |
| 1672 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1673 | /* |
| 1674 | * The address free function. |
| 1675 | * |
| 1676 | * called with domain->lock held |
| 1677 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1678 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 1679 | unsigned long address, |
| 1680 | unsigned int pages) |
| 1681 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1682 | unsigned i = address >> APERTURE_RANGE_SHIFT; |
| 1683 | struct aperture_range *range = dom->aperture[i]; |
Joerg Roedel | 08c5fb9 | 2015-12-21 13:04:49 +0100 | [diff] [blame] | 1684 | unsigned long flags; |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1685 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1686 | BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL); |
| 1687 | |
Joerg Roedel | 47bccd6 | 2009-05-22 12:40:54 +0200 | [diff] [blame] | 1688 | #ifdef CONFIG_IOMMU_STRESS |
| 1689 | if (i < 4) |
| 1690 | return; |
| 1691 | #endif |
| 1692 | |
Joerg Roedel | 4eeca8c | 2015-12-22 12:15:35 +0100 | [diff] [blame] | 1693 | if (amd_iommu_unmap_flush) { |
Joerg Roedel | d41ab09 | 2015-12-21 18:20:03 +0100 | [diff] [blame] | 1694 | domain_flush_tlb(&dom->domain); |
| 1695 | domain_flush_complete(&dom->domain); |
| 1696 | } |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1697 | |
| 1698 | address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT; |
Joerg Roedel | 803b8cb4 | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1699 | |
Joerg Roedel | 08c5fb9 | 2015-12-21 13:04:49 +0100 | [diff] [blame] | 1700 | spin_lock_irqsave(&range->bitmap_lock, flags); |
Joerg Roedel | 4eeca8c | 2015-12-22 12:15:35 +0100 | [diff] [blame] | 1701 | if (address + pages > range->next_bit) |
| 1702 | range->next_bit = address + pages; |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 1703 | bitmap_clear(range->bitmap, address, pages); |
Joerg Roedel | 08c5fb9 | 2015-12-21 13:04:49 +0100 | [diff] [blame] | 1704 | spin_unlock_irqrestore(&range->bitmap_lock, flags); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1705 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1706 | } |
| 1707 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1708 | /**************************************************************************** |
| 1709 | * |
| 1710 | * The next functions belong to the domain allocation. A domain is |
| 1711 | * allocated for every IOMMU as the default domain. If device isolation |
| 1712 | * is enabled, every device get its own domain. The most important thing |
| 1713 | * about domains is the page table mapping the DMA address space they |
| 1714 | * contain. |
| 1715 | * |
| 1716 | ****************************************************************************/ |
| 1717 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1718 | /* |
| 1719 | * This function adds a protection domain to the global protection domain list |
| 1720 | */ |
| 1721 | static void add_domain_to_list(struct protection_domain *domain) |
| 1722 | { |
| 1723 | unsigned long flags; |
| 1724 | |
| 1725 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1726 | list_add(&domain->list, &amd_iommu_pd_list); |
| 1727 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1728 | } |
| 1729 | |
| 1730 | /* |
| 1731 | * This function removes a protection domain to the global |
| 1732 | * protection domain list |
| 1733 | */ |
| 1734 | static void del_domain_from_list(struct protection_domain *domain) |
| 1735 | { |
| 1736 | unsigned long flags; |
| 1737 | |
| 1738 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1739 | list_del(&domain->list); |
| 1740 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1741 | } |
| 1742 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1743 | static u16 domain_id_alloc(void) |
| 1744 | { |
| 1745 | unsigned long flags; |
| 1746 | int id; |
| 1747 | |
| 1748 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1749 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 1750 | BUG_ON(id == 0); |
| 1751 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1752 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1753 | else |
| 1754 | id = 0; |
| 1755 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1756 | |
| 1757 | return id; |
| 1758 | } |
| 1759 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1760 | static void domain_id_free(int id) |
| 1761 | { |
| 1762 | unsigned long flags; |
| 1763 | |
| 1764 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1765 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1766 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1767 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1768 | } |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1769 | |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1770 | #define DEFINE_FREE_PT_FN(LVL, FN) \ |
| 1771 | static void free_pt_##LVL (unsigned long __pt) \ |
| 1772 | { \ |
| 1773 | unsigned long p; \ |
| 1774 | u64 *pt; \ |
| 1775 | int i; \ |
| 1776 | \ |
| 1777 | pt = (u64 *)__pt; \ |
| 1778 | \ |
| 1779 | for (i = 0; i < 512; ++i) { \ |
Joerg Roedel | 0b3fff54 | 2015-06-18 10:48:34 +0200 | [diff] [blame] | 1780 | /* PTE present? */ \ |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1781 | if (!IOMMU_PTE_PRESENT(pt[i])) \ |
| 1782 | continue; \ |
| 1783 | \ |
Joerg Roedel | 0b3fff54 | 2015-06-18 10:48:34 +0200 | [diff] [blame] | 1784 | /* Large PTE? */ \ |
| 1785 | if (PM_PTE_LEVEL(pt[i]) == 0 || \ |
| 1786 | PM_PTE_LEVEL(pt[i]) == 7) \ |
| 1787 | continue; \ |
| 1788 | \ |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1789 | p = (unsigned long)IOMMU_PTE_PAGE(pt[i]); \ |
| 1790 | FN(p); \ |
| 1791 | } \ |
| 1792 | free_page((unsigned long)pt); \ |
| 1793 | } |
| 1794 | |
| 1795 | DEFINE_FREE_PT_FN(l2, free_page) |
| 1796 | DEFINE_FREE_PT_FN(l3, free_pt_l2) |
| 1797 | DEFINE_FREE_PT_FN(l4, free_pt_l3) |
| 1798 | DEFINE_FREE_PT_FN(l5, free_pt_l4) |
| 1799 | DEFINE_FREE_PT_FN(l6, free_pt_l5) |
| 1800 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1801 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1802 | { |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1803 | unsigned long root = (unsigned long)domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1804 | |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1805 | switch (domain->mode) { |
| 1806 | case PAGE_MODE_NONE: |
| 1807 | break; |
| 1808 | case PAGE_MODE_1_LEVEL: |
| 1809 | free_page(root); |
| 1810 | break; |
| 1811 | case PAGE_MODE_2_LEVEL: |
| 1812 | free_pt_l2(root); |
| 1813 | break; |
| 1814 | case PAGE_MODE_3_LEVEL: |
| 1815 | free_pt_l3(root); |
| 1816 | break; |
| 1817 | case PAGE_MODE_4_LEVEL: |
| 1818 | free_pt_l4(root); |
| 1819 | break; |
| 1820 | case PAGE_MODE_5_LEVEL: |
| 1821 | free_pt_l5(root); |
| 1822 | break; |
| 1823 | case PAGE_MODE_6_LEVEL: |
| 1824 | free_pt_l6(root); |
| 1825 | break; |
| 1826 | default: |
| 1827 | BUG(); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1828 | } |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1829 | } |
| 1830 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1831 | static void free_gcr3_tbl_level1(u64 *tbl) |
| 1832 | { |
| 1833 | u64 *ptr; |
| 1834 | int i; |
| 1835 | |
| 1836 | for (i = 0; i < 512; ++i) { |
| 1837 | if (!(tbl[i] & GCR3_VALID)) |
| 1838 | continue; |
| 1839 | |
| 1840 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1841 | |
| 1842 | free_page((unsigned long)ptr); |
| 1843 | } |
| 1844 | } |
| 1845 | |
| 1846 | static void free_gcr3_tbl_level2(u64 *tbl) |
| 1847 | { |
| 1848 | u64 *ptr; |
| 1849 | int i; |
| 1850 | |
| 1851 | for (i = 0; i < 512; ++i) { |
| 1852 | if (!(tbl[i] & GCR3_VALID)) |
| 1853 | continue; |
| 1854 | |
| 1855 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1856 | |
| 1857 | free_gcr3_tbl_level1(ptr); |
| 1858 | } |
| 1859 | } |
| 1860 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1861 | static void free_gcr3_table(struct protection_domain *domain) |
| 1862 | { |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1863 | if (domain->glx == 2) |
| 1864 | free_gcr3_tbl_level2(domain->gcr3_tbl); |
| 1865 | else if (domain->glx == 1) |
| 1866 | free_gcr3_tbl_level1(domain->gcr3_tbl); |
Joerg Roedel | 23d3a98 | 2015-08-13 11:15:13 +0200 | [diff] [blame] | 1867 | else |
| 1868 | BUG_ON(domain->glx != 0); |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1869 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1870 | free_page((unsigned long)domain->gcr3_tbl); |
| 1871 | } |
| 1872 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1873 | /* |
| 1874 | * Free a domain, only used if something went wrong in the |
| 1875 | * allocation path and we need to free an already allocated page table |
| 1876 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1877 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 1878 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1879 | int i; |
| 1880 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1881 | if (!dom) |
| 1882 | return; |
| 1883 | |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1884 | free_percpu(dom->next_index); |
| 1885 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1886 | del_domain_from_list(&dom->domain); |
| 1887 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1888 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1889 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1890 | for (i = 0; i < APERTURE_MAX_RANGES; ++i) { |
| 1891 | if (!dom->aperture[i]) |
| 1892 | continue; |
| 1893 | free_page((unsigned long)dom->aperture[i]->bitmap); |
| 1894 | kfree(dom->aperture[i]); |
| 1895 | } |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1896 | |
| 1897 | kfree(dom); |
| 1898 | } |
| 1899 | |
Joerg Roedel | a639a8e | 2015-12-22 16:06:49 +0100 | [diff] [blame] | 1900 | static int dma_ops_domain_alloc_apertures(struct dma_ops_domain *dma_dom, |
| 1901 | int max_apertures) |
| 1902 | { |
| 1903 | int ret, i, apertures; |
| 1904 | |
| 1905 | apertures = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; |
| 1906 | ret = 0; |
| 1907 | |
| 1908 | for (i = apertures; i < max_apertures; ++i) { |
| 1909 | ret = alloc_new_range(dma_dom, false, GFP_KERNEL); |
| 1910 | if (ret) |
| 1911 | break; |
| 1912 | } |
| 1913 | |
| 1914 | return ret; |
| 1915 | } |
| 1916 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1917 | /* |
| 1918 | * Allocates a new protection domain usable for the dma_ops functions. |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1919 | * It also initializes the page table and the address allocator data |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1920 | * structures required for the dma_ops interface |
| 1921 | */ |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 1922 | static struct dma_ops_domain *dma_ops_domain_alloc(void) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1923 | { |
| 1924 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1925 | int cpu; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1926 | |
| 1927 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 1928 | if (!dma_dom) |
| 1929 | return NULL; |
| 1930 | |
Joerg Roedel | 7a5a566 | 2015-06-30 08:56:11 +0200 | [diff] [blame] | 1931 | if (protection_domain_init(&dma_dom->domain)) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1932 | goto free_dma_dom; |
Joerg Roedel | 7a5a566 | 2015-06-30 08:56:11 +0200 | [diff] [blame] | 1933 | |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1934 | dma_dom->next_index = alloc_percpu(u32); |
| 1935 | if (!dma_dom->next_index) |
| 1936 | goto free_dma_dom; |
| 1937 | |
Joerg Roedel | 8f7a017 | 2009-09-02 16:55:24 +0200 | [diff] [blame] | 1938 | dma_dom->domain.mode = PAGE_MODE_2_LEVEL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1939 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 1940 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1941 | dma_dom->domain.priv = dma_dom; |
| 1942 | if (!dma_dom->domain.pt_root) |
| 1943 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1944 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1945 | add_domain_to_list(&dma_dom->domain); |
| 1946 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1947 | if (alloc_new_range(dma_dom, true, GFP_KERNEL)) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1948 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1949 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1950 | /* |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1951 | * mark the first page as allocated so we never return 0 as |
| 1952 | * a valid dma-address. So we can use 0 as error value |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1953 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1954 | dma_dom->aperture[0]->bitmap[0] = 1; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1955 | |
Joerg Roedel | 5f6bed5 | 2015-12-22 13:34:22 +0100 | [diff] [blame] | 1956 | for_each_possible_cpu(cpu) |
| 1957 | *per_cpu_ptr(dma_dom->next_index, cpu) = 0; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1958 | |
| 1959 | return dma_dom; |
| 1960 | |
| 1961 | free_dma_dom: |
| 1962 | dma_ops_domain_free(dma_dom); |
| 1963 | |
| 1964 | return NULL; |
| 1965 | } |
| 1966 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1967 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1968 | * little helper function to check whether a given protection domain is a |
| 1969 | * dma_ops domain |
| 1970 | */ |
| 1971 | static bool dma_ops_domain(struct protection_domain *domain) |
| 1972 | { |
| 1973 | return domain->flags & PD_DMA_OPS_MASK; |
| 1974 | } |
| 1975 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 1976 | static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1977 | { |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 1978 | u64 pte_root = 0; |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 1979 | u64 flags = 0; |
Joerg Roedel | 863c74e | 2008-12-02 17:56:36 +0100 | [diff] [blame] | 1980 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 1981 | if (domain->mode != PAGE_MODE_NONE) |
| 1982 | pte_root = virt_to_phys(domain->pt_root); |
| 1983 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 1984 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 1985 | << DEV_ENTRY_MODE_SHIFT; |
| 1986 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1987 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 1988 | flags = amd_iommu_dev_table[devid].data[1]; |
| 1989 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 1990 | if (ats) |
| 1991 | flags |= DTE_FLAG_IOTLB; |
| 1992 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1993 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 1994 | u64 gcr3 = __pa(domain->gcr3_tbl); |
| 1995 | u64 glx = domain->glx; |
| 1996 | u64 tmp; |
| 1997 | |
| 1998 | pte_root |= DTE_FLAG_GV; |
| 1999 | pte_root |= (glx & DTE_GLX_MASK) << DTE_GLX_SHIFT; |
| 2000 | |
| 2001 | /* First mask out possible old values for GCR3 table */ |
| 2002 | tmp = DTE_GCR3_VAL_B(~0ULL) << DTE_GCR3_SHIFT_B; |
| 2003 | flags &= ~tmp; |
| 2004 | |
| 2005 | tmp = DTE_GCR3_VAL_C(~0ULL) << DTE_GCR3_SHIFT_C; |
| 2006 | flags &= ~tmp; |
| 2007 | |
| 2008 | /* Encode GCR3 table into DTE */ |
| 2009 | tmp = DTE_GCR3_VAL_A(gcr3) << DTE_GCR3_SHIFT_A; |
| 2010 | pte_root |= tmp; |
| 2011 | |
| 2012 | tmp = DTE_GCR3_VAL_B(gcr3) << DTE_GCR3_SHIFT_B; |
| 2013 | flags |= tmp; |
| 2014 | |
| 2015 | tmp = DTE_GCR3_VAL_C(gcr3) << DTE_GCR3_SHIFT_C; |
| 2016 | flags |= tmp; |
| 2017 | } |
| 2018 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2019 | flags &= ~(0xffffUL); |
| 2020 | flags |= domain->id; |
| 2021 | |
| 2022 | amd_iommu_dev_table[devid].data[1] = flags; |
| 2023 | amd_iommu_dev_table[devid].data[0] = pte_root; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2024 | } |
| 2025 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2026 | static void clear_dte_entry(u16 devid) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2027 | { |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2028 | /* remove entry from the device table seen by the hardware */ |
Joerg Roedel | cbf3ccd | 2015-10-20 14:59:36 +0200 | [diff] [blame] | 2029 | amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; |
| 2030 | amd_iommu_dev_table[devid].data[1] &= DTE_FLAG_MASK; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2031 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 2032 | amd_iommu_apply_erratum_63(devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2033 | } |
| 2034 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2035 | static void do_attach(struct iommu_dev_data *dev_data, |
| 2036 | struct protection_domain *domain) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2037 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2038 | struct amd_iommu *iommu; |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2039 | u16 alias; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2040 | bool ats; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2041 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2042 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2043 | alias = amd_iommu_alias_table[dev_data->devid]; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2044 | ats = dev_data->ats.enabled; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2045 | |
| 2046 | /* Update data structures */ |
| 2047 | dev_data->domain = domain; |
| 2048 | list_add(&dev_data->list, &domain->dev_list); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2049 | |
| 2050 | /* Do reference counting */ |
| 2051 | domain->dev_iommu[iommu->index] += 1; |
| 2052 | domain->dev_cnt += 1; |
| 2053 | |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2054 | /* Update device table */ |
| 2055 | set_dte_entry(dev_data->devid, domain, ats); |
| 2056 | if (alias != dev_data->devid) |
Baoquan He | 9b1a12d | 2016-01-20 22:01:19 +0800 | [diff] [blame] | 2057 | set_dte_entry(alias, domain, ats); |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2058 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 2059 | device_flush_dte(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2060 | } |
| 2061 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2062 | static void do_detach(struct iommu_dev_data *dev_data) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2063 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2064 | struct amd_iommu *iommu; |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2065 | u16 alias; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2066 | |
Joerg Roedel | 5adad99 | 2015-10-09 16:23:33 +0200 | [diff] [blame] | 2067 | /* |
| 2068 | * First check if the device is still attached. It might already |
| 2069 | * be detached from its domain because the generic |
| 2070 | * iommu_detach_group code detached it and we try again here in |
| 2071 | * our alias handling. |
| 2072 | */ |
| 2073 | if (!dev_data->domain) |
| 2074 | return; |
| 2075 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2076 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2077 | alias = amd_iommu_alias_table[dev_data->devid]; |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 2078 | |
Joerg Roedel | c459611 | 2009-11-20 14:57:32 +0100 | [diff] [blame] | 2079 | /* decrease reference counters */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2080 | dev_data->domain->dev_iommu[iommu->index] -= 1; |
| 2081 | dev_data->domain->dev_cnt -= 1; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2082 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2083 | /* Update data structures */ |
| 2084 | dev_data->domain = NULL; |
| 2085 | list_del(&dev_data->list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 2086 | clear_dte_entry(dev_data->devid); |
Joerg Roedel | e25bfb5 | 2015-10-20 17:33:38 +0200 | [diff] [blame] | 2087 | if (alias != dev_data->devid) |
| 2088 | clear_dte_entry(alias); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2089 | |
| 2090 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 2091 | device_flush_dte(dev_data); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2092 | } |
| 2093 | |
| 2094 | /* |
| 2095 | * If a device is not yet associated with a domain, this function does |
| 2096 | * assigns it visible for the hardware |
| 2097 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2098 | static int __attach_device(struct iommu_dev_data *dev_data, |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2099 | struct protection_domain *domain) |
| 2100 | { |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2101 | int ret; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2102 | |
Joerg Roedel | 272e4f9 | 2015-10-20 17:33:37 +0200 | [diff] [blame] | 2103 | /* |
| 2104 | * Must be called with IRQs disabled. Warn here to detect early |
| 2105 | * when its not. |
| 2106 | */ |
| 2107 | WARN_ON(!irqs_disabled()); |
| 2108 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2109 | /* lock domain */ |
| 2110 | spin_lock(&domain->lock); |
| 2111 | |
Joerg Roedel | 397111a | 2014-08-05 17:31:51 +0200 | [diff] [blame] | 2112 | ret = -EBUSY; |
Joerg Roedel | 150952f | 2015-10-20 17:33:35 +0200 | [diff] [blame] | 2113 | if (dev_data->domain != NULL) |
Joerg Roedel | 397111a | 2014-08-05 17:31:51 +0200 | [diff] [blame] | 2114 | goto out_unlock; |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2115 | |
Joerg Roedel | 397111a | 2014-08-05 17:31:51 +0200 | [diff] [blame] | 2116 | /* Attach alias group root */ |
Joerg Roedel | 150952f | 2015-10-20 17:33:35 +0200 | [diff] [blame] | 2117 | do_attach(dev_data, domain); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2118 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2119 | ret = 0; |
| 2120 | |
| 2121 | out_unlock: |
| 2122 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2123 | /* ready */ |
| 2124 | spin_unlock(&domain->lock); |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2125 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2126 | return ret; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2127 | } |
| 2128 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2129 | |
| 2130 | static void pdev_iommuv2_disable(struct pci_dev *pdev) |
| 2131 | { |
| 2132 | pci_disable_ats(pdev); |
| 2133 | pci_disable_pri(pdev); |
| 2134 | pci_disable_pasid(pdev); |
| 2135 | } |
| 2136 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2137 | /* FIXME: Change generic reset-function to do the same */ |
| 2138 | static int pri_reset_while_enabled(struct pci_dev *pdev) |
| 2139 | { |
| 2140 | u16 control; |
| 2141 | int pos; |
| 2142 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2143 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2144 | if (!pos) |
| 2145 | return -EINVAL; |
| 2146 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2147 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 2148 | control |= PCI_PRI_CTRL_RESET; |
| 2149 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2150 | |
| 2151 | return 0; |
| 2152 | } |
| 2153 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2154 | static int pdev_iommuv2_enable(struct pci_dev *pdev) |
| 2155 | { |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2156 | bool reset_enable; |
| 2157 | int reqs, ret; |
| 2158 | |
| 2159 | /* FIXME: Hardcode number of outstanding requests for now */ |
| 2160 | reqs = 32; |
| 2161 | if (pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE)) |
| 2162 | reqs = 1; |
| 2163 | reset_enable = pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_ENABLE_RESET); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2164 | |
| 2165 | /* Only allow access to user-accessible pages */ |
| 2166 | ret = pci_enable_pasid(pdev, 0); |
| 2167 | if (ret) |
| 2168 | goto out_err; |
| 2169 | |
| 2170 | /* First reset the PRI state of the device */ |
| 2171 | ret = pci_reset_pri(pdev); |
| 2172 | if (ret) |
| 2173 | goto out_err; |
| 2174 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2175 | /* Enable PRI */ |
| 2176 | ret = pci_enable_pri(pdev, reqs); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2177 | if (ret) |
| 2178 | goto out_err; |
| 2179 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2180 | if (reset_enable) { |
| 2181 | ret = pri_reset_while_enabled(pdev); |
| 2182 | if (ret) |
| 2183 | goto out_err; |
| 2184 | } |
| 2185 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2186 | ret = pci_enable_ats(pdev, PAGE_SHIFT); |
| 2187 | if (ret) |
| 2188 | goto out_err; |
| 2189 | |
| 2190 | return 0; |
| 2191 | |
| 2192 | out_err: |
| 2193 | pci_disable_pri(pdev); |
| 2194 | pci_disable_pasid(pdev); |
| 2195 | |
| 2196 | return ret; |
| 2197 | } |
| 2198 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2199 | /* FIXME: Move this to PCI code */ |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2200 | #define PCI_PRI_TLP_OFF (1 << 15) |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2201 | |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame] | 2202 | static bool pci_pri_tlp_required(struct pci_dev *pdev) |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2203 | { |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2204 | u16 status; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2205 | int pos; |
| 2206 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2207 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2208 | if (!pos) |
| 2209 | return false; |
| 2210 | |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2211 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2212 | |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2213 | return (status & PCI_PRI_TLP_OFF) ? true : false; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2214 | } |
| 2215 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2216 | /* |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 2217 | * If a device is not yet associated with a domain, this function |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2218 | * assigns it visible for the hardware |
| 2219 | */ |
| 2220 | static int attach_device(struct device *dev, |
| 2221 | struct protection_domain *domain) |
| 2222 | { |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2223 | struct pci_dev *pdev = to_pci_dev(dev); |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2224 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2225 | unsigned long flags; |
| 2226 | int ret; |
| 2227 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2228 | dev_data = get_dev_data(dev); |
| 2229 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2230 | if (domain->flags & PD_IOMMUV2_MASK) { |
Joerg Roedel | 02ca202 | 2015-07-28 16:58:49 +0200 | [diff] [blame] | 2231 | if (!dev_data->passthrough) |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2232 | return -EINVAL; |
| 2233 | |
Joerg Roedel | 02ca202 | 2015-07-28 16:58:49 +0200 | [diff] [blame] | 2234 | if (dev_data->iommu_v2) { |
| 2235 | if (pdev_iommuv2_enable(pdev) != 0) |
| 2236 | return -EINVAL; |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2237 | |
Joerg Roedel | 02ca202 | 2015-07-28 16:58:49 +0200 | [diff] [blame] | 2238 | dev_data->ats.enabled = true; |
| 2239 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
| 2240 | dev_data->pri_tlp = pci_pri_tlp_required(pdev); |
| 2241 | } |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2242 | } else if (amd_iommu_iotlb_sup && |
| 2243 | pci_enable_ats(pdev, PAGE_SHIFT) == 0) { |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2244 | dev_data->ats.enabled = true; |
| 2245 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
| 2246 | } |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2247 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2248 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2249 | ret = __attach_device(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2250 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2251 | |
| 2252 | /* |
| 2253 | * We might boot into a crash-kernel here. The crashed kernel |
| 2254 | * left the caches in the IOMMU dirty. So we have to flush |
| 2255 | * here to evict all dirty stuff. |
| 2256 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2257 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2258 | |
| 2259 | return ret; |
| 2260 | } |
| 2261 | |
| 2262 | /* |
| 2263 | * Removes a device from a protection domain (unlocked) |
| 2264 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2265 | static void __detach_device(struct iommu_dev_data *dev_data) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2266 | { |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2267 | struct protection_domain *domain; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2268 | |
Joerg Roedel | 272e4f9 | 2015-10-20 17:33:37 +0200 | [diff] [blame] | 2269 | /* |
| 2270 | * Must be called with IRQs disabled. Warn here to detect early |
| 2271 | * when its not. |
| 2272 | */ |
| 2273 | WARN_ON(!irqs_disabled()); |
| 2274 | |
Joerg Roedel | f34c73f | 2015-10-20 17:33:34 +0200 | [diff] [blame] | 2275 | if (WARN_ON(!dev_data->domain)) |
| 2276 | return; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2277 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2278 | domain = dev_data->domain; |
| 2279 | |
Joerg Roedel | f1dd0a8 | 2015-10-20 17:33:36 +0200 | [diff] [blame] | 2280 | spin_lock(&domain->lock); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2281 | |
Joerg Roedel | 150952f | 2015-10-20 17:33:35 +0200 | [diff] [blame] | 2282 | do_detach(dev_data); |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2283 | |
Joerg Roedel | f1dd0a8 | 2015-10-20 17:33:36 +0200 | [diff] [blame] | 2284 | spin_unlock(&domain->lock); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2285 | } |
| 2286 | |
| 2287 | /* |
| 2288 | * Removes a device from a protection domain (with devtable_lock held) |
| 2289 | */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2290 | static void detach_device(struct device *dev) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2291 | { |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2292 | struct protection_domain *domain; |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2293 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2294 | unsigned long flags; |
| 2295 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2296 | dev_data = get_dev_data(dev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2297 | domain = dev_data->domain; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2298 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2299 | /* lock device table */ |
| 2300 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2301 | __detach_device(dev_data); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2302 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2303 | |
Joerg Roedel | 02ca202 | 2015-07-28 16:58:49 +0200 | [diff] [blame] | 2304 | if (domain->flags & PD_IOMMUV2_MASK && dev_data->iommu_v2) |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2305 | pdev_iommuv2_disable(to_pci_dev(dev)); |
| 2306 | else if (dev_data->ats.enabled) |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2307 | pci_disable_ats(to_pci_dev(dev)); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2308 | |
| 2309 | dev_data->ats.enabled = false; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2310 | } |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2311 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2312 | static int amd_iommu_add_device(struct device *dev) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2313 | { |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2314 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 07ee869 | 2015-05-28 18:41:42 +0200 | [diff] [blame] | 2315 | struct iommu_domain *domain; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2316 | struct amd_iommu *iommu; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2317 | u16 devid; |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2318 | int ret; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2319 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2320 | if (!check_device(dev) || get_dev_data(dev)) |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2321 | return 0; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2322 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2323 | devid = get_device_id(dev); |
| 2324 | iommu = amd_iommu_rlookup_table[devid]; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2325 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2326 | ret = iommu_init_device(dev); |
Joerg Roedel | 4d58b8a | 2015-06-11 09:21:39 +0200 | [diff] [blame] | 2327 | if (ret) { |
| 2328 | if (ret != -ENOTSUPP) |
| 2329 | pr_err("Failed to initialize device %s - trying to proceed anyway\n", |
| 2330 | dev_name(dev)); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2331 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2332 | iommu_ignore_device(dev); |
Joerg Roedel | 343e9ca | 2015-05-28 18:41:43 +0200 | [diff] [blame] | 2333 | dev->archdata.dma_ops = &nommu_dma_ops; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2334 | goto out; |
| 2335 | } |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2336 | init_iommu_group(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2337 | |
Joerg Roedel | 07ee869 | 2015-05-28 18:41:42 +0200 | [diff] [blame] | 2338 | dev_data = get_dev_data(dev); |
Joerg Roedel | 4d58b8a | 2015-06-11 09:21:39 +0200 | [diff] [blame] | 2339 | |
| 2340 | BUG_ON(!dev_data); |
| 2341 | |
Joerg Roedel | 1e6a7b0 | 2015-07-28 16:58:48 +0200 | [diff] [blame] | 2342 | if (iommu_pass_through || dev_data->iommu_v2) |
Joerg Roedel | 07ee869 | 2015-05-28 18:41:42 +0200 | [diff] [blame] | 2343 | iommu_request_dm_for_dev(dev); |
| 2344 | |
| 2345 | /* Domains are initialized for this device - have a look what we ended up with */ |
| 2346 | domain = iommu_get_domain_for_dev(dev); |
Joerg Roedel | 3230232 | 2015-07-28 16:58:50 +0200 | [diff] [blame] | 2347 | if (domain->type == IOMMU_DOMAIN_IDENTITY) |
Joerg Roedel | 07ee869 | 2015-05-28 18:41:42 +0200 | [diff] [blame] | 2348 | dev_data->passthrough = true; |
Joerg Roedel | 3230232 | 2015-07-28 16:58:50 +0200 | [diff] [blame] | 2349 | else |
Joerg Roedel | 07ee869 | 2015-05-28 18:41:42 +0200 | [diff] [blame] | 2350 | dev->archdata.dma_ops = &amd_iommu_dma_ops; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2351 | |
| 2352 | out: |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2353 | iommu_completion_wait(iommu); |
| 2354 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2355 | return 0; |
| 2356 | } |
| 2357 | |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2358 | static void amd_iommu_remove_device(struct device *dev) |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 2359 | { |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 2360 | struct amd_iommu *iommu; |
| 2361 | u16 devid; |
| 2362 | |
| 2363 | if (!check_device(dev)) |
| 2364 | return; |
| 2365 | |
| 2366 | devid = get_device_id(dev); |
| 2367 | iommu = amd_iommu_rlookup_table[devid]; |
| 2368 | |
| 2369 | iommu_uninit_device(dev); |
| 2370 | iommu_completion_wait(iommu); |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 2371 | } |
| 2372 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2373 | /***************************************************************************** |
| 2374 | * |
| 2375 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 2376 | * |
| 2377 | *****************************************************************************/ |
| 2378 | |
| 2379 | /* |
| 2380 | * In the dma_ops path we only have the struct device. This function |
| 2381 | * finds the corresponding IOMMU, the protection domain and the |
| 2382 | * requestor id for a given device. |
| 2383 | * If the device is not yet associated with a domain this is also done |
| 2384 | * in this function. |
| 2385 | */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2386 | static struct protection_domain *get_domain(struct device *dev) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2387 | { |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2388 | struct protection_domain *domain; |
Joerg Roedel | 063071d | 2015-05-28 18:41:38 +0200 | [diff] [blame] | 2389 | struct iommu_domain *io_domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2390 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2391 | if (!check_device(dev)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2392 | return ERR_PTR(-EINVAL); |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2393 | |
Joerg Roedel | 063071d | 2015-05-28 18:41:38 +0200 | [diff] [blame] | 2394 | io_domain = iommu_get_domain_for_dev(dev); |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 2395 | if (!io_domain) |
| 2396 | return NULL; |
Joerg Roedel | 063071d | 2015-05-28 18:41:38 +0200 | [diff] [blame] | 2397 | |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 2398 | domain = to_pdomain(io_domain); |
| 2399 | if (!dma_ops_domain(domain)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2400 | return ERR_PTR(-EBUSY); |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2401 | |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 2402 | return domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2403 | } |
| 2404 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2405 | static void update_device_table(struct protection_domain *domain) |
| 2406 | { |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2407 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2408 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2409 | list_for_each_entry(dev_data, &domain->dev_list, list) |
| 2410 | set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2411 | } |
| 2412 | |
| 2413 | static void update_domain(struct protection_domain *domain) |
| 2414 | { |
| 2415 | if (!domain->updated) |
| 2416 | return; |
| 2417 | |
| 2418 | update_device_table(domain); |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2419 | |
| 2420 | domain_flush_devices(domain); |
| 2421 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2422 | |
| 2423 | domain->updated = false; |
| 2424 | } |
| 2425 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2426 | /* |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2427 | * This function fetches the PTE for a given address in the aperture |
| 2428 | */ |
| 2429 | static u64* dma_ops_get_pte(struct dma_ops_domain *dom, |
| 2430 | unsigned long address) |
| 2431 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2432 | struct aperture_range *aperture; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2433 | u64 *pte, *pte_page; |
| 2434 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2435 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2436 | if (!aperture) |
| 2437 | return NULL; |
| 2438 | |
| 2439 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2440 | if (!pte) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 2441 | pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 2442 | GFP_ATOMIC); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2443 | aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page; |
| 2444 | } else |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2445 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2446 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2447 | update_domain(&dom->domain); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2448 | |
| 2449 | return pte; |
| 2450 | } |
| 2451 | |
| 2452 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2453 | * This is the generic map function. It maps one 4kb page at paddr to |
| 2454 | * the given address in the DMA address space for the domain. |
| 2455 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2456 | static dma_addr_t dma_ops_domain_map(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2457 | unsigned long address, |
| 2458 | phys_addr_t paddr, |
| 2459 | int direction) |
| 2460 | { |
| 2461 | u64 *pte, __pte; |
| 2462 | |
| 2463 | WARN_ON(address > dom->aperture_size); |
| 2464 | |
| 2465 | paddr &= PAGE_MASK; |
| 2466 | |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2467 | pte = dma_ops_get_pte(dom, address); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2468 | if (!pte) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2469 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2470 | |
| 2471 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 2472 | |
| 2473 | if (direction == DMA_TO_DEVICE) |
| 2474 | __pte |= IOMMU_PTE_IR; |
| 2475 | else if (direction == DMA_FROM_DEVICE) |
| 2476 | __pte |= IOMMU_PTE_IW; |
| 2477 | else if (direction == DMA_BIDIRECTIONAL) |
| 2478 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 2479 | |
Joerg Roedel | a7fb668 | 2015-12-21 12:50:54 +0100 | [diff] [blame] | 2480 | WARN_ON_ONCE(*pte); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2481 | |
| 2482 | *pte = __pte; |
| 2483 | |
| 2484 | return (dma_addr_t)address; |
| 2485 | } |
| 2486 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2487 | /* |
| 2488 | * The generic unmapping function for on page in the DMA address space. |
| 2489 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2490 | static void dma_ops_domain_unmap(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2491 | unsigned long address) |
| 2492 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2493 | struct aperture_range *aperture; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2494 | u64 *pte; |
| 2495 | |
| 2496 | if (address >= dom->aperture_size) |
| 2497 | return; |
| 2498 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2499 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2500 | if (!aperture) |
| 2501 | return; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2502 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2503 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
| 2504 | if (!pte) |
| 2505 | return; |
| 2506 | |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2507 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2508 | |
Joerg Roedel | a7fb668 | 2015-12-21 12:50:54 +0100 | [diff] [blame] | 2509 | WARN_ON_ONCE(!*pte); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2510 | |
| 2511 | *pte = 0ULL; |
| 2512 | } |
| 2513 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2514 | /* |
| 2515 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 2516 | * contiguous memory region into DMA address space. It is used by all |
| 2517 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2518 | * Must be called with the domain lock held. |
| 2519 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2520 | static dma_addr_t __map_single(struct device *dev, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2521 | struct dma_ops_domain *dma_dom, |
| 2522 | phys_addr_t paddr, |
| 2523 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2524 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2525 | bool align, |
| 2526 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2527 | { |
| 2528 | dma_addr_t offset = paddr & ~PAGE_MASK; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2529 | dma_addr_t address, start, ret; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2530 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2531 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2532 | int i; |
| 2533 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2534 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2535 | paddr &= PAGE_MASK; |
| 2536 | |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 2537 | INC_STATS_COUNTER(total_map_requests); |
| 2538 | |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 2539 | if (pages > 1) |
| 2540 | INC_STATS_COUNTER(cross_page); |
| 2541 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2542 | if (align) |
| 2543 | align_mask = (1UL << get_order(size)) - 1; |
| 2544 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2545 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 2546 | dma_mask); |
Joerg Roedel | ebaecb4 | 2015-12-21 18:11:32 +0100 | [diff] [blame] | 2547 | |
Joerg Roedel | 266a3bd | 2015-12-21 18:54:24 +0100 | [diff] [blame] | 2548 | if (address == DMA_ERROR_CODE) |
| 2549 | goto out; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2550 | |
| 2551 | start = address; |
| 2552 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2553 | ret = dma_ops_domain_map(dma_dom, start, paddr, dir); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2554 | if (ret == DMA_ERROR_CODE) |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2555 | goto out_unmap; |
| 2556 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2557 | paddr += PAGE_SIZE; |
| 2558 | start += PAGE_SIZE; |
| 2559 | } |
| 2560 | address += offset; |
| 2561 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2562 | ADD_STATS_COUNTER(alloced_io_mem, size); |
| 2563 | |
Joerg Roedel | ab7032b | 2015-12-21 18:47:11 +0100 | [diff] [blame] | 2564 | if (unlikely(amd_iommu_np_cache)) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2565 | domain_flush_pages(&dma_dom->domain, address, size); |
Joerg Roedel | ab7032b | 2015-12-21 18:47:11 +0100 | [diff] [blame] | 2566 | domain_flush_complete(&dma_dom->domain); |
| 2567 | } |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2568 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2569 | out: |
| 2570 | return address; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2571 | |
| 2572 | out_unmap: |
| 2573 | |
| 2574 | for (--i; i >= 0; --i) { |
| 2575 | start -= PAGE_SIZE; |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2576 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2577 | } |
| 2578 | |
| 2579 | dma_ops_free_addresses(dma_dom, address, pages); |
| 2580 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2581 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2582 | } |
| 2583 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2584 | /* |
| 2585 | * Does the reverse of the __map_single function. Must be called with |
| 2586 | * the domain lock held too |
| 2587 | */ |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2588 | static void __unmap_single(struct dma_ops_domain *dma_dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2589 | dma_addr_t dma_addr, |
| 2590 | size_t size, |
| 2591 | int dir) |
| 2592 | { |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2593 | dma_addr_t flush_addr; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2594 | dma_addr_t i, start; |
| 2595 | unsigned int pages; |
| 2596 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2597 | if ((dma_addr == DMA_ERROR_CODE) || |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 2598 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2599 | return; |
| 2600 | |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2601 | flush_addr = dma_addr; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2602 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2603 | dma_addr &= PAGE_MASK; |
| 2604 | start = dma_addr; |
| 2605 | |
| 2606 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2607 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2608 | start += PAGE_SIZE; |
| 2609 | } |
| 2610 | |
Joerg Roedel | 84b3a0b | 2015-12-21 13:23:59 +0100 | [diff] [blame] | 2611 | SUB_STATS_COUNTER(alloced_io_mem, size); |
| 2612 | |
| 2613 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2614 | } |
| 2615 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2616 | /* |
| 2617 | * The exported map_single function for dma_ops. |
| 2618 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2619 | static dma_addr_t map_page(struct device *dev, struct page *page, |
| 2620 | unsigned long offset, size_t size, |
| 2621 | enum dma_data_direction dir, |
| 2622 | struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2623 | { |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2624 | phys_addr_t paddr = page_to_phys(page) + offset; |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 2625 | struct protection_domain *domain; |
| 2626 | u64 dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2627 | |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 2628 | INC_STATS_COUNTER(cnt_map_single); |
| 2629 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2630 | domain = get_domain(dev); |
| 2631 | if (PTR_ERR(domain) == -EINVAL) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2632 | return (dma_addr_t)paddr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2633 | else if (IS_ERR(domain)) |
| 2634 | return DMA_ERROR_CODE; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2635 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2636 | dma_mask = *dev->dma_mask; |
| 2637 | |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 2638 | return __map_single(dev, domain->priv, paddr, size, dir, false, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2639 | dma_mask); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2640 | } |
| 2641 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2642 | /* |
| 2643 | * The exported unmap_single function for dma_ops. |
| 2644 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2645 | static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
| 2646 | enum dma_data_direction dir, struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2647 | { |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2648 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2649 | |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 2650 | INC_STATS_COUNTER(cnt_unmap_single); |
| 2651 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2652 | domain = get_domain(dev); |
| 2653 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2654 | return; |
| 2655 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2656 | __unmap_single(domain->priv, dma_addr, size, dir); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2657 | } |
| 2658 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2659 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2660 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2661 | * lists). |
| 2662 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2663 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2664 | int nelems, enum dma_data_direction dir, |
| 2665 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2666 | { |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2667 | struct protection_domain *domain; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2668 | int i; |
| 2669 | struct scatterlist *s; |
| 2670 | phys_addr_t paddr; |
| 2671 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2672 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2673 | |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 2674 | INC_STATS_COUNTER(cnt_map_sg); |
| 2675 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2676 | domain = get_domain(dev); |
Joerg Roedel | a0e191b | 2013-04-09 15:04:36 +0200 | [diff] [blame] | 2677 | if (IS_ERR(domain)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2678 | return 0; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2679 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2680 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2681 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2682 | for_each_sg(sglist, s, nelems, i) { |
| 2683 | paddr = sg_phys(s); |
| 2684 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2685 | s->dma_address = __map_single(dev, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2686 | paddr, s->length, dir, false, |
| 2687 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2688 | |
| 2689 | if (s->dma_address) { |
| 2690 | s->dma_length = s->length; |
| 2691 | mapped_elems++; |
| 2692 | } else |
| 2693 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2694 | } |
| 2695 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2696 | return mapped_elems; |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 2697 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2698 | unmap: |
| 2699 | for_each_sg(sglist, s, mapped_elems, i) { |
| 2700 | if (s->dma_address) |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2701 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2702 | s->dma_length, dir); |
| 2703 | s->dma_address = s->dma_length = 0; |
| 2704 | } |
| 2705 | |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 2706 | return 0; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2707 | } |
| 2708 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2709 | /* |
| 2710 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2711 | * lists). |
| 2712 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2713 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2714 | int nelems, enum dma_data_direction dir, |
| 2715 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2716 | { |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2717 | struct protection_domain *domain; |
| 2718 | struct scatterlist *s; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2719 | int i; |
| 2720 | |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 2721 | INC_STATS_COUNTER(cnt_unmap_sg); |
| 2722 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2723 | domain = get_domain(dev); |
| 2724 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2725 | return; |
| 2726 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2727 | for_each_sg(sglist, s, nelems, i) { |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2728 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2729 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2730 | s->dma_address = s->dma_length = 0; |
| 2731 | } |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2732 | } |
| 2733 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2734 | /* |
| 2735 | * The exported alloc_coherent function for dma_ops. |
| 2736 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2737 | static void *alloc_coherent(struct device *dev, size_t size, |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 2738 | dma_addr_t *dma_addr, gfp_t flag, |
| 2739 | struct dma_attrs *attrs) |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2740 | { |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2741 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2742 | struct protection_domain *domain; |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2743 | struct page *page; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2744 | |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 2745 | INC_STATS_COUNTER(cnt_alloc_coherent); |
| 2746 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2747 | domain = get_domain(dev); |
| 2748 | if (PTR_ERR(domain) == -EINVAL) { |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2749 | page = alloc_pages(flag, get_order(size)); |
| 2750 | *dma_addr = page_to_phys(page); |
| 2751 | return page_address(page); |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2752 | } else if (IS_ERR(domain)) |
| 2753 | return NULL; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2754 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2755 | size = PAGE_ALIGN(size); |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2756 | dma_mask = dev->coherent_dma_mask; |
| 2757 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
Joerg Roedel | 2d0ec7a | 2015-06-01 17:30:57 +0200 | [diff] [blame] | 2758 | flag |= __GFP_ZERO; |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 2759 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2760 | page = alloc_pages(flag | __GFP_NOWARN, get_order(size)); |
| 2761 | if (!page) { |
Mel Gorman | d0164ad | 2015-11-06 16:28:21 -0800 | [diff] [blame] | 2762 | if (!gfpflags_allow_blocking(flag)) |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2763 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2764 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2765 | page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT, |
| 2766 | get_order(size)); |
| 2767 | if (!page) |
| 2768 | return NULL; |
| 2769 | } |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2770 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2771 | if (!dma_mask) |
| 2772 | dma_mask = *dev->dma_mask; |
| 2773 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2774 | *dma_addr = __map_single(dev, domain->priv, page_to_phys(page), |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2775 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2776 | |
Joerg Roedel | 92d420e | 2015-12-21 19:31:33 +0100 | [diff] [blame] | 2777 | if (*dma_addr == DMA_ERROR_CODE) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2778 | goto out_free; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2779 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2780 | return page_address(page); |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2781 | |
| 2782 | out_free: |
| 2783 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2784 | if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT)) |
| 2785 | __free_pages(page, get_order(size)); |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2786 | |
| 2787 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2788 | } |
| 2789 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2790 | /* |
| 2791 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2792 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2793 | static void free_coherent(struct device *dev, size_t size, |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 2794 | void *virt_addr, dma_addr_t dma_addr, |
| 2795 | struct dma_attrs *attrs) |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2796 | { |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2797 | struct protection_domain *domain; |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2798 | struct page *page; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2799 | |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 2800 | INC_STATS_COUNTER(cnt_free_coherent); |
| 2801 | |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2802 | page = virt_to_page(virt_addr); |
| 2803 | size = PAGE_ALIGN(size); |
| 2804 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2805 | domain = get_domain(dev); |
| 2806 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2807 | goto free_mem; |
| 2808 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2809 | __unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2810 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2811 | free_mem: |
Joerg Roedel | 3b839a5 | 2015-04-01 14:58:47 +0200 | [diff] [blame] | 2812 | if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT)) |
| 2813 | __free_pages(page, get_order(size)); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2814 | } |
| 2815 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2816 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2817 | * This function is called by the DMA layer to find out if we can handle a |
| 2818 | * particular device. It is part of the dma_ops. |
| 2819 | */ |
| 2820 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 2821 | { |
Joerg Roedel | 420aef8 | 2009-11-23 16:14:57 +0100 | [diff] [blame] | 2822 | return check_device(dev); |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2823 | } |
| 2824 | |
Joerg Roedel | a639a8e | 2015-12-22 16:06:49 +0100 | [diff] [blame] | 2825 | static int set_dma_mask(struct device *dev, u64 mask) |
| 2826 | { |
| 2827 | struct protection_domain *domain; |
| 2828 | int max_apertures = 1; |
| 2829 | |
| 2830 | domain = get_domain(dev); |
| 2831 | if (IS_ERR(domain)) |
| 2832 | return PTR_ERR(domain); |
| 2833 | |
| 2834 | if (mask == DMA_BIT_MASK(64)) |
| 2835 | max_apertures = 8; |
| 2836 | else if (mask > DMA_BIT_MASK(32)) |
| 2837 | max_apertures = 4; |
| 2838 | |
| 2839 | /* |
| 2840 | * To prevent lock contention it doesn't make sense to allocate more |
| 2841 | * apertures than online cpus |
| 2842 | */ |
| 2843 | if (max_apertures > num_online_cpus()) |
| 2844 | max_apertures = num_online_cpus(); |
| 2845 | |
| 2846 | if (dma_ops_domain_alloc_apertures(domain->priv, max_apertures)) |
| 2847 | dev_err(dev, "Can't allocate %d iommu apertures\n", |
| 2848 | max_apertures); |
| 2849 | |
| 2850 | return 0; |
| 2851 | } |
| 2852 | |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2853 | static struct dma_map_ops amd_iommu_dma_ops = { |
Joerg Roedel | a639a8e | 2015-12-22 16:06:49 +0100 | [diff] [blame] | 2854 | .alloc = alloc_coherent, |
| 2855 | .free = free_coherent, |
| 2856 | .map_page = map_page, |
| 2857 | .unmap_page = unmap_page, |
| 2858 | .map_sg = map_sg, |
| 2859 | .unmap_sg = unmap_sg, |
| 2860 | .dma_supported = amd_iommu_dma_supported, |
| 2861 | .set_dma_mask = set_dma_mask, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2862 | }; |
| 2863 | |
Joerg Roedel | 3a18404c | 2015-05-28 18:41:45 +0200 | [diff] [blame] | 2864 | int __init amd_iommu_init_api(void) |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 2865 | { |
Joerg Roedel | 3a18404c | 2015-05-28 18:41:45 +0200 | [diff] [blame] | 2866 | return bus_set_iommu(&pci_bus_type, &amd_iommu_ops); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 2867 | } |
| 2868 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2869 | int __init amd_iommu_init_dma_ops(void) |
| 2870 | { |
Joerg Roedel | 3230232 | 2015-07-28 16:58:50 +0200 | [diff] [blame] | 2871 | swiotlb = iommu_pass_through ? 1 : 0; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2872 | iommu_detected = 1; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2873 | |
Joerg Roedel | 5271782 | 2015-07-28 16:58:51 +0200 | [diff] [blame] | 2874 | /* |
| 2875 | * In case we don't initialize SWIOTLB (actually the common case |
| 2876 | * when AMD IOMMU is enabled), make sure there are global |
| 2877 | * dma_ops set as a fall-back for devices not handled by this |
| 2878 | * driver (for example non-PCI devices). |
| 2879 | */ |
| 2880 | if (!swiotlb) |
| 2881 | dma_ops = &nommu_dma_ops; |
| 2882 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 2883 | amd_iommu_stats_init(); |
| 2884 | |
Joerg Roedel | 62410ee | 2012-06-12 16:42:43 +0200 | [diff] [blame] | 2885 | if (amd_iommu_unmap_flush) |
| 2886 | pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n"); |
| 2887 | else |
| 2888 | pr_info("AMD-Vi: Lazy IO/TLB flushing enabled\n"); |
| 2889 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2890 | return 0; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2891 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2892 | |
| 2893 | /***************************************************************************** |
| 2894 | * |
| 2895 | * The following functions belong to the exported interface of AMD IOMMU |
| 2896 | * |
| 2897 | * This interface allows access to lower level functions of the IOMMU |
| 2898 | * like protection domain handling and assignement of devices to domains |
| 2899 | * which is not possible with the dma_ops interface. |
| 2900 | * |
| 2901 | *****************************************************************************/ |
| 2902 | |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2903 | static void cleanup_domain(struct protection_domain *domain) |
| 2904 | { |
Joerg Roedel | 9b29d3c | 2014-08-05 17:50:15 +0200 | [diff] [blame] | 2905 | struct iommu_dev_data *entry; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2906 | unsigned long flags; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2907 | |
| 2908 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 2909 | |
Joerg Roedel | 9b29d3c | 2014-08-05 17:50:15 +0200 | [diff] [blame] | 2910 | while (!list_empty(&domain->dev_list)) { |
| 2911 | entry = list_first_entry(&domain->dev_list, |
| 2912 | struct iommu_dev_data, list); |
| 2913 | __detach_device(entry); |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2914 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2915 | |
| 2916 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2917 | } |
| 2918 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2919 | static void protection_domain_free(struct protection_domain *domain) |
| 2920 | { |
| 2921 | if (!domain) |
| 2922 | return; |
| 2923 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 2924 | del_domain_from_list(domain); |
| 2925 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2926 | if (domain->id) |
| 2927 | domain_id_free(domain->id); |
| 2928 | |
| 2929 | kfree(domain); |
| 2930 | } |
| 2931 | |
Joerg Roedel | 7a5a566 | 2015-06-30 08:56:11 +0200 | [diff] [blame] | 2932 | static int protection_domain_init(struct protection_domain *domain) |
| 2933 | { |
| 2934 | spin_lock_init(&domain->lock); |
| 2935 | mutex_init(&domain->api_lock); |
| 2936 | domain->id = domain_id_alloc(); |
| 2937 | if (!domain->id) |
| 2938 | return -ENOMEM; |
| 2939 | INIT_LIST_HEAD(&domain->dev_list); |
| 2940 | |
| 2941 | return 0; |
| 2942 | } |
| 2943 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2944 | static struct protection_domain *protection_domain_alloc(void) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 2945 | { |
| 2946 | struct protection_domain *domain; |
| 2947 | |
| 2948 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
| 2949 | if (!domain) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2950 | return NULL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 2951 | |
Joerg Roedel | 7a5a566 | 2015-06-30 08:56:11 +0200 | [diff] [blame] | 2952 | if (protection_domain_init(domain)) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2953 | goto out_err; |
| 2954 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 2955 | add_domain_to_list(domain); |
| 2956 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2957 | return domain; |
| 2958 | |
| 2959 | out_err: |
| 2960 | kfree(domain); |
| 2961 | |
| 2962 | return NULL; |
| 2963 | } |
| 2964 | |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 2965 | static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) |
| 2966 | { |
| 2967 | struct protection_domain *pdomain; |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 2968 | struct dma_ops_domain *dma_domain; |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 2969 | |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 2970 | switch (type) { |
| 2971 | case IOMMU_DOMAIN_UNMANAGED: |
| 2972 | pdomain = protection_domain_alloc(); |
| 2973 | if (!pdomain) |
| 2974 | return NULL; |
| 2975 | |
| 2976 | pdomain->mode = PAGE_MODE_3_LEVEL; |
| 2977 | pdomain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
| 2978 | if (!pdomain->pt_root) { |
| 2979 | protection_domain_free(pdomain); |
| 2980 | return NULL; |
| 2981 | } |
| 2982 | |
| 2983 | pdomain->domain.geometry.aperture_start = 0; |
| 2984 | pdomain->domain.geometry.aperture_end = ~0ULL; |
| 2985 | pdomain->domain.geometry.force_aperture = true; |
| 2986 | |
| 2987 | break; |
| 2988 | case IOMMU_DOMAIN_DMA: |
| 2989 | dma_domain = dma_ops_domain_alloc(); |
| 2990 | if (!dma_domain) { |
| 2991 | pr_err("AMD-Vi: Failed to allocate\n"); |
| 2992 | return NULL; |
| 2993 | } |
| 2994 | pdomain = &dma_domain->domain; |
| 2995 | break; |
Joerg Roedel | 07f643a | 2015-05-28 18:41:41 +0200 | [diff] [blame] | 2996 | case IOMMU_DOMAIN_IDENTITY: |
| 2997 | pdomain = protection_domain_alloc(); |
| 2998 | if (!pdomain) |
| 2999 | return NULL; |
| 3000 | |
| 3001 | pdomain->mode = PAGE_MODE_NONE; |
| 3002 | break; |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 3003 | default: |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3004 | return NULL; |
Joerg Roedel | 0bb6e24 | 2015-05-28 18:41:40 +0200 | [diff] [blame] | 3005 | } |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3006 | |
| 3007 | return &pdomain->domain; |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3008 | } |
| 3009 | |
| 3010 | static void amd_iommu_domain_free(struct iommu_domain *dom) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3011 | { |
| 3012 | struct protection_domain *domain; |
| 3013 | |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3014 | if (!dom) |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3015 | return; |
| 3016 | |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3017 | domain = to_pdomain(dom); |
| 3018 | |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3019 | if (domain->dev_cnt > 0) |
| 3020 | cleanup_domain(domain); |
| 3021 | |
| 3022 | BUG_ON(domain->dev_cnt != 0); |
| 3023 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3024 | if (domain->mode != PAGE_MODE_NONE) |
| 3025 | free_pagetable(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3026 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3027 | if (domain->flags & PD_IOMMUV2_MASK) |
| 3028 | free_gcr3_table(domain); |
| 3029 | |
Joerg Roedel | 8b408fe | 2010-03-08 14:20:07 +0100 | [diff] [blame] | 3030 | protection_domain_free(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3031 | } |
| 3032 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3033 | static void amd_iommu_detach_device(struct iommu_domain *dom, |
| 3034 | struct device *dev) |
| 3035 | { |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3036 | struct iommu_dev_data *dev_data = dev->archdata.iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3037 | struct amd_iommu *iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3038 | u16 devid; |
| 3039 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3040 | if (!check_device(dev)) |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3041 | return; |
| 3042 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3043 | devid = get_device_id(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3044 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3045 | if (dev_data->domain != NULL) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3046 | detach_device(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3047 | |
| 3048 | iommu = amd_iommu_rlookup_table[devid]; |
| 3049 | if (!iommu) |
| 3050 | return; |
| 3051 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3052 | iommu_completion_wait(iommu); |
| 3053 | } |
| 3054 | |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3055 | static int amd_iommu_attach_device(struct iommu_domain *dom, |
| 3056 | struct device *dev) |
| 3057 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3058 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3059 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3060 | struct amd_iommu *iommu; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3061 | int ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3062 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3063 | if (!check_device(dev)) |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3064 | return -EINVAL; |
| 3065 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3066 | dev_data = dev->archdata.iommu; |
| 3067 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 3068 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3069 | if (!iommu) |
| 3070 | return -EINVAL; |
| 3071 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3072 | if (dev_data->domain) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3073 | detach_device(dev); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3074 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3075 | ret = attach_device(dev, domain); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3076 | |
| 3077 | iommu_completion_wait(iommu); |
| 3078 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3079 | return ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3080 | } |
| 3081 | |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3082 | static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3083 | phys_addr_t paddr, size_t page_size, int iommu_prot) |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3084 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3085 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3086 | int prot = 0; |
| 3087 | int ret; |
| 3088 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3089 | if (domain->mode == PAGE_MODE_NONE) |
| 3090 | return -EINVAL; |
| 3091 | |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3092 | if (iommu_prot & IOMMU_READ) |
| 3093 | prot |= IOMMU_PROT_IR; |
| 3094 | if (iommu_prot & IOMMU_WRITE) |
| 3095 | prot |= IOMMU_PROT_IW; |
| 3096 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3097 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 795e74f7 | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3098 | ret = iommu_map_page(domain, iova, paddr, prot, page_size); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3099 | mutex_unlock(&domain->api_lock); |
| 3100 | |
Joerg Roedel | 795e74f7 | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3101 | return ret; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3102 | } |
| 3103 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3104 | static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, |
| 3105 | size_t page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3106 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3107 | struct protection_domain *domain = to_pdomain(dom); |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3108 | size_t unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3109 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3110 | if (domain->mode == PAGE_MODE_NONE) |
| 3111 | return -EINVAL; |
| 3112 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3113 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3114 | unmap_size = iommu_unmap_page(domain, iova, page_size); |
Joerg Roedel | 795e74f7 | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3115 | mutex_unlock(&domain->api_lock); |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3116 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 3117 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3118 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3119 | return unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3120 | } |
| 3121 | |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3122 | static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, |
Varun Sethi | bb5547ac | 2013-03-29 01:23:58 +0530 | [diff] [blame] | 3123 | dma_addr_t iova) |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3124 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3125 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 3126 | unsigned long offset_mask, pte_pgsize; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3127 | u64 *pte, __pte; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3128 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3129 | if (domain->mode == PAGE_MODE_NONE) |
| 3130 | return iova; |
| 3131 | |
Joerg Roedel | 3039ca1 | 2015-04-01 14:58:48 +0200 | [diff] [blame] | 3132 | pte = fetch_pte(domain, iova, &pte_pgsize); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3133 | |
Joerg Roedel | a6d41a4 | 2009-09-02 17:08:55 +0200 | [diff] [blame] | 3134 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3135 | return 0; |
| 3136 | |
Joerg Roedel | b24b1b6 | 2015-04-01 14:58:51 +0200 | [diff] [blame] | 3137 | offset_mask = pte_pgsize - 1; |
| 3138 | __pte = *pte & PM_ADDR_MASK; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3139 | |
Joerg Roedel | b24b1b6 | 2015-04-01 14:58:51 +0200 | [diff] [blame] | 3140 | return (__pte & ~offset_mask) | (iova & offset_mask); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3141 | } |
| 3142 | |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3143 | static bool amd_iommu_capable(enum iommu_cap cap) |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3144 | { |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3145 | switch (cap) { |
| 3146 | case IOMMU_CAP_CACHE_COHERENCY: |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3147 | return true; |
Joerg Roedel | bdddadc | 2012-07-02 18:38:13 +0200 | [diff] [blame] | 3148 | case IOMMU_CAP_INTR_REMAP: |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3149 | return (irq_remapping_enabled == 1); |
Will Deacon | cfdeec2 | 2014-10-27 11:24:48 +0000 | [diff] [blame] | 3150 | case IOMMU_CAP_NOEXEC: |
| 3151 | return false; |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3152 | } |
| 3153 | |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3154 | return false; |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3155 | } |
| 3156 | |
Joerg Roedel | 35cf248 | 2015-05-28 18:41:37 +0200 | [diff] [blame] | 3157 | static void amd_iommu_get_dm_regions(struct device *dev, |
| 3158 | struct list_head *head) |
| 3159 | { |
| 3160 | struct unity_map_entry *entry; |
| 3161 | u16 devid; |
| 3162 | |
| 3163 | devid = get_device_id(dev); |
| 3164 | |
| 3165 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 3166 | struct iommu_dm_region *region; |
| 3167 | |
| 3168 | if (devid < entry->devid_start || devid > entry->devid_end) |
| 3169 | continue; |
| 3170 | |
| 3171 | region = kzalloc(sizeof(*region), GFP_KERNEL); |
| 3172 | if (!region) { |
| 3173 | pr_err("Out of memory allocating dm-regions for %s\n", |
| 3174 | dev_name(dev)); |
| 3175 | return; |
| 3176 | } |
| 3177 | |
| 3178 | region->start = entry->address_start; |
| 3179 | region->length = entry->address_end - entry->address_start; |
| 3180 | if (entry->prot & IOMMU_PROT_IR) |
| 3181 | region->prot |= IOMMU_READ; |
| 3182 | if (entry->prot & IOMMU_PROT_IW) |
| 3183 | region->prot |= IOMMU_WRITE; |
| 3184 | |
| 3185 | list_add_tail(®ion->list, head); |
| 3186 | } |
| 3187 | } |
| 3188 | |
| 3189 | static void amd_iommu_put_dm_regions(struct device *dev, |
| 3190 | struct list_head *head) |
| 3191 | { |
| 3192 | struct iommu_dm_region *entry, *next; |
| 3193 | |
| 3194 | list_for_each_entry_safe(entry, next, head, list) |
| 3195 | kfree(entry); |
| 3196 | } |
| 3197 | |
Thierry Reding | b22f643 | 2014-06-27 09:03:12 +0200 | [diff] [blame] | 3198 | static const struct iommu_ops amd_iommu_ops = { |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3199 | .capable = amd_iommu_capable, |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3200 | .domain_alloc = amd_iommu_domain_alloc, |
| 3201 | .domain_free = amd_iommu_domain_free, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3202 | .attach_dev = amd_iommu_attach_device, |
| 3203 | .detach_dev = amd_iommu_detach_device, |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3204 | .map = amd_iommu_map, |
| 3205 | .unmap = amd_iommu_unmap, |
Olav Haugan | 315786e | 2014-10-25 09:55:16 -0700 | [diff] [blame] | 3206 | .map_sg = default_iommu_map_sg, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3207 | .iova_to_phys = amd_iommu_iova_to_phys, |
Joerg Roedel | aafd8ba | 2015-05-28 18:41:39 +0200 | [diff] [blame] | 3208 | .add_device = amd_iommu_add_device, |
| 3209 | .remove_device = amd_iommu_remove_device, |
Joerg Roedel | a960fad | 2015-10-21 23:51:39 +0200 | [diff] [blame] | 3210 | .device_group = pci_device_group, |
Joerg Roedel | 35cf248 | 2015-05-28 18:41:37 +0200 | [diff] [blame] | 3211 | .get_dm_regions = amd_iommu_get_dm_regions, |
| 3212 | .put_dm_regions = amd_iommu_put_dm_regions, |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 3213 | .pgsize_bitmap = AMD_IOMMU_PGSIZES, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3214 | }; |
| 3215 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3216 | /***************************************************************************** |
| 3217 | * |
| 3218 | * The next functions do a basic initialization of IOMMU for pass through |
| 3219 | * mode |
| 3220 | * |
| 3221 | * In passthrough mode the IOMMU is initialized and enabled but not used for |
| 3222 | * DMA-API translation. |
| 3223 | * |
| 3224 | *****************************************************************************/ |
| 3225 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 3226 | /* IOMMUv2 specific functions */ |
| 3227 | int amd_iommu_register_ppr_notifier(struct notifier_block *nb) |
| 3228 | { |
| 3229 | return atomic_notifier_chain_register(&ppr_notifier, nb); |
| 3230 | } |
| 3231 | EXPORT_SYMBOL(amd_iommu_register_ppr_notifier); |
| 3232 | |
| 3233 | int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb) |
| 3234 | { |
| 3235 | return atomic_notifier_chain_unregister(&ppr_notifier, nb); |
| 3236 | } |
| 3237 | EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier); |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3238 | |
| 3239 | void amd_iommu_domain_direct_map(struct iommu_domain *dom) |
| 3240 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3241 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3242 | unsigned long flags; |
| 3243 | |
| 3244 | spin_lock_irqsave(&domain->lock, flags); |
| 3245 | |
| 3246 | /* Update data structure */ |
| 3247 | domain->mode = PAGE_MODE_NONE; |
| 3248 | domain->updated = true; |
| 3249 | |
| 3250 | /* Make changes visible to IOMMUs */ |
| 3251 | update_domain(domain); |
| 3252 | |
| 3253 | /* Page-table is not visible to IOMMU anymore, so free it */ |
| 3254 | free_pagetable(domain); |
| 3255 | |
| 3256 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3257 | } |
| 3258 | EXPORT_SYMBOL(amd_iommu_domain_direct_map); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3259 | |
| 3260 | int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids) |
| 3261 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3262 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3263 | unsigned long flags; |
| 3264 | int levels, ret; |
| 3265 | |
| 3266 | if (pasids <= 0 || pasids > (PASID_MASK + 1)) |
| 3267 | return -EINVAL; |
| 3268 | |
| 3269 | /* Number of GCR3 table levels required */ |
| 3270 | for (levels = 0; (pasids - 1) & ~0x1ff; pasids >>= 9) |
| 3271 | levels += 1; |
| 3272 | |
| 3273 | if (levels > amd_iommu_max_glx_val) |
| 3274 | return -EINVAL; |
| 3275 | |
| 3276 | spin_lock_irqsave(&domain->lock, flags); |
| 3277 | |
| 3278 | /* |
| 3279 | * Save us all sanity checks whether devices already in the |
| 3280 | * domain support IOMMUv2. Just force that the domain has no |
| 3281 | * devices attached when it is switched into IOMMUv2 mode. |
| 3282 | */ |
| 3283 | ret = -EBUSY; |
| 3284 | if (domain->dev_cnt > 0 || domain->flags & PD_IOMMUV2_MASK) |
| 3285 | goto out; |
| 3286 | |
| 3287 | ret = -ENOMEM; |
| 3288 | domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3289 | if (domain->gcr3_tbl == NULL) |
| 3290 | goto out; |
| 3291 | |
| 3292 | domain->glx = levels; |
| 3293 | domain->flags |= PD_IOMMUV2_MASK; |
| 3294 | domain->updated = true; |
| 3295 | |
| 3296 | update_domain(domain); |
| 3297 | |
| 3298 | ret = 0; |
| 3299 | |
| 3300 | out: |
| 3301 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3302 | |
| 3303 | return ret; |
| 3304 | } |
| 3305 | EXPORT_SYMBOL(amd_iommu_domain_enable_v2); |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3306 | |
| 3307 | static int __flush_pasid(struct protection_domain *domain, int pasid, |
| 3308 | u64 address, bool size) |
| 3309 | { |
| 3310 | struct iommu_dev_data *dev_data; |
| 3311 | struct iommu_cmd cmd; |
| 3312 | int i, ret; |
| 3313 | |
| 3314 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3315 | return -EINVAL; |
| 3316 | |
| 3317 | build_inv_iommu_pasid(&cmd, domain->id, pasid, address, size); |
| 3318 | |
| 3319 | /* |
| 3320 | * IOMMU TLB needs to be flushed before Device TLB to |
| 3321 | * prevent device TLB refill from IOMMU TLB |
| 3322 | */ |
| 3323 | for (i = 0; i < amd_iommus_present; ++i) { |
| 3324 | if (domain->dev_iommu[i] == 0) |
| 3325 | continue; |
| 3326 | |
| 3327 | ret = iommu_queue_command(amd_iommus[i], &cmd); |
| 3328 | if (ret != 0) |
| 3329 | goto out; |
| 3330 | } |
| 3331 | |
| 3332 | /* Wait until IOMMU TLB flushes are complete */ |
| 3333 | domain_flush_complete(domain); |
| 3334 | |
| 3335 | /* Now flush device TLBs */ |
| 3336 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
| 3337 | struct amd_iommu *iommu; |
| 3338 | int qdep; |
| 3339 | |
Joerg Roedel | 1c1cc45 | 2015-07-30 11:24:45 +0200 | [diff] [blame] | 3340 | /* |
| 3341 | There might be non-IOMMUv2 capable devices in an IOMMUv2 |
| 3342 | * domain. |
| 3343 | */ |
| 3344 | if (!dev_data->ats.enabled) |
| 3345 | continue; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3346 | |
| 3347 | qdep = dev_data->ats.qdep; |
| 3348 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3349 | |
| 3350 | build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid, |
| 3351 | qdep, address, size); |
| 3352 | |
| 3353 | ret = iommu_queue_command(iommu, &cmd); |
| 3354 | if (ret != 0) |
| 3355 | goto out; |
| 3356 | } |
| 3357 | |
| 3358 | /* Wait until all device TLBs are flushed */ |
| 3359 | domain_flush_complete(domain); |
| 3360 | |
| 3361 | ret = 0; |
| 3362 | |
| 3363 | out: |
| 3364 | |
| 3365 | return ret; |
| 3366 | } |
| 3367 | |
| 3368 | static int __amd_iommu_flush_page(struct protection_domain *domain, int pasid, |
| 3369 | u64 address) |
| 3370 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3371 | INC_STATS_COUNTER(invalidate_iotlb); |
| 3372 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3373 | return __flush_pasid(domain, pasid, address, false); |
| 3374 | } |
| 3375 | |
| 3376 | int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, |
| 3377 | u64 address) |
| 3378 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3379 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3380 | unsigned long flags; |
| 3381 | int ret; |
| 3382 | |
| 3383 | spin_lock_irqsave(&domain->lock, flags); |
| 3384 | ret = __amd_iommu_flush_page(domain, pasid, address); |
| 3385 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3386 | |
| 3387 | return ret; |
| 3388 | } |
| 3389 | EXPORT_SYMBOL(amd_iommu_flush_page); |
| 3390 | |
| 3391 | static int __amd_iommu_flush_tlb(struct protection_domain *domain, int pasid) |
| 3392 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3393 | INC_STATS_COUNTER(invalidate_iotlb_all); |
| 3394 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3395 | return __flush_pasid(domain, pasid, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 3396 | true); |
| 3397 | } |
| 3398 | |
| 3399 | int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid) |
| 3400 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3401 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3402 | unsigned long flags; |
| 3403 | int ret; |
| 3404 | |
| 3405 | spin_lock_irqsave(&domain->lock, flags); |
| 3406 | ret = __amd_iommu_flush_tlb(domain, pasid); |
| 3407 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3408 | |
| 3409 | return ret; |
| 3410 | } |
| 3411 | EXPORT_SYMBOL(amd_iommu_flush_tlb); |
| 3412 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 3413 | static u64 *__get_gcr3_pte(u64 *root, int level, int pasid, bool alloc) |
| 3414 | { |
| 3415 | int index; |
| 3416 | u64 *pte; |
| 3417 | |
| 3418 | while (true) { |
| 3419 | |
| 3420 | index = (pasid >> (9 * level)) & 0x1ff; |
| 3421 | pte = &root[index]; |
| 3422 | |
| 3423 | if (level == 0) |
| 3424 | break; |
| 3425 | |
| 3426 | if (!(*pte & GCR3_VALID)) { |
| 3427 | if (!alloc) |
| 3428 | return NULL; |
| 3429 | |
| 3430 | root = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3431 | if (root == NULL) |
| 3432 | return NULL; |
| 3433 | |
| 3434 | *pte = __pa(root) | GCR3_VALID; |
| 3435 | } |
| 3436 | |
| 3437 | root = __va(*pte & PAGE_MASK); |
| 3438 | |
| 3439 | level -= 1; |
| 3440 | } |
| 3441 | |
| 3442 | return pte; |
| 3443 | } |
| 3444 | |
| 3445 | static int __set_gcr3(struct protection_domain *domain, int pasid, |
| 3446 | unsigned long cr3) |
| 3447 | { |
| 3448 | u64 *pte; |
| 3449 | |
| 3450 | if (domain->mode != PAGE_MODE_NONE) |
| 3451 | return -EINVAL; |
| 3452 | |
| 3453 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true); |
| 3454 | if (pte == NULL) |
| 3455 | return -ENOMEM; |
| 3456 | |
| 3457 | *pte = (cr3 & PAGE_MASK) | GCR3_VALID; |
| 3458 | |
| 3459 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3460 | } |
| 3461 | |
| 3462 | static int __clear_gcr3(struct protection_domain *domain, int pasid) |
| 3463 | { |
| 3464 | u64 *pte; |
| 3465 | |
| 3466 | if (domain->mode != PAGE_MODE_NONE) |
| 3467 | return -EINVAL; |
| 3468 | |
| 3469 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false); |
| 3470 | if (pte == NULL) |
| 3471 | return 0; |
| 3472 | |
| 3473 | *pte = 0; |
| 3474 | |
| 3475 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3476 | } |
| 3477 | |
| 3478 | int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, |
| 3479 | unsigned long cr3) |
| 3480 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3481 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 3482 | unsigned long flags; |
| 3483 | int ret; |
| 3484 | |
| 3485 | spin_lock_irqsave(&domain->lock, flags); |
| 3486 | ret = __set_gcr3(domain, pasid, cr3); |
| 3487 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3488 | |
| 3489 | return ret; |
| 3490 | } |
| 3491 | EXPORT_SYMBOL(amd_iommu_domain_set_gcr3); |
| 3492 | |
| 3493 | int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid) |
| 3494 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3495 | struct protection_domain *domain = to_pdomain(dom); |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 3496 | unsigned long flags; |
| 3497 | int ret; |
| 3498 | |
| 3499 | spin_lock_irqsave(&domain->lock, flags); |
| 3500 | ret = __clear_gcr3(domain, pasid); |
| 3501 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3502 | |
| 3503 | return ret; |
| 3504 | } |
| 3505 | EXPORT_SYMBOL(amd_iommu_domain_clear_gcr3); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3506 | |
| 3507 | int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid, |
| 3508 | int status, int tag) |
| 3509 | { |
| 3510 | struct iommu_dev_data *dev_data; |
| 3511 | struct amd_iommu *iommu; |
| 3512 | struct iommu_cmd cmd; |
| 3513 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3514 | INC_STATS_COUNTER(complete_ppr); |
| 3515 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3516 | dev_data = get_dev_data(&pdev->dev); |
| 3517 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3518 | |
| 3519 | build_complete_ppr(&cmd, dev_data->devid, pasid, status, |
| 3520 | tag, dev_data->pri_tlp); |
| 3521 | |
| 3522 | return iommu_queue_command(iommu, &cmd); |
| 3523 | } |
| 3524 | EXPORT_SYMBOL(amd_iommu_complete_ppr); |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3525 | |
| 3526 | struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev) |
| 3527 | { |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3528 | struct protection_domain *pdomain; |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3529 | |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3530 | pdomain = get_domain(&pdev->dev); |
| 3531 | if (IS_ERR(pdomain)) |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3532 | return NULL; |
| 3533 | |
| 3534 | /* Only return IOMMUv2 domains */ |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3535 | if (!(pdomain->flags & PD_IOMMUV2_MASK)) |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3536 | return NULL; |
| 3537 | |
Joerg Roedel | 3f4b87b | 2015-03-26 13:43:07 +0100 | [diff] [blame] | 3538 | return &pdomain->domain; |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3539 | } |
| 3540 | EXPORT_SYMBOL(amd_iommu_get_v2_domain); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 3541 | |
| 3542 | void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum) |
| 3543 | { |
| 3544 | struct iommu_dev_data *dev_data; |
| 3545 | |
| 3546 | if (!amd_iommu_v2_supported()) |
| 3547 | return; |
| 3548 | |
| 3549 | dev_data = get_dev_data(&pdev->dev); |
| 3550 | dev_data->errata |= (1 << erratum); |
| 3551 | } |
| 3552 | EXPORT_SYMBOL(amd_iommu_enable_device_erratum); |
Joerg Roedel | 52efdb8 | 2011-12-07 12:01:36 +0100 | [diff] [blame] | 3553 | |
| 3554 | int amd_iommu_device_info(struct pci_dev *pdev, |
| 3555 | struct amd_iommu_device_info *info) |
| 3556 | { |
| 3557 | int max_pasids; |
| 3558 | int pos; |
| 3559 | |
| 3560 | if (pdev == NULL || info == NULL) |
| 3561 | return -EINVAL; |
| 3562 | |
| 3563 | if (!amd_iommu_v2_supported()) |
| 3564 | return -EINVAL; |
| 3565 | |
| 3566 | memset(info, 0, sizeof(*info)); |
| 3567 | |
| 3568 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS); |
| 3569 | if (pos) |
| 3570 | info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP; |
| 3571 | |
| 3572 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
| 3573 | if (pos) |
| 3574 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP; |
| 3575 | |
| 3576 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
| 3577 | if (pos) { |
| 3578 | int features; |
| 3579 | |
| 3580 | max_pasids = 1 << (9 * (amd_iommu_max_glx_val + 1)); |
| 3581 | max_pasids = min(max_pasids, (1 << 20)); |
| 3582 | |
| 3583 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP; |
| 3584 | info->max_pasids = min(pci_max_pasids(pdev), max_pasids); |
| 3585 | |
| 3586 | features = pci_pasid_features(pdev); |
| 3587 | if (features & PCI_PASID_CAP_EXEC) |
| 3588 | info->flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP; |
| 3589 | if (features & PCI_PASID_CAP_PRIV) |
| 3590 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP; |
| 3591 | } |
| 3592 | |
| 3593 | return 0; |
| 3594 | } |
| 3595 | EXPORT_SYMBOL(amd_iommu_device_info); |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3596 | |
| 3597 | #ifdef CONFIG_IRQ_REMAP |
| 3598 | |
| 3599 | /***************************************************************************** |
| 3600 | * |
| 3601 | * Interrupt Remapping Implementation |
| 3602 | * |
| 3603 | *****************************************************************************/ |
| 3604 | |
| 3605 | union irte { |
| 3606 | u32 val; |
| 3607 | struct { |
| 3608 | u32 valid : 1, |
| 3609 | no_fault : 1, |
| 3610 | int_type : 3, |
| 3611 | rq_eoi : 1, |
| 3612 | dm : 1, |
| 3613 | rsvd_1 : 1, |
| 3614 | destination : 8, |
| 3615 | vector : 8, |
| 3616 | rsvd_2 : 8; |
| 3617 | } fields; |
| 3618 | }; |
| 3619 | |
Jiang Liu | 9c72496 | 2015-04-14 10:29:52 +0800 | [diff] [blame] | 3620 | struct irq_2_irte { |
| 3621 | u16 devid; /* Device ID for IRTE table */ |
| 3622 | u16 index; /* Index into IRTE table*/ |
| 3623 | }; |
| 3624 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3625 | struct amd_ir_data { |
| 3626 | struct irq_2_irte irq_2_irte; |
| 3627 | union irte irte_entry; |
| 3628 | union { |
| 3629 | struct msi_msg msi_entry; |
| 3630 | }; |
| 3631 | }; |
| 3632 | |
| 3633 | static struct irq_chip amd_ir_chip; |
| 3634 | |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3635 | #define DTE_IRQ_PHYS_ADDR_MASK (((1ULL << 45)-1) << 6) |
| 3636 | #define DTE_IRQ_REMAP_INTCTL (2ULL << 60) |
| 3637 | #define DTE_IRQ_TABLE_LEN (8ULL << 1) |
| 3638 | #define DTE_IRQ_REMAP_ENABLE 1ULL |
| 3639 | |
| 3640 | static void set_dte_irq_entry(u16 devid, struct irq_remap_table *table) |
| 3641 | { |
| 3642 | u64 dte; |
| 3643 | |
| 3644 | dte = amd_iommu_dev_table[devid].data[2]; |
| 3645 | dte &= ~DTE_IRQ_PHYS_ADDR_MASK; |
| 3646 | dte |= virt_to_phys(table->table); |
| 3647 | dte |= DTE_IRQ_REMAP_INTCTL; |
| 3648 | dte |= DTE_IRQ_TABLE_LEN; |
| 3649 | dte |= DTE_IRQ_REMAP_ENABLE; |
| 3650 | |
| 3651 | amd_iommu_dev_table[devid].data[2] = dte; |
| 3652 | } |
| 3653 | |
| 3654 | #define IRTE_ALLOCATED (~1U) |
| 3655 | |
| 3656 | static struct irq_remap_table *get_irq_table(u16 devid, bool ioapic) |
| 3657 | { |
| 3658 | struct irq_remap_table *table = NULL; |
| 3659 | struct amd_iommu *iommu; |
| 3660 | unsigned long flags; |
| 3661 | u16 alias; |
| 3662 | |
| 3663 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 3664 | |
| 3665 | iommu = amd_iommu_rlookup_table[devid]; |
| 3666 | if (!iommu) |
| 3667 | goto out_unlock; |
| 3668 | |
| 3669 | table = irq_lookup_table[devid]; |
| 3670 | if (table) |
| 3671 | goto out; |
| 3672 | |
| 3673 | alias = amd_iommu_alias_table[devid]; |
| 3674 | table = irq_lookup_table[alias]; |
| 3675 | if (table) { |
| 3676 | irq_lookup_table[devid] = table; |
| 3677 | set_dte_irq_entry(devid, table); |
| 3678 | iommu_flush_dte(iommu, devid); |
| 3679 | goto out; |
| 3680 | } |
| 3681 | |
| 3682 | /* Nothing there yet, allocate new irq remapping table */ |
| 3683 | table = kzalloc(sizeof(*table), GFP_ATOMIC); |
| 3684 | if (!table) |
| 3685 | goto out; |
| 3686 | |
Joerg Roedel | 197887f | 2013-04-09 21:14:08 +0200 | [diff] [blame] | 3687 | /* Initialize table spin-lock */ |
| 3688 | spin_lock_init(&table->lock); |
| 3689 | |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3690 | if (ioapic) |
| 3691 | /* Keep the first 32 indexes free for IOAPIC interrupts */ |
| 3692 | table->min_index = 32; |
| 3693 | |
| 3694 | table->table = kmem_cache_alloc(amd_iommu_irq_cache, GFP_ATOMIC); |
| 3695 | if (!table->table) { |
| 3696 | kfree(table); |
Dan Carpenter | 821f0f6 | 2012-10-02 11:34:40 +0300 | [diff] [blame] | 3697 | table = NULL; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3698 | goto out; |
| 3699 | } |
| 3700 | |
| 3701 | memset(table->table, 0, MAX_IRQS_PER_TABLE * sizeof(u32)); |
| 3702 | |
| 3703 | if (ioapic) { |
| 3704 | int i; |
| 3705 | |
| 3706 | for (i = 0; i < 32; ++i) |
| 3707 | table->table[i] = IRTE_ALLOCATED; |
| 3708 | } |
| 3709 | |
| 3710 | irq_lookup_table[devid] = table; |
| 3711 | set_dte_irq_entry(devid, table); |
| 3712 | iommu_flush_dte(iommu, devid); |
| 3713 | if (devid != alias) { |
| 3714 | irq_lookup_table[alias] = table; |
Alex Williamson | e028a9e | 2014-04-22 10:08:40 -0600 | [diff] [blame] | 3715 | set_dte_irq_entry(alias, table); |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3716 | iommu_flush_dte(iommu, alias); |
| 3717 | } |
| 3718 | |
| 3719 | out: |
| 3720 | iommu_completion_wait(iommu); |
| 3721 | |
| 3722 | out_unlock: |
| 3723 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 3724 | |
| 3725 | return table; |
| 3726 | } |
| 3727 | |
Jiang Liu | 3c3d4f9 | 2015-04-13 14:11:38 +0800 | [diff] [blame] | 3728 | static int alloc_irq_index(u16 devid, int count) |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3729 | { |
| 3730 | struct irq_remap_table *table; |
| 3731 | unsigned long flags; |
| 3732 | int index, c; |
| 3733 | |
| 3734 | table = get_irq_table(devid, false); |
| 3735 | if (!table) |
| 3736 | return -ENODEV; |
| 3737 | |
| 3738 | spin_lock_irqsave(&table->lock, flags); |
| 3739 | |
| 3740 | /* Scan table for free entries */ |
| 3741 | for (c = 0, index = table->min_index; |
| 3742 | index < MAX_IRQS_PER_TABLE; |
| 3743 | ++index) { |
| 3744 | if (table->table[index] == 0) |
| 3745 | c += 1; |
| 3746 | else |
| 3747 | c = 0; |
| 3748 | |
| 3749 | if (c == count) { |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3750 | for (; c != 0; --c) |
| 3751 | table->table[index - c + 1] = IRTE_ALLOCATED; |
| 3752 | |
| 3753 | index -= count - 1; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3754 | goto out; |
| 3755 | } |
| 3756 | } |
| 3757 | |
| 3758 | index = -ENOSPC; |
| 3759 | |
| 3760 | out: |
| 3761 | spin_unlock_irqrestore(&table->lock, flags); |
| 3762 | |
| 3763 | return index; |
| 3764 | } |
| 3765 | |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3766 | static int modify_irte(u16 devid, int index, union irte irte) |
| 3767 | { |
| 3768 | struct irq_remap_table *table; |
| 3769 | struct amd_iommu *iommu; |
| 3770 | unsigned long flags; |
| 3771 | |
| 3772 | iommu = amd_iommu_rlookup_table[devid]; |
| 3773 | if (iommu == NULL) |
| 3774 | return -EINVAL; |
| 3775 | |
| 3776 | table = get_irq_table(devid, false); |
| 3777 | if (!table) |
| 3778 | return -ENOMEM; |
| 3779 | |
| 3780 | spin_lock_irqsave(&table->lock, flags); |
| 3781 | table->table[index] = irte.val; |
| 3782 | spin_unlock_irqrestore(&table->lock, flags); |
| 3783 | |
| 3784 | iommu_flush_irt(iommu, devid); |
| 3785 | iommu_completion_wait(iommu); |
| 3786 | |
| 3787 | return 0; |
| 3788 | } |
| 3789 | |
| 3790 | static void free_irte(u16 devid, int index) |
| 3791 | { |
| 3792 | struct irq_remap_table *table; |
| 3793 | struct amd_iommu *iommu; |
| 3794 | unsigned long flags; |
| 3795 | |
| 3796 | iommu = amd_iommu_rlookup_table[devid]; |
| 3797 | if (iommu == NULL) |
| 3798 | return; |
| 3799 | |
| 3800 | table = get_irq_table(devid, false); |
| 3801 | if (!table) |
| 3802 | return; |
| 3803 | |
| 3804 | spin_lock_irqsave(&table->lock, flags); |
| 3805 | table->table[index] = 0; |
| 3806 | spin_unlock_irqrestore(&table->lock, flags); |
| 3807 | |
| 3808 | iommu_flush_irt(iommu, devid); |
| 3809 | iommu_completion_wait(iommu); |
| 3810 | } |
| 3811 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3812 | static int get_devid(struct irq_alloc_info *info) |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3813 | { |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3814 | int devid = -1; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3815 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3816 | switch (info->type) { |
| 3817 | case X86_IRQ_ALLOC_TYPE_IOAPIC: |
| 3818 | devid = get_ioapic_devid(info->ioapic_id); |
| 3819 | break; |
| 3820 | case X86_IRQ_ALLOC_TYPE_HPET: |
| 3821 | devid = get_hpet_devid(info->hpet_id); |
| 3822 | break; |
| 3823 | case X86_IRQ_ALLOC_TYPE_MSI: |
| 3824 | case X86_IRQ_ALLOC_TYPE_MSIX: |
| 3825 | devid = get_device_id(&info->msi_dev->dev); |
| 3826 | break; |
| 3827 | default: |
| 3828 | BUG_ON(1); |
| 3829 | break; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3830 | } |
| 3831 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3832 | return devid; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3833 | } |
| 3834 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3835 | static struct irq_domain *get_ir_irq_domain(struct irq_alloc_info *info) |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3836 | { |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3837 | struct amd_iommu *iommu; |
| 3838 | int devid; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3839 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3840 | if (!info) |
| 3841 | return NULL; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3842 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3843 | devid = get_devid(info); |
| 3844 | if (devid >= 0) { |
| 3845 | iommu = amd_iommu_rlookup_table[devid]; |
| 3846 | if (iommu) |
| 3847 | return iommu->ir_domain; |
| 3848 | } |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3849 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3850 | return NULL; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 3851 | } |
| 3852 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3853 | static struct irq_domain *get_irq_domain(struct irq_alloc_info *info) |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 3854 | { |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3855 | struct amd_iommu *iommu; |
| 3856 | int devid; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 3857 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3858 | if (!info) |
| 3859 | return NULL; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 3860 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3861 | switch (info->type) { |
| 3862 | case X86_IRQ_ALLOC_TYPE_MSI: |
| 3863 | case X86_IRQ_ALLOC_TYPE_MSIX: |
| 3864 | devid = get_device_id(&info->msi_dev->dev); |
Dan Carpenter | 1fb260b | 2016-01-07 12:36:06 +0300 | [diff] [blame] | 3865 | iommu = amd_iommu_rlookup_table[devid]; |
| 3866 | if (iommu) |
| 3867 | return iommu->msi_domain; |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3868 | break; |
| 3869 | default: |
| 3870 | break; |
| 3871 | } |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 3872 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3873 | return NULL; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 3874 | } |
| 3875 | |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 3876 | struct irq_remap_ops amd_iommu_irq_ops = { |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 3877 | .prepare = amd_iommu_prepare, |
| 3878 | .enable = amd_iommu_enable, |
| 3879 | .disable = amd_iommu_disable, |
| 3880 | .reenable = amd_iommu_reenable, |
| 3881 | .enable_faulting = amd_iommu_enable_faulting, |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3882 | .get_ir_irq_domain = get_ir_irq_domain, |
| 3883 | .get_irq_domain = get_irq_domain, |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 3884 | }; |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3885 | |
| 3886 | static void irq_remapping_prepare_irte(struct amd_ir_data *data, |
| 3887 | struct irq_cfg *irq_cfg, |
| 3888 | struct irq_alloc_info *info, |
| 3889 | int devid, int index, int sub_handle) |
| 3890 | { |
| 3891 | struct irq_2_irte *irte_info = &data->irq_2_irte; |
| 3892 | struct msi_msg *msg = &data->msi_entry; |
| 3893 | union irte *irte = &data->irte_entry; |
| 3894 | struct IO_APIC_route_entry *entry; |
| 3895 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3896 | data->irq_2_irte.devid = devid; |
| 3897 | data->irq_2_irte.index = index + sub_handle; |
| 3898 | |
| 3899 | /* Setup IRTE for IOMMU */ |
| 3900 | irte->val = 0; |
| 3901 | irte->fields.vector = irq_cfg->vector; |
| 3902 | irte->fields.int_type = apic->irq_delivery_mode; |
| 3903 | irte->fields.destination = irq_cfg->dest_apicid; |
| 3904 | irte->fields.dm = apic->irq_dest_mode; |
| 3905 | irte->fields.valid = 1; |
| 3906 | |
| 3907 | switch (info->type) { |
| 3908 | case X86_IRQ_ALLOC_TYPE_IOAPIC: |
| 3909 | /* Setup IOAPIC entry */ |
| 3910 | entry = info->ioapic_entry; |
| 3911 | info->ioapic_entry = NULL; |
| 3912 | memset(entry, 0, sizeof(*entry)); |
| 3913 | entry->vector = index; |
| 3914 | entry->mask = 0; |
| 3915 | entry->trigger = info->ioapic_trigger; |
| 3916 | entry->polarity = info->ioapic_polarity; |
| 3917 | /* Mask level triggered irqs. */ |
| 3918 | if (info->ioapic_trigger) |
| 3919 | entry->mask = 1; |
| 3920 | break; |
| 3921 | |
| 3922 | case X86_IRQ_ALLOC_TYPE_HPET: |
| 3923 | case X86_IRQ_ALLOC_TYPE_MSI: |
| 3924 | case X86_IRQ_ALLOC_TYPE_MSIX: |
| 3925 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3926 | msg->address_lo = MSI_ADDR_BASE_LO; |
| 3927 | msg->data = irte_info->index; |
| 3928 | break; |
| 3929 | |
| 3930 | default: |
| 3931 | BUG_ON(1); |
| 3932 | break; |
| 3933 | } |
| 3934 | } |
| 3935 | |
| 3936 | static int irq_remapping_alloc(struct irq_domain *domain, unsigned int virq, |
| 3937 | unsigned int nr_irqs, void *arg) |
| 3938 | { |
| 3939 | struct irq_alloc_info *info = arg; |
| 3940 | struct irq_data *irq_data; |
| 3941 | struct amd_ir_data *data; |
| 3942 | struct irq_cfg *cfg; |
| 3943 | int i, ret, devid; |
| 3944 | int index = -1; |
| 3945 | |
| 3946 | if (!info) |
| 3947 | return -EINVAL; |
| 3948 | if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_MSI && |
| 3949 | info->type != X86_IRQ_ALLOC_TYPE_MSIX) |
| 3950 | return -EINVAL; |
| 3951 | |
| 3952 | /* |
| 3953 | * With IRQ remapping enabled, don't need contiguous CPU vectors |
| 3954 | * to support multiple MSI interrupts. |
| 3955 | */ |
| 3956 | if (info->type == X86_IRQ_ALLOC_TYPE_MSI) |
| 3957 | info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; |
| 3958 | |
| 3959 | devid = get_devid(info); |
| 3960 | if (devid < 0) |
| 3961 | return -EINVAL; |
| 3962 | |
| 3963 | ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); |
| 3964 | if (ret < 0) |
| 3965 | return ret; |
| 3966 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3967 | if (info->type == X86_IRQ_ALLOC_TYPE_IOAPIC) { |
| 3968 | if (get_irq_table(devid, true)) |
| 3969 | index = info->ioapic_pin; |
| 3970 | else |
| 3971 | ret = -ENOMEM; |
| 3972 | } else { |
Jiang Liu | 3c3d4f9 | 2015-04-13 14:11:38 +0800 | [diff] [blame] | 3973 | index = alloc_irq_index(devid, nr_irqs); |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3974 | } |
| 3975 | if (index < 0) { |
| 3976 | pr_warn("Failed to allocate IRTE\n"); |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3977 | goto out_free_parent; |
| 3978 | } |
| 3979 | |
| 3980 | for (i = 0; i < nr_irqs; i++) { |
| 3981 | irq_data = irq_domain_get_irq_data(domain, virq + i); |
| 3982 | cfg = irqd_cfg(irq_data); |
| 3983 | if (!irq_data || !cfg) { |
| 3984 | ret = -EINVAL; |
| 3985 | goto out_free_data; |
| 3986 | } |
| 3987 | |
Joerg Roedel | a130e69 | 2015-08-13 11:07:25 +0200 | [diff] [blame] | 3988 | ret = -ENOMEM; |
| 3989 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
| 3990 | if (!data) |
| 3991 | goto out_free_data; |
| 3992 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 3993 | irq_data->hwirq = (devid << 16) + i; |
| 3994 | irq_data->chip_data = data; |
| 3995 | irq_data->chip = &amd_ir_chip; |
| 3996 | irq_remapping_prepare_irte(data, cfg, info, devid, index, i); |
| 3997 | irq_set_status_flags(virq + i, IRQ_MOVE_PCNTXT); |
| 3998 | } |
Joerg Roedel | a130e69 | 2015-08-13 11:07:25 +0200 | [diff] [blame] | 3999 | |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 4000 | return 0; |
| 4001 | |
| 4002 | out_free_data: |
| 4003 | for (i--; i >= 0; i--) { |
| 4004 | irq_data = irq_domain_get_irq_data(domain, virq + i); |
| 4005 | if (irq_data) |
| 4006 | kfree(irq_data->chip_data); |
| 4007 | } |
| 4008 | for (i = 0; i < nr_irqs; i++) |
| 4009 | free_irte(devid, index + i); |
| 4010 | out_free_parent: |
| 4011 | irq_domain_free_irqs_common(domain, virq, nr_irqs); |
| 4012 | return ret; |
| 4013 | } |
| 4014 | |
| 4015 | static void irq_remapping_free(struct irq_domain *domain, unsigned int virq, |
| 4016 | unsigned int nr_irqs) |
| 4017 | { |
| 4018 | struct irq_2_irte *irte_info; |
| 4019 | struct irq_data *irq_data; |
| 4020 | struct amd_ir_data *data; |
| 4021 | int i; |
| 4022 | |
| 4023 | for (i = 0; i < nr_irqs; i++) { |
| 4024 | irq_data = irq_domain_get_irq_data(domain, virq + i); |
| 4025 | if (irq_data && irq_data->chip_data) { |
| 4026 | data = irq_data->chip_data; |
| 4027 | irte_info = &data->irq_2_irte; |
| 4028 | free_irte(irte_info->devid, irte_info->index); |
| 4029 | kfree(data); |
| 4030 | } |
| 4031 | } |
| 4032 | irq_domain_free_irqs_common(domain, virq, nr_irqs); |
| 4033 | } |
| 4034 | |
| 4035 | static void irq_remapping_activate(struct irq_domain *domain, |
| 4036 | struct irq_data *irq_data) |
| 4037 | { |
| 4038 | struct amd_ir_data *data = irq_data->chip_data; |
| 4039 | struct irq_2_irte *irte_info = &data->irq_2_irte; |
| 4040 | |
| 4041 | modify_irte(irte_info->devid, irte_info->index, data->irte_entry); |
| 4042 | } |
| 4043 | |
| 4044 | static void irq_remapping_deactivate(struct irq_domain *domain, |
| 4045 | struct irq_data *irq_data) |
| 4046 | { |
| 4047 | struct amd_ir_data *data = irq_data->chip_data; |
| 4048 | struct irq_2_irte *irte_info = &data->irq_2_irte; |
| 4049 | union irte entry; |
| 4050 | |
| 4051 | entry.val = 0; |
| 4052 | modify_irte(irte_info->devid, irte_info->index, data->irte_entry); |
| 4053 | } |
| 4054 | |
| 4055 | static struct irq_domain_ops amd_ir_domain_ops = { |
| 4056 | .alloc = irq_remapping_alloc, |
| 4057 | .free = irq_remapping_free, |
| 4058 | .activate = irq_remapping_activate, |
| 4059 | .deactivate = irq_remapping_deactivate, |
| 4060 | }; |
| 4061 | |
| 4062 | static int amd_ir_set_affinity(struct irq_data *data, |
| 4063 | const struct cpumask *mask, bool force) |
| 4064 | { |
| 4065 | struct amd_ir_data *ir_data = data->chip_data; |
| 4066 | struct irq_2_irte *irte_info = &ir_data->irq_2_irte; |
| 4067 | struct irq_cfg *cfg = irqd_cfg(data); |
| 4068 | struct irq_data *parent = data->parent_data; |
| 4069 | int ret; |
| 4070 | |
| 4071 | ret = parent->chip->irq_set_affinity(parent, mask, force); |
| 4072 | if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE) |
| 4073 | return ret; |
| 4074 | |
| 4075 | /* |
| 4076 | * Atomically updates the IRTE with the new destination, vector |
| 4077 | * and flushes the interrupt entry cache. |
| 4078 | */ |
| 4079 | ir_data->irte_entry.fields.vector = cfg->vector; |
| 4080 | ir_data->irte_entry.fields.destination = cfg->dest_apicid; |
| 4081 | modify_irte(irte_info->devid, irte_info->index, ir_data->irte_entry); |
| 4082 | |
| 4083 | /* |
| 4084 | * After this point, all the interrupts will start arriving |
| 4085 | * at the new destination. So, time to cleanup the previous |
| 4086 | * vector allocation. |
| 4087 | */ |
Jiang Liu | c6c2002 | 2015-04-14 10:30:02 +0800 | [diff] [blame] | 4088 | send_cleanup_vector(cfg); |
Jiang Liu | 7c71d30 | 2015-04-13 14:11:33 +0800 | [diff] [blame] | 4089 | |
| 4090 | return IRQ_SET_MASK_OK_DONE; |
| 4091 | } |
| 4092 | |
| 4093 | static void ir_compose_msi_msg(struct irq_data *irq_data, struct msi_msg *msg) |
| 4094 | { |
| 4095 | struct amd_ir_data *ir_data = irq_data->chip_data; |
| 4096 | |
| 4097 | *msg = ir_data->msi_entry; |
| 4098 | } |
| 4099 | |
| 4100 | static struct irq_chip amd_ir_chip = { |
| 4101 | .irq_ack = ir_ack_apic_edge, |
| 4102 | .irq_set_affinity = amd_ir_set_affinity, |
| 4103 | .irq_compose_msi_msg = ir_compose_msi_msg, |
| 4104 | }; |
| 4105 | |
| 4106 | int amd_iommu_create_irq_domain(struct amd_iommu *iommu) |
| 4107 | { |
| 4108 | iommu->ir_domain = irq_domain_add_tree(NULL, &amd_ir_domain_ops, iommu); |
| 4109 | if (!iommu->ir_domain) |
| 4110 | return -ENOMEM; |
| 4111 | |
| 4112 | iommu->ir_domain->parent = arch_get_ir_parent_domain(); |
| 4113 | iommu->msi_domain = arch_create_msi_irq_domain(iommu->ir_domain); |
| 4114 | |
| 4115 | return 0; |
| 4116 | } |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 4117 | #endif |