Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. |
| 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/gfp.h> |
| 22 | #include <linux/bitops.h> |
| 23 | #include <linux/scatterlist.h> |
| 24 | #include <linux/iommu-helper.h> |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 25 | #ifdef CONFIG_IOMMU_API |
| 26 | #include <linux/iommu.h> |
| 27 | #endif |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 28 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 29 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 30 | #include <asm/gart.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 31 | #include <asm/amd_iommu_types.h> |
Joerg Roedel | c6da992 | 2008-06-26 21:28:06 +0200 | [diff] [blame] | 32 | #include <asm/amd_iommu.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 33 | |
| 34 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 35 | |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 36 | #define EXIT_LOOP_COUNT 10000000 |
| 37 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 38 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 39 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 40 | /* A list of preallocated protection domains */ |
| 41 | static LIST_HEAD(iommu_pd_list); |
| 42 | static DEFINE_SPINLOCK(iommu_pd_list_lock); |
| 43 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 44 | /* |
| 45 | * general struct to manage commands send to an IOMMU |
| 46 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 47 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 48 | u32 data[4]; |
| 49 | }; |
| 50 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 51 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 52 | struct unity_map_entry *e); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 53 | static struct dma_ops_domain *find_protection_domain(u16 devid); |
| 54 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 55 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 56 | /* returns !0 if the IOMMU is caching non-present entries in its TLB */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 57 | static int iommu_has_npcache(struct amd_iommu *iommu) |
| 58 | { |
Joerg Roedel | ae9b940 | 2008-10-30 17:43:57 +0100 | [diff] [blame] | 59 | return iommu->cap & (1UL << IOMMU_CAP_NPCACHE); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 60 | } |
| 61 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 62 | /**************************************************************************** |
| 63 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 64 | * Interrupt handling functions |
| 65 | * |
| 66 | ****************************************************************************/ |
| 67 | |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 68 | static void iommu_print_event(void *__evt) |
| 69 | { |
| 70 | u32 *event = __evt; |
| 71 | int type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 72 | int devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 73 | int domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 74 | int flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 75 | u64 address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 76 | |
| 77 | printk(KERN_ERR "AMD IOMMU: Event logged ["); |
| 78 | |
| 79 | switch (type) { |
| 80 | case EVENT_TYPE_ILL_DEV: |
| 81 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 82 | "address=0x%016llx flags=0x%04x]\n", |
| 83 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 84 | address, flags); |
| 85 | break; |
| 86 | case EVENT_TYPE_IO_FAULT: |
| 87 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 88 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 89 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 90 | domid, address, flags); |
| 91 | break; |
| 92 | case EVENT_TYPE_DEV_TAB_ERR: |
| 93 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 94 | "address=0x%016llx flags=0x%04x]\n", |
| 95 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 96 | address, flags); |
| 97 | break; |
| 98 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 99 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 100 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 101 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 102 | domid, address, flags); |
| 103 | break; |
| 104 | case EVENT_TYPE_ILL_CMD: |
| 105 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
| 106 | break; |
| 107 | case EVENT_TYPE_CMD_HARD_ERR: |
| 108 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 109 | "flags=0x%04x]\n", address, flags); |
| 110 | break; |
| 111 | case EVENT_TYPE_IOTLB_INV_TO: |
| 112 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 113 | "address=0x%016llx]\n", |
| 114 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 115 | address); |
| 116 | break; |
| 117 | case EVENT_TYPE_INV_DEV_REQ: |
| 118 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 119 | "address=0x%016llx flags=0x%04x]\n", |
| 120 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 121 | address, flags); |
| 122 | break; |
| 123 | default: |
| 124 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 125 | } |
| 126 | } |
| 127 | |
| 128 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 129 | { |
| 130 | u32 head, tail; |
| 131 | unsigned long flags; |
| 132 | |
| 133 | spin_lock_irqsave(&iommu->lock, flags); |
| 134 | |
| 135 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 136 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 137 | |
| 138 | while (head != tail) { |
| 139 | iommu_print_event(iommu->evt_buf + head); |
| 140 | head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size; |
| 141 | } |
| 142 | |
| 143 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 144 | |
| 145 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 146 | } |
| 147 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 148 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 149 | { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 150 | struct amd_iommu *iommu; |
| 151 | |
| 152 | list_for_each_entry(iommu, &amd_iommu_list, list) |
| 153 | iommu_poll_events(iommu); |
| 154 | |
| 155 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 156 | } |
| 157 | |
| 158 | /**************************************************************************** |
| 159 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 160 | * IOMMU command queuing functions |
| 161 | * |
| 162 | ****************************************************************************/ |
| 163 | |
| 164 | /* |
| 165 | * Writes the command to the IOMMUs command buffer and informs the |
| 166 | * hardware about the new command. Must be called with iommu->lock held. |
| 167 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 168 | static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 169 | { |
| 170 | u32 tail, head; |
| 171 | u8 *target; |
| 172 | |
| 173 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
Jiri Kosina | 8a7c5ef | 2008-08-19 02:13:55 +0200 | [diff] [blame] | 174 | target = iommu->cmd_buf + tail; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 175 | memcpy_toio(target, cmd, sizeof(*cmd)); |
| 176 | tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
| 177 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 178 | if (tail == head) |
| 179 | return -ENOMEM; |
| 180 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 181 | |
| 182 | return 0; |
| 183 | } |
| 184 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 185 | /* |
| 186 | * General queuing function for commands. Takes iommu->lock and calls |
| 187 | * __iommu_queue_command(). |
| 188 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 189 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 190 | { |
| 191 | unsigned long flags; |
| 192 | int ret; |
| 193 | |
| 194 | spin_lock_irqsave(&iommu->lock, flags); |
| 195 | ret = __iommu_queue_command(iommu, cmd); |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 196 | if (!ret) |
| 197 | iommu->need_sync = 1; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 198 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 199 | |
| 200 | return ret; |
| 201 | } |
| 202 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 203 | /* |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 204 | * This function waits until an IOMMU has completed a completion |
| 205 | * wait command |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 206 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 207 | static void __iommu_wait_for_completion(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 208 | { |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 209 | int ready = 0; |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 210 | unsigned status = 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 211 | unsigned long i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 212 | |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 213 | while (!ready && (i < EXIT_LOOP_COUNT)) { |
| 214 | ++i; |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 215 | /* wait for the bit to become one */ |
| 216 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 217 | ready = status & MMIO_STATUS_COM_WAIT_INT_MASK; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 218 | } |
| 219 | |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 220 | /* set bit back to zero */ |
| 221 | status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; |
| 222 | writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 223 | |
Joerg Roedel | 84df817 | 2008-12-17 16:36:44 +0100 | [diff] [blame] | 224 | if (unlikely(i == EXIT_LOOP_COUNT)) |
| 225 | panic("AMD IOMMU: Completion wait loop failed\n"); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 226 | } |
| 227 | |
| 228 | /* |
| 229 | * This function queues a completion wait command into the command |
| 230 | * buffer of an IOMMU |
| 231 | */ |
| 232 | static int __iommu_completion_wait(struct amd_iommu *iommu) |
| 233 | { |
| 234 | struct iommu_cmd cmd; |
| 235 | |
| 236 | memset(&cmd, 0, sizeof(cmd)); |
| 237 | cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; |
| 238 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); |
| 239 | |
| 240 | return __iommu_queue_command(iommu, &cmd); |
| 241 | } |
| 242 | |
| 243 | /* |
| 244 | * This function is called whenever we need to ensure that the IOMMU has |
| 245 | * completed execution of all commands we sent. It sends a |
| 246 | * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs |
| 247 | * us about that by writing a value to a physical address we pass with |
| 248 | * the command. |
| 249 | */ |
| 250 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 251 | { |
| 252 | int ret = 0; |
| 253 | unsigned long flags; |
| 254 | |
| 255 | spin_lock_irqsave(&iommu->lock, flags); |
| 256 | |
| 257 | if (!iommu->need_sync) |
| 258 | goto out; |
| 259 | |
| 260 | ret = __iommu_completion_wait(iommu); |
| 261 | |
| 262 | iommu->need_sync = 0; |
| 263 | |
| 264 | if (ret) |
| 265 | goto out; |
| 266 | |
| 267 | __iommu_wait_for_completion(iommu); |
Joerg Roedel | 84df817 | 2008-12-17 16:36:44 +0100 | [diff] [blame] | 268 | |
Joerg Roedel | 7e4f88d | 2008-09-17 14:19:15 +0200 | [diff] [blame] | 269 | out: |
| 270 | spin_unlock_irqrestore(&iommu->lock, flags); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 271 | |
| 272 | return 0; |
| 273 | } |
| 274 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 275 | /* |
| 276 | * Command send function for invalidating a device table entry |
| 277 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 278 | static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) |
| 279 | { |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 280 | struct iommu_cmd cmd; |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 281 | int ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 282 | |
| 283 | BUG_ON(iommu == NULL); |
| 284 | |
| 285 | memset(&cmd, 0, sizeof(cmd)); |
| 286 | CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY); |
| 287 | cmd.data[0] = devid; |
| 288 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 289 | ret = iommu_queue_command(iommu, &cmd); |
| 290 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 291 | return ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 292 | } |
| 293 | |
Joerg Roedel | 237b6f3 | 2008-12-02 20:54:37 +0100 | [diff] [blame] | 294 | static void __iommu_build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 295 | u16 domid, int pde, int s) |
| 296 | { |
| 297 | memset(cmd, 0, sizeof(*cmd)); |
| 298 | address &= PAGE_MASK; |
| 299 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 300 | cmd->data[1] |= domid; |
| 301 | cmd->data[2] = lower_32_bits(address); |
| 302 | cmd->data[3] = upper_32_bits(address); |
| 303 | if (s) /* size bit - we flush more than one 4kb page */ |
| 304 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 305 | if (pde) /* PDE bit - we wan't flush everything not only the PTEs */ |
| 306 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 307 | } |
| 308 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 309 | /* |
| 310 | * Generic command send function for invalidaing TLB entries |
| 311 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 312 | static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, |
| 313 | u64 address, u16 domid, int pde, int s) |
| 314 | { |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 315 | struct iommu_cmd cmd; |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 316 | int ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 317 | |
Joerg Roedel | 237b6f3 | 2008-12-02 20:54:37 +0100 | [diff] [blame] | 318 | __iommu_build_inv_iommu_pages(&cmd, address, domid, pde, s); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 319 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 320 | ret = iommu_queue_command(iommu, &cmd); |
| 321 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 322 | return ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 323 | } |
| 324 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 325 | /* |
| 326 | * TLB invalidation function which is called from the mapping functions. |
| 327 | * It invalidates a single PTE if the range to flush is within a single |
| 328 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 329 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 330 | static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, |
| 331 | u64 address, size_t size) |
| 332 | { |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 333 | int s = 0; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 334 | unsigned pages = iommu_num_pages(address, size, PAGE_SIZE); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 335 | |
| 336 | address &= PAGE_MASK; |
| 337 | |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 338 | if (pages > 1) { |
| 339 | /* |
| 340 | * If we have to flush more than one page, flush all |
| 341 | * TLB entries for this domain |
| 342 | */ |
| 343 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 344 | s = 1; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 345 | } |
| 346 | |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 347 | iommu_queue_inv_iommu_pages(iommu, address, domid, 0, s); |
| 348 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 349 | return 0; |
| 350 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 351 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 352 | /* Flush the whole IO/TLB for a given protection domain */ |
| 353 | static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid) |
| 354 | { |
| 355 | u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 356 | |
| 357 | iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 1); |
| 358 | } |
| 359 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 360 | #ifdef CONFIG_IOMMU_API |
| 361 | /* |
| 362 | * This function is used to flush the IO/TLB for a given protection domain |
| 363 | * on every IOMMU in the system |
| 364 | */ |
| 365 | static void iommu_flush_domain(u16 domid) |
| 366 | { |
| 367 | unsigned long flags; |
| 368 | struct amd_iommu *iommu; |
| 369 | struct iommu_cmd cmd; |
| 370 | |
| 371 | __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 372 | domid, 1, 1); |
| 373 | |
| 374 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 375 | spin_lock_irqsave(&iommu->lock, flags); |
| 376 | __iommu_queue_command(iommu, &cmd); |
| 377 | __iommu_completion_wait(iommu); |
| 378 | __iommu_wait_for_completion(iommu); |
| 379 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 380 | } |
| 381 | } |
| 382 | #endif |
| 383 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 384 | /**************************************************************************** |
| 385 | * |
| 386 | * The functions below are used the create the page table mappings for |
| 387 | * unity mapped regions. |
| 388 | * |
| 389 | ****************************************************************************/ |
| 390 | |
| 391 | /* |
| 392 | * Generic mapping functions. It maps a physical address into a DMA |
| 393 | * address space. It allocates the page table pages if necessary. |
| 394 | * In the future it can be extended to a generic mapping function |
| 395 | * supporting all features of AMD IOMMU page tables like level skipping |
| 396 | * and full 64 bit address spaces. |
| 397 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 398 | static int iommu_map_page(struct protection_domain *dom, |
| 399 | unsigned long bus_addr, |
| 400 | unsigned long phys_addr, |
| 401 | int prot) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 402 | { |
| 403 | u64 __pte, *pte, *page; |
| 404 | |
| 405 | bus_addr = PAGE_ALIGN(bus_addr); |
Joerg Roedel | bb9d4ff | 2008-12-04 15:59:48 +0100 | [diff] [blame] | 406 | phys_addr = PAGE_ALIGN(phys_addr); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 407 | |
| 408 | /* only support 512GB address spaces for now */ |
| 409 | if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) |
| 410 | return -EINVAL; |
| 411 | |
| 412 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; |
| 413 | |
| 414 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 415 | page = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 416 | if (!page) |
| 417 | return -ENOMEM; |
| 418 | *pte = IOMMU_L2_PDE(virt_to_phys(page)); |
| 419 | } |
| 420 | |
| 421 | pte = IOMMU_PTE_PAGE(*pte); |
| 422 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 423 | |
| 424 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 425 | page = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 426 | if (!page) |
| 427 | return -ENOMEM; |
| 428 | *pte = IOMMU_L1_PDE(virt_to_phys(page)); |
| 429 | } |
| 430 | |
| 431 | pte = IOMMU_PTE_PAGE(*pte); |
| 432 | pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)]; |
| 433 | |
| 434 | if (IOMMU_PTE_PRESENT(*pte)) |
| 435 | return -EBUSY; |
| 436 | |
| 437 | __pte = phys_addr | IOMMU_PTE_P; |
| 438 | if (prot & IOMMU_PROT_IR) |
| 439 | __pte |= IOMMU_PTE_IR; |
| 440 | if (prot & IOMMU_PROT_IW) |
| 441 | __pte |= IOMMU_PTE_IW; |
| 442 | |
| 443 | *pte = __pte; |
| 444 | |
| 445 | return 0; |
| 446 | } |
| 447 | |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 448 | #ifdef CONFIG_IOMMU_API |
| 449 | static void iommu_unmap_page(struct protection_domain *dom, |
| 450 | unsigned long bus_addr) |
| 451 | { |
| 452 | u64 *pte; |
| 453 | |
| 454 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; |
| 455 | |
| 456 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 457 | return; |
| 458 | |
| 459 | pte = IOMMU_PTE_PAGE(*pte); |
| 460 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 461 | |
| 462 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 463 | return; |
| 464 | |
| 465 | pte = IOMMU_PTE_PAGE(*pte); |
| 466 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 467 | |
| 468 | *pte = 0; |
| 469 | } |
| 470 | #endif |
| 471 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 472 | /* |
| 473 | * This function checks if a specific unity mapping entry is needed for |
| 474 | * this specific IOMMU. |
| 475 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 476 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
| 477 | struct unity_map_entry *entry) |
| 478 | { |
| 479 | u16 bdf, i; |
| 480 | |
| 481 | for (i = entry->devid_start; i <= entry->devid_end; ++i) { |
| 482 | bdf = amd_iommu_alias_table[i]; |
| 483 | if (amd_iommu_rlookup_table[bdf] == iommu) |
| 484 | return 1; |
| 485 | } |
| 486 | |
| 487 | return 0; |
| 488 | } |
| 489 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 490 | /* |
| 491 | * Init the unity mappings for a specific IOMMU in the system |
| 492 | * |
| 493 | * Basically iterates over all unity mapping entries and applies them to |
| 494 | * the default domain DMA of that IOMMU if necessary. |
| 495 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 496 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
| 497 | { |
| 498 | struct unity_map_entry *entry; |
| 499 | int ret; |
| 500 | |
| 501 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 502 | if (!iommu_for_unity_map(iommu, entry)) |
| 503 | continue; |
| 504 | ret = dma_ops_unity_map(iommu->default_dom, entry); |
| 505 | if (ret) |
| 506 | return ret; |
| 507 | } |
| 508 | |
| 509 | return 0; |
| 510 | } |
| 511 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 512 | /* |
| 513 | * This function actually applies the mapping to the page table of the |
| 514 | * dma_ops domain. |
| 515 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 516 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 517 | struct unity_map_entry *e) |
| 518 | { |
| 519 | u64 addr; |
| 520 | int ret; |
| 521 | |
| 522 | for (addr = e->address_start; addr < e->address_end; |
| 523 | addr += PAGE_SIZE) { |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 524 | ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 525 | if (ret) |
| 526 | return ret; |
| 527 | /* |
| 528 | * if unity mapping is in aperture range mark the page |
| 529 | * as allocated in the aperture |
| 530 | */ |
| 531 | if (addr < dma_dom->aperture_size) |
| 532 | __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap); |
| 533 | } |
| 534 | |
| 535 | return 0; |
| 536 | } |
| 537 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 538 | /* |
| 539 | * Inits the unity mappings required for a specific device |
| 540 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 541 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
| 542 | u16 devid) |
| 543 | { |
| 544 | struct unity_map_entry *e; |
| 545 | int ret; |
| 546 | |
| 547 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 548 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 549 | continue; |
| 550 | ret = dma_ops_unity_map(dma_dom, e); |
| 551 | if (ret) |
| 552 | return ret; |
| 553 | } |
| 554 | |
| 555 | return 0; |
| 556 | } |
| 557 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 558 | /**************************************************************************** |
| 559 | * |
| 560 | * The next functions belong to the address allocator for the dma_ops |
| 561 | * interface functions. They work like the allocators in the other IOMMU |
| 562 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 563 | * the aperture. Maybe it could be enhanced in the future to a more |
| 564 | * efficient allocator. |
| 565 | * |
| 566 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 567 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 568 | /* |
| 569 | * The address allocator core function. |
| 570 | * |
| 571 | * called with domain->lock held |
| 572 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 573 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 574 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 575 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 576 | unsigned long align_mask, |
| 577 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 578 | { |
FUJITA Tomonori | 40becd8 | 2008-09-29 00:06:36 +0900 | [diff] [blame] | 579 | unsigned long limit; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 580 | unsigned long address; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 581 | unsigned long boundary_size; |
| 582 | |
| 583 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 584 | PAGE_SIZE) >> PAGE_SHIFT; |
FUJITA Tomonori | 40becd8 | 2008-09-29 00:06:36 +0900 | [diff] [blame] | 585 | limit = iommu_device_max_index(dom->aperture_size >> PAGE_SHIFT, 0, |
| 586 | dma_mask >> PAGE_SHIFT); |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 587 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 588 | if (dom->next_bit >= limit) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 589 | dom->next_bit = 0; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 590 | dom->need_flush = true; |
| 591 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 592 | |
| 593 | address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 594 | 0 , boundary_size, align_mask); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 595 | if (address == -1) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 596 | address = iommu_area_alloc(dom->bitmap, limit, 0, pages, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 597 | 0, boundary_size, align_mask); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 598 | dom->need_flush = true; |
| 599 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 600 | |
| 601 | if (likely(address != -1)) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 602 | dom->next_bit = address + pages; |
| 603 | address <<= PAGE_SHIFT; |
| 604 | } else |
| 605 | address = bad_dma_address; |
| 606 | |
| 607 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 608 | |
| 609 | return address; |
| 610 | } |
| 611 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 612 | /* |
| 613 | * The address free function. |
| 614 | * |
| 615 | * called with domain->lock held |
| 616 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 617 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 618 | unsigned long address, |
| 619 | unsigned int pages) |
| 620 | { |
| 621 | address >>= PAGE_SHIFT; |
| 622 | iommu_area_free(dom->bitmap, address, pages); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 623 | |
Joerg Roedel | 8501c45 | 2008-11-17 19:11:46 +0100 | [diff] [blame] | 624 | if (address >= dom->next_bit) |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 625 | dom->need_flush = true; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 626 | } |
| 627 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 628 | /**************************************************************************** |
| 629 | * |
| 630 | * The next functions belong to the domain allocation. A domain is |
| 631 | * allocated for every IOMMU as the default domain. If device isolation |
| 632 | * is enabled, every device get its own domain. The most important thing |
| 633 | * about domains is the page table mapping the DMA address space they |
| 634 | * contain. |
| 635 | * |
| 636 | ****************************************************************************/ |
| 637 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 638 | static u16 domain_id_alloc(void) |
| 639 | { |
| 640 | unsigned long flags; |
| 641 | int id; |
| 642 | |
| 643 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 644 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 645 | BUG_ON(id == 0); |
| 646 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 647 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 648 | else |
| 649 | id = 0; |
| 650 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 651 | |
| 652 | return id; |
| 653 | } |
| 654 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 655 | #ifdef CONFIG_IOMMU_API |
| 656 | static void domain_id_free(int id) |
| 657 | { |
| 658 | unsigned long flags; |
| 659 | |
| 660 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 661 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 662 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 663 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 664 | } |
| 665 | #endif |
| 666 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 667 | /* |
| 668 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 669 | * ranges. |
| 670 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 671 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 672 | unsigned long start_page, |
| 673 | unsigned int pages) |
| 674 | { |
| 675 | unsigned int last_page = dom->aperture_size >> PAGE_SHIFT; |
| 676 | |
| 677 | if (start_page + pages > last_page) |
| 678 | pages = last_page - start_page; |
| 679 | |
FUJITA Tomonori | d26dbc5 | 2008-09-22 22:35:07 +0900 | [diff] [blame] | 680 | iommu_area_reserve(dom->bitmap, start_page, pages); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 681 | } |
| 682 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 683 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 684 | { |
| 685 | int i, j; |
| 686 | u64 *p1, *p2, *p3; |
| 687 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 688 | p1 = domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 689 | |
| 690 | if (!p1) |
| 691 | return; |
| 692 | |
| 693 | for (i = 0; i < 512; ++i) { |
| 694 | if (!IOMMU_PTE_PRESENT(p1[i])) |
| 695 | continue; |
| 696 | |
| 697 | p2 = IOMMU_PTE_PAGE(p1[i]); |
Joerg Roedel | 3cc3d84 | 2008-12-04 16:44:31 +0100 | [diff] [blame] | 698 | for (j = 0; j < 512; ++j) { |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 699 | if (!IOMMU_PTE_PRESENT(p2[j])) |
| 700 | continue; |
| 701 | p3 = IOMMU_PTE_PAGE(p2[j]); |
| 702 | free_page((unsigned long)p3); |
| 703 | } |
| 704 | |
| 705 | free_page((unsigned long)p2); |
| 706 | } |
| 707 | |
| 708 | free_page((unsigned long)p1); |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 709 | |
| 710 | domain->pt_root = NULL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 711 | } |
| 712 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 713 | /* |
| 714 | * Free a domain, only used if something went wrong in the |
| 715 | * allocation path and we need to free an already allocated page table |
| 716 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 717 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 718 | { |
| 719 | if (!dom) |
| 720 | return; |
| 721 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 722 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 723 | |
| 724 | kfree(dom->pte_pages); |
| 725 | |
| 726 | kfree(dom->bitmap); |
| 727 | |
| 728 | kfree(dom); |
| 729 | } |
| 730 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 731 | /* |
| 732 | * Allocates a new protection domain usable for the dma_ops functions. |
| 733 | * It also intializes the page table and the address allocator data |
| 734 | * structures required for the dma_ops interface |
| 735 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 736 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, |
| 737 | unsigned order) |
| 738 | { |
| 739 | struct dma_ops_domain *dma_dom; |
| 740 | unsigned i, num_pte_pages; |
| 741 | u64 *l2_pde; |
| 742 | u64 address; |
| 743 | |
| 744 | /* |
| 745 | * Currently the DMA aperture must be between 32 MB and 1GB in size |
| 746 | */ |
| 747 | if ((order < 25) || (order > 30)) |
| 748 | return NULL; |
| 749 | |
| 750 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 751 | if (!dma_dom) |
| 752 | return NULL; |
| 753 | |
| 754 | spin_lock_init(&dma_dom->domain.lock); |
| 755 | |
| 756 | dma_dom->domain.id = domain_id_alloc(); |
| 757 | if (dma_dom->domain.id == 0) |
| 758 | goto free_dma_dom; |
| 759 | dma_dom->domain.mode = PAGE_MODE_3_LEVEL; |
| 760 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 761 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 762 | dma_dom->domain.priv = dma_dom; |
| 763 | if (!dma_dom->domain.pt_root) |
| 764 | goto free_dma_dom; |
| 765 | dma_dom->aperture_size = (1ULL << order); |
| 766 | dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8), |
| 767 | GFP_KERNEL); |
| 768 | if (!dma_dom->bitmap) |
| 769 | goto free_dma_dom; |
| 770 | /* |
| 771 | * mark the first page as allocated so we never return 0 as |
| 772 | * a valid dma-address. So we can use 0 as error value |
| 773 | */ |
| 774 | dma_dom->bitmap[0] = 1; |
| 775 | dma_dom->next_bit = 0; |
| 776 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 777 | dma_dom->need_flush = false; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 778 | dma_dom->target_dev = 0xffff; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 779 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 780 | /* Intialize the exclusion range if necessary */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 781 | if (iommu->exclusion_start && |
| 782 | iommu->exclusion_start < dma_dom->aperture_size) { |
| 783 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 784 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 785 | iommu->exclusion_length, |
| 786 | PAGE_SIZE); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 787 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 788 | } |
| 789 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 790 | /* |
| 791 | * At the last step, build the page tables so we don't need to |
| 792 | * allocate page table pages in the dma_ops mapping/unmapping |
| 793 | * path. |
| 794 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 795 | num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); |
| 796 | dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), |
| 797 | GFP_KERNEL); |
| 798 | if (!dma_dom->pte_pages) |
| 799 | goto free_dma_dom; |
| 800 | |
| 801 | l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 802 | if (l2_pde == NULL) |
| 803 | goto free_dma_dom; |
| 804 | |
| 805 | dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde)); |
| 806 | |
| 807 | for (i = 0; i < num_pte_pages; ++i) { |
| 808 | dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 809 | if (!dma_dom->pte_pages[i]) |
| 810 | goto free_dma_dom; |
| 811 | address = virt_to_phys(dma_dom->pte_pages[i]); |
| 812 | l2_pde[i] = IOMMU_L1_PDE(address); |
| 813 | } |
| 814 | |
| 815 | return dma_dom; |
| 816 | |
| 817 | free_dma_dom: |
| 818 | dma_ops_domain_free(dma_dom); |
| 819 | |
| 820 | return NULL; |
| 821 | } |
| 822 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 823 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 824 | * little helper function to check whether a given protection domain is a |
| 825 | * dma_ops domain |
| 826 | */ |
| 827 | static bool dma_ops_domain(struct protection_domain *domain) |
| 828 | { |
| 829 | return domain->flags & PD_DMA_OPS_MASK; |
| 830 | } |
| 831 | |
| 832 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 833 | * Find out the protection domain structure for a given PCI device. This |
| 834 | * will give us the pointer to the page table root for example. |
| 835 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 836 | static struct protection_domain *domain_for_device(u16 devid) |
| 837 | { |
| 838 | struct protection_domain *dom; |
| 839 | unsigned long flags; |
| 840 | |
| 841 | read_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 842 | dom = amd_iommu_pd_table[devid]; |
| 843 | read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 844 | |
| 845 | return dom; |
| 846 | } |
| 847 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 848 | /* |
| 849 | * If a device is not yet associated with a domain, this function does |
| 850 | * assigns it visible for the hardware |
| 851 | */ |
Joerg Roedel | f1179dc | 2008-12-10 14:39:51 +0100 | [diff] [blame] | 852 | static void attach_device(struct amd_iommu *iommu, |
| 853 | struct protection_domain *domain, |
| 854 | u16 devid) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 855 | { |
| 856 | unsigned long flags; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 857 | u64 pte_root = virt_to_phys(domain->pt_root); |
| 858 | |
Joerg Roedel | 863c74e | 2008-12-02 17:56:36 +0100 | [diff] [blame] | 859 | domain->dev_cnt += 1; |
| 860 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 861 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 862 | << DEV_ENTRY_MODE_SHIFT; |
| 863 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 864 | |
| 865 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 866 | amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root); |
| 867 | amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 868 | amd_iommu_dev_table[devid].data[2] = domain->id; |
| 869 | |
| 870 | amd_iommu_pd_table[devid] = domain; |
| 871 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 872 | |
| 873 | iommu_queue_inv_dev_entry(iommu, devid); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 874 | } |
| 875 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 876 | /* |
| 877 | * Removes a device from a protection domain (unlocked) |
| 878 | */ |
| 879 | static void __detach_device(struct protection_domain *domain, u16 devid) |
| 880 | { |
| 881 | |
| 882 | /* lock domain */ |
| 883 | spin_lock(&domain->lock); |
| 884 | |
| 885 | /* remove domain from the lookup table */ |
| 886 | amd_iommu_pd_table[devid] = NULL; |
| 887 | |
| 888 | /* remove entry from the device table seen by the hardware */ |
| 889 | amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; |
| 890 | amd_iommu_dev_table[devid].data[1] = 0; |
| 891 | amd_iommu_dev_table[devid].data[2] = 0; |
| 892 | |
| 893 | /* decrease reference counter */ |
| 894 | domain->dev_cnt -= 1; |
| 895 | |
| 896 | /* ready */ |
| 897 | spin_unlock(&domain->lock); |
| 898 | } |
| 899 | |
| 900 | /* |
| 901 | * Removes a device from a protection domain (with devtable_lock held) |
| 902 | */ |
| 903 | static void detach_device(struct protection_domain *domain, u16 devid) |
| 904 | { |
| 905 | unsigned long flags; |
| 906 | |
| 907 | /* lock device table */ |
| 908 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 909 | __detach_device(domain, devid); |
| 910 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 911 | } |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 912 | |
| 913 | static int device_change_notifier(struct notifier_block *nb, |
| 914 | unsigned long action, void *data) |
| 915 | { |
| 916 | struct device *dev = data; |
| 917 | struct pci_dev *pdev = to_pci_dev(dev); |
| 918 | u16 devid = calc_devid(pdev->bus->number, pdev->devfn); |
| 919 | struct protection_domain *domain; |
| 920 | struct dma_ops_domain *dma_domain; |
| 921 | struct amd_iommu *iommu; |
| 922 | |
| 923 | if (devid > amd_iommu_last_bdf) |
| 924 | goto out; |
| 925 | |
| 926 | devid = amd_iommu_alias_table[devid]; |
| 927 | |
| 928 | iommu = amd_iommu_rlookup_table[devid]; |
| 929 | if (iommu == NULL) |
| 930 | goto out; |
| 931 | |
| 932 | domain = domain_for_device(devid); |
| 933 | |
| 934 | if (domain && !dma_ops_domain(domain)) |
| 935 | WARN_ONCE(1, "AMD IOMMU WARNING: device %s already bound " |
| 936 | "to a non-dma-ops domain\n", dev_name(dev)); |
| 937 | |
| 938 | switch (action) { |
| 939 | case BUS_NOTIFY_BOUND_DRIVER: |
| 940 | if (domain) |
| 941 | goto out; |
| 942 | dma_domain = find_protection_domain(devid); |
| 943 | if (!dma_domain) |
| 944 | dma_domain = iommu->default_dom; |
| 945 | attach_device(iommu, &dma_domain->domain, devid); |
| 946 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " |
| 947 | "device %s\n", dma_domain->domain.id, dev_name(dev)); |
| 948 | break; |
| 949 | case BUS_NOTIFY_UNBIND_DRIVER: |
| 950 | if (!domain) |
| 951 | goto out; |
| 952 | detach_device(domain, devid); |
| 953 | break; |
| 954 | default: |
| 955 | goto out; |
| 956 | } |
| 957 | |
| 958 | iommu_queue_inv_dev_entry(iommu, devid); |
| 959 | iommu_completion_wait(iommu); |
| 960 | |
| 961 | out: |
| 962 | return 0; |
| 963 | } |
| 964 | |
| 965 | struct notifier_block device_nb = { |
| 966 | .notifier_call = device_change_notifier, |
| 967 | }; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 968 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 969 | /***************************************************************************** |
| 970 | * |
| 971 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 972 | * |
| 973 | *****************************************************************************/ |
| 974 | |
| 975 | /* |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 976 | * This function checks if the driver got a valid device from the caller to |
| 977 | * avoid dereferencing invalid pointers. |
| 978 | */ |
| 979 | static bool check_device(struct device *dev) |
| 980 | { |
| 981 | if (!dev || !dev->dma_mask) |
| 982 | return false; |
| 983 | |
| 984 | return true; |
| 985 | } |
| 986 | |
| 987 | /* |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 988 | * In this function the list of preallocated protection domains is traversed to |
| 989 | * find the domain for a specific device |
| 990 | */ |
| 991 | static struct dma_ops_domain *find_protection_domain(u16 devid) |
| 992 | { |
| 993 | struct dma_ops_domain *entry, *ret = NULL; |
| 994 | unsigned long flags; |
| 995 | |
| 996 | if (list_empty(&iommu_pd_list)) |
| 997 | return NULL; |
| 998 | |
| 999 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 1000 | |
| 1001 | list_for_each_entry(entry, &iommu_pd_list, list) { |
| 1002 | if (entry->target_dev == devid) { |
| 1003 | ret = entry; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1004 | break; |
| 1005 | } |
| 1006 | } |
| 1007 | |
| 1008 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 1009 | |
| 1010 | return ret; |
| 1011 | } |
| 1012 | |
| 1013 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1014 | * In the dma_ops path we only have the struct device. This function |
| 1015 | * finds the corresponding IOMMU, the protection domain and the |
| 1016 | * requestor id for a given device. |
| 1017 | * If the device is not yet associated with a domain this is also done |
| 1018 | * in this function. |
| 1019 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1020 | static int get_device_resources(struct device *dev, |
| 1021 | struct amd_iommu **iommu, |
| 1022 | struct protection_domain **domain, |
| 1023 | u16 *bdf) |
| 1024 | { |
| 1025 | struct dma_ops_domain *dma_dom; |
| 1026 | struct pci_dev *pcidev; |
| 1027 | u16 _bdf; |
| 1028 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1029 | *iommu = NULL; |
| 1030 | *domain = NULL; |
| 1031 | *bdf = 0xffff; |
| 1032 | |
| 1033 | if (dev->bus != &pci_bus_type) |
| 1034 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1035 | |
| 1036 | pcidev = to_pci_dev(dev); |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 1037 | _bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1038 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1039 | /* device not translated by any IOMMU in the system? */ |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1040 | if (_bdf > amd_iommu_last_bdf) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1041 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1042 | |
| 1043 | *bdf = amd_iommu_alias_table[_bdf]; |
| 1044 | |
| 1045 | *iommu = amd_iommu_rlookup_table[*bdf]; |
| 1046 | if (*iommu == NULL) |
| 1047 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1048 | *domain = domain_for_device(*bdf); |
| 1049 | if (*domain == NULL) { |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1050 | dma_dom = find_protection_domain(*bdf); |
| 1051 | if (!dma_dom) |
| 1052 | dma_dom = (*iommu)->default_dom; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1053 | *domain = &dma_dom->domain; |
Joerg Roedel | f1179dc | 2008-12-10 14:39:51 +0100 | [diff] [blame] | 1054 | attach_device(*iommu, *domain, *bdf); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1055 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " |
| 1056 | "device ", (*domain)->id); |
| 1057 | print_devid(_bdf, 1); |
| 1058 | } |
| 1059 | |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 1060 | if (domain_for_device(_bdf) == NULL) |
Joerg Roedel | f1179dc | 2008-12-10 14:39:51 +0100 | [diff] [blame] | 1061 | attach_device(*iommu, *domain, _bdf); |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 1062 | |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1063 | return 1; |
| 1064 | } |
| 1065 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1066 | /* |
| 1067 | * This is the generic map function. It maps one 4kb page at paddr to |
| 1068 | * the given address in the DMA address space for the domain. |
| 1069 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1070 | static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, |
| 1071 | struct dma_ops_domain *dom, |
| 1072 | unsigned long address, |
| 1073 | phys_addr_t paddr, |
| 1074 | int direction) |
| 1075 | { |
| 1076 | u64 *pte, __pte; |
| 1077 | |
| 1078 | WARN_ON(address > dom->aperture_size); |
| 1079 | |
| 1080 | paddr &= PAGE_MASK; |
| 1081 | |
| 1082 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; |
| 1083 | pte += IOMMU_PTE_L0_INDEX(address); |
| 1084 | |
| 1085 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1086 | |
| 1087 | if (direction == DMA_TO_DEVICE) |
| 1088 | __pte |= IOMMU_PTE_IR; |
| 1089 | else if (direction == DMA_FROM_DEVICE) |
| 1090 | __pte |= IOMMU_PTE_IW; |
| 1091 | else if (direction == DMA_BIDIRECTIONAL) |
| 1092 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 1093 | |
| 1094 | WARN_ON(*pte); |
| 1095 | |
| 1096 | *pte = __pte; |
| 1097 | |
| 1098 | return (dma_addr_t)address; |
| 1099 | } |
| 1100 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1101 | /* |
| 1102 | * The generic unmapping function for on page in the DMA address space. |
| 1103 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1104 | static void dma_ops_domain_unmap(struct amd_iommu *iommu, |
| 1105 | struct dma_ops_domain *dom, |
| 1106 | unsigned long address) |
| 1107 | { |
| 1108 | u64 *pte; |
| 1109 | |
| 1110 | if (address >= dom->aperture_size) |
| 1111 | return; |
| 1112 | |
Joerg Roedel | 8ad909c | 2008-12-08 14:37:20 +0100 | [diff] [blame] | 1113 | WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1114 | |
| 1115 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; |
| 1116 | pte += IOMMU_PTE_L0_INDEX(address); |
| 1117 | |
| 1118 | WARN_ON(!*pte); |
| 1119 | |
| 1120 | *pte = 0ULL; |
| 1121 | } |
| 1122 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1123 | /* |
| 1124 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 1125 | * contiguous memory region into DMA address space. It is used by all |
| 1126 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1127 | * Must be called with the domain lock held. |
| 1128 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1129 | static dma_addr_t __map_single(struct device *dev, |
| 1130 | struct amd_iommu *iommu, |
| 1131 | struct dma_ops_domain *dma_dom, |
| 1132 | phys_addr_t paddr, |
| 1133 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1134 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1135 | bool align, |
| 1136 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1137 | { |
| 1138 | dma_addr_t offset = paddr & ~PAGE_MASK; |
| 1139 | dma_addr_t address, start; |
| 1140 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1141 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1142 | int i; |
| 1143 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 1144 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1145 | paddr &= PAGE_MASK; |
| 1146 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1147 | if (align) |
| 1148 | align_mask = (1UL << get_order(size)) - 1; |
| 1149 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1150 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 1151 | dma_mask); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1152 | if (unlikely(address == bad_dma_address)) |
| 1153 | goto out; |
| 1154 | |
| 1155 | start = address; |
| 1156 | for (i = 0; i < pages; ++i) { |
| 1157 | dma_ops_domain_map(iommu, dma_dom, start, paddr, dir); |
| 1158 | paddr += PAGE_SIZE; |
| 1159 | start += PAGE_SIZE; |
| 1160 | } |
| 1161 | address += offset; |
| 1162 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1163 | if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) { |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1164 | iommu_flush_tlb(iommu, dma_dom->domain.id); |
| 1165 | dma_dom->need_flush = false; |
| 1166 | } else if (unlikely(iommu_has_npcache(iommu))) |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 1167 | iommu_flush_pages(iommu, dma_dom->domain.id, address, size); |
| 1168 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1169 | out: |
| 1170 | return address; |
| 1171 | } |
| 1172 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1173 | /* |
| 1174 | * Does the reverse of the __map_single function. Must be called with |
| 1175 | * the domain lock held too |
| 1176 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1177 | static void __unmap_single(struct amd_iommu *iommu, |
| 1178 | struct dma_ops_domain *dma_dom, |
| 1179 | dma_addr_t dma_addr, |
| 1180 | size_t size, |
| 1181 | int dir) |
| 1182 | { |
| 1183 | dma_addr_t i, start; |
| 1184 | unsigned int pages; |
| 1185 | |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 1186 | if ((dma_addr == bad_dma_address) || |
| 1187 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1188 | return; |
| 1189 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 1190 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1191 | dma_addr &= PAGE_MASK; |
| 1192 | start = dma_addr; |
| 1193 | |
| 1194 | for (i = 0; i < pages; ++i) { |
| 1195 | dma_ops_domain_unmap(iommu, dma_dom, start); |
| 1196 | start += PAGE_SIZE; |
| 1197 | } |
| 1198 | |
| 1199 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 1200 | |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1201 | if (amd_iommu_unmap_flush || dma_dom->need_flush) { |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1202 | iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1203 | dma_dom->need_flush = false; |
| 1204 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1205 | } |
| 1206 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1207 | /* |
| 1208 | * The exported map_single function for dma_ops. |
| 1209 | */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1210 | static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, |
| 1211 | size_t size, int dir) |
| 1212 | { |
| 1213 | unsigned long flags; |
| 1214 | struct amd_iommu *iommu; |
| 1215 | struct protection_domain *domain; |
| 1216 | u16 devid; |
| 1217 | dma_addr_t addr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1218 | u64 dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1219 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1220 | if (!check_device(dev)) |
| 1221 | return bad_dma_address; |
| 1222 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1223 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1224 | |
| 1225 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1226 | |
| 1227 | if (iommu == NULL || domain == NULL) |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1228 | /* device not handled by any AMD IOMMU */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1229 | return (dma_addr_t)paddr; |
| 1230 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1231 | if (!dma_ops_domain(domain)) |
| 1232 | return bad_dma_address; |
| 1233 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1234 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1235 | addr = __map_single(dev, iommu, domain->priv, paddr, size, dir, false, |
| 1236 | dma_mask); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1237 | if (addr == bad_dma_address) |
| 1238 | goto out; |
| 1239 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1240 | iommu_completion_wait(iommu); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1241 | |
| 1242 | out: |
| 1243 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1244 | |
| 1245 | return addr; |
| 1246 | } |
| 1247 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1248 | /* |
| 1249 | * The exported unmap_single function for dma_ops. |
| 1250 | */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1251 | static void unmap_single(struct device *dev, dma_addr_t dma_addr, |
| 1252 | size_t size, int dir) |
| 1253 | { |
| 1254 | unsigned long flags; |
| 1255 | struct amd_iommu *iommu; |
| 1256 | struct protection_domain *domain; |
| 1257 | u16 devid; |
| 1258 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1259 | if (!check_device(dev) || |
| 1260 | !get_device_resources(dev, &iommu, &domain, &devid)) |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1261 | /* device not handled by any AMD IOMMU */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1262 | return; |
| 1263 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1264 | if (!dma_ops_domain(domain)) |
| 1265 | return; |
| 1266 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1267 | spin_lock_irqsave(&domain->lock, flags); |
| 1268 | |
| 1269 | __unmap_single(iommu, domain->priv, dma_addr, size, dir); |
| 1270 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1271 | iommu_completion_wait(iommu); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1272 | |
| 1273 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1274 | } |
| 1275 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1276 | /* |
| 1277 | * This is a special map_sg function which is used if we should map a |
| 1278 | * device which is not handled by an AMD IOMMU in the system. |
| 1279 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1280 | static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, |
| 1281 | int nelems, int dir) |
| 1282 | { |
| 1283 | struct scatterlist *s; |
| 1284 | int i; |
| 1285 | |
| 1286 | for_each_sg(sglist, s, nelems, i) { |
| 1287 | s->dma_address = (dma_addr_t)sg_phys(s); |
| 1288 | s->dma_length = s->length; |
| 1289 | } |
| 1290 | |
| 1291 | return nelems; |
| 1292 | } |
| 1293 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1294 | /* |
| 1295 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 1296 | * lists). |
| 1297 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1298 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
| 1299 | int nelems, int dir) |
| 1300 | { |
| 1301 | unsigned long flags; |
| 1302 | struct amd_iommu *iommu; |
| 1303 | struct protection_domain *domain; |
| 1304 | u16 devid; |
| 1305 | int i; |
| 1306 | struct scatterlist *s; |
| 1307 | phys_addr_t paddr; |
| 1308 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1309 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1310 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1311 | if (!check_device(dev)) |
| 1312 | return 0; |
| 1313 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1314 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1315 | |
| 1316 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1317 | |
| 1318 | if (!iommu || !domain) |
| 1319 | return map_sg_no_iommu(dev, sglist, nelems, dir); |
| 1320 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1321 | if (!dma_ops_domain(domain)) |
| 1322 | return 0; |
| 1323 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1324 | spin_lock_irqsave(&domain->lock, flags); |
| 1325 | |
| 1326 | for_each_sg(sglist, s, nelems, i) { |
| 1327 | paddr = sg_phys(s); |
| 1328 | |
| 1329 | s->dma_address = __map_single(dev, iommu, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1330 | paddr, s->length, dir, false, |
| 1331 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1332 | |
| 1333 | if (s->dma_address) { |
| 1334 | s->dma_length = s->length; |
| 1335 | mapped_elems++; |
| 1336 | } else |
| 1337 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1338 | } |
| 1339 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1340 | iommu_completion_wait(iommu); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1341 | |
| 1342 | out: |
| 1343 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1344 | |
| 1345 | return mapped_elems; |
| 1346 | unmap: |
| 1347 | for_each_sg(sglist, s, mapped_elems, i) { |
| 1348 | if (s->dma_address) |
| 1349 | __unmap_single(iommu, domain->priv, s->dma_address, |
| 1350 | s->dma_length, dir); |
| 1351 | s->dma_address = s->dma_length = 0; |
| 1352 | } |
| 1353 | |
| 1354 | mapped_elems = 0; |
| 1355 | |
| 1356 | goto out; |
| 1357 | } |
| 1358 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1359 | /* |
| 1360 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 1361 | * lists). |
| 1362 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1363 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 1364 | int nelems, int dir) |
| 1365 | { |
| 1366 | unsigned long flags; |
| 1367 | struct amd_iommu *iommu; |
| 1368 | struct protection_domain *domain; |
| 1369 | struct scatterlist *s; |
| 1370 | u16 devid; |
| 1371 | int i; |
| 1372 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1373 | if (!check_device(dev) || |
| 1374 | !get_device_resources(dev, &iommu, &domain, &devid)) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1375 | return; |
| 1376 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1377 | if (!dma_ops_domain(domain)) |
| 1378 | return; |
| 1379 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1380 | spin_lock_irqsave(&domain->lock, flags); |
| 1381 | |
| 1382 | for_each_sg(sglist, s, nelems, i) { |
| 1383 | __unmap_single(iommu, domain->priv, s->dma_address, |
| 1384 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1385 | s->dma_address = s->dma_length = 0; |
| 1386 | } |
| 1387 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1388 | iommu_completion_wait(iommu); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1389 | |
| 1390 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1391 | } |
| 1392 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1393 | /* |
| 1394 | * The exported alloc_coherent function for dma_ops. |
| 1395 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1396 | static void *alloc_coherent(struct device *dev, size_t size, |
| 1397 | dma_addr_t *dma_addr, gfp_t flag) |
| 1398 | { |
| 1399 | unsigned long flags; |
| 1400 | void *virt_addr; |
| 1401 | struct amd_iommu *iommu; |
| 1402 | struct protection_domain *domain; |
| 1403 | u16 devid; |
| 1404 | phys_addr_t paddr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1405 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1406 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1407 | if (!check_device(dev)) |
| 1408 | return NULL; |
| 1409 | |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 1410 | if (!get_device_resources(dev, &iommu, &domain, &devid)) |
| 1411 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
| 1412 | |
Joerg Roedel | c97ac53 | 2008-09-11 10:59:15 +0200 | [diff] [blame] | 1413 | flag |= __GFP_ZERO; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1414 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 1415 | if (!virt_addr) |
| 1416 | return 0; |
| 1417 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1418 | paddr = virt_to_phys(virt_addr); |
| 1419 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1420 | if (!iommu || !domain) { |
| 1421 | *dma_addr = (dma_addr_t)paddr; |
| 1422 | return virt_addr; |
| 1423 | } |
| 1424 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1425 | if (!dma_ops_domain(domain)) |
| 1426 | goto out_free; |
| 1427 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1428 | if (!dma_mask) |
| 1429 | dma_mask = *dev->dma_mask; |
| 1430 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1431 | spin_lock_irqsave(&domain->lock, flags); |
| 1432 | |
| 1433 | *dma_addr = __map_single(dev, iommu, domain->priv, paddr, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1434 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1435 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1436 | if (*dma_addr == bad_dma_address) |
| 1437 | goto out_free; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1438 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1439 | iommu_completion_wait(iommu); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1440 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1441 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1442 | |
| 1443 | return virt_addr; |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1444 | |
| 1445 | out_free: |
| 1446 | |
| 1447 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 1448 | |
| 1449 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1450 | } |
| 1451 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1452 | /* |
| 1453 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1454 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1455 | static void free_coherent(struct device *dev, size_t size, |
| 1456 | void *virt_addr, dma_addr_t dma_addr) |
| 1457 | { |
| 1458 | unsigned long flags; |
| 1459 | struct amd_iommu *iommu; |
| 1460 | struct protection_domain *domain; |
| 1461 | u16 devid; |
| 1462 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1463 | if (!check_device(dev)) |
| 1464 | return; |
| 1465 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1466 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1467 | |
| 1468 | if (!iommu || !domain) |
| 1469 | goto free_mem; |
| 1470 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1471 | if (!dma_ops_domain(domain)) |
| 1472 | goto free_mem; |
| 1473 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1474 | spin_lock_irqsave(&domain->lock, flags); |
| 1475 | |
| 1476 | __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1477 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1478 | iommu_completion_wait(iommu); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1479 | |
| 1480 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1481 | |
| 1482 | free_mem: |
| 1483 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 1484 | } |
| 1485 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1486 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 1487 | * This function is called by the DMA layer to find out if we can handle a |
| 1488 | * particular device. It is part of the dma_ops. |
| 1489 | */ |
| 1490 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 1491 | { |
| 1492 | u16 bdf; |
| 1493 | struct pci_dev *pcidev; |
| 1494 | |
| 1495 | /* No device or no PCI device */ |
| 1496 | if (!dev || dev->bus != &pci_bus_type) |
| 1497 | return 0; |
| 1498 | |
| 1499 | pcidev = to_pci_dev(dev); |
| 1500 | |
| 1501 | bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
| 1502 | |
| 1503 | /* Out of our scope? */ |
| 1504 | if (bdf > amd_iommu_last_bdf) |
| 1505 | return 0; |
| 1506 | |
| 1507 | return 1; |
| 1508 | } |
| 1509 | |
| 1510 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1511 | * The function for pre-allocating protection domains. |
| 1512 | * |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1513 | * If the driver core informs the DMA layer if a driver grabs a device |
| 1514 | * we don't need to preallocate the protection domains anymore. |
| 1515 | * For now we have to. |
| 1516 | */ |
| 1517 | void prealloc_protection_domains(void) |
| 1518 | { |
| 1519 | struct pci_dev *dev = NULL; |
| 1520 | struct dma_ops_domain *dma_dom; |
| 1521 | struct amd_iommu *iommu; |
| 1522 | int order = amd_iommu_aperture_order; |
| 1523 | u16 devid; |
| 1524 | |
| 1525 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { |
| 1526 | devid = (dev->bus->number << 8) | dev->devfn; |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1527 | if (devid > amd_iommu_last_bdf) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1528 | continue; |
| 1529 | devid = amd_iommu_alias_table[devid]; |
| 1530 | if (domain_for_device(devid)) |
| 1531 | continue; |
| 1532 | iommu = amd_iommu_rlookup_table[devid]; |
| 1533 | if (!iommu) |
| 1534 | continue; |
| 1535 | dma_dom = dma_ops_domain_alloc(iommu, order); |
| 1536 | if (!dma_dom) |
| 1537 | continue; |
| 1538 | init_unity_mappings_for_device(dma_dom, devid); |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1539 | dma_dom->target_dev = devid; |
| 1540 | |
| 1541 | list_add_tail(&dma_dom->list, &iommu_pd_list); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1542 | } |
| 1543 | } |
| 1544 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1545 | static struct dma_mapping_ops amd_iommu_dma_ops = { |
| 1546 | .alloc_coherent = alloc_coherent, |
| 1547 | .free_coherent = free_coherent, |
| 1548 | .map_single = map_single, |
| 1549 | .unmap_single = unmap_single, |
| 1550 | .map_sg = map_sg, |
| 1551 | .unmap_sg = unmap_sg, |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 1552 | .dma_supported = amd_iommu_dma_supported, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1553 | }; |
| 1554 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1555 | /* |
| 1556 | * The function which clues the AMD IOMMU driver into dma_ops. |
| 1557 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1558 | int __init amd_iommu_init_dma_ops(void) |
| 1559 | { |
| 1560 | struct amd_iommu *iommu; |
| 1561 | int order = amd_iommu_aperture_order; |
| 1562 | int ret; |
| 1563 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1564 | /* |
| 1565 | * first allocate a default protection domain for every IOMMU we |
| 1566 | * found in the system. Devices not assigned to any other |
| 1567 | * protection domain will be assigned to the default one. |
| 1568 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1569 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 1570 | iommu->default_dom = dma_ops_domain_alloc(iommu, order); |
| 1571 | if (iommu->default_dom == NULL) |
| 1572 | return -ENOMEM; |
| 1573 | ret = iommu_init_unity_mappings(iommu); |
| 1574 | if (ret) |
| 1575 | goto free_domains; |
| 1576 | } |
| 1577 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1578 | /* |
| 1579 | * If device isolation is enabled, pre-allocate the protection |
| 1580 | * domains for each device. |
| 1581 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1582 | if (amd_iommu_isolate) |
| 1583 | prealloc_protection_domains(); |
| 1584 | |
| 1585 | iommu_detected = 1; |
| 1586 | force_iommu = 1; |
| 1587 | bad_dma_address = 0; |
Ingo Molnar | 92af4e2 | 2008-06-27 10:48:16 +0200 | [diff] [blame] | 1588 | #ifdef CONFIG_GART_IOMMU |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1589 | gart_iommu_aperture_disabled = 1; |
| 1590 | gart_iommu_aperture = 0; |
Ingo Molnar | 92af4e2 | 2008-06-27 10:48:16 +0200 | [diff] [blame] | 1591 | #endif |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1592 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1593 | /* Make the driver finally visible to the drivers */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1594 | dma_ops = &amd_iommu_dma_ops; |
| 1595 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 1596 | bus_register_notifier(&pci_bus_type, &device_nb); |
| 1597 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1598 | return 0; |
| 1599 | |
| 1600 | free_domains: |
| 1601 | |
| 1602 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 1603 | if (iommu->default_dom) |
| 1604 | dma_ops_domain_free(iommu->default_dom); |
| 1605 | } |
| 1606 | |
| 1607 | return ret; |
| 1608 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 1609 | |
| 1610 | /***************************************************************************** |
| 1611 | * |
| 1612 | * The following functions belong to the exported interface of AMD IOMMU |
| 1613 | * |
| 1614 | * This interface allows access to lower level functions of the IOMMU |
| 1615 | * like protection domain handling and assignement of devices to domains |
| 1616 | * which is not possible with the dma_ops interface. |
| 1617 | * |
| 1618 | *****************************************************************************/ |
| 1619 | |
| 1620 | #ifdef CONFIG_IOMMU_API |
| 1621 | |
| 1622 | static void cleanup_domain(struct protection_domain *domain) |
| 1623 | { |
| 1624 | unsigned long flags; |
| 1625 | u16 devid; |
| 1626 | |
| 1627 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1628 | |
| 1629 | for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) |
| 1630 | if (amd_iommu_pd_table[devid] == domain) |
| 1631 | __detach_device(domain, devid); |
| 1632 | |
| 1633 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1634 | } |
| 1635 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 1636 | static int amd_iommu_domain_init(struct iommu_domain *dom) |
| 1637 | { |
| 1638 | struct protection_domain *domain; |
| 1639 | |
| 1640 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
| 1641 | if (!domain) |
| 1642 | return -ENOMEM; |
| 1643 | |
| 1644 | spin_lock_init(&domain->lock); |
| 1645 | domain->mode = PAGE_MODE_3_LEVEL; |
| 1646 | domain->id = domain_id_alloc(); |
| 1647 | if (!domain->id) |
| 1648 | goto out_free; |
| 1649 | domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
| 1650 | if (!domain->pt_root) |
| 1651 | goto out_free; |
| 1652 | |
| 1653 | dom->priv = domain; |
| 1654 | |
| 1655 | return 0; |
| 1656 | |
| 1657 | out_free: |
| 1658 | kfree(domain); |
| 1659 | |
| 1660 | return -ENOMEM; |
| 1661 | } |
| 1662 | |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 1663 | static void amd_iommu_domain_destroy(struct iommu_domain *dom) |
| 1664 | { |
| 1665 | struct protection_domain *domain = dom->priv; |
| 1666 | |
| 1667 | if (!domain) |
| 1668 | return; |
| 1669 | |
| 1670 | if (domain->dev_cnt > 0) |
| 1671 | cleanup_domain(domain); |
| 1672 | |
| 1673 | BUG_ON(domain->dev_cnt != 0); |
| 1674 | |
| 1675 | free_pagetable(domain); |
| 1676 | |
| 1677 | domain_id_free(domain->id); |
| 1678 | |
| 1679 | kfree(domain); |
| 1680 | |
| 1681 | dom->priv = NULL; |
| 1682 | } |
| 1683 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 1684 | static void amd_iommu_detach_device(struct iommu_domain *dom, |
| 1685 | struct device *dev) |
| 1686 | { |
| 1687 | struct protection_domain *domain = dom->priv; |
| 1688 | struct amd_iommu *iommu; |
| 1689 | struct pci_dev *pdev; |
| 1690 | u16 devid; |
| 1691 | |
| 1692 | if (dev->bus != &pci_bus_type) |
| 1693 | return; |
| 1694 | |
| 1695 | pdev = to_pci_dev(dev); |
| 1696 | |
| 1697 | devid = calc_devid(pdev->bus->number, pdev->devfn); |
| 1698 | |
| 1699 | if (devid > 0) |
| 1700 | detach_device(domain, devid); |
| 1701 | |
| 1702 | iommu = amd_iommu_rlookup_table[devid]; |
| 1703 | if (!iommu) |
| 1704 | return; |
| 1705 | |
| 1706 | iommu_queue_inv_dev_entry(iommu, devid); |
| 1707 | iommu_completion_wait(iommu); |
| 1708 | } |
| 1709 | |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 1710 | static int amd_iommu_attach_device(struct iommu_domain *dom, |
| 1711 | struct device *dev) |
| 1712 | { |
| 1713 | struct protection_domain *domain = dom->priv; |
| 1714 | struct protection_domain *old_domain; |
| 1715 | struct amd_iommu *iommu; |
| 1716 | struct pci_dev *pdev; |
| 1717 | u16 devid; |
| 1718 | |
| 1719 | if (dev->bus != &pci_bus_type) |
| 1720 | return -EINVAL; |
| 1721 | |
| 1722 | pdev = to_pci_dev(dev); |
| 1723 | |
| 1724 | devid = calc_devid(pdev->bus->number, pdev->devfn); |
| 1725 | |
| 1726 | if (devid >= amd_iommu_last_bdf || |
| 1727 | devid != amd_iommu_alias_table[devid]) |
| 1728 | return -EINVAL; |
| 1729 | |
| 1730 | iommu = amd_iommu_rlookup_table[devid]; |
| 1731 | if (!iommu) |
| 1732 | return -EINVAL; |
| 1733 | |
| 1734 | old_domain = domain_for_device(devid); |
| 1735 | if (old_domain) |
| 1736 | return -EBUSY; |
| 1737 | |
| 1738 | attach_device(iommu, domain, devid); |
| 1739 | |
| 1740 | iommu_completion_wait(iommu); |
| 1741 | |
| 1742 | return 0; |
| 1743 | } |
| 1744 | |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 1745 | static int amd_iommu_map_range(struct iommu_domain *dom, |
| 1746 | unsigned long iova, phys_addr_t paddr, |
| 1747 | size_t size, int iommu_prot) |
| 1748 | { |
| 1749 | struct protection_domain *domain = dom->priv; |
| 1750 | unsigned long i, npages = iommu_num_pages(paddr, size, PAGE_SIZE); |
| 1751 | int prot = 0; |
| 1752 | int ret; |
| 1753 | |
| 1754 | if (iommu_prot & IOMMU_READ) |
| 1755 | prot |= IOMMU_PROT_IR; |
| 1756 | if (iommu_prot & IOMMU_WRITE) |
| 1757 | prot |= IOMMU_PROT_IW; |
| 1758 | |
| 1759 | iova &= PAGE_MASK; |
| 1760 | paddr &= PAGE_MASK; |
| 1761 | |
| 1762 | for (i = 0; i < npages; ++i) { |
| 1763 | ret = iommu_map_page(domain, iova, paddr, prot); |
| 1764 | if (ret) |
| 1765 | return ret; |
| 1766 | |
| 1767 | iova += PAGE_SIZE; |
| 1768 | paddr += PAGE_SIZE; |
| 1769 | } |
| 1770 | |
| 1771 | return 0; |
| 1772 | } |
| 1773 | |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1774 | static void amd_iommu_unmap_range(struct iommu_domain *dom, |
| 1775 | unsigned long iova, size_t size) |
| 1776 | { |
| 1777 | |
| 1778 | struct protection_domain *domain = dom->priv; |
| 1779 | unsigned long i, npages = iommu_num_pages(iova, size, PAGE_SIZE); |
| 1780 | |
| 1781 | iova &= PAGE_MASK; |
| 1782 | |
| 1783 | for (i = 0; i < npages; ++i) { |
| 1784 | iommu_unmap_page(domain, iova); |
| 1785 | iova += PAGE_SIZE; |
| 1786 | } |
| 1787 | |
| 1788 | iommu_flush_domain(domain->id); |
| 1789 | } |
| 1790 | |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame^] | 1791 | static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, |
| 1792 | unsigned long iova) |
| 1793 | { |
| 1794 | struct protection_domain *domain = dom->priv; |
| 1795 | unsigned long offset = iova & ~PAGE_MASK; |
| 1796 | phys_addr_t paddr; |
| 1797 | u64 *pte; |
| 1798 | |
| 1799 | pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(iova)]; |
| 1800 | |
| 1801 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1802 | return 0; |
| 1803 | |
| 1804 | pte = IOMMU_PTE_PAGE(*pte); |
| 1805 | pte = &pte[IOMMU_PTE_L1_INDEX(iova)]; |
| 1806 | |
| 1807 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1808 | return 0; |
| 1809 | |
| 1810 | pte = IOMMU_PTE_PAGE(*pte); |
| 1811 | pte = &pte[IOMMU_PTE_L0_INDEX(iova)]; |
| 1812 | |
| 1813 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1814 | return 0; |
| 1815 | |
| 1816 | paddr = *pte & IOMMU_PAGE_MASK; |
| 1817 | paddr |= offset; |
| 1818 | |
| 1819 | return paddr; |
| 1820 | } |
| 1821 | |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 1822 | #endif |