Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. |
| 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/gfp.h> |
| 22 | #include <linux/bitops.h> |
| 23 | #include <linux/scatterlist.h> |
| 24 | #include <linux/iommu-helper.h> |
| 25 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 26 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 27 | #include <asm/gart.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 28 | #include <asm/amd_iommu_types.h> |
Joerg Roedel | c6da992 | 2008-06-26 21:28:06 +0200 | [diff] [blame] | 29 | #include <asm/amd_iommu.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 30 | |
| 31 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 32 | |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 33 | #define EXIT_LOOP_COUNT 10000000 |
| 34 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 35 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 36 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 37 | /* A list of preallocated protection domains */ |
| 38 | static LIST_HEAD(iommu_pd_list); |
| 39 | static DEFINE_SPINLOCK(iommu_pd_list_lock); |
| 40 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 41 | /* |
| 42 | * general struct to manage commands send to an IOMMU |
| 43 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 44 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 45 | u32 data[4]; |
| 46 | }; |
| 47 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 48 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 49 | struct unity_map_entry *e); |
| 50 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 51 | /* returns !0 if the IOMMU is caching non-present entries in its TLB */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 52 | static int iommu_has_npcache(struct amd_iommu *iommu) |
| 53 | { |
Joerg Roedel | ae9b940 | 2008-10-30 17:43:57 +0100 | [diff] [blame] | 54 | return iommu->cap & (1UL << IOMMU_CAP_NPCACHE); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 55 | } |
| 56 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 57 | /**************************************************************************** |
| 58 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 59 | * Interrupt handling functions |
| 60 | * |
| 61 | ****************************************************************************/ |
| 62 | |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 63 | static void iommu_print_event(void *__evt) |
| 64 | { |
| 65 | u32 *event = __evt; |
| 66 | int type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 67 | int devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 68 | int domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 69 | int flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 70 | u64 address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 71 | |
| 72 | printk(KERN_ERR "AMD IOMMU: Event logged ["); |
| 73 | |
| 74 | switch (type) { |
| 75 | case EVENT_TYPE_ILL_DEV: |
| 76 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 77 | "address=0x%016llx flags=0x%04x]\n", |
| 78 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 79 | address, flags); |
| 80 | break; |
| 81 | case EVENT_TYPE_IO_FAULT: |
| 82 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 83 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 84 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 85 | domid, address, flags); |
| 86 | break; |
| 87 | case EVENT_TYPE_DEV_TAB_ERR: |
| 88 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 89 | "address=0x%016llx flags=0x%04x]\n", |
| 90 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 91 | address, flags); |
| 92 | break; |
| 93 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 94 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 95 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 96 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 97 | domid, address, flags); |
| 98 | break; |
| 99 | case EVENT_TYPE_ILL_CMD: |
| 100 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
| 101 | break; |
| 102 | case EVENT_TYPE_CMD_HARD_ERR: |
| 103 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 104 | "flags=0x%04x]\n", address, flags); |
| 105 | break; |
| 106 | case EVENT_TYPE_IOTLB_INV_TO: |
| 107 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 108 | "address=0x%016llx]\n", |
| 109 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 110 | address); |
| 111 | break; |
| 112 | case EVENT_TYPE_INV_DEV_REQ: |
| 113 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 114 | "address=0x%016llx flags=0x%04x]\n", |
| 115 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 116 | address, flags); |
| 117 | break; |
| 118 | default: |
| 119 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 124 | { |
| 125 | u32 head, tail; |
| 126 | unsigned long flags; |
| 127 | |
| 128 | spin_lock_irqsave(&iommu->lock, flags); |
| 129 | |
| 130 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 131 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 132 | |
| 133 | while (head != tail) { |
| 134 | iommu_print_event(iommu->evt_buf + head); |
| 135 | head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size; |
| 136 | } |
| 137 | |
| 138 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 139 | |
| 140 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 141 | } |
| 142 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 143 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 144 | { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 145 | struct amd_iommu *iommu; |
| 146 | |
| 147 | list_for_each_entry(iommu, &amd_iommu_list, list) |
| 148 | iommu_poll_events(iommu); |
| 149 | |
| 150 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 151 | } |
| 152 | |
| 153 | /**************************************************************************** |
| 154 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 155 | * IOMMU command queuing functions |
| 156 | * |
| 157 | ****************************************************************************/ |
| 158 | |
| 159 | /* |
| 160 | * Writes the command to the IOMMUs command buffer and informs the |
| 161 | * hardware about the new command. Must be called with iommu->lock held. |
| 162 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 163 | static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 164 | { |
| 165 | u32 tail, head; |
| 166 | u8 *target; |
| 167 | |
| 168 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
Jiri Kosina | 8a7c5ef | 2008-08-19 02:13:55 +0200 | [diff] [blame] | 169 | target = iommu->cmd_buf + tail; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 170 | memcpy_toio(target, cmd, sizeof(*cmd)); |
| 171 | tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
| 172 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 173 | if (tail == head) |
| 174 | return -ENOMEM; |
| 175 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 176 | |
| 177 | return 0; |
| 178 | } |
| 179 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 180 | /* |
| 181 | * General queuing function for commands. Takes iommu->lock and calls |
| 182 | * __iommu_queue_command(). |
| 183 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 184 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 185 | { |
| 186 | unsigned long flags; |
| 187 | int ret; |
| 188 | |
| 189 | spin_lock_irqsave(&iommu->lock, flags); |
| 190 | ret = __iommu_queue_command(iommu, cmd); |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 191 | if (!ret) |
| 192 | iommu->need_sync = 1; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 193 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 194 | |
| 195 | return ret; |
| 196 | } |
| 197 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 198 | /* |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 199 | * This function waits until an IOMMU has completed a completion |
| 200 | * wait command |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 201 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 202 | static void __iommu_wait_for_completion(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 203 | { |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 204 | int ready = 0; |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 205 | unsigned status = 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 206 | unsigned long i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 207 | |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 208 | while (!ready && (i < EXIT_LOOP_COUNT)) { |
| 209 | ++i; |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 210 | /* wait for the bit to become one */ |
| 211 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 212 | ready = status & MMIO_STATUS_COM_WAIT_INT_MASK; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 213 | } |
| 214 | |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 215 | /* set bit back to zero */ |
| 216 | status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; |
| 217 | writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 218 | |
Joerg Roedel | 84df817 | 2008-12-17 16:36:44 +0100 | [diff] [blame] | 219 | if (unlikely(i == EXIT_LOOP_COUNT)) |
| 220 | panic("AMD IOMMU: Completion wait loop failed\n"); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | /* |
| 224 | * This function queues a completion wait command into the command |
| 225 | * buffer of an IOMMU |
| 226 | */ |
| 227 | static int __iommu_completion_wait(struct amd_iommu *iommu) |
| 228 | { |
| 229 | struct iommu_cmd cmd; |
| 230 | |
| 231 | memset(&cmd, 0, sizeof(cmd)); |
| 232 | cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; |
| 233 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); |
| 234 | |
| 235 | return __iommu_queue_command(iommu, &cmd); |
| 236 | } |
| 237 | |
| 238 | /* |
| 239 | * This function is called whenever we need to ensure that the IOMMU has |
| 240 | * completed execution of all commands we sent. It sends a |
| 241 | * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs |
| 242 | * us about that by writing a value to a physical address we pass with |
| 243 | * the command. |
| 244 | */ |
| 245 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 246 | { |
| 247 | int ret = 0; |
| 248 | unsigned long flags; |
| 249 | |
| 250 | spin_lock_irqsave(&iommu->lock, flags); |
| 251 | |
| 252 | if (!iommu->need_sync) |
| 253 | goto out; |
| 254 | |
| 255 | ret = __iommu_completion_wait(iommu); |
| 256 | |
| 257 | iommu->need_sync = 0; |
| 258 | |
| 259 | if (ret) |
| 260 | goto out; |
| 261 | |
| 262 | __iommu_wait_for_completion(iommu); |
Joerg Roedel | 84df817 | 2008-12-17 16:36:44 +0100 | [diff] [blame] | 263 | |
Joerg Roedel | 7e4f88d | 2008-09-17 14:19:15 +0200 | [diff] [blame] | 264 | out: |
| 265 | spin_unlock_irqrestore(&iommu->lock, flags); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 270 | /* |
| 271 | * Command send function for invalidating a device table entry |
| 272 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 273 | static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) |
| 274 | { |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 275 | struct iommu_cmd cmd; |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 276 | int ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 277 | |
| 278 | BUG_ON(iommu == NULL); |
| 279 | |
| 280 | memset(&cmd, 0, sizeof(cmd)); |
| 281 | CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY); |
| 282 | cmd.data[0] = devid; |
| 283 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 284 | ret = iommu_queue_command(iommu, &cmd); |
| 285 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 286 | return ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 287 | } |
| 288 | |
Joerg Roedel | 237b6f3 | 2008-12-02 20:54:37 +0100 | [diff] [blame] | 289 | static void __iommu_build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 290 | u16 domid, int pde, int s) |
| 291 | { |
| 292 | memset(cmd, 0, sizeof(*cmd)); |
| 293 | address &= PAGE_MASK; |
| 294 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 295 | cmd->data[1] |= domid; |
| 296 | cmd->data[2] = lower_32_bits(address); |
| 297 | cmd->data[3] = upper_32_bits(address); |
| 298 | if (s) /* size bit - we flush more than one 4kb page */ |
| 299 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 300 | if (pde) /* PDE bit - we wan't flush everything not only the PTEs */ |
| 301 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 302 | } |
| 303 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 304 | /* |
| 305 | * Generic command send function for invalidaing TLB entries |
| 306 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 307 | static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, |
| 308 | u64 address, u16 domid, int pde, int s) |
| 309 | { |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 310 | struct iommu_cmd cmd; |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 311 | int ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 312 | |
Joerg Roedel | 237b6f3 | 2008-12-02 20:54:37 +0100 | [diff] [blame] | 313 | __iommu_build_inv_iommu_pages(&cmd, address, domid, pde, s); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 314 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 315 | ret = iommu_queue_command(iommu, &cmd); |
| 316 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 317 | return ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 318 | } |
| 319 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 320 | /* |
| 321 | * TLB invalidation function which is called from the mapping functions. |
| 322 | * It invalidates a single PTE if the range to flush is within a single |
| 323 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 324 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 325 | static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, |
| 326 | u64 address, size_t size) |
| 327 | { |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 328 | int s = 0; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 329 | unsigned pages = iommu_num_pages(address, size, PAGE_SIZE); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 330 | |
| 331 | address &= PAGE_MASK; |
| 332 | |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 333 | if (pages > 1) { |
| 334 | /* |
| 335 | * If we have to flush more than one page, flush all |
| 336 | * TLB entries for this domain |
| 337 | */ |
| 338 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 339 | s = 1; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 340 | } |
| 341 | |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 342 | iommu_queue_inv_iommu_pages(iommu, address, domid, 0, s); |
| 343 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 344 | return 0; |
| 345 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 346 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 347 | /* Flush the whole IO/TLB for a given protection domain */ |
| 348 | static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid) |
| 349 | { |
| 350 | u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 351 | |
| 352 | iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 1); |
| 353 | } |
| 354 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 355 | #ifdef CONFIG_IOMMU_API |
| 356 | /* |
| 357 | * This function is used to flush the IO/TLB for a given protection domain |
| 358 | * on every IOMMU in the system |
| 359 | */ |
| 360 | static void iommu_flush_domain(u16 domid) |
| 361 | { |
| 362 | unsigned long flags; |
| 363 | struct amd_iommu *iommu; |
| 364 | struct iommu_cmd cmd; |
| 365 | |
| 366 | __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 367 | domid, 1, 1); |
| 368 | |
| 369 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 370 | spin_lock_irqsave(&iommu->lock, flags); |
| 371 | __iommu_queue_command(iommu, &cmd); |
| 372 | __iommu_completion_wait(iommu); |
| 373 | __iommu_wait_for_completion(iommu); |
| 374 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 375 | } |
| 376 | } |
| 377 | #endif |
| 378 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 379 | /**************************************************************************** |
| 380 | * |
| 381 | * The functions below are used the create the page table mappings for |
| 382 | * unity mapped regions. |
| 383 | * |
| 384 | ****************************************************************************/ |
| 385 | |
| 386 | /* |
| 387 | * Generic mapping functions. It maps a physical address into a DMA |
| 388 | * address space. It allocates the page table pages if necessary. |
| 389 | * In the future it can be extended to a generic mapping function |
| 390 | * supporting all features of AMD IOMMU page tables like level skipping |
| 391 | * and full 64 bit address spaces. |
| 392 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 393 | static int iommu_map_page(struct protection_domain *dom, |
| 394 | unsigned long bus_addr, |
| 395 | unsigned long phys_addr, |
| 396 | int prot) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 397 | { |
| 398 | u64 __pte, *pte, *page; |
| 399 | |
| 400 | bus_addr = PAGE_ALIGN(bus_addr); |
Joerg Roedel | bb9d4ff | 2008-12-04 15:59:48 +0100 | [diff] [blame] | 401 | phys_addr = PAGE_ALIGN(phys_addr); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 402 | |
| 403 | /* only support 512GB address spaces for now */ |
| 404 | if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) |
| 405 | return -EINVAL; |
| 406 | |
| 407 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; |
| 408 | |
| 409 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 410 | page = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 411 | if (!page) |
| 412 | return -ENOMEM; |
| 413 | *pte = IOMMU_L2_PDE(virt_to_phys(page)); |
| 414 | } |
| 415 | |
| 416 | pte = IOMMU_PTE_PAGE(*pte); |
| 417 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 418 | |
| 419 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 420 | page = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 421 | if (!page) |
| 422 | return -ENOMEM; |
| 423 | *pte = IOMMU_L1_PDE(virt_to_phys(page)); |
| 424 | } |
| 425 | |
| 426 | pte = IOMMU_PTE_PAGE(*pte); |
| 427 | pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)]; |
| 428 | |
| 429 | if (IOMMU_PTE_PRESENT(*pte)) |
| 430 | return -EBUSY; |
| 431 | |
| 432 | __pte = phys_addr | IOMMU_PTE_P; |
| 433 | if (prot & IOMMU_PROT_IR) |
| 434 | __pte |= IOMMU_PTE_IR; |
| 435 | if (prot & IOMMU_PROT_IW) |
| 436 | __pte |= IOMMU_PTE_IW; |
| 437 | |
| 438 | *pte = __pte; |
| 439 | |
| 440 | return 0; |
| 441 | } |
| 442 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 443 | /* |
| 444 | * This function checks if a specific unity mapping entry is needed for |
| 445 | * this specific IOMMU. |
| 446 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 447 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
| 448 | struct unity_map_entry *entry) |
| 449 | { |
| 450 | u16 bdf, i; |
| 451 | |
| 452 | for (i = entry->devid_start; i <= entry->devid_end; ++i) { |
| 453 | bdf = amd_iommu_alias_table[i]; |
| 454 | if (amd_iommu_rlookup_table[bdf] == iommu) |
| 455 | return 1; |
| 456 | } |
| 457 | |
| 458 | return 0; |
| 459 | } |
| 460 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 461 | /* |
| 462 | * Init the unity mappings for a specific IOMMU in the system |
| 463 | * |
| 464 | * Basically iterates over all unity mapping entries and applies them to |
| 465 | * the default domain DMA of that IOMMU if necessary. |
| 466 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 467 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
| 468 | { |
| 469 | struct unity_map_entry *entry; |
| 470 | int ret; |
| 471 | |
| 472 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 473 | if (!iommu_for_unity_map(iommu, entry)) |
| 474 | continue; |
| 475 | ret = dma_ops_unity_map(iommu->default_dom, entry); |
| 476 | if (ret) |
| 477 | return ret; |
| 478 | } |
| 479 | |
| 480 | return 0; |
| 481 | } |
| 482 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 483 | /* |
| 484 | * This function actually applies the mapping to the page table of the |
| 485 | * dma_ops domain. |
| 486 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 487 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 488 | struct unity_map_entry *e) |
| 489 | { |
| 490 | u64 addr; |
| 491 | int ret; |
| 492 | |
| 493 | for (addr = e->address_start; addr < e->address_end; |
| 494 | addr += PAGE_SIZE) { |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 495 | ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 496 | if (ret) |
| 497 | return ret; |
| 498 | /* |
| 499 | * if unity mapping is in aperture range mark the page |
| 500 | * as allocated in the aperture |
| 501 | */ |
| 502 | if (addr < dma_dom->aperture_size) |
| 503 | __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap); |
| 504 | } |
| 505 | |
| 506 | return 0; |
| 507 | } |
| 508 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 509 | /* |
| 510 | * Inits the unity mappings required for a specific device |
| 511 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 512 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
| 513 | u16 devid) |
| 514 | { |
| 515 | struct unity_map_entry *e; |
| 516 | int ret; |
| 517 | |
| 518 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 519 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 520 | continue; |
| 521 | ret = dma_ops_unity_map(dma_dom, e); |
| 522 | if (ret) |
| 523 | return ret; |
| 524 | } |
| 525 | |
| 526 | return 0; |
| 527 | } |
| 528 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 529 | /**************************************************************************** |
| 530 | * |
| 531 | * The next functions belong to the address allocator for the dma_ops |
| 532 | * interface functions. They work like the allocators in the other IOMMU |
| 533 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 534 | * the aperture. Maybe it could be enhanced in the future to a more |
| 535 | * efficient allocator. |
| 536 | * |
| 537 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 538 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 539 | /* |
| 540 | * The address allocator core function. |
| 541 | * |
| 542 | * called with domain->lock held |
| 543 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 544 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 545 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 546 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 547 | unsigned long align_mask, |
| 548 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 549 | { |
FUJITA Tomonori | 40becd8 | 2008-09-29 00:06:36 +0900 | [diff] [blame] | 550 | unsigned long limit; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 551 | unsigned long address; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 552 | unsigned long boundary_size; |
| 553 | |
| 554 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 555 | PAGE_SIZE) >> PAGE_SHIFT; |
FUJITA Tomonori | 40becd8 | 2008-09-29 00:06:36 +0900 | [diff] [blame] | 556 | limit = iommu_device_max_index(dom->aperture_size >> PAGE_SHIFT, 0, |
| 557 | dma_mask >> PAGE_SHIFT); |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 558 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 559 | if (dom->next_bit >= limit) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 560 | dom->next_bit = 0; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 561 | dom->need_flush = true; |
| 562 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 563 | |
| 564 | address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 565 | 0 , boundary_size, align_mask); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 566 | if (address == -1) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 567 | address = iommu_area_alloc(dom->bitmap, limit, 0, pages, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 568 | 0, boundary_size, align_mask); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 569 | dom->need_flush = true; |
| 570 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 571 | |
| 572 | if (likely(address != -1)) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 573 | dom->next_bit = address + pages; |
| 574 | address <<= PAGE_SHIFT; |
| 575 | } else |
| 576 | address = bad_dma_address; |
| 577 | |
| 578 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 579 | |
| 580 | return address; |
| 581 | } |
| 582 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 583 | /* |
| 584 | * The address free function. |
| 585 | * |
| 586 | * called with domain->lock held |
| 587 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 588 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 589 | unsigned long address, |
| 590 | unsigned int pages) |
| 591 | { |
| 592 | address >>= PAGE_SHIFT; |
| 593 | iommu_area_free(dom->bitmap, address, pages); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 594 | |
Joerg Roedel | 8501c45 | 2008-11-17 19:11:46 +0100 | [diff] [blame] | 595 | if (address >= dom->next_bit) |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 596 | dom->need_flush = true; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 597 | } |
| 598 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 599 | /**************************************************************************** |
| 600 | * |
| 601 | * The next functions belong to the domain allocation. A domain is |
| 602 | * allocated for every IOMMU as the default domain. If device isolation |
| 603 | * is enabled, every device get its own domain. The most important thing |
| 604 | * about domains is the page table mapping the DMA address space they |
| 605 | * contain. |
| 606 | * |
| 607 | ****************************************************************************/ |
| 608 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 609 | static u16 domain_id_alloc(void) |
| 610 | { |
| 611 | unsigned long flags; |
| 612 | int id; |
| 613 | |
| 614 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 615 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 616 | BUG_ON(id == 0); |
| 617 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 618 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 619 | else |
| 620 | id = 0; |
| 621 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 622 | |
| 623 | return id; |
| 624 | } |
| 625 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 626 | #ifdef CONFIG_IOMMU_API |
| 627 | static void domain_id_free(int id) |
| 628 | { |
| 629 | unsigned long flags; |
| 630 | |
| 631 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 632 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 633 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 634 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 635 | } |
| 636 | #endif |
| 637 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 638 | /* |
| 639 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 640 | * ranges. |
| 641 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 642 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 643 | unsigned long start_page, |
| 644 | unsigned int pages) |
| 645 | { |
| 646 | unsigned int last_page = dom->aperture_size >> PAGE_SHIFT; |
| 647 | |
| 648 | if (start_page + pages > last_page) |
| 649 | pages = last_page - start_page; |
| 650 | |
FUJITA Tomonori | d26dbc5 | 2008-09-22 22:35:07 +0900 | [diff] [blame] | 651 | iommu_area_reserve(dom->bitmap, start_page, pages); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 652 | } |
| 653 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 654 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 655 | { |
| 656 | int i, j; |
| 657 | u64 *p1, *p2, *p3; |
| 658 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 659 | p1 = domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 660 | |
| 661 | if (!p1) |
| 662 | return; |
| 663 | |
| 664 | for (i = 0; i < 512; ++i) { |
| 665 | if (!IOMMU_PTE_PRESENT(p1[i])) |
| 666 | continue; |
| 667 | |
| 668 | p2 = IOMMU_PTE_PAGE(p1[i]); |
Joerg Roedel | 3cc3d84 | 2008-12-04 16:44:31 +0100 | [diff] [blame] | 669 | for (j = 0; j < 512; ++j) { |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 670 | if (!IOMMU_PTE_PRESENT(p2[j])) |
| 671 | continue; |
| 672 | p3 = IOMMU_PTE_PAGE(p2[j]); |
| 673 | free_page((unsigned long)p3); |
| 674 | } |
| 675 | |
| 676 | free_page((unsigned long)p2); |
| 677 | } |
| 678 | |
| 679 | free_page((unsigned long)p1); |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 680 | |
| 681 | domain->pt_root = NULL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 682 | } |
| 683 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 684 | /* |
| 685 | * Free a domain, only used if something went wrong in the |
| 686 | * allocation path and we need to free an already allocated page table |
| 687 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 688 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 689 | { |
| 690 | if (!dom) |
| 691 | return; |
| 692 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 693 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 694 | |
| 695 | kfree(dom->pte_pages); |
| 696 | |
| 697 | kfree(dom->bitmap); |
| 698 | |
| 699 | kfree(dom); |
| 700 | } |
| 701 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 702 | /* |
| 703 | * Allocates a new protection domain usable for the dma_ops functions. |
| 704 | * It also intializes the page table and the address allocator data |
| 705 | * structures required for the dma_ops interface |
| 706 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 707 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, |
| 708 | unsigned order) |
| 709 | { |
| 710 | struct dma_ops_domain *dma_dom; |
| 711 | unsigned i, num_pte_pages; |
| 712 | u64 *l2_pde; |
| 713 | u64 address; |
| 714 | |
| 715 | /* |
| 716 | * Currently the DMA aperture must be between 32 MB and 1GB in size |
| 717 | */ |
| 718 | if ((order < 25) || (order > 30)) |
| 719 | return NULL; |
| 720 | |
| 721 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 722 | if (!dma_dom) |
| 723 | return NULL; |
| 724 | |
| 725 | spin_lock_init(&dma_dom->domain.lock); |
| 726 | |
| 727 | dma_dom->domain.id = domain_id_alloc(); |
| 728 | if (dma_dom->domain.id == 0) |
| 729 | goto free_dma_dom; |
| 730 | dma_dom->domain.mode = PAGE_MODE_3_LEVEL; |
| 731 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 732 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 733 | dma_dom->domain.priv = dma_dom; |
| 734 | if (!dma_dom->domain.pt_root) |
| 735 | goto free_dma_dom; |
| 736 | dma_dom->aperture_size = (1ULL << order); |
| 737 | dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8), |
| 738 | GFP_KERNEL); |
| 739 | if (!dma_dom->bitmap) |
| 740 | goto free_dma_dom; |
| 741 | /* |
| 742 | * mark the first page as allocated so we never return 0 as |
| 743 | * a valid dma-address. So we can use 0 as error value |
| 744 | */ |
| 745 | dma_dom->bitmap[0] = 1; |
| 746 | dma_dom->next_bit = 0; |
| 747 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 748 | dma_dom->need_flush = false; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 749 | dma_dom->target_dev = 0xffff; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 750 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 751 | /* Intialize the exclusion range if necessary */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 752 | if (iommu->exclusion_start && |
| 753 | iommu->exclusion_start < dma_dom->aperture_size) { |
| 754 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 755 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 756 | iommu->exclusion_length, |
| 757 | PAGE_SIZE); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 758 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 759 | } |
| 760 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 761 | /* |
| 762 | * At the last step, build the page tables so we don't need to |
| 763 | * allocate page table pages in the dma_ops mapping/unmapping |
| 764 | * path. |
| 765 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 766 | num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); |
| 767 | dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), |
| 768 | GFP_KERNEL); |
| 769 | if (!dma_dom->pte_pages) |
| 770 | goto free_dma_dom; |
| 771 | |
| 772 | l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 773 | if (l2_pde == NULL) |
| 774 | goto free_dma_dom; |
| 775 | |
| 776 | dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde)); |
| 777 | |
| 778 | for (i = 0; i < num_pte_pages; ++i) { |
| 779 | dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 780 | if (!dma_dom->pte_pages[i]) |
| 781 | goto free_dma_dom; |
| 782 | address = virt_to_phys(dma_dom->pte_pages[i]); |
| 783 | l2_pde[i] = IOMMU_L1_PDE(address); |
| 784 | } |
| 785 | |
| 786 | return dma_dom; |
| 787 | |
| 788 | free_dma_dom: |
| 789 | dma_ops_domain_free(dma_dom); |
| 790 | |
| 791 | return NULL; |
| 792 | } |
| 793 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 794 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 795 | * little helper function to check whether a given protection domain is a |
| 796 | * dma_ops domain |
| 797 | */ |
| 798 | static bool dma_ops_domain(struct protection_domain *domain) |
| 799 | { |
| 800 | return domain->flags & PD_DMA_OPS_MASK; |
| 801 | } |
| 802 | |
| 803 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 804 | * Find out the protection domain structure for a given PCI device. This |
| 805 | * will give us the pointer to the page table root for example. |
| 806 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 807 | static struct protection_domain *domain_for_device(u16 devid) |
| 808 | { |
| 809 | struct protection_domain *dom; |
| 810 | unsigned long flags; |
| 811 | |
| 812 | read_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 813 | dom = amd_iommu_pd_table[devid]; |
| 814 | read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 815 | |
| 816 | return dom; |
| 817 | } |
| 818 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 819 | /* |
| 820 | * If a device is not yet associated with a domain, this function does |
| 821 | * assigns it visible for the hardware |
| 822 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 823 | static void set_device_domain(struct amd_iommu *iommu, |
| 824 | struct protection_domain *domain, |
| 825 | u16 devid) |
| 826 | { |
| 827 | unsigned long flags; |
| 828 | |
| 829 | u64 pte_root = virt_to_phys(domain->pt_root); |
| 830 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 831 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 832 | << DEV_ENTRY_MODE_SHIFT; |
| 833 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 834 | |
| 835 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 836 | amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root); |
| 837 | amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 838 | amd_iommu_dev_table[devid].data[2] = domain->id; |
| 839 | |
| 840 | amd_iommu_pd_table[devid] = domain; |
| 841 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 842 | |
| 843 | iommu_queue_inv_dev_entry(iommu, devid); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 844 | } |
| 845 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 846 | /***************************************************************************** |
| 847 | * |
| 848 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 849 | * |
| 850 | *****************************************************************************/ |
| 851 | |
| 852 | /* |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 853 | * This function checks if the driver got a valid device from the caller to |
| 854 | * avoid dereferencing invalid pointers. |
| 855 | */ |
| 856 | static bool check_device(struct device *dev) |
| 857 | { |
| 858 | if (!dev || !dev->dma_mask) |
| 859 | return false; |
| 860 | |
| 861 | return true; |
| 862 | } |
| 863 | |
| 864 | /* |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 865 | * In this function the list of preallocated protection domains is traversed to |
| 866 | * find the domain for a specific device |
| 867 | */ |
| 868 | static struct dma_ops_domain *find_protection_domain(u16 devid) |
| 869 | { |
| 870 | struct dma_ops_domain *entry, *ret = NULL; |
| 871 | unsigned long flags; |
| 872 | |
| 873 | if (list_empty(&iommu_pd_list)) |
| 874 | return NULL; |
| 875 | |
| 876 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 877 | |
| 878 | list_for_each_entry(entry, &iommu_pd_list, list) { |
| 879 | if (entry->target_dev == devid) { |
| 880 | ret = entry; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 881 | break; |
| 882 | } |
| 883 | } |
| 884 | |
| 885 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 886 | |
| 887 | return ret; |
| 888 | } |
| 889 | |
| 890 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 891 | * In the dma_ops path we only have the struct device. This function |
| 892 | * finds the corresponding IOMMU, the protection domain and the |
| 893 | * requestor id for a given device. |
| 894 | * If the device is not yet associated with a domain this is also done |
| 895 | * in this function. |
| 896 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 897 | static int get_device_resources(struct device *dev, |
| 898 | struct amd_iommu **iommu, |
| 899 | struct protection_domain **domain, |
| 900 | u16 *bdf) |
| 901 | { |
| 902 | struct dma_ops_domain *dma_dom; |
| 903 | struct pci_dev *pcidev; |
| 904 | u16 _bdf; |
| 905 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 906 | *iommu = NULL; |
| 907 | *domain = NULL; |
| 908 | *bdf = 0xffff; |
| 909 | |
| 910 | if (dev->bus != &pci_bus_type) |
| 911 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 912 | |
| 913 | pcidev = to_pci_dev(dev); |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 914 | _bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 915 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 916 | /* device not translated by any IOMMU in the system? */ |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 917 | if (_bdf > amd_iommu_last_bdf) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 918 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 919 | |
| 920 | *bdf = amd_iommu_alias_table[_bdf]; |
| 921 | |
| 922 | *iommu = amd_iommu_rlookup_table[*bdf]; |
| 923 | if (*iommu == NULL) |
| 924 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 925 | *domain = domain_for_device(*bdf); |
| 926 | if (*domain == NULL) { |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 927 | dma_dom = find_protection_domain(*bdf); |
| 928 | if (!dma_dom) |
| 929 | dma_dom = (*iommu)->default_dom; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 930 | *domain = &dma_dom->domain; |
| 931 | set_device_domain(*iommu, *domain, *bdf); |
| 932 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " |
| 933 | "device ", (*domain)->id); |
| 934 | print_devid(_bdf, 1); |
| 935 | } |
| 936 | |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 937 | if (domain_for_device(_bdf) == NULL) |
| 938 | set_device_domain(*iommu, *domain, _bdf); |
| 939 | |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 940 | return 1; |
| 941 | } |
| 942 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 943 | /* |
| 944 | * This is the generic map function. It maps one 4kb page at paddr to |
| 945 | * the given address in the DMA address space for the domain. |
| 946 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 947 | static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, |
| 948 | struct dma_ops_domain *dom, |
| 949 | unsigned long address, |
| 950 | phys_addr_t paddr, |
| 951 | int direction) |
| 952 | { |
| 953 | u64 *pte, __pte; |
| 954 | |
| 955 | WARN_ON(address > dom->aperture_size); |
| 956 | |
| 957 | paddr &= PAGE_MASK; |
| 958 | |
| 959 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; |
| 960 | pte += IOMMU_PTE_L0_INDEX(address); |
| 961 | |
| 962 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 963 | |
| 964 | if (direction == DMA_TO_DEVICE) |
| 965 | __pte |= IOMMU_PTE_IR; |
| 966 | else if (direction == DMA_FROM_DEVICE) |
| 967 | __pte |= IOMMU_PTE_IW; |
| 968 | else if (direction == DMA_BIDIRECTIONAL) |
| 969 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 970 | |
| 971 | WARN_ON(*pte); |
| 972 | |
| 973 | *pte = __pte; |
| 974 | |
| 975 | return (dma_addr_t)address; |
| 976 | } |
| 977 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 978 | /* |
| 979 | * The generic unmapping function for on page in the DMA address space. |
| 980 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 981 | static void dma_ops_domain_unmap(struct amd_iommu *iommu, |
| 982 | struct dma_ops_domain *dom, |
| 983 | unsigned long address) |
| 984 | { |
| 985 | u64 *pte; |
| 986 | |
| 987 | if (address >= dom->aperture_size) |
| 988 | return; |
| 989 | |
Joerg Roedel | 8ad909c | 2008-12-08 14:37:20 +0100 | [diff] [blame] | 990 | WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 991 | |
| 992 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; |
| 993 | pte += IOMMU_PTE_L0_INDEX(address); |
| 994 | |
| 995 | WARN_ON(!*pte); |
| 996 | |
| 997 | *pte = 0ULL; |
| 998 | } |
| 999 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1000 | /* |
| 1001 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 1002 | * contiguous memory region into DMA address space. It is used by all |
| 1003 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1004 | * Must be called with the domain lock held. |
| 1005 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1006 | static dma_addr_t __map_single(struct device *dev, |
| 1007 | struct amd_iommu *iommu, |
| 1008 | struct dma_ops_domain *dma_dom, |
| 1009 | phys_addr_t paddr, |
| 1010 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1011 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1012 | bool align, |
| 1013 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1014 | { |
| 1015 | dma_addr_t offset = paddr & ~PAGE_MASK; |
| 1016 | dma_addr_t address, start; |
| 1017 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1018 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1019 | int i; |
| 1020 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 1021 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1022 | paddr &= PAGE_MASK; |
| 1023 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1024 | if (align) |
| 1025 | align_mask = (1UL << get_order(size)) - 1; |
| 1026 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1027 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 1028 | dma_mask); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1029 | if (unlikely(address == bad_dma_address)) |
| 1030 | goto out; |
| 1031 | |
| 1032 | start = address; |
| 1033 | for (i = 0; i < pages; ++i) { |
| 1034 | dma_ops_domain_map(iommu, dma_dom, start, paddr, dir); |
| 1035 | paddr += PAGE_SIZE; |
| 1036 | start += PAGE_SIZE; |
| 1037 | } |
| 1038 | address += offset; |
| 1039 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1040 | if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) { |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1041 | iommu_flush_tlb(iommu, dma_dom->domain.id); |
| 1042 | dma_dom->need_flush = false; |
| 1043 | } else if (unlikely(iommu_has_npcache(iommu))) |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 1044 | iommu_flush_pages(iommu, dma_dom->domain.id, address, size); |
| 1045 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1046 | out: |
| 1047 | return address; |
| 1048 | } |
| 1049 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1050 | /* |
| 1051 | * Does the reverse of the __map_single function. Must be called with |
| 1052 | * the domain lock held too |
| 1053 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1054 | static void __unmap_single(struct amd_iommu *iommu, |
| 1055 | struct dma_ops_domain *dma_dom, |
| 1056 | dma_addr_t dma_addr, |
| 1057 | size_t size, |
| 1058 | int dir) |
| 1059 | { |
| 1060 | dma_addr_t i, start; |
| 1061 | unsigned int pages; |
| 1062 | |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 1063 | if ((dma_addr == bad_dma_address) || |
| 1064 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1065 | return; |
| 1066 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 1067 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1068 | dma_addr &= PAGE_MASK; |
| 1069 | start = dma_addr; |
| 1070 | |
| 1071 | for (i = 0; i < pages; ++i) { |
| 1072 | dma_ops_domain_unmap(iommu, dma_dom, start); |
| 1073 | start += PAGE_SIZE; |
| 1074 | } |
| 1075 | |
| 1076 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 1077 | |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1078 | if (amd_iommu_unmap_flush || dma_dom->need_flush) { |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1079 | iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1080 | dma_dom->need_flush = false; |
| 1081 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1082 | } |
| 1083 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1084 | /* |
| 1085 | * The exported map_single function for dma_ops. |
| 1086 | */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1087 | static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, |
| 1088 | size_t size, int dir) |
| 1089 | { |
| 1090 | unsigned long flags; |
| 1091 | struct amd_iommu *iommu; |
| 1092 | struct protection_domain *domain; |
| 1093 | u16 devid; |
| 1094 | dma_addr_t addr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1095 | u64 dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1096 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1097 | if (!check_device(dev)) |
| 1098 | return bad_dma_address; |
| 1099 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1100 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1101 | |
| 1102 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1103 | |
| 1104 | if (iommu == NULL || domain == NULL) |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1105 | /* device not handled by any AMD IOMMU */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1106 | return (dma_addr_t)paddr; |
| 1107 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1108 | if (!dma_ops_domain(domain)) |
| 1109 | return bad_dma_address; |
| 1110 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1111 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1112 | addr = __map_single(dev, iommu, domain->priv, paddr, size, dir, false, |
| 1113 | dma_mask); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1114 | if (addr == bad_dma_address) |
| 1115 | goto out; |
| 1116 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1117 | iommu_completion_wait(iommu); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1118 | |
| 1119 | out: |
| 1120 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1121 | |
| 1122 | return addr; |
| 1123 | } |
| 1124 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1125 | /* |
| 1126 | * The exported unmap_single function for dma_ops. |
| 1127 | */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1128 | static void unmap_single(struct device *dev, dma_addr_t dma_addr, |
| 1129 | size_t size, int dir) |
| 1130 | { |
| 1131 | unsigned long flags; |
| 1132 | struct amd_iommu *iommu; |
| 1133 | struct protection_domain *domain; |
| 1134 | u16 devid; |
| 1135 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1136 | if (!check_device(dev) || |
| 1137 | !get_device_resources(dev, &iommu, &domain, &devid)) |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1138 | /* device not handled by any AMD IOMMU */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1139 | return; |
| 1140 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1141 | if (!dma_ops_domain(domain)) |
| 1142 | return; |
| 1143 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1144 | spin_lock_irqsave(&domain->lock, flags); |
| 1145 | |
| 1146 | __unmap_single(iommu, domain->priv, dma_addr, size, dir); |
| 1147 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1148 | iommu_completion_wait(iommu); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1149 | |
| 1150 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1151 | } |
| 1152 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1153 | /* |
| 1154 | * This is a special map_sg function which is used if we should map a |
| 1155 | * device which is not handled by an AMD IOMMU in the system. |
| 1156 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1157 | static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, |
| 1158 | int nelems, int dir) |
| 1159 | { |
| 1160 | struct scatterlist *s; |
| 1161 | int i; |
| 1162 | |
| 1163 | for_each_sg(sglist, s, nelems, i) { |
| 1164 | s->dma_address = (dma_addr_t)sg_phys(s); |
| 1165 | s->dma_length = s->length; |
| 1166 | } |
| 1167 | |
| 1168 | return nelems; |
| 1169 | } |
| 1170 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1171 | /* |
| 1172 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 1173 | * lists). |
| 1174 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1175 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
| 1176 | int nelems, int dir) |
| 1177 | { |
| 1178 | unsigned long flags; |
| 1179 | struct amd_iommu *iommu; |
| 1180 | struct protection_domain *domain; |
| 1181 | u16 devid; |
| 1182 | int i; |
| 1183 | struct scatterlist *s; |
| 1184 | phys_addr_t paddr; |
| 1185 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1186 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1187 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1188 | if (!check_device(dev)) |
| 1189 | return 0; |
| 1190 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1191 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1192 | |
| 1193 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1194 | |
| 1195 | if (!iommu || !domain) |
| 1196 | return map_sg_no_iommu(dev, sglist, nelems, dir); |
| 1197 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1198 | if (!dma_ops_domain(domain)) |
| 1199 | return 0; |
| 1200 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1201 | spin_lock_irqsave(&domain->lock, flags); |
| 1202 | |
| 1203 | for_each_sg(sglist, s, nelems, i) { |
| 1204 | paddr = sg_phys(s); |
| 1205 | |
| 1206 | s->dma_address = __map_single(dev, iommu, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1207 | paddr, s->length, dir, false, |
| 1208 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1209 | |
| 1210 | if (s->dma_address) { |
| 1211 | s->dma_length = s->length; |
| 1212 | mapped_elems++; |
| 1213 | } else |
| 1214 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1215 | } |
| 1216 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1217 | iommu_completion_wait(iommu); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1218 | |
| 1219 | out: |
| 1220 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1221 | |
| 1222 | return mapped_elems; |
| 1223 | unmap: |
| 1224 | for_each_sg(sglist, s, mapped_elems, i) { |
| 1225 | if (s->dma_address) |
| 1226 | __unmap_single(iommu, domain->priv, s->dma_address, |
| 1227 | s->dma_length, dir); |
| 1228 | s->dma_address = s->dma_length = 0; |
| 1229 | } |
| 1230 | |
| 1231 | mapped_elems = 0; |
| 1232 | |
| 1233 | goto out; |
| 1234 | } |
| 1235 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1236 | /* |
| 1237 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 1238 | * lists). |
| 1239 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1240 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 1241 | int nelems, int dir) |
| 1242 | { |
| 1243 | unsigned long flags; |
| 1244 | struct amd_iommu *iommu; |
| 1245 | struct protection_domain *domain; |
| 1246 | struct scatterlist *s; |
| 1247 | u16 devid; |
| 1248 | int i; |
| 1249 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1250 | if (!check_device(dev) || |
| 1251 | !get_device_resources(dev, &iommu, &domain, &devid)) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1252 | return; |
| 1253 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1254 | if (!dma_ops_domain(domain)) |
| 1255 | return; |
| 1256 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1257 | spin_lock_irqsave(&domain->lock, flags); |
| 1258 | |
| 1259 | for_each_sg(sglist, s, nelems, i) { |
| 1260 | __unmap_single(iommu, domain->priv, s->dma_address, |
| 1261 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1262 | s->dma_address = s->dma_length = 0; |
| 1263 | } |
| 1264 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1265 | iommu_completion_wait(iommu); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1266 | |
| 1267 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1268 | } |
| 1269 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1270 | /* |
| 1271 | * The exported alloc_coherent function for dma_ops. |
| 1272 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1273 | static void *alloc_coherent(struct device *dev, size_t size, |
| 1274 | dma_addr_t *dma_addr, gfp_t flag) |
| 1275 | { |
| 1276 | unsigned long flags; |
| 1277 | void *virt_addr; |
| 1278 | struct amd_iommu *iommu; |
| 1279 | struct protection_domain *domain; |
| 1280 | u16 devid; |
| 1281 | phys_addr_t paddr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1282 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1283 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1284 | if (!check_device(dev)) |
| 1285 | return NULL; |
| 1286 | |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 1287 | if (!get_device_resources(dev, &iommu, &domain, &devid)) |
| 1288 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
| 1289 | |
Joerg Roedel | c97ac53 | 2008-09-11 10:59:15 +0200 | [diff] [blame] | 1290 | flag |= __GFP_ZERO; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1291 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 1292 | if (!virt_addr) |
| 1293 | return 0; |
| 1294 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1295 | paddr = virt_to_phys(virt_addr); |
| 1296 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1297 | if (!iommu || !domain) { |
| 1298 | *dma_addr = (dma_addr_t)paddr; |
| 1299 | return virt_addr; |
| 1300 | } |
| 1301 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1302 | if (!dma_ops_domain(domain)) |
| 1303 | goto out_free; |
| 1304 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1305 | if (!dma_mask) |
| 1306 | dma_mask = *dev->dma_mask; |
| 1307 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1308 | spin_lock_irqsave(&domain->lock, flags); |
| 1309 | |
| 1310 | *dma_addr = __map_single(dev, iommu, domain->priv, paddr, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1311 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1312 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1313 | if (*dma_addr == bad_dma_address) |
| 1314 | goto out_free; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1315 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1316 | iommu_completion_wait(iommu); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1317 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1318 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1319 | |
| 1320 | return virt_addr; |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1321 | |
| 1322 | out_free: |
| 1323 | |
| 1324 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 1325 | |
| 1326 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1327 | } |
| 1328 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1329 | /* |
| 1330 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1331 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1332 | static void free_coherent(struct device *dev, size_t size, |
| 1333 | void *virt_addr, dma_addr_t dma_addr) |
| 1334 | { |
| 1335 | unsigned long flags; |
| 1336 | struct amd_iommu *iommu; |
| 1337 | struct protection_domain *domain; |
| 1338 | u16 devid; |
| 1339 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1340 | if (!check_device(dev)) |
| 1341 | return; |
| 1342 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1343 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1344 | |
| 1345 | if (!iommu || !domain) |
| 1346 | goto free_mem; |
| 1347 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame^] | 1348 | if (!dma_ops_domain(domain)) |
| 1349 | goto free_mem; |
| 1350 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1351 | spin_lock_irqsave(&domain->lock, flags); |
| 1352 | |
| 1353 | __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1354 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1355 | iommu_completion_wait(iommu); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1356 | |
| 1357 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1358 | |
| 1359 | free_mem: |
| 1360 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 1361 | } |
| 1362 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1363 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 1364 | * This function is called by the DMA layer to find out if we can handle a |
| 1365 | * particular device. It is part of the dma_ops. |
| 1366 | */ |
| 1367 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 1368 | { |
| 1369 | u16 bdf; |
| 1370 | struct pci_dev *pcidev; |
| 1371 | |
| 1372 | /* No device or no PCI device */ |
| 1373 | if (!dev || dev->bus != &pci_bus_type) |
| 1374 | return 0; |
| 1375 | |
| 1376 | pcidev = to_pci_dev(dev); |
| 1377 | |
| 1378 | bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
| 1379 | |
| 1380 | /* Out of our scope? */ |
| 1381 | if (bdf > amd_iommu_last_bdf) |
| 1382 | return 0; |
| 1383 | |
| 1384 | return 1; |
| 1385 | } |
| 1386 | |
| 1387 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1388 | * The function for pre-allocating protection domains. |
| 1389 | * |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1390 | * If the driver core informs the DMA layer if a driver grabs a device |
| 1391 | * we don't need to preallocate the protection domains anymore. |
| 1392 | * For now we have to. |
| 1393 | */ |
| 1394 | void prealloc_protection_domains(void) |
| 1395 | { |
| 1396 | struct pci_dev *dev = NULL; |
| 1397 | struct dma_ops_domain *dma_dom; |
| 1398 | struct amd_iommu *iommu; |
| 1399 | int order = amd_iommu_aperture_order; |
| 1400 | u16 devid; |
| 1401 | |
| 1402 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { |
| 1403 | devid = (dev->bus->number << 8) | dev->devfn; |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1404 | if (devid > amd_iommu_last_bdf) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1405 | continue; |
| 1406 | devid = amd_iommu_alias_table[devid]; |
| 1407 | if (domain_for_device(devid)) |
| 1408 | continue; |
| 1409 | iommu = amd_iommu_rlookup_table[devid]; |
| 1410 | if (!iommu) |
| 1411 | continue; |
| 1412 | dma_dom = dma_ops_domain_alloc(iommu, order); |
| 1413 | if (!dma_dom) |
| 1414 | continue; |
| 1415 | init_unity_mappings_for_device(dma_dom, devid); |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1416 | dma_dom->target_dev = devid; |
| 1417 | |
| 1418 | list_add_tail(&dma_dom->list, &iommu_pd_list); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1419 | } |
| 1420 | } |
| 1421 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1422 | static struct dma_mapping_ops amd_iommu_dma_ops = { |
| 1423 | .alloc_coherent = alloc_coherent, |
| 1424 | .free_coherent = free_coherent, |
| 1425 | .map_single = map_single, |
| 1426 | .unmap_single = unmap_single, |
| 1427 | .map_sg = map_sg, |
| 1428 | .unmap_sg = unmap_sg, |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 1429 | .dma_supported = amd_iommu_dma_supported, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1430 | }; |
| 1431 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1432 | /* |
| 1433 | * The function which clues the AMD IOMMU driver into dma_ops. |
| 1434 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1435 | int __init amd_iommu_init_dma_ops(void) |
| 1436 | { |
| 1437 | struct amd_iommu *iommu; |
| 1438 | int order = amd_iommu_aperture_order; |
| 1439 | int ret; |
| 1440 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1441 | /* |
| 1442 | * first allocate a default protection domain for every IOMMU we |
| 1443 | * found in the system. Devices not assigned to any other |
| 1444 | * protection domain will be assigned to the default one. |
| 1445 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1446 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 1447 | iommu->default_dom = dma_ops_domain_alloc(iommu, order); |
| 1448 | if (iommu->default_dom == NULL) |
| 1449 | return -ENOMEM; |
| 1450 | ret = iommu_init_unity_mappings(iommu); |
| 1451 | if (ret) |
| 1452 | goto free_domains; |
| 1453 | } |
| 1454 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1455 | /* |
| 1456 | * If device isolation is enabled, pre-allocate the protection |
| 1457 | * domains for each device. |
| 1458 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1459 | if (amd_iommu_isolate) |
| 1460 | prealloc_protection_domains(); |
| 1461 | |
| 1462 | iommu_detected = 1; |
| 1463 | force_iommu = 1; |
| 1464 | bad_dma_address = 0; |
Ingo Molnar | 92af4e2 | 2008-06-27 10:48:16 +0200 | [diff] [blame] | 1465 | #ifdef CONFIG_GART_IOMMU |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1466 | gart_iommu_aperture_disabled = 1; |
| 1467 | gart_iommu_aperture = 0; |
Ingo Molnar | 92af4e2 | 2008-06-27 10:48:16 +0200 | [diff] [blame] | 1468 | #endif |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1469 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1470 | /* Make the driver finally visible to the drivers */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1471 | dma_ops = &amd_iommu_dma_ops; |
| 1472 | |
| 1473 | return 0; |
| 1474 | |
| 1475 | free_domains: |
| 1476 | |
| 1477 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 1478 | if (iommu->default_dom) |
| 1479 | dma_ops_domain_free(iommu->default_dom); |
| 1480 | } |
| 1481 | |
| 1482 | return ret; |
| 1483 | } |