Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | 5d0d715 | 2010-10-13 11:13:21 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/acpi.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 22 | #include <linux/list.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 23 | #include <linux/slab.h> |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 24 | #include <linux/syscore_ops.h> |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/msi.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 27 | #include <asm/pci-direct.h> |
Joerg Roedel | 6a9401a | 2009-11-20 13:22:21 +0100 | [diff] [blame] | 28 | #include <asm/amd_iommu_proto.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 29 | #include <asm/amd_iommu_types.h> |
Joerg Roedel | c6da992 | 2008-06-26 21:28:06 +0200 | [diff] [blame] | 30 | #include <asm/amd_iommu.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 31 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 32 | #include <asm/gart.h> |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 33 | #include <asm/x86_init.h> |
Konrad Rzeszutek Wilk | 22e6daf | 2010-08-26 13:58:03 -0400 | [diff] [blame] | 34 | #include <asm/iommu_table.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 35 | /* |
| 36 | * definitions for the ACPI scanning code |
| 37 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 38 | #define IVRS_HEADER_LENGTH 48 |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 39 | |
| 40 | #define ACPI_IVHD_TYPE 0x10 |
| 41 | #define ACPI_IVMD_TYPE_ALL 0x20 |
| 42 | #define ACPI_IVMD_TYPE 0x21 |
| 43 | #define ACPI_IVMD_TYPE_RANGE 0x22 |
| 44 | |
| 45 | #define IVHD_DEV_ALL 0x01 |
| 46 | #define IVHD_DEV_SELECT 0x02 |
| 47 | #define IVHD_DEV_SELECT_RANGE_START 0x03 |
| 48 | #define IVHD_DEV_RANGE_END 0x04 |
| 49 | #define IVHD_DEV_ALIAS 0x42 |
| 50 | #define IVHD_DEV_ALIAS_RANGE 0x43 |
| 51 | #define IVHD_DEV_EXT_SELECT 0x46 |
| 52 | #define IVHD_DEV_EXT_SELECT_RANGE 0x47 |
| 53 | |
Joerg Roedel | 6da7342 | 2009-05-04 11:44:38 +0200 | [diff] [blame] | 54 | #define IVHD_FLAG_HT_TUN_EN_MASK 0x01 |
| 55 | #define IVHD_FLAG_PASSPW_EN_MASK 0x02 |
| 56 | #define IVHD_FLAG_RESPASSPW_EN_MASK 0x04 |
| 57 | #define IVHD_FLAG_ISOC_EN_MASK 0x08 |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 58 | |
| 59 | #define IVMD_FLAG_EXCL_RANGE 0x08 |
| 60 | #define IVMD_FLAG_UNITY_MAP 0x01 |
| 61 | |
| 62 | #define ACPI_DEVFLAG_INITPASS 0x01 |
| 63 | #define ACPI_DEVFLAG_EXTINT 0x02 |
| 64 | #define ACPI_DEVFLAG_NMI 0x04 |
| 65 | #define ACPI_DEVFLAG_SYSMGT1 0x10 |
| 66 | #define ACPI_DEVFLAG_SYSMGT2 0x20 |
| 67 | #define ACPI_DEVFLAG_LINT0 0x40 |
| 68 | #define ACPI_DEVFLAG_LINT1 0x80 |
| 69 | #define ACPI_DEVFLAG_ATSDIS 0x10000000 |
| 70 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 71 | /* |
| 72 | * ACPI table definitions |
| 73 | * |
| 74 | * These data structures are laid over the table to parse the important values |
| 75 | * out of it. |
| 76 | */ |
| 77 | |
| 78 | /* |
| 79 | * structure describing one IOMMU in the ACPI table. Typically followed by one |
| 80 | * or more ivhd_entrys. |
| 81 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 82 | struct ivhd_header { |
| 83 | u8 type; |
| 84 | u8 flags; |
| 85 | u16 length; |
| 86 | u16 devid; |
| 87 | u16 cap_ptr; |
| 88 | u64 mmio_phys; |
| 89 | u16 pci_seg; |
| 90 | u16 info; |
| 91 | u32 reserved; |
| 92 | } __attribute__((packed)); |
| 93 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 94 | /* |
| 95 | * A device entry describing which devices a specific IOMMU translates and |
| 96 | * which requestor ids they use. |
| 97 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 98 | struct ivhd_entry { |
| 99 | u8 type; |
| 100 | u16 devid; |
| 101 | u8 flags; |
| 102 | u32 ext; |
| 103 | } __attribute__((packed)); |
| 104 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 105 | /* |
| 106 | * An AMD IOMMU memory definition structure. It defines things like exclusion |
| 107 | * ranges for devices and regions that should be unity mapped. |
| 108 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 109 | struct ivmd_header { |
| 110 | u8 type; |
| 111 | u8 flags; |
| 112 | u16 length; |
| 113 | u16 devid; |
| 114 | u16 aux; |
| 115 | u64 resv; |
| 116 | u64 range_start; |
| 117 | u64 range_length; |
| 118 | } __attribute__((packed)); |
| 119 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 120 | bool amd_iommu_dump; |
| 121 | |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 122 | static int __initdata amd_iommu_detected; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 123 | static bool __initdata amd_iommu_disabled; |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 124 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 125 | u16 amd_iommu_last_bdf; /* largest PCI device id we have |
| 126 | to handle */ |
Joerg Roedel | 2e22847 | 2008-07-11 17:14:31 +0200 | [diff] [blame] | 127 | LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 128 | we find in ACPI */ |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 129 | bool amd_iommu_unmap_flush; /* if true, flush on every unmap */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 130 | |
Joerg Roedel | 2e22847 | 2008-07-11 17:14:31 +0200 | [diff] [blame] | 131 | LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 132 | system */ |
| 133 | |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 134 | /* Array to assign indices to IOMMUs*/ |
| 135 | struct amd_iommu *amd_iommus[MAX_IOMMUS]; |
| 136 | int amd_iommus_present; |
| 137 | |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 138 | /* IOMMUs have a non-present cache? */ |
| 139 | bool amd_iommu_np_cache __read_mostly; |
Joerg Roedel | 60f723b | 2011-04-05 12:50:24 +0200 | [diff] [blame^] | 140 | bool amd_iommu_iotlb_sup __read_mostly = true; |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 141 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 142 | /* |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 143 | * The ACPI table parsing functions set this variable on an error |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 144 | */ |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 145 | static int __initdata amd_iommu_init_err; |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 146 | |
| 147 | /* |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 148 | * List of protection domains - used during resume |
| 149 | */ |
| 150 | LIST_HEAD(amd_iommu_pd_list); |
| 151 | spinlock_t amd_iommu_pd_lock; |
| 152 | |
| 153 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 154 | * Pointer to the device table which is shared by all AMD IOMMUs |
| 155 | * it is indexed by the PCI device id or the HT unit id and contains |
| 156 | * information about the domain the device belongs to as well as the |
| 157 | * page table root pointer. |
| 158 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 159 | struct dev_table_entry *amd_iommu_dev_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 160 | |
| 161 | /* |
| 162 | * The alias table is a driver specific data structure which contains the |
| 163 | * mappings of the PCI device ids to the actual requestor ids on the IOMMU. |
| 164 | * More than one device can share the same requestor id. |
| 165 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 166 | u16 *amd_iommu_alias_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 167 | |
| 168 | /* |
| 169 | * The rlookup table is used to find the IOMMU which is responsible |
| 170 | * for a specific device. It is also indexed by the PCI device id. |
| 171 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 172 | struct amd_iommu **amd_iommu_rlookup_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 173 | |
| 174 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 175 | * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap |
| 176 | * to know which ones are already in use. |
| 177 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 178 | unsigned long *amd_iommu_pd_alloc_bitmap; |
| 179 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 180 | static u32 dev_table_size; /* size of the device table */ |
| 181 | static u32 alias_table_size; /* size of the alias table */ |
| 182 | static u32 rlookup_table_size; /* size if the rlookup table */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 183 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 184 | /* |
| 185 | * This function flushes all internal caches of |
| 186 | * the IOMMU used by this driver. |
| 187 | */ |
| 188 | extern void iommu_flush_all_caches(struct amd_iommu *iommu); |
| 189 | |
Joerg Roedel | 208ec8c | 2008-07-11 17:14:24 +0200 | [diff] [blame] | 190 | static inline void update_last_devid(u16 devid) |
| 191 | { |
| 192 | if (devid > amd_iommu_last_bdf) |
| 193 | amd_iommu_last_bdf = devid; |
| 194 | } |
| 195 | |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 196 | static inline unsigned long tbl_size(int entry_size) |
| 197 | { |
| 198 | unsigned shift = PAGE_SHIFT + |
Neil Turton | 421f909 | 2009-05-14 14:00:35 +0100 | [diff] [blame] | 199 | get_order(((int)amd_iommu_last_bdf + 1) * entry_size); |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 200 | |
| 201 | return 1UL << shift; |
| 202 | } |
| 203 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 204 | /* Access to l1 and l2 indexed register spaces */ |
| 205 | |
| 206 | static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address) |
| 207 | { |
| 208 | u32 val; |
| 209 | |
| 210 | pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); |
| 211 | pci_read_config_dword(iommu->dev, 0xfc, &val); |
| 212 | return val; |
| 213 | } |
| 214 | |
| 215 | static void iommu_write_l1(struct amd_iommu *iommu, u16 l1, u8 address, u32 val) |
| 216 | { |
| 217 | pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16 | 1 << 31)); |
| 218 | pci_write_config_dword(iommu->dev, 0xfc, val); |
| 219 | pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); |
| 220 | } |
| 221 | |
| 222 | static u32 iommu_read_l2(struct amd_iommu *iommu, u8 address) |
| 223 | { |
| 224 | u32 val; |
| 225 | |
| 226 | pci_write_config_dword(iommu->dev, 0xf0, address); |
| 227 | pci_read_config_dword(iommu->dev, 0xf4, &val); |
| 228 | return val; |
| 229 | } |
| 230 | |
| 231 | static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val) |
| 232 | { |
| 233 | pci_write_config_dword(iommu->dev, 0xf0, (address | 1 << 8)); |
| 234 | pci_write_config_dword(iommu->dev, 0xf4, val); |
| 235 | } |
| 236 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 237 | /**************************************************************************** |
| 238 | * |
| 239 | * AMD IOMMU MMIO register space handling functions |
| 240 | * |
| 241 | * These functions are used to program the IOMMU device registers in |
| 242 | * MMIO space required for that driver. |
| 243 | * |
| 244 | ****************************************************************************/ |
| 245 | |
| 246 | /* |
| 247 | * This function set the exclusion range in the IOMMU. DMA accesses to the |
| 248 | * exclusion range are passed through untranslated |
| 249 | */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 250 | static void iommu_set_exclusion_range(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 251 | { |
| 252 | u64 start = iommu->exclusion_start & PAGE_MASK; |
| 253 | u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; |
| 254 | u64 entry; |
| 255 | |
| 256 | if (!iommu->exclusion_start) |
| 257 | return; |
| 258 | |
| 259 | entry = start | MMIO_EXCL_ENABLE_MASK; |
| 260 | memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET, |
| 261 | &entry, sizeof(entry)); |
| 262 | |
| 263 | entry = limit; |
| 264 | memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET, |
| 265 | &entry, sizeof(entry)); |
| 266 | } |
| 267 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 268 | /* Programs the physical address of the device table into the IOMMU hardware */ |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 269 | static void __init iommu_set_device_table(struct amd_iommu *iommu) |
| 270 | { |
Andreas Herrmann | f609891 | 2008-10-16 16:27:36 +0200 | [diff] [blame] | 271 | u64 entry; |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 272 | |
| 273 | BUG_ON(iommu->mmio_base == NULL); |
| 274 | |
| 275 | entry = virt_to_phys(amd_iommu_dev_table); |
| 276 | entry |= (dev_table_size >> 12) - 1; |
| 277 | memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET, |
| 278 | &entry, sizeof(entry)); |
| 279 | } |
| 280 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 281 | /* Generic functions to enable/disable certain features of the IOMMU. */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 282 | static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 283 | { |
| 284 | u32 ctrl; |
| 285 | |
| 286 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 287 | ctrl |= (1 << bit); |
| 288 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 289 | } |
| 290 | |
Joerg Roedel | ca020711 | 2009-10-28 18:02:26 +0100 | [diff] [blame] | 291 | static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 292 | { |
| 293 | u32 ctrl; |
| 294 | |
Joerg Roedel | 199d0d5 | 2008-09-17 16:45:59 +0200 | [diff] [blame] | 295 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 296 | ctrl &= ~(1 << bit); |
| 297 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 298 | } |
| 299 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 300 | /* Function to enable the hardware */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 301 | static void iommu_enable(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 302 | { |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 303 | printk(KERN_INFO "AMD-Vi: Enabling IOMMU at %s cap 0x%hx\n", |
Joerg Roedel | a4e267c | 2008-12-10 20:04:18 +0100 | [diff] [blame] | 304 | dev_name(&iommu->dev->dev), iommu->cap_ptr); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 305 | |
| 306 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 307 | } |
| 308 | |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 309 | static void iommu_disable(struct amd_iommu *iommu) |
Joerg Roedel | 126c52b | 2008-09-09 16:47:35 +0200 | [diff] [blame] | 310 | { |
Chris Wright | a8c485b | 2009-06-15 15:53:45 +0200 | [diff] [blame] | 311 | /* Disable command buffer */ |
| 312 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
| 313 | |
| 314 | /* Disable event logging and event interrupts */ |
| 315 | iommu_feature_disable(iommu, CONTROL_EVT_INT_EN); |
| 316 | iommu_feature_disable(iommu, CONTROL_EVT_LOG_EN); |
| 317 | |
| 318 | /* Disable IOMMU hardware itself */ |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 319 | iommu_feature_disable(iommu, CONTROL_IOMMU_EN); |
Joerg Roedel | 126c52b | 2008-09-09 16:47:35 +0200 | [diff] [blame] | 320 | } |
| 321 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 322 | /* |
| 323 | * mapping and unmapping functions for the IOMMU MMIO space. Each AMD IOMMU in |
| 324 | * the system has one. |
| 325 | */ |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 326 | static u8 * __init iommu_map_mmio_space(u64 address) |
| 327 | { |
| 328 | u8 *ret; |
| 329 | |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 330 | if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) { |
| 331 | pr_err("AMD-Vi: Can not reserve memory region %llx for mmio\n", |
| 332 | address); |
| 333 | pr_err("AMD-Vi: This is a BIOS bug. Please contact your hardware vendor\n"); |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 334 | return NULL; |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 335 | } |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 336 | |
| 337 | ret = ioremap_nocache(address, MMIO_REGION_LENGTH); |
| 338 | if (ret != NULL) |
| 339 | return ret; |
| 340 | |
| 341 | release_mem_region(address, MMIO_REGION_LENGTH); |
| 342 | |
| 343 | return NULL; |
| 344 | } |
| 345 | |
| 346 | static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu) |
| 347 | { |
| 348 | if (iommu->mmio_base) |
| 349 | iounmap(iommu->mmio_base); |
| 350 | release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH); |
| 351 | } |
| 352 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 353 | /**************************************************************************** |
| 354 | * |
| 355 | * The functions below belong to the first pass of AMD IOMMU ACPI table |
| 356 | * parsing. In this pass we try to find out the highest device id this |
| 357 | * code has to handle. Upon this information the size of the shared data |
| 358 | * structures is determined later. |
| 359 | * |
| 360 | ****************************************************************************/ |
| 361 | |
| 362 | /* |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 363 | * This function calculates the length of a given IVHD entry |
| 364 | */ |
| 365 | static inline int ivhd_entry_length(u8 *ivhd) |
| 366 | { |
| 367 | return 0x04 << (*ivhd >> 6); |
| 368 | } |
| 369 | |
| 370 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 371 | * This function reads the last device id the IOMMU has to handle from the PCI |
| 372 | * capability header for this IOMMU |
| 373 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 374 | static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr) |
| 375 | { |
| 376 | u32 cap; |
| 377 | |
| 378 | cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 379 | update_last_devid(calc_devid(MMIO_GET_BUS(cap), MMIO_GET_LD(cap))); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 380 | |
| 381 | return 0; |
| 382 | } |
| 383 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 384 | /* |
| 385 | * After reading the highest device id from the IOMMU PCI capability header |
| 386 | * this function looks if there is a higher device id defined in the ACPI table |
| 387 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 388 | static int __init find_last_devid_from_ivhd(struct ivhd_header *h) |
| 389 | { |
| 390 | u8 *p = (void *)h, *end = (void *)h; |
| 391 | struct ivhd_entry *dev; |
| 392 | |
| 393 | p += sizeof(*h); |
| 394 | end += h->length; |
| 395 | |
| 396 | find_last_devid_on_pci(PCI_BUS(h->devid), |
| 397 | PCI_SLOT(h->devid), |
| 398 | PCI_FUNC(h->devid), |
| 399 | h->cap_ptr); |
| 400 | |
| 401 | while (p < end) { |
| 402 | dev = (struct ivhd_entry *)p; |
| 403 | switch (dev->type) { |
| 404 | case IVHD_DEV_SELECT: |
| 405 | case IVHD_DEV_RANGE_END: |
| 406 | case IVHD_DEV_ALIAS: |
| 407 | case IVHD_DEV_EXT_SELECT: |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 408 | /* all the above subfield types refer to device ids */ |
Joerg Roedel | 208ec8c | 2008-07-11 17:14:24 +0200 | [diff] [blame] | 409 | update_last_devid(dev->devid); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 410 | break; |
| 411 | default: |
| 412 | break; |
| 413 | } |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 414 | p += ivhd_entry_length(p); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | WARN_ON(p != end); |
| 418 | |
| 419 | return 0; |
| 420 | } |
| 421 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 422 | /* |
| 423 | * Iterate over all IVHD entries in the ACPI table and find the highest device |
| 424 | * id which we need to handle. This is the first of three functions which parse |
| 425 | * the ACPI table. So we check the checksum here. |
| 426 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 427 | static int __init find_last_devid_acpi(struct acpi_table_header *table) |
| 428 | { |
| 429 | int i; |
| 430 | u8 checksum = 0, *p = (u8 *)table, *end = (u8 *)table; |
| 431 | struct ivhd_header *h; |
| 432 | |
| 433 | /* |
| 434 | * Validate checksum here so we don't need to do it when |
| 435 | * we actually parse the table |
| 436 | */ |
| 437 | for (i = 0; i < table->length; ++i) |
| 438 | checksum += p[i]; |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 439 | if (checksum != 0) { |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 440 | /* ACPI table corrupt */ |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 441 | amd_iommu_init_err = -ENODEV; |
| 442 | return 0; |
| 443 | } |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 444 | |
| 445 | p += IVRS_HEADER_LENGTH; |
| 446 | |
| 447 | end += table->length; |
| 448 | while (p < end) { |
| 449 | h = (struct ivhd_header *)p; |
| 450 | switch (h->type) { |
| 451 | case ACPI_IVHD_TYPE: |
| 452 | find_last_devid_from_ivhd(h); |
| 453 | break; |
| 454 | default: |
| 455 | break; |
| 456 | } |
| 457 | p += h->length; |
| 458 | } |
| 459 | WARN_ON(p != end); |
| 460 | |
| 461 | return 0; |
| 462 | } |
| 463 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 464 | /**************************************************************************** |
| 465 | * |
| 466 | * The following functions belong the the code path which parses the ACPI table |
| 467 | * the second time. In this ACPI parsing iteration we allocate IOMMU specific |
| 468 | * data structures, initialize the device/alias/rlookup table and also |
| 469 | * basically initialize the hardware. |
| 470 | * |
| 471 | ****************************************************************************/ |
| 472 | |
| 473 | /* |
| 474 | * Allocates the command buffer. This buffer is per AMD IOMMU. We can |
| 475 | * write commands to that buffer later and the IOMMU will execute them |
| 476 | * asynchronously |
| 477 | */ |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 478 | static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) |
| 479 | { |
Joerg Roedel | d0312b21 | 2008-07-11 17:14:29 +0200 | [diff] [blame] | 480 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 481 | get_order(CMD_BUFFER_SIZE)); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 482 | |
| 483 | if (cmd_buf == NULL) |
| 484 | return NULL; |
| 485 | |
Chris Wright | 549c90dc | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 486 | iommu->cmd_buf_size = CMD_BUFFER_SIZE | CMD_BUFFER_UNINITIALIZED; |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 487 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 488 | return cmd_buf; |
| 489 | } |
| 490 | |
| 491 | /* |
Joerg Roedel | 93f1cc67 | 2009-09-03 14:50:20 +0200 | [diff] [blame] | 492 | * This function resets the command buffer if the IOMMU stopped fetching |
| 493 | * commands from it. |
| 494 | */ |
| 495 | void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu) |
| 496 | { |
| 497 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
| 498 | |
| 499 | writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 500 | writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 501 | |
| 502 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); |
| 503 | } |
| 504 | |
| 505 | /* |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 506 | * This function writes the command buffer address to the hardware and |
| 507 | * enables it. |
| 508 | */ |
| 509 | static void iommu_enable_command_buffer(struct amd_iommu *iommu) |
| 510 | { |
| 511 | u64 entry; |
| 512 | |
| 513 | BUG_ON(iommu->cmd_buf == NULL); |
| 514 | |
| 515 | entry = (u64)virt_to_phys(iommu->cmd_buf); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 516 | entry |= MMIO_CMD_SIZE_512; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 517 | |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 518 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 519 | &entry, sizeof(entry)); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 520 | |
Joerg Roedel | 93f1cc67 | 2009-09-03 14:50:20 +0200 | [diff] [blame] | 521 | amd_iommu_reset_cmd_buffer(iommu); |
Chris Wright | 549c90dc | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 522 | iommu->cmd_buf_size &= ~(CMD_BUFFER_UNINITIALIZED); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 523 | } |
| 524 | |
| 525 | static void __init free_command_buffer(struct amd_iommu *iommu) |
| 526 | { |
Joerg Roedel | 23c1713 | 2008-09-17 17:18:17 +0200 | [diff] [blame] | 527 | free_pages((unsigned long)iommu->cmd_buf, |
Chris Wright | 549c90dc | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 528 | get_order(iommu->cmd_buf_size & ~(CMD_BUFFER_UNINITIALIZED))); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 529 | } |
| 530 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 531 | /* allocates the memory where the IOMMU will log its events to */ |
| 532 | static u8 * __init alloc_event_buffer(struct amd_iommu *iommu) |
| 533 | { |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 534 | iommu->evt_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 535 | get_order(EVT_BUFFER_SIZE)); |
| 536 | |
| 537 | if (iommu->evt_buf == NULL) |
| 538 | return NULL; |
| 539 | |
Joerg Roedel | 1bc6f83 | 2009-07-02 18:32:05 +0200 | [diff] [blame] | 540 | iommu->evt_buf_size = EVT_BUFFER_SIZE; |
| 541 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 542 | return iommu->evt_buf; |
| 543 | } |
| 544 | |
| 545 | static void iommu_enable_event_buffer(struct amd_iommu *iommu) |
| 546 | { |
| 547 | u64 entry; |
| 548 | |
| 549 | BUG_ON(iommu->evt_buf == NULL); |
| 550 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 551 | entry = (u64)virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 552 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 553 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, |
| 554 | &entry, sizeof(entry)); |
| 555 | |
Joerg Roedel | 09067207 | 2009-06-15 16:06:48 +0200 | [diff] [blame] | 556 | /* set head and tail to zero manually */ |
| 557 | writel(0x00, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 558 | writel(0x00, iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 559 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 560 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 561 | } |
| 562 | |
| 563 | static void __init free_event_buffer(struct amd_iommu *iommu) |
| 564 | { |
| 565 | free_pages((unsigned long)iommu->evt_buf, get_order(EVT_BUFFER_SIZE)); |
| 566 | } |
| 567 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 568 | /* sets a specific bit in the device table entry. */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 569 | static void set_dev_entry_bit(u16 devid, u8 bit) |
| 570 | { |
| 571 | int i = (bit >> 5) & 0x07; |
| 572 | int _bit = bit & 0x1f; |
| 573 | |
| 574 | amd_iommu_dev_table[devid].data[i] |= (1 << _bit); |
| 575 | } |
| 576 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 577 | static int get_dev_entry_bit(u16 devid, u8 bit) |
| 578 | { |
| 579 | int i = (bit >> 5) & 0x07; |
| 580 | int _bit = bit & 0x1f; |
| 581 | |
| 582 | return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit; |
| 583 | } |
| 584 | |
| 585 | |
| 586 | void amd_iommu_apply_erratum_63(u16 devid) |
| 587 | { |
| 588 | int sysmgt; |
| 589 | |
| 590 | sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) | |
| 591 | (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1); |
| 592 | |
| 593 | if (sysmgt == 0x01) |
| 594 | set_dev_entry_bit(devid, DEV_ENTRY_IW); |
| 595 | } |
| 596 | |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 597 | /* Writes the specific IOMMU for a device into the rlookup table */ |
| 598 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) |
| 599 | { |
| 600 | amd_iommu_rlookup_table[devid] = iommu; |
| 601 | } |
| 602 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 603 | /* |
| 604 | * This function takes the device specific flags read from the ACPI |
| 605 | * table and sets up the device table entry with that information |
| 606 | */ |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 607 | static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, |
| 608 | u16 devid, u32 flags, u32 ext_flags) |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 609 | { |
| 610 | if (flags & ACPI_DEVFLAG_INITPASS) |
| 611 | set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); |
| 612 | if (flags & ACPI_DEVFLAG_EXTINT) |
| 613 | set_dev_entry_bit(devid, DEV_ENTRY_EINT_PASS); |
| 614 | if (flags & ACPI_DEVFLAG_NMI) |
| 615 | set_dev_entry_bit(devid, DEV_ENTRY_NMI_PASS); |
| 616 | if (flags & ACPI_DEVFLAG_SYSMGT1) |
| 617 | set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1); |
| 618 | if (flags & ACPI_DEVFLAG_SYSMGT2) |
| 619 | set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2); |
| 620 | if (flags & ACPI_DEVFLAG_LINT0) |
| 621 | set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); |
| 622 | if (flags & ACPI_DEVFLAG_LINT1) |
| 623 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 624 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 625 | amd_iommu_apply_erratum_63(devid); |
| 626 | |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 627 | set_iommu_for_device(iommu, devid); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 628 | } |
| 629 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 630 | /* |
| 631 | * Reads the device exclusion range from ACPI and initialize IOMMU with |
| 632 | * it |
| 633 | */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 634 | static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) |
| 635 | { |
| 636 | struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; |
| 637 | |
| 638 | if (!(m->flags & IVMD_FLAG_EXCL_RANGE)) |
| 639 | return; |
| 640 | |
| 641 | if (iommu) { |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 642 | /* |
| 643 | * We only can configure exclusion ranges per IOMMU, not |
| 644 | * per device. But we can enable the exclusion range per |
| 645 | * device. This is done here |
| 646 | */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 647 | set_dev_entry_bit(m->devid, DEV_ENTRY_EX); |
| 648 | iommu->exclusion_start = m->range_start; |
| 649 | iommu->exclusion_length = m->range_length; |
| 650 | } |
| 651 | } |
| 652 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 653 | /* |
| 654 | * This function reads some important data from the IOMMU PCI space and |
| 655 | * initializes the driver data structure with it. It reads the hardware |
| 656 | * capabilities and the first/last device entries |
| 657 | */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 658 | static void __init init_iommu_from_pci(struct amd_iommu *iommu) |
| 659 | { |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 660 | int cap_ptr = iommu->cap_ptr; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 661 | u32 range, misc; |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 662 | int i, j; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 663 | |
Joerg Roedel | 3eaf28a | 2008-09-08 15:55:10 +0200 | [diff] [blame] | 664 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET, |
| 665 | &iommu->cap); |
| 666 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_RANGE_OFFSET, |
| 667 | &range); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 668 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_MISC_OFFSET, |
| 669 | &misc); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 670 | |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 671 | iommu->first_device = calc_devid(MMIO_GET_BUS(range), |
| 672 | MMIO_GET_FD(range)); |
| 673 | iommu->last_device = calc_devid(MMIO_GET_BUS(range), |
| 674 | MMIO_GET_LD(range)); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 675 | iommu->evt_msi_num = MMIO_MSI_NUM(misc); |
Joerg Roedel | 4c894f4 | 2010-09-23 15:15:19 +0200 | [diff] [blame] | 676 | |
Joerg Roedel | 60f723b | 2011-04-05 12:50:24 +0200 | [diff] [blame^] | 677 | if (!(iommu->cap & (1 << IOMMU_CAP_IOTLB))) |
| 678 | amd_iommu_iotlb_sup = false; |
| 679 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 680 | if (!is_rd890_iommu(iommu->dev)) |
| 681 | return; |
| 682 | |
| 683 | /* |
| 684 | * Some rd890 systems may not be fully reconfigured by the BIOS, so |
| 685 | * it's necessary for us to store this information so it can be |
| 686 | * reprogrammed on resume |
| 687 | */ |
| 688 | |
| 689 | pci_read_config_dword(iommu->dev, iommu->cap_ptr + 4, |
| 690 | &iommu->stored_addr_lo); |
| 691 | pci_read_config_dword(iommu->dev, iommu->cap_ptr + 8, |
| 692 | &iommu->stored_addr_hi); |
| 693 | |
| 694 | /* Low bit locks writes to configuration space */ |
| 695 | iommu->stored_addr_lo &= ~1; |
| 696 | |
| 697 | for (i = 0; i < 6; i++) |
| 698 | for (j = 0; j < 0x12; j++) |
| 699 | iommu->stored_l1[i][j] = iommu_read_l1(iommu, i, j); |
| 700 | |
| 701 | for (i = 0; i < 0x83; i++) |
| 702 | iommu->stored_l2[i] = iommu_read_l2(iommu, i); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 703 | } |
| 704 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 705 | /* |
| 706 | * Takes a pointer to an AMD IOMMU entry in the ACPI table and |
| 707 | * initializes the hardware and our data structures with it. |
| 708 | */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 709 | static void __init init_iommu_from_acpi(struct amd_iommu *iommu, |
| 710 | struct ivhd_header *h) |
| 711 | { |
| 712 | u8 *p = (u8 *)h; |
| 713 | u8 *end = p, flags = 0; |
| 714 | u16 dev_i, devid = 0, devid_start = 0, devid_to = 0; |
| 715 | u32 ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 716 | bool alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 717 | struct ivhd_entry *e; |
| 718 | |
| 719 | /* |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 720 | * First save the recommended feature enable bits from ACPI |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 721 | */ |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 722 | iommu->acpi_flags = h->flags; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 723 | |
| 724 | /* |
| 725 | * Done. Now parse the device entries |
| 726 | */ |
| 727 | p += sizeof(struct ivhd_header); |
| 728 | end += h->length; |
| 729 | |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 730 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 731 | while (p < end) { |
| 732 | e = (struct ivhd_entry *)p; |
| 733 | switch (e->type) { |
| 734 | case IVHD_DEV_ALL: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 735 | |
| 736 | DUMP_printk(" DEV_ALL\t\t\t first devid: %02x:%02x.%x" |
| 737 | " last device %02x:%02x.%x flags: %02x\n", |
| 738 | PCI_BUS(iommu->first_device), |
| 739 | PCI_SLOT(iommu->first_device), |
| 740 | PCI_FUNC(iommu->first_device), |
| 741 | PCI_BUS(iommu->last_device), |
| 742 | PCI_SLOT(iommu->last_device), |
| 743 | PCI_FUNC(iommu->last_device), |
| 744 | e->flags); |
| 745 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 746 | for (dev_i = iommu->first_device; |
| 747 | dev_i <= iommu->last_device; ++dev_i) |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 748 | set_dev_entry_from_acpi(iommu, dev_i, |
| 749 | e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 750 | break; |
| 751 | case IVHD_DEV_SELECT: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 752 | |
| 753 | DUMP_printk(" DEV_SELECT\t\t\t devid: %02x:%02x.%x " |
| 754 | "flags: %02x\n", |
| 755 | PCI_BUS(e->devid), |
| 756 | PCI_SLOT(e->devid), |
| 757 | PCI_FUNC(e->devid), |
| 758 | e->flags); |
| 759 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 760 | devid = e->devid; |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 761 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 762 | break; |
| 763 | case IVHD_DEV_SELECT_RANGE_START: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 764 | |
| 765 | DUMP_printk(" DEV_SELECT_RANGE_START\t " |
| 766 | "devid: %02x:%02x.%x flags: %02x\n", |
| 767 | PCI_BUS(e->devid), |
| 768 | PCI_SLOT(e->devid), |
| 769 | PCI_FUNC(e->devid), |
| 770 | e->flags); |
| 771 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 772 | devid_start = e->devid; |
| 773 | flags = e->flags; |
| 774 | ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 775 | alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 776 | break; |
| 777 | case IVHD_DEV_ALIAS: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 778 | |
| 779 | DUMP_printk(" DEV_ALIAS\t\t\t devid: %02x:%02x.%x " |
| 780 | "flags: %02x devid_to: %02x:%02x.%x\n", |
| 781 | PCI_BUS(e->devid), |
| 782 | PCI_SLOT(e->devid), |
| 783 | PCI_FUNC(e->devid), |
| 784 | e->flags, |
| 785 | PCI_BUS(e->ext >> 8), |
| 786 | PCI_SLOT(e->ext >> 8), |
| 787 | PCI_FUNC(e->ext >> 8)); |
| 788 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 789 | devid = e->devid; |
| 790 | devid_to = e->ext >> 8; |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 791 | set_dev_entry_from_acpi(iommu, devid , e->flags, 0); |
Neil Turton | 7455aab | 2009-05-14 14:08:11 +0100 | [diff] [blame] | 792 | set_dev_entry_from_acpi(iommu, devid_to, e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 793 | amd_iommu_alias_table[devid] = devid_to; |
| 794 | break; |
| 795 | case IVHD_DEV_ALIAS_RANGE: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 796 | |
| 797 | DUMP_printk(" DEV_ALIAS_RANGE\t\t " |
| 798 | "devid: %02x:%02x.%x flags: %02x " |
| 799 | "devid_to: %02x:%02x.%x\n", |
| 800 | PCI_BUS(e->devid), |
| 801 | PCI_SLOT(e->devid), |
| 802 | PCI_FUNC(e->devid), |
| 803 | e->flags, |
| 804 | PCI_BUS(e->ext >> 8), |
| 805 | PCI_SLOT(e->ext >> 8), |
| 806 | PCI_FUNC(e->ext >> 8)); |
| 807 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 808 | devid_start = e->devid; |
| 809 | flags = e->flags; |
| 810 | devid_to = e->ext >> 8; |
| 811 | ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 812 | alias = true; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 813 | break; |
| 814 | case IVHD_DEV_EXT_SELECT: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 815 | |
| 816 | DUMP_printk(" DEV_EXT_SELECT\t\t devid: %02x:%02x.%x " |
| 817 | "flags: %02x ext: %08x\n", |
| 818 | PCI_BUS(e->devid), |
| 819 | PCI_SLOT(e->devid), |
| 820 | PCI_FUNC(e->devid), |
| 821 | e->flags, e->ext); |
| 822 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 823 | devid = e->devid; |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 824 | set_dev_entry_from_acpi(iommu, devid, e->flags, |
| 825 | e->ext); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 826 | break; |
| 827 | case IVHD_DEV_EXT_SELECT_RANGE: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 828 | |
| 829 | DUMP_printk(" DEV_EXT_SELECT_RANGE\t devid: " |
| 830 | "%02x:%02x.%x flags: %02x ext: %08x\n", |
| 831 | PCI_BUS(e->devid), |
| 832 | PCI_SLOT(e->devid), |
| 833 | PCI_FUNC(e->devid), |
| 834 | e->flags, e->ext); |
| 835 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 836 | devid_start = e->devid; |
| 837 | flags = e->flags; |
| 838 | ext_flags = e->ext; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 839 | alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 840 | break; |
| 841 | case IVHD_DEV_RANGE_END: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 842 | |
| 843 | DUMP_printk(" DEV_RANGE_END\t\t devid: %02x:%02x.%x\n", |
| 844 | PCI_BUS(e->devid), |
| 845 | PCI_SLOT(e->devid), |
| 846 | PCI_FUNC(e->devid)); |
| 847 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 848 | devid = e->devid; |
| 849 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 850 | if (alias) { |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 851 | amd_iommu_alias_table[dev_i] = devid_to; |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 852 | set_dev_entry_from_acpi(iommu, |
| 853 | devid_to, flags, ext_flags); |
| 854 | } |
| 855 | set_dev_entry_from_acpi(iommu, dev_i, |
| 856 | flags, ext_flags); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 857 | } |
| 858 | break; |
| 859 | default: |
| 860 | break; |
| 861 | } |
| 862 | |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 863 | p += ivhd_entry_length(p); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 864 | } |
| 865 | } |
| 866 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 867 | /* Initializes the device->iommu mapping for the driver */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 868 | static int __init init_iommu_devices(struct amd_iommu *iommu) |
| 869 | { |
| 870 | u16 i; |
| 871 | |
| 872 | for (i = iommu->first_device; i <= iommu->last_device; ++i) |
| 873 | set_iommu_for_device(iommu, i); |
| 874 | |
| 875 | return 0; |
| 876 | } |
| 877 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 878 | static void __init free_iommu_one(struct amd_iommu *iommu) |
| 879 | { |
| 880 | free_command_buffer(iommu); |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 881 | free_event_buffer(iommu); |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 882 | iommu_unmap_mmio_space(iommu); |
| 883 | } |
| 884 | |
| 885 | static void __init free_iommu_all(void) |
| 886 | { |
| 887 | struct amd_iommu *iommu, *next; |
| 888 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 889 | for_each_iommu_safe(iommu, next) { |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 890 | list_del(&iommu->list); |
| 891 | free_iommu_one(iommu); |
| 892 | kfree(iommu); |
| 893 | } |
| 894 | } |
| 895 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 896 | /* |
| 897 | * This function clues the initialization function for one IOMMU |
| 898 | * together and also allocates the command buffer and programs the |
| 899 | * hardware. It does NOT enable the IOMMU. This is done afterwards. |
| 900 | */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 901 | static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) |
| 902 | { |
| 903 | spin_lock_init(&iommu->lock); |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 904 | |
| 905 | /* Add IOMMU to internal data structures */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 906 | list_add_tail(&iommu->list, &amd_iommu_list); |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 907 | iommu->index = amd_iommus_present++; |
| 908 | |
| 909 | if (unlikely(iommu->index >= MAX_IOMMUS)) { |
| 910 | WARN(1, "AMD-Vi: System has more IOMMUs than supported by this driver\n"); |
| 911 | return -ENOSYS; |
| 912 | } |
| 913 | |
| 914 | /* Index is fine - add IOMMU to the array */ |
| 915 | amd_iommus[iommu->index] = iommu; |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 916 | |
| 917 | /* |
| 918 | * Copy data from ACPI table entry to the iommu struct |
| 919 | */ |
Joerg Roedel | 3eaf28a | 2008-09-08 15:55:10 +0200 | [diff] [blame] | 920 | iommu->dev = pci_get_bus_and_slot(PCI_BUS(h->devid), h->devid & 0xff); |
| 921 | if (!iommu->dev) |
| 922 | return 1; |
| 923 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 924 | iommu->cap_ptr = h->cap_ptr; |
Joerg Roedel | ee893c2 | 2008-09-08 14:48:04 +0200 | [diff] [blame] | 925 | iommu->pci_seg = h->pci_seg; |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 926 | iommu->mmio_phys = h->mmio_phys; |
| 927 | iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys); |
| 928 | if (!iommu->mmio_base) |
| 929 | return -ENOMEM; |
| 930 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 931 | iommu->cmd_buf = alloc_command_buffer(iommu); |
| 932 | if (!iommu->cmd_buf) |
| 933 | return -ENOMEM; |
| 934 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 935 | iommu->evt_buf = alloc_event_buffer(iommu); |
| 936 | if (!iommu->evt_buf) |
| 937 | return -ENOMEM; |
| 938 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 939 | iommu->int_enabled = false; |
| 940 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 941 | init_iommu_from_pci(iommu); |
| 942 | init_iommu_from_acpi(iommu, h); |
| 943 | init_iommu_devices(iommu); |
| 944 | |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 945 | if (iommu->cap & (1UL << IOMMU_CAP_NPCACHE)) |
| 946 | amd_iommu_np_cache = true; |
| 947 | |
Ingo Molnar | 8a66712 | 2008-10-12 15:24:53 +0200 | [diff] [blame] | 948 | return pci_enable_device(iommu->dev); |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 949 | } |
| 950 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 951 | /* |
| 952 | * Iterates over all IOMMU entries in the ACPI table, allocates the |
| 953 | * IOMMU structure and initializes it with init_iommu_one() |
| 954 | */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 955 | static int __init init_iommu_all(struct acpi_table_header *table) |
| 956 | { |
| 957 | u8 *p = (u8 *)table, *end = (u8 *)table; |
| 958 | struct ivhd_header *h; |
| 959 | struct amd_iommu *iommu; |
| 960 | int ret; |
| 961 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 962 | end += table->length; |
| 963 | p += IVRS_HEADER_LENGTH; |
| 964 | |
| 965 | while (p < end) { |
| 966 | h = (struct ivhd_header *)p; |
| 967 | switch (*p) { |
| 968 | case ACPI_IVHD_TYPE: |
Joerg Roedel | 9c72041 | 2009-05-20 13:53:57 +0200 | [diff] [blame] | 969 | |
Joerg Roedel | ae908c2 | 2009-09-01 16:52:16 +0200 | [diff] [blame] | 970 | DUMP_printk("device: %02x:%02x.%01x cap: %04x " |
Joerg Roedel | 9c72041 | 2009-05-20 13:53:57 +0200 | [diff] [blame] | 971 | "seg: %d flags: %01x info %04x\n", |
| 972 | PCI_BUS(h->devid), PCI_SLOT(h->devid), |
| 973 | PCI_FUNC(h->devid), h->cap_ptr, |
| 974 | h->pci_seg, h->flags, h->info); |
| 975 | DUMP_printk(" mmio-addr: %016llx\n", |
| 976 | h->mmio_phys); |
| 977 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 978 | iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL); |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 979 | if (iommu == NULL) { |
| 980 | amd_iommu_init_err = -ENOMEM; |
| 981 | return 0; |
| 982 | } |
| 983 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 984 | ret = init_iommu_one(iommu, h); |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 985 | if (ret) { |
| 986 | amd_iommu_init_err = ret; |
| 987 | return 0; |
| 988 | } |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 989 | break; |
| 990 | default: |
| 991 | break; |
| 992 | } |
| 993 | p += h->length; |
| 994 | |
| 995 | } |
| 996 | WARN_ON(p != end); |
| 997 | |
| 998 | return 0; |
| 999 | } |
| 1000 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1001 | /**************************************************************************** |
| 1002 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1003 | * The following functions initialize the MSI interrupts for all IOMMUs |
| 1004 | * in the system. Its a bit challenging because there could be multiple |
| 1005 | * IOMMUs per PCI BDF but we can call pci_enable_msi(x) only once per |
| 1006 | * pci_dev. |
| 1007 | * |
| 1008 | ****************************************************************************/ |
| 1009 | |
Joerg Roedel | 9f800de | 2009-11-23 12:45:25 +0100 | [diff] [blame] | 1010 | static int iommu_setup_msi(struct amd_iommu *iommu) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1011 | { |
| 1012 | int r; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1013 | |
| 1014 | if (pci_enable_msi(iommu->dev)) |
| 1015 | return 1; |
| 1016 | |
| 1017 | r = request_irq(iommu->dev->irq, amd_iommu_int_handler, |
| 1018 | IRQF_SAMPLE_RANDOM, |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1019 | "AMD-Vi", |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1020 | NULL); |
| 1021 | |
| 1022 | if (r) { |
| 1023 | pci_disable_msi(iommu->dev); |
| 1024 | return 1; |
| 1025 | } |
| 1026 | |
Joerg Roedel | fab6afa | 2009-05-04 18:46:34 +0200 | [diff] [blame] | 1027 | iommu->int_enabled = true; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 1028 | iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); |
| 1029 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1030 | return 0; |
| 1031 | } |
| 1032 | |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 1033 | static int iommu_init_msi(struct amd_iommu *iommu) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1034 | { |
| 1035 | if (iommu->int_enabled) |
| 1036 | return 0; |
| 1037 | |
Joerg Roedel | d91cecd | 2009-05-04 18:51:00 +0200 | [diff] [blame] | 1038 | if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI)) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1039 | return iommu_setup_msi(iommu); |
| 1040 | |
| 1041 | return 1; |
| 1042 | } |
| 1043 | |
| 1044 | /**************************************************************************** |
| 1045 | * |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1046 | * The next functions belong to the third pass of parsing the ACPI |
| 1047 | * table. In this last pass the memory mapping requirements are |
| 1048 | * gathered (like exclusion and unity mapping reanges). |
| 1049 | * |
| 1050 | ****************************************************************************/ |
| 1051 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1052 | static void __init free_unity_maps(void) |
| 1053 | { |
| 1054 | struct unity_map_entry *entry, *next; |
| 1055 | |
| 1056 | list_for_each_entry_safe(entry, next, &amd_iommu_unity_map, list) { |
| 1057 | list_del(&entry->list); |
| 1058 | kfree(entry); |
| 1059 | } |
| 1060 | } |
| 1061 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1062 | /* called when we find an exclusion range definition in ACPI */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1063 | static int __init init_exclusion_range(struct ivmd_header *m) |
| 1064 | { |
| 1065 | int i; |
| 1066 | |
| 1067 | switch (m->type) { |
| 1068 | case ACPI_IVMD_TYPE: |
| 1069 | set_device_exclusion_range(m->devid, m); |
| 1070 | break; |
| 1071 | case ACPI_IVMD_TYPE_ALL: |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1072 | for (i = 0; i <= amd_iommu_last_bdf; ++i) |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1073 | set_device_exclusion_range(i, m); |
| 1074 | break; |
| 1075 | case ACPI_IVMD_TYPE_RANGE: |
| 1076 | for (i = m->devid; i <= m->aux; ++i) |
| 1077 | set_device_exclusion_range(i, m); |
| 1078 | break; |
| 1079 | default: |
| 1080 | break; |
| 1081 | } |
| 1082 | |
| 1083 | return 0; |
| 1084 | } |
| 1085 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1086 | /* called for unity map ACPI definition */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1087 | static int __init init_unity_map_range(struct ivmd_header *m) |
| 1088 | { |
| 1089 | struct unity_map_entry *e = 0; |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1090 | char *s; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1091 | |
| 1092 | e = kzalloc(sizeof(*e), GFP_KERNEL); |
| 1093 | if (e == NULL) |
| 1094 | return -ENOMEM; |
| 1095 | |
| 1096 | switch (m->type) { |
| 1097 | default: |
Joerg Roedel | 0bc252f | 2009-05-22 12:48:05 +0200 | [diff] [blame] | 1098 | kfree(e); |
| 1099 | return 0; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1100 | case ACPI_IVMD_TYPE: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1101 | s = "IVMD_TYPEi\t\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1102 | e->devid_start = e->devid_end = m->devid; |
| 1103 | break; |
| 1104 | case ACPI_IVMD_TYPE_ALL: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1105 | s = "IVMD_TYPE_ALL\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1106 | e->devid_start = 0; |
| 1107 | e->devid_end = amd_iommu_last_bdf; |
| 1108 | break; |
| 1109 | case ACPI_IVMD_TYPE_RANGE: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1110 | s = "IVMD_TYPE_RANGE\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1111 | e->devid_start = m->devid; |
| 1112 | e->devid_end = m->aux; |
| 1113 | break; |
| 1114 | } |
| 1115 | e->address_start = PAGE_ALIGN(m->range_start); |
| 1116 | e->address_end = e->address_start + PAGE_ALIGN(m->range_length); |
| 1117 | e->prot = m->flags >> 1; |
| 1118 | |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1119 | DUMP_printk("%s devid_start: %02x:%02x.%x devid_end: %02x:%02x.%x" |
| 1120 | " range_start: %016llx range_end: %016llx flags: %x\n", s, |
| 1121 | PCI_BUS(e->devid_start), PCI_SLOT(e->devid_start), |
| 1122 | PCI_FUNC(e->devid_start), PCI_BUS(e->devid_end), |
| 1123 | PCI_SLOT(e->devid_end), PCI_FUNC(e->devid_end), |
| 1124 | e->address_start, e->address_end, m->flags); |
| 1125 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1126 | list_add_tail(&e->list, &amd_iommu_unity_map); |
| 1127 | |
| 1128 | return 0; |
| 1129 | } |
| 1130 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1131 | /* iterates over all memory definitions we find in the ACPI table */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1132 | static int __init init_memory_definitions(struct acpi_table_header *table) |
| 1133 | { |
| 1134 | u8 *p = (u8 *)table, *end = (u8 *)table; |
| 1135 | struct ivmd_header *m; |
| 1136 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1137 | end += table->length; |
| 1138 | p += IVRS_HEADER_LENGTH; |
| 1139 | |
| 1140 | while (p < end) { |
| 1141 | m = (struct ivmd_header *)p; |
| 1142 | if (m->flags & IVMD_FLAG_EXCL_RANGE) |
| 1143 | init_exclusion_range(m); |
| 1144 | else if (m->flags & IVMD_FLAG_UNITY_MAP) |
| 1145 | init_unity_map_range(m); |
| 1146 | |
| 1147 | p += m->length; |
| 1148 | } |
| 1149 | |
| 1150 | return 0; |
| 1151 | } |
| 1152 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1153 | /* |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1154 | * Init the device table to not allow DMA access for devices and |
| 1155 | * suppress all page faults |
| 1156 | */ |
| 1157 | static void init_device_table(void) |
| 1158 | { |
| 1159 | u16 devid; |
| 1160 | |
| 1161 | for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { |
| 1162 | set_dev_entry_bit(devid, DEV_ENTRY_VALID); |
| 1163 | set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION); |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1164 | } |
| 1165 | } |
| 1166 | |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 1167 | static void iommu_init_flags(struct amd_iommu *iommu) |
| 1168 | { |
| 1169 | iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ? |
| 1170 | iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : |
| 1171 | iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); |
| 1172 | |
| 1173 | iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ? |
| 1174 | iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : |
| 1175 | iommu_feature_disable(iommu, CONTROL_PASSPW_EN); |
| 1176 | |
| 1177 | iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ? |
| 1178 | iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : |
| 1179 | iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); |
| 1180 | |
| 1181 | iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ? |
| 1182 | iommu_feature_enable(iommu, CONTROL_ISOC_EN) : |
| 1183 | iommu_feature_disable(iommu, CONTROL_ISOC_EN); |
| 1184 | |
| 1185 | /* |
| 1186 | * make IOMMU memory accesses cache coherent |
| 1187 | */ |
| 1188 | iommu_feature_enable(iommu, CONTROL_COHERENT_EN); |
| 1189 | } |
| 1190 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1191 | static void iommu_apply_resume_quirks(struct amd_iommu *iommu) |
Joerg Roedel | 4c894f4 | 2010-09-23 15:15:19 +0200 | [diff] [blame] | 1192 | { |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1193 | int i, j; |
| 1194 | u32 ioc_feature_control; |
| 1195 | struct pci_dev *pdev = NULL; |
| 1196 | |
| 1197 | /* RD890 BIOSes may not have completely reconfigured the iommu */ |
| 1198 | if (!is_rd890_iommu(iommu->dev)) |
| 1199 | return; |
| 1200 | |
| 1201 | /* |
| 1202 | * First, we need to ensure that the iommu is enabled. This is |
| 1203 | * controlled by a register in the northbridge |
| 1204 | */ |
| 1205 | pdev = pci_get_bus_and_slot(iommu->dev->bus->number, PCI_DEVFN(0, 0)); |
| 1206 | |
| 1207 | if (!pdev) |
| 1208 | return; |
| 1209 | |
| 1210 | /* Select Northbridge indirect register 0x75 and enable writing */ |
| 1211 | pci_write_config_dword(pdev, 0x60, 0x75 | (1 << 7)); |
| 1212 | pci_read_config_dword(pdev, 0x64, &ioc_feature_control); |
| 1213 | |
| 1214 | /* Enable the iommu */ |
| 1215 | if (!(ioc_feature_control & 0x1)) |
| 1216 | pci_write_config_dword(pdev, 0x64, ioc_feature_control | 1); |
| 1217 | |
| 1218 | pci_dev_put(pdev); |
| 1219 | |
| 1220 | /* Restore the iommu BAR */ |
| 1221 | pci_write_config_dword(iommu->dev, iommu->cap_ptr + 4, |
| 1222 | iommu->stored_addr_lo); |
| 1223 | pci_write_config_dword(iommu->dev, iommu->cap_ptr + 8, |
| 1224 | iommu->stored_addr_hi); |
| 1225 | |
| 1226 | /* Restore the l1 indirect regs for each of the 6 l1s */ |
| 1227 | for (i = 0; i < 6; i++) |
| 1228 | for (j = 0; j < 0x12; j++) |
| 1229 | iommu_write_l1(iommu, i, j, iommu->stored_l1[i][j]); |
| 1230 | |
| 1231 | /* Restore the l2 indirect regs */ |
| 1232 | for (i = 0; i < 0x83; i++) |
| 1233 | iommu_write_l2(iommu, i, iommu->stored_l2[i]); |
| 1234 | |
| 1235 | /* Lock PCI setup registers */ |
| 1236 | pci_write_config_dword(iommu->dev, iommu->cap_ptr + 4, |
| 1237 | iommu->stored_addr_lo | 1); |
Joerg Roedel | 4c894f4 | 2010-09-23 15:15:19 +0200 | [diff] [blame] | 1238 | } |
| 1239 | |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1240 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1241 | * This function finally enables all IOMMUs found in the system after |
| 1242 | * they have been initialized |
| 1243 | */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 1244 | static void enable_iommus(void) |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1245 | { |
| 1246 | struct amd_iommu *iommu; |
| 1247 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 1248 | for_each_iommu(iommu) { |
Chris Wright | a8c485b | 2009-06-15 15:53:45 +0200 | [diff] [blame] | 1249 | iommu_disable(iommu); |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 1250 | iommu_init_flags(iommu); |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 1251 | iommu_set_device_table(iommu); |
| 1252 | iommu_enable_command_buffer(iommu); |
| 1253 | iommu_enable_event_buffer(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1254 | iommu_set_exclusion_range(iommu); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1255 | iommu_init_msi(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1256 | iommu_enable(iommu); |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1257 | iommu_flush_all_caches(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1258 | } |
| 1259 | } |
| 1260 | |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 1261 | static void disable_iommus(void) |
| 1262 | { |
| 1263 | struct amd_iommu *iommu; |
| 1264 | |
| 1265 | for_each_iommu(iommu) |
| 1266 | iommu_disable(iommu); |
| 1267 | } |
| 1268 | |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1269 | /* |
| 1270 | * Suspend/Resume support |
| 1271 | * disable suspend until real resume implemented |
| 1272 | */ |
| 1273 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1274 | static void amd_iommu_resume(void) |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1275 | { |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1276 | struct amd_iommu *iommu; |
| 1277 | |
| 1278 | for_each_iommu(iommu) |
| 1279 | iommu_apply_resume_quirks(iommu); |
| 1280 | |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1281 | /* re-load the hardware */ |
| 1282 | enable_iommus(); |
| 1283 | |
| 1284 | /* |
| 1285 | * we have to flush after the IOMMUs are enabled because a |
| 1286 | * disabled IOMMU will never execute the commands we send |
| 1287 | */ |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1288 | for_each_iommu(iommu) |
| 1289 | iommu_flush_all_caches(iommu); |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1290 | } |
| 1291 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1292 | static int amd_iommu_suspend(void) |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1293 | { |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1294 | /* disable IOMMUs to go out of the way for BIOS */ |
| 1295 | disable_iommus(); |
| 1296 | |
| 1297 | return 0; |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1298 | } |
| 1299 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1300 | static struct syscore_ops amd_iommu_syscore_ops = { |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1301 | .suspend = amd_iommu_suspend, |
| 1302 | .resume = amd_iommu_resume, |
| 1303 | }; |
| 1304 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1305 | /* |
| 1306 | * This is the core init function for AMD IOMMU hardware in the system. |
| 1307 | * This function is called from the generic x86 DMA layer initialization |
| 1308 | * code. |
| 1309 | * |
| 1310 | * This function basically parses the ACPI table for AMD IOMMU (IVRS) |
| 1311 | * three times: |
| 1312 | * |
| 1313 | * 1 pass) Find the highest PCI device id the driver has to handle. |
| 1314 | * Upon this information the size of the data structures is |
| 1315 | * determined that needs to be allocated. |
| 1316 | * |
| 1317 | * 2 pass) Initialize the data structures just allocated with the |
| 1318 | * information in the ACPI table about available AMD IOMMUs |
| 1319 | * in the system. It also maps the PCI devices in the |
| 1320 | * system to specific IOMMUs |
| 1321 | * |
| 1322 | * 3 pass) After the basic data structures are allocated and |
| 1323 | * initialized we update them with information about memory |
| 1324 | * remapping requirements parsed out of the ACPI table in |
| 1325 | * this last pass. |
| 1326 | * |
| 1327 | * After that the hardware is initialized and ready to go. In the last |
| 1328 | * step we do some Linux specific things like registering the driver in |
| 1329 | * the dma_ops interface and initializing the suspend/resume support |
| 1330 | * functions. Finally it prints some information about AMD IOMMUs and |
| 1331 | * the driver state and enables the hardware. |
| 1332 | */ |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 1333 | static int __init amd_iommu_init(void) |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1334 | { |
| 1335 | int i, ret = 0; |
| 1336 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1337 | /* |
| 1338 | * First parse ACPI tables to find the largest Bus/Dev/Func |
| 1339 | * we need to handle. Upon this information the shared data |
| 1340 | * structures for the IOMMUs in the system will be allocated |
| 1341 | */ |
| 1342 | if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0) |
| 1343 | return -ENODEV; |
| 1344 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1345 | ret = amd_iommu_init_err; |
| 1346 | if (ret) |
| 1347 | goto out; |
| 1348 | |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 1349 | dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE); |
| 1350 | alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE); |
| 1351 | rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1352 | |
| 1353 | ret = -ENOMEM; |
| 1354 | |
| 1355 | /* Device table - directly used by all IOMMUs */ |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1356 | amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1357 | get_order(dev_table_size)); |
| 1358 | if (amd_iommu_dev_table == NULL) |
| 1359 | goto out; |
| 1360 | |
| 1361 | /* |
| 1362 | * Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the |
| 1363 | * IOMMU see for that device |
| 1364 | */ |
| 1365 | amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL, |
| 1366 | get_order(alias_table_size)); |
| 1367 | if (amd_iommu_alias_table == NULL) |
| 1368 | goto free; |
| 1369 | |
| 1370 | /* IOMMU rlookup table - find the IOMMU for a specific device */ |
Joerg Roedel | 83fd5cc | 2008-12-16 19:17:11 +0100 | [diff] [blame] | 1371 | amd_iommu_rlookup_table = (void *)__get_free_pages( |
| 1372 | GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1373 | get_order(rlookup_table_size)); |
| 1374 | if (amd_iommu_rlookup_table == NULL) |
| 1375 | goto free; |
| 1376 | |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1377 | amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages( |
| 1378 | GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1379 | get_order(MAX_DOMAIN_ID/8)); |
| 1380 | if (amd_iommu_pd_alloc_bitmap == NULL) |
| 1381 | goto free; |
| 1382 | |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1383 | /* init the device table */ |
| 1384 | init_device_table(); |
| 1385 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1386 | /* |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1387 | * let all alias entries point to itself |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1388 | */ |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1389 | for (i = 0; i <= amd_iommu_last_bdf; ++i) |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1390 | amd_iommu_alias_table[i] = i; |
| 1391 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1392 | /* |
| 1393 | * never allocate domain 0 because its used as the non-allocated and |
| 1394 | * error value placeholder |
| 1395 | */ |
| 1396 | amd_iommu_pd_alloc_bitmap[0] = 1; |
| 1397 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1398 | spin_lock_init(&amd_iommu_pd_lock); |
| 1399 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1400 | /* |
| 1401 | * now the data structures are allocated and basically initialized |
| 1402 | * start the real acpi table scan |
| 1403 | */ |
| 1404 | ret = -ENODEV; |
| 1405 | if (acpi_table_parse("IVRS", init_iommu_all) != 0) |
| 1406 | goto free; |
| 1407 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1408 | if (amd_iommu_init_err) { |
| 1409 | ret = amd_iommu_init_err; |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 1410 | goto free; |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1411 | } |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 1412 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1413 | if (acpi_table_parse("IVRS", init_memory_definitions) != 0) |
| 1414 | goto free; |
| 1415 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1416 | if (amd_iommu_init_err) { |
| 1417 | ret = amd_iommu_init_err; |
| 1418 | goto free; |
| 1419 | } |
| 1420 | |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1421 | ret = amd_iommu_init_devices(); |
| 1422 | if (ret) |
| 1423 | goto free; |
| 1424 | |
Chris Wright | 75f6653 | 2010-04-02 18:27:52 -0700 | [diff] [blame] | 1425 | enable_iommus(); |
| 1426 | |
Joerg Roedel | 4751a95 | 2009-09-01 15:53:54 +0200 | [diff] [blame] | 1427 | if (iommu_pass_through) |
| 1428 | ret = amd_iommu_init_passthrough(); |
| 1429 | else |
| 1430 | ret = amd_iommu_init_dma_ops(); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 1431 | |
Joerg Roedel | 129d6ab | 2008-08-14 19:55:18 +0200 | [diff] [blame] | 1432 | if (ret) |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 1433 | goto free_disable; |
Joerg Roedel | 129d6ab | 2008-08-14 19:55:18 +0200 | [diff] [blame] | 1434 | |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 1435 | amd_iommu_init_api(); |
| 1436 | |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 1437 | amd_iommu_init_notifier(); |
| 1438 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1439 | register_syscore_ops(&amd_iommu_syscore_ops); |
| 1440 | |
Joerg Roedel | 4751a95 | 2009-09-01 15:53:54 +0200 | [diff] [blame] | 1441 | if (iommu_pass_through) |
| 1442 | goto out; |
| 1443 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1444 | if (amd_iommu_unmap_flush) |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1445 | printk(KERN_INFO "AMD-Vi: IO/TLB flush on unmap enabled\n"); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1446 | else |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1447 | printk(KERN_INFO "AMD-Vi: Lazy IO/TLB flushing enabled\n"); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1448 | |
FUJITA Tomonori | 338bac5 | 2009-10-27 16:34:44 +0900 | [diff] [blame] | 1449 | x86_platform.iommu_shutdown = disable_iommus; |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1450 | out: |
| 1451 | return ret; |
| 1452 | |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 1453 | free_disable: |
Chris Wright | 75f6653 | 2010-04-02 18:27:52 -0700 | [diff] [blame] | 1454 | disable_iommus(); |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1455 | |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 1456 | free: |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1457 | amd_iommu_uninit_devices(); |
| 1458 | |
Joerg Roedel | d58befd | 2008-09-17 12:19:58 +0200 | [diff] [blame] | 1459 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, |
| 1460 | get_order(MAX_DOMAIN_ID/8)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1461 | |
Joerg Roedel | 9a836de | 2008-07-11 17:14:26 +0200 | [diff] [blame] | 1462 | free_pages((unsigned long)amd_iommu_rlookup_table, |
| 1463 | get_order(rlookup_table_size)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1464 | |
Joerg Roedel | 9a836de | 2008-07-11 17:14:26 +0200 | [diff] [blame] | 1465 | free_pages((unsigned long)amd_iommu_alias_table, |
| 1466 | get_order(alias_table_size)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1467 | |
Joerg Roedel | 9a836de | 2008-07-11 17:14:26 +0200 | [diff] [blame] | 1468 | free_pages((unsigned long)amd_iommu_dev_table, |
| 1469 | get_order(dev_table_size)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1470 | |
| 1471 | free_iommu_all(); |
| 1472 | |
| 1473 | free_unity_maps(); |
| 1474 | |
Joerg Roedel | d7f0776 | 2010-05-31 15:05:20 +0200 | [diff] [blame] | 1475 | #ifdef CONFIG_GART_IOMMU |
| 1476 | /* |
| 1477 | * We failed to initialize the AMD IOMMU - try fallback to GART |
| 1478 | * if possible. |
| 1479 | */ |
| 1480 | gart_iommu_init(); |
| 1481 | |
| 1482 | #endif |
| 1483 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1484 | goto out; |
| 1485 | } |
| 1486 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1487 | /**************************************************************************** |
| 1488 | * |
| 1489 | * Early detect code. This code runs at IOMMU detection time in the DMA |
| 1490 | * layer. It just looks if there is an IVRS ACPI table to detect AMD |
| 1491 | * IOMMUs |
| 1492 | * |
| 1493 | ****************************************************************************/ |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1494 | static int __init early_amd_iommu_detect(struct acpi_table_header *table) |
| 1495 | { |
| 1496 | return 0; |
| 1497 | } |
| 1498 | |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1499 | int __init amd_iommu_detect(void) |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1500 | { |
FUJITA Tomonori | 75f1cdf | 2009-11-10 19:46:20 +0900 | [diff] [blame] | 1501 | if (no_iommu || (iommu_detected && !gart_iommu_aperture)) |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1502 | return -ENODEV; |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1503 | |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1504 | if (amd_iommu_disabled) |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1505 | return -ENODEV; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1506 | |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1507 | if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { |
| 1508 | iommu_detected = 1; |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 1509 | amd_iommu_detected = 1; |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 1510 | x86_init.iommu.iommu_init = amd_iommu_init; |
Linus Torvalds | 11bd04f | 2009-12-11 12:18:16 -0800 | [diff] [blame] | 1511 | |
Chris Wright | 5d990b6 | 2009-12-04 12:15:21 -0800 | [diff] [blame] | 1512 | /* Make sure ACS will be enabled */ |
| 1513 | pci_request_acs(); |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1514 | return 1; |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1515 | } |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1516 | return -ENODEV; |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1517 | } |
| 1518 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1519 | /**************************************************************************** |
| 1520 | * |
| 1521 | * Parsing functions for the AMD IOMMU specific kernel command line |
| 1522 | * options. |
| 1523 | * |
| 1524 | ****************************************************************************/ |
| 1525 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 1526 | static int __init parse_amd_iommu_dump(char *str) |
| 1527 | { |
| 1528 | amd_iommu_dump = true; |
| 1529 | |
| 1530 | return 1; |
| 1531 | } |
| 1532 | |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1533 | static int __init parse_amd_iommu_options(char *str) |
| 1534 | { |
| 1535 | for (; *str; ++str) { |
Joerg Roedel | 695b567 | 2008-11-17 15:16:43 +0100 | [diff] [blame] | 1536 | if (strncmp(str, "fullflush", 9) == 0) |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1537 | amd_iommu_unmap_flush = true; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1538 | if (strncmp(str, "off", 3) == 0) |
| 1539 | amd_iommu_disabled = true; |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1540 | } |
| 1541 | |
| 1542 | return 1; |
| 1543 | } |
| 1544 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 1545 | __setup("amd_iommu_dump", parse_amd_iommu_dump); |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1546 | __setup("amd_iommu=", parse_amd_iommu_options); |
Konrad Rzeszutek Wilk | 22e6daf | 2010-08-26 13:58:03 -0400 | [diff] [blame] | 1547 | |
| 1548 | IOMMU_INIT_FINISH(amd_iommu_detect, |
| 1549 | gart_iommu_hole_init, |
| 1550 | 0, |
| 1551 | 0); |