Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | bf3118c | 2009-11-20 13:39:19 +0100 | [diff] [blame] | 2 | * Copyright (C) 2007-2009 Advanced Micro Devices, Inc. |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/acpi.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 22 | #include <linux/list.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 23 | #include <linux/slab.h> |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 24 | #include <linux/sysdev.h> |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/msi.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 27 | #include <asm/pci-direct.h> |
Joerg Roedel | 6a9401a | 2009-11-20 13:22:21 +0100 | [diff] [blame] | 28 | #include <asm/amd_iommu_proto.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 29 | #include <asm/amd_iommu_types.h> |
Joerg Roedel | c6da992 | 2008-06-26 21:28:06 +0200 | [diff] [blame] | 30 | #include <asm/amd_iommu.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 31 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 32 | #include <asm/gart.h> |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 33 | #include <asm/x86_init.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 34 | |
| 35 | /* |
| 36 | * definitions for the ACPI scanning code |
| 37 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 38 | #define IVRS_HEADER_LENGTH 48 |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 39 | |
| 40 | #define ACPI_IVHD_TYPE 0x10 |
| 41 | #define ACPI_IVMD_TYPE_ALL 0x20 |
| 42 | #define ACPI_IVMD_TYPE 0x21 |
| 43 | #define ACPI_IVMD_TYPE_RANGE 0x22 |
| 44 | |
| 45 | #define IVHD_DEV_ALL 0x01 |
| 46 | #define IVHD_DEV_SELECT 0x02 |
| 47 | #define IVHD_DEV_SELECT_RANGE_START 0x03 |
| 48 | #define IVHD_DEV_RANGE_END 0x04 |
| 49 | #define IVHD_DEV_ALIAS 0x42 |
| 50 | #define IVHD_DEV_ALIAS_RANGE 0x43 |
| 51 | #define IVHD_DEV_EXT_SELECT 0x46 |
| 52 | #define IVHD_DEV_EXT_SELECT_RANGE 0x47 |
| 53 | |
Joerg Roedel | 6da7342 | 2009-05-04 11:44:38 +0200 | [diff] [blame] | 54 | #define IVHD_FLAG_HT_TUN_EN_MASK 0x01 |
| 55 | #define IVHD_FLAG_PASSPW_EN_MASK 0x02 |
| 56 | #define IVHD_FLAG_RESPASSPW_EN_MASK 0x04 |
| 57 | #define IVHD_FLAG_ISOC_EN_MASK 0x08 |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 58 | |
| 59 | #define IVMD_FLAG_EXCL_RANGE 0x08 |
| 60 | #define IVMD_FLAG_UNITY_MAP 0x01 |
| 61 | |
| 62 | #define ACPI_DEVFLAG_INITPASS 0x01 |
| 63 | #define ACPI_DEVFLAG_EXTINT 0x02 |
| 64 | #define ACPI_DEVFLAG_NMI 0x04 |
| 65 | #define ACPI_DEVFLAG_SYSMGT1 0x10 |
| 66 | #define ACPI_DEVFLAG_SYSMGT2 0x20 |
| 67 | #define ACPI_DEVFLAG_LINT0 0x40 |
| 68 | #define ACPI_DEVFLAG_LINT1 0x80 |
| 69 | #define ACPI_DEVFLAG_ATSDIS 0x10000000 |
| 70 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 71 | /* |
| 72 | * ACPI table definitions |
| 73 | * |
| 74 | * These data structures are laid over the table to parse the important values |
| 75 | * out of it. |
| 76 | */ |
| 77 | |
| 78 | /* |
| 79 | * structure describing one IOMMU in the ACPI table. Typically followed by one |
| 80 | * or more ivhd_entrys. |
| 81 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 82 | struct ivhd_header { |
| 83 | u8 type; |
| 84 | u8 flags; |
| 85 | u16 length; |
| 86 | u16 devid; |
| 87 | u16 cap_ptr; |
| 88 | u64 mmio_phys; |
| 89 | u16 pci_seg; |
| 90 | u16 info; |
| 91 | u32 reserved; |
| 92 | } __attribute__((packed)); |
| 93 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 94 | /* |
| 95 | * A device entry describing which devices a specific IOMMU translates and |
| 96 | * which requestor ids they use. |
| 97 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 98 | struct ivhd_entry { |
| 99 | u8 type; |
| 100 | u16 devid; |
| 101 | u8 flags; |
| 102 | u32 ext; |
| 103 | } __attribute__((packed)); |
| 104 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 105 | /* |
| 106 | * An AMD IOMMU memory definition structure. It defines things like exclusion |
| 107 | * ranges for devices and regions that should be unity mapped. |
| 108 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 109 | struct ivmd_header { |
| 110 | u8 type; |
| 111 | u8 flags; |
| 112 | u16 length; |
| 113 | u16 devid; |
| 114 | u16 aux; |
| 115 | u64 resv; |
| 116 | u64 range_start; |
| 117 | u64 range_length; |
| 118 | } __attribute__((packed)); |
| 119 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 120 | bool amd_iommu_dump; |
| 121 | |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 122 | static int __initdata amd_iommu_detected; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 123 | static bool __initdata amd_iommu_disabled; |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 124 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 125 | u16 amd_iommu_last_bdf; /* largest PCI device id we have |
| 126 | to handle */ |
Joerg Roedel | 2e22847 | 2008-07-11 17:14:31 +0200 | [diff] [blame] | 127 | LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 128 | we find in ACPI */ |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 129 | bool amd_iommu_unmap_flush; /* if true, flush on every unmap */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 130 | |
Joerg Roedel | 2e22847 | 2008-07-11 17:14:31 +0200 | [diff] [blame] | 131 | LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 132 | system */ |
| 133 | |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 134 | /* Array to assign indices to IOMMUs*/ |
| 135 | struct amd_iommu *amd_iommus[MAX_IOMMUS]; |
| 136 | int amd_iommus_present; |
| 137 | |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 138 | /* IOMMUs have a non-present cache? */ |
| 139 | bool amd_iommu_np_cache __read_mostly; |
| 140 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 141 | /* |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 142 | * The ACPI table parsing functions set this variable on an error |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 143 | */ |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 144 | static int __initdata amd_iommu_init_err; |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 145 | |
| 146 | /* |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 147 | * List of protection domains - used during resume |
| 148 | */ |
| 149 | LIST_HEAD(amd_iommu_pd_list); |
| 150 | spinlock_t amd_iommu_pd_lock; |
| 151 | |
| 152 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 153 | * Pointer to the device table which is shared by all AMD IOMMUs |
| 154 | * it is indexed by the PCI device id or the HT unit id and contains |
| 155 | * information about the domain the device belongs to as well as the |
| 156 | * page table root pointer. |
| 157 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 158 | struct dev_table_entry *amd_iommu_dev_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 159 | |
| 160 | /* |
| 161 | * The alias table is a driver specific data structure which contains the |
| 162 | * mappings of the PCI device ids to the actual requestor ids on the IOMMU. |
| 163 | * More than one device can share the same requestor id. |
| 164 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 165 | u16 *amd_iommu_alias_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 166 | |
| 167 | /* |
| 168 | * The rlookup table is used to find the IOMMU which is responsible |
| 169 | * for a specific device. It is also indexed by the PCI device id. |
| 170 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 171 | struct amd_iommu **amd_iommu_rlookup_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 172 | |
| 173 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 174 | * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap |
| 175 | * to know which ones are already in use. |
| 176 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 177 | unsigned long *amd_iommu_pd_alloc_bitmap; |
| 178 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 179 | static u32 dev_table_size; /* size of the device table */ |
| 180 | static u32 alias_table_size; /* size of the alias table */ |
| 181 | static u32 rlookup_table_size; /* size if the rlookup table */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 182 | |
Joerg Roedel | 208ec8c | 2008-07-11 17:14:24 +0200 | [diff] [blame] | 183 | static inline void update_last_devid(u16 devid) |
| 184 | { |
| 185 | if (devid > amd_iommu_last_bdf) |
| 186 | amd_iommu_last_bdf = devid; |
| 187 | } |
| 188 | |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 189 | static inline unsigned long tbl_size(int entry_size) |
| 190 | { |
| 191 | unsigned shift = PAGE_SHIFT + |
Neil Turton | 421f909 | 2009-05-14 14:00:35 +0100 | [diff] [blame] | 192 | get_order(((int)amd_iommu_last_bdf + 1) * entry_size); |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 193 | |
| 194 | return 1UL << shift; |
| 195 | } |
| 196 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 197 | /**************************************************************************** |
| 198 | * |
| 199 | * AMD IOMMU MMIO register space handling functions |
| 200 | * |
| 201 | * These functions are used to program the IOMMU device registers in |
| 202 | * MMIO space required for that driver. |
| 203 | * |
| 204 | ****************************************************************************/ |
| 205 | |
| 206 | /* |
| 207 | * This function set the exclusion range in the IOMMU. DMA accesses to the |
| 208 | * exclusion range are passed through untranslated |
| 209 | */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 210 | static void iommu_set_exclusion_range(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 211 | { |
| 212 | u64 start = iommu->exclusion_start & PAGE_MASK; |
| 213 | u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; |
| 214 | u64 entry; |
| 215 | |
| 216 | if (!iommu->exclusion_start) |
| 217 | return; |
| 218 | |
| 219 | entry = start | MMIO_EXCL_ENABLE_MASK; |
| 220 | memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET, |
| 221 | &entry, sizeof(entry)); |
| 222 | |
| 223 | entry = limit; |
| 224 | memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET, |
| 225 | &entry, sizeof(entry)); |
| 226 | } |
| 227 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 228 | /* Programs the physical address of the device table into the IOMMU hardware */ |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 229 | static void __init iommu_set_device_table(struct amd_iommu *iommu) |
| 230 | { |
Andreas Herrmann | f609891 | 2008-10-16 16:27:36 +0200 | [diff] [blame] | 231 | u64 entry; |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 232 | |
| 233 | BUG_ON(iommu->mmio_base == NULL); |
| 234 | |
| 235 | entry = virt_to_phys(amd_iommu_dev_table); |
| 236 | entry |= (dev_table_size >> 12) - 1; |
| 237 | memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET, |
| 238 | &entry, sizeof(entry)); |
| 239 | } |
| 240 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 241 | /* Generic functions to enable/disable certain features of the IOMMU. */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 242 | static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 243 | { |
| 244 | u32 ctrl; |
| 245 | |
| 246 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 247 | ctrl |= (1 << bit); |
| 248 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 249 | } |
| 250 | |
Joerg Roedel | ca020711 | 2009-10-28 18:02:26 +0100 | [diff] [blame] | 251 | static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 252 | { |
| 253 | u32 ctrl; |
| 254 | |
Joerg Roedel | 199d0d5 | 2008-09-17 16:45:59 +0200 | [diff] [blame] | 255 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 256 | ctrl &= ~(1 << bit); |
| 257 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 258 | } |
| 259 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 260 | /* Function to enable the hardware */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 261 | static void iommu_enable(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 262 | { |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 263 | printk(KERN_INFO "AMD-Vi: Enabling IOMMU at %s cap 0x%hx\n", |
Joerg Roedel | a4e267c | 2008-12-10 20:04:18 +0100 | [diff] [blame] | 264 | dev_name(&iommu->dev->dev), iommu->cap_ptr); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 265 | |
| 266 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 267 | } |
| 268 | |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 269 | static void iommu_disable(struct amd_iommu *iommu) |
Joerg Roedel | 126c52b | 2008-09-09 16:47:35 +0200 | [diff] [blame] | 270 | { |
Chris Wright | a8c485b | 2009-06-15 15:53:45 +0200 | [diff] [blame] | 271 | /* Disable command buffer */ |
| 272 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
| 273 | |
| 274 | /* Disable event logging and event interrupts */ |
| 275 | iommu_feature_disable(iommu, CONTROL_EVT_INT_EN); |
| 276 | iommu_feature_disable(iommu, CONTROL_EVT_LOG_EN); |
| 277 | |
| 278 | /* Disable IOMMU hardware itself */ |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 279 | iommu_feature_disable(iommu, CONTROL_IOMMU_EN); |
Joerg Roedel | 126c52b | 2008-09-09 16:47:35 +0200 | [diff] [blame] | 280 | } |
| 281 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 282 | /* |
| 283 | * mapping and unmapping functions for the IOMMU MMIO space. Each AMD IOMMU in |
| 284 | * the system has one. |
| 285 | */ |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 286 | static u8 * __init iommu_map_mmio_space(u64 address) |
| 287 | { |
| 288 | u8 *ret; |
| 289 | |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 290 | if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) { |
| 291 | pr_err("AMD-Vi: Can not reserve memory region %llx for mmio\n", |
| 292 | address); |
| 293 | pr_err("AMD-Vi: This is a BIOS bug. Please contact your hardware vendor\n"); |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 294 | return NULL; |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 295 | } |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 296 | |
| 297 | ret = ioremap_nocache(address, MMIO_REGION_LENGTH); |
| 298 | if (ret != NULL) |
| 299 | return ret; |
| 300 | |
| 301 | release_mem_region(address, MMIO_REGION_LENGTH); |
| 302 | |
| 303 | return NULL; |
| 304 | } |
| 305 | |
| 306 | static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu) |
| 307 | { |
| 308 | if (iommu->mmio_base) |
| 309 | iounmap(iommu->mmio_base); |
| 310 | release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH); |
| 311 | } |
| 312 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 313 | /**************************************************************************** |
| 314 | * |
| 315 | * The functions below belong to the first pass of AMD IOMMU ACPI table |
| 316 | * parsing. In this pass we try to find out the highest device id this |
| 317 | * code has to handle. Upon this information the size of the shared data |
| 318 | * structures is determined later. |
| 319 | * |
| 320 | ****************************************************************************/ |
| 321 | |
| 322 | /* |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 323 | * This function calculates the length of a given IVHD entry |
| 324 | */ |
| 325 | static inline int ivhd_entry_length(u8 *ivhd) |
| 326 | { |
| 327 | return 0x04 << (*ivhd >> 6); |
| 328 | } |
| 329 | |
| 330 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 331 | * This function reads the last device id the IOMMU has to handle from the PCI |
| 332 | * capability header for this IOMMU |
| 333 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 334 | static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr) |
| 335 | { |
| 336 | u32 cap; |
| 337 | |
| 338 | cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 339 | update_last_devid(calc_devid(MMIO_GET_BUS(cap), MMIO_GET_LD(cap))); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 340 | |
| 341 | return 0; |
| 342 | } |
| 343 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 344 | /* |
| 345 | * After reading the highest device id from the IOMMU PCI capability header |
| 346 | * this function looks if there is a higher device id defined in the ACPI table |
| 347 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 348 | static int __init find_last_devid_from_ivhd(struct ivhd_header *h) |
| 349 | { |
| 350 | u8 *p = (void *)h, *end = (void *)h; |
| 351 | struct ivhd_entry *dev; |
| 352 | |
| 353 | p += sizeof(*h); |
| 354 | end += h->length; |
| 355 | |
| 356 | find_last_devid_on_pci(PCI_BUS(h->devid), |
| 357 | PCI_SLOT(h->devid), |
| 358 | PCI_FUNC(h->devid), |
| 359 | h->cap_ptr); |
| 360 | |
| 361 | while (p < end) { |
| 362 | dev = (struct ivhd_entry *)p; |
| 363 | switch (dev->type) { |
| 364 | case IVHD_DEV_SELECT: |
| 365 | case IVHD_DEV_RANGE_END: |
| 366 | case IVHD_DEV_ALIAS: |
| 367 | case IVHD_DEV_EXT_SELECT: |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 368 | /* all the above subfield types refer to device ids */ |
Joerg Roedel | 208ec8c | 2008-07-11 17:14:24 +0200 | [diff] [blame] | 369 | update_last_devid(dev->devid); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 370 | break; |
| 371 | default: |
| 372 | break; |
| 373 | } |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 374 | p += ivhd_entry_length(p); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 375 | } |
| 376 | |
| 377 | WARN_ON(p != end); |
| 378 | |
| 379 | return 0; |
| 380 | } |
| 381 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 382 | /* |
| 383 | * Iterate over all IVHD entries in the ACPI table and find the highest device |
| 384 | * id which we need to handle. This is the first of three functions which parse |
| 385 | * the ACPI table. So we check the checksum here. |
| 386 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 387 | static int __init find_last_devid_acpi(struct acpi_table_header *table) |
| 388 | { |
| 389 | int i; |
| 390 | u8 checksum = 0, *p = (u8 *)table, *end = (u8 *)table; |
| 391 | struct ivhd_header *h; |
| 392 | |
| 393 | /* |
| 394 | * Validate checksum here so we don't need to do it when |
| 395 | * we actually parse the table |
| 396 | */ |
| 397 | for (i = 0; i < table->length; ++i) |
| 398 | checksum += p[i]; |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 399 | if (checksum != 0) { |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 400 | /* ACPI table corrupt */ |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 401 | amd_iommu_init_err = -ENODEV; |
| 402 | return 0; |
| 403 | } |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 404 | |
| 405 | p += IVRS_HEADER_LENGTH; |
| 406 | |
| 407 | end += table->length; |
| 408 | while (p < end) { |
| 409 | h = (struct ivhd_header *)p; |
| 410 | switch (h->type) { |
| 411 | case ACPI_IVHD_TYPE: |
| 412 | find_last_devid_from_ivhd(h); |
| 413 | break; |
| 414 | default: |
| 415 | break; |
| 416 | } |
| 417 | p += h->length; |
| 418 | } |
| 419 | WARN_ON(p != end); |
| 420 | |
| 421 | return 0; |
| 422 | } |
| 423 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 424 | /**************************************************************************** |
| 425 | * |
| 426 | * The following functions belong the the code path which parses the ACPI table |
| 427 | * the second time. In this ACPI parsing iteration we allocate IOMMU specific |
| 428 | * data structures, initialize the device/alias/rlookup table and also |
| 429 | * basically initialize the hardware. |
| 430 | * |
| 431 | ****************************************************************************/ |
| 432 | |
| 433 | /* |
| 434 | * Allocates the command buffer. This buffer is per AMD IOMMU. We can |
| 435 | * write commands to that buffer later and the IOMMU will execute them |
| 436 | * asynchronously |
| 437 | */ |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 438 | static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) |
| 439 | { |
Joerg Roedel | d0312b21 | 2008-07-11 17:14:29 +0200 | [diff] [blame] | 440 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 441 | get_order(CMD_BUFFER_SIZE)); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 442 | |
| 443 | if (cmd_buf == NULL) |
| 444 | return NULL; |
| 445 | |
Chris Wright | 549c90dc | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 446 | iommu->cmd_buf_size = CMD_BUFFER_SIZE | CMD_BUFFER_UNINITIALIZED; |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 447 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 448 | return cmd_buf; |
| 449 | } |
| 450 | |
| 451 | /* |
Joerg Roedel | 93f1cc67 | 2009-09-03 14:50:20 +0200 | [diff] [blame] | 452 | * This function resets the command buffer if the IOMMU stopped fetching |
| 453 | * commands from it. |
| 454 | */ |
| 455 | void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu) |
| 456 | { |
| 457 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
| 458 | |
| 459 | writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 460 | writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 461 | |
| 462 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); |
| 463 | } |
| 464 | |
| 465 | /* |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 466 | * This function writes the command buffer address to the hardware and |
| 467 | * enables it. |
| 468 | */ |
| 469 | static void iommu_enable_command_buffer(struct amd_iommu *iommu) |
| 470 | { |
| 471 | u64 entry; |
| 472 | |
| 473 | BUG_ON(iommu->cmd_buf == NULL); |
| 474 | |
| 475 | entry = (u64)virt_to_phys(iommu->cmd_buf); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 476 | entry |= MMIO_CMD_SIZE_512; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 477 | |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 478 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 479 | &entry, sizeof(entry)); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 480 | |
Joerg Roedel | 93f1cc67 | 2009-09-03 14:50:20 +0200 | [diff] [blame] | 481 | amd_iommu_reset_cmd_buffer(iommu); |
Chris Wright | 549c90dc | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 482 | iommu->cmd_buf_size &= ~(CMD_BUFFER_UNINITIALIZED); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 483 | } |
| 484 | |
| 485 | static void __init free_command_buffer(struct amd_iommu *iommu) |
| 486 | { |
Joerg Roedel | 23c1713 | 2008-09-17 17:18:17 +0200 | [diff] [blame] | 487 | free_pages((unsigned long)iommu->cmd_buf, |
Chris Wright | 549c90dc | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 488 | get_order(iommu->cmd_buf_size & ~(CMD_BUFFER_UNINITIALIZED))); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 489 | } |
| 490 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 491 | /* allocates the memory where the IOMMU will log its events to */ |
| 492 | static u8 * __init alloc_event_buffer(struct amd_iommu *iommu) |
| 493 | { |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 494 | iommu->evt_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 495 | get_order(EVT_BUFFER_SIZE)); |
| 496 | |
| 497 | if (iommu->evt_buf == NULL) |
| 498 | return NULL; |
| 499 | |
Joerg Roedel | 1bc6f83 | 2009-07-02 18:32:05 +0200 | [diff] [blame] | 500 | iommu->evt_buf_size = EVT_BUFFER_SIZE; |
| 501 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 502 | return iommu->evt_buf; |
| 503 | } |
| 504 | |
| 505 | static void iommu_enable_event_buffer(struct amd_iommu *iommu) |
| 506 | { |
| 507 | u64 entry; |
| 508 | |
| 509 | BUG_ON(iommu->evt_buf == NULL); |
| 510 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 511 | entry = (u64)virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 512 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 513 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, |
| 514 | &entry, sizeof(entry)); |
| 515 | |
Joerg Roedel | 09067207 | 2009-06-15 16:06:48 +0200 | [diff] [blame] | 516 | /* set head and tail to zero manually */ |
| 517 | writel(0x00, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 518 | writel(0x00, iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 519 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 520 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 521 | } |
| 522 | |
| 523 | static void __init free_event_buffer(struct amd_iommu *iommu) |
| 524 | { |
| 525 | free_pages((unsigned long)iommu->evt_buf, get_order(EVT_BUFFER_SIZE)); |
| 526 | } |
| 527 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 528 | /* sets a specific bit in the device table entry. */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 529 | static void set_dev_entry_bit(u16 devid, u8 bit) |
| 530 | { |
| 531 | int i = (bit >> 5) & 0x07; |
| 532 | int _bit = bit & 0x1f; |
| 533 | |
| 534 | amd_iommu_dev_table[devid].data[i] |= (1 << _bit); |
| 535 | } |
| 536 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 537 | static int get_dev_entry_bit(u16 devid, u8 bit) |
| 538 | { |
| 539 | int i = (bit >> 5) & 0x07; |
| 540 | int _bit = bit & 0x1f; |
| 541 | |
| 542 | return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit; |
| 543 | } |
| 544 | |
| 545 | |
| 546 | void amd_iommu_apply_erratum_63(u16 devid) |
| 547 | { |
| 548 | int sysmgt; |
| 549 | |
| 550 | sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) | |
| 551 | (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1); |
| 552 | |
| 553 | if (sysmgt == 0x01) |
| 554 | set_dev_entry_bit(devid, DEV_ENTRY_IW); |
| 555 | } |
| 556 | |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 557 | /* Writes the specific IOMMU for a device into the rlookup table */ |
| 558 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) |
| 559 | { |
| 560 | amd_iommu_rlookup_table[devid] = iommu; |
| 561 | } |
| 562 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 563 | /* |
| 564 | * This function takes the device specific flags read from the ACPI |
| 565 | * table and sets up the device table entry with that information |
| 566 | */ |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 567 | static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, |
| 568 | u16 devid, u32 flags, u32 ext_flags) |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 569 | { |
| 570 | if (flags & ACPI_DEVFLAG_INITPASS) |
| 571 | set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); |
| 572 | if (flags & ACPI_DEVFLAG_EXTINT) |
| 573 | set_dev_entry_bit(devid, DEV_ENTRY_EINT_PASS); |
| 574 | if (flags & ACPI_DEVFLAG_NMI) |
| 575 | set_dev_entry_bit(devid, DEV_ENTRY_NMI_PASS); |
| 576 | if (flags & ACPI_DEVFLAG_SYSMGT1) |
| 577 | set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1); |
| 578 | if (flags & ACPI_DEVFLAG_SYSMGT2) |
| 579 | set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2); |
| 580 | if (flags & ACPI_DEVFLAG_LINT0) |
| 581 | set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); |
| 582 | if (flags & ACPI_DEVFLAG_LINT1) |
| 583 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 584 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 585 | amd_iommu_apply_erratum_63(devid); |
| 586 | |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 587 | set_iommu_for_device(iommu, devid); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 588 | } |
| 589 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 590 | /* |
| 591 | * Reads the device exclusion range from ACPI and initialize IOMMU with |
| 592 | * it |
| 593 | */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 594 | static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) |
| 595 | { |
| 596 | struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; |
| 597 | |
| 598 | if (!(m->flags & IVMD_FLAG_EXCL_RANGE)) |
| 599 | return; |
| 600 | |
| 601 | if (iommu) { |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 602 | /* |
| 603 | * We only can configure exclusion ranges per IOMMU, not |
| 604 | * per device. But we can enable the exclusion range per |
| 605 | * device. This is done here |
| 606 | */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 607 | set_dev_entry_bit(m->devid, DEV_ENTRY_EX); |
| 608 | iommu->exclusion_start = m->range_start; |
| 609 | iommu->exclusion_length = m->range_length; |
| 610 | } |
| 611 | } |
| 612 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 613 | /* |
| 614 | * This function reads some important data from the IOMMU PCI space and |
| 615 | * initializes the driver data structure with it. It reads the hardware |
| 616 | * capabilities and the first/last device entries |
| 617 | */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 618 | static void __init init_iommu_from_pci(struct amd_iommu *iommu) |
| 619 | { |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 620 | int cap_ptr = iommu->cap_ptr; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 621 | u32 range, misc; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 622 | |
Joerg Roedel | 3eaf28a | 2008-09-08 15:55:10 +0200 | [diff] [blame] | 623 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET, |
| 624 | &iommu->cap); |
| 625 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_RANGE_OFFSET, |
| 626 | &range); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 627 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_MISC_OFFSET, |
| 628 | &misc); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 629 | |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 630 | iommu->first_device = calc_devid(MMIO_GET_BUS(range), |
| 631 | MMIO_GET_FD(range)); |
| 632 | iommu->last_device = calc_devid(MMIO_GET_BUS(range), |
| 633 | MMIO_GET_LD(range)); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 634 | iommu->evt_msi_num = MMIO_MSI_NUM(misc); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 635 | } |
| 636 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 637 | /* |
| 638 | * Takes a pointer to an AMD IOMMU entry in the ACPI table and |
| 639 | * initializes the hardware and our data structures with it. |
| 640 | */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 641 | static void __init init_iommu_from_acpi(struct amd_iommu *iommu, |
| 642 | struct ivhd_header *h) |
| 643 | { |
| 644 | u8 *p = (u8 *)h; |
| 645 | u8 *end = p, flags = 0; |
| 646 | u16 dev_i, devid = 0, devid_start = 0, devid_to = 0; |
| 647 | u32 ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 648 | bool alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 649 | struct ivhd_entry *e; |
| 650 | |
| 651 | /* |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame^] | 652 | * First save the recommended feature enable bits from ACPI |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 653 | */ |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame^] | 654 | iommu->acpi_flags = h->flags; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 655 | |
| 656 | /* |
| 657 | * Done. Now parse the device entries |
| 658 | */ |
| 659 | p += sizeof(struct ivhd_header); |
| 660 | end += h->length; |
| 661 | |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 662 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 663 | while (p < end) { |
| 664 | e = (struct ivhd_entry *)p; |
| 665 | switch (e->type) { |
| 666 | case IVHD_DEV_ALL: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 667 | |
| 668 | DUMP_printk(" DEV_ALL\t\t\t first devid: %02x:%02x.%x" |
| 669 | " last device %02x:%02x.%x flags: %02x\n", |
| 670 | PCI_BUS(iommu->first_device), |
| 671 | PCI_SLOT(iommu->first_device), |
| 672 | PCI_FUNC(iommu->first_device), |
| 673 | PCI_BUS(iommu->last_device), |
| 674 | PCI_SLOT(iommu->last_device), |
| 675 | PCI_FUNC(iommu->last_device), |
| 676 | e->flags); |
| 677 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 678 | for (dev_i = iommu->first_device; |
| 679 | dev_i <= iommu->last_device; ++dev_i) |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 680 | set_dev_entry_from_acpi(iommu, dev_i, |
| 681 | e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 682 | break; |
| 683 | case IVHD_DEV_SELECT: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 684 | |
| 685 | DUMP_printk(" DEV_SELECT\t\t\t devid: %02x:%02x.%x " |
| 686 | "flags: %02x\n", |
| 687 | PCI_BUS(e->devid), |
| 688 | PCI_SLOT(e->devid), |
| 689 | PCI_FUNC(e->devid), |
| 690 | e->flags); |
| 691 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 692 | devid = e->devid; |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 693 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 694 | break; |
| 695 | case IVHD_DEV_SELECT_RANGE_START: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 696 | |
| 697 | DUMP_printk(" DEV_SELECT_RANGE_START\t " |
| 698 | "devid: %02x:%02x.%x flags: %02x\n", |
| 699 | PCI_BUS(e->devid), |
| 700 | PCI_SLOT(e->devid), |
| 701 | PCI_FUNC(e->devid), |
| 702 | e->flags); |
| 703 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 704 | devid_start = e->devid; |
| 705 | flags = e->flags; |
| 706 | ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 707 | alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 708 | break; |
| 709 | case IVHD_DEV_ALIAS: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 710 | |
| 711 | DUMP_printk(" DEV_ALIAS\t\t\t devid: %02x:%02x.%x " |
| 712 | "flags: %02x devid_to: %02x:%02x.%x\n", |
| 713 | PCI_BUS(e->devid), |
| 714 | PCI_SLOT(e->devid), |
| 715 | PCI_FUNC(e->devid), |
| 716 | e->flags, |
| 717 | PCI_BUS(e->ext >> 8), |
| 718 | PCI_SLOT(e->ext >> 8), |
| 719 | PCI_FUNC(e->ext >> 8)); |
| 720 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 721 | devid = e->devid; |
| 722 | devid_to = e->ext >> 8; |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 723 | set_dev_entry_from_acpi(iommu, devid , e->flags, 0); |
Neil Turton | 7455aab | 2009-05-14 14:08:11 +0100 | [diff] [blame] | 724 | set_dev_entry_from_acpi(iommu, devid_to, e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 725 | amd_iommu_alias_table[devid] = devid_to; |
| 726 | break; |
| 727 | case IVHD_DEV_ALIAS_RANGE: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 728 | |
| 729 | DUMP_printk(" DEV_ALIAS_RANGE\t\t " |
| 730 | "devid: %02x:%02x.%x flags: %02x " |
| 731 | "devid_to: %02x:%02x.%x\n", |
| 732 | PCI_BUS(e->devid), |
| 733 | PCI_SLOT(e->devid), |
| 734 | PCI_FUNC(e->devid), |
| 735 | e->flags, |
| 736 | PCI_BUS(e->ext >> 8), |
| 737 | PCI_SLOT(e->ext >> 8), |
| 738 | PCI_FUNC(e->ext >> 8)); |
| 739 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 740 | devid_start = e->devid; |
| 741 | flags = e->flags; |
| 742 | devid_to = e->ext >> 8; |
| 743 | ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 744 | alias = true; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 745 | break; |
| 746 | case IVHD_DEV_EXT_SELECT: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 747 | |
| 748 | DUMP_printk(" DEV_EXT_SELECT\t\t devid: %02x:%02x.%x " |
| 749 | "flags: %02x ext: %08x\n", |
| 750 | PCI_BUS(e->devid), |
| 751 | PCI_SLOT(e->devid), |
| 752 | PCI_FUNC(e->devid), |
| 753 | e->flags, e->ext); |
| 754 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 755 | devid = e->devid; |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 756 | set_dev_entry_from_acpi(iommu, devid, e->flags, |
| 757 | e->ext); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 758 | break; |
| 759 | case IVHD_DEV_EXT_SELECT_RANGE: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 760 | |
| 761 | DUMP_printk(" DEV_EXT_SELECT_RANGE\t devid: " |
| 762 | "%02x:%02x.%x flags: %02x ext: %08x\n", |
| 763 | PCI_BUS(e->devid), |
| 764 | PCI_SLOT(e->devid), |
| 765 | PCI_FUNC(e->devid), |
| 766 | e->flags, e->ext); |
| 767 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 768 | devid_start = e->devid; |
| 769 | flags = e->flags; |
| 770 | ext_flags = e->ext; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 771 | alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 772 | break; |
| 773 | case IVHD_DEV_RANGE_END: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 774 | |
| 775 | DUMP_printk(" DEV_RANGE_END\t\t devid: %02x:%02x.%x\n", |
| 776 | PCI_BUS(e->devid), |
| 777 | PCI_SLOT(e->devid), |
| 778 | PCI_FUNC(e->devid)); |
| 779 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 780 | devid = e->devid; |
| 781 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 782 | if (alias) { |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 783 | amd_iommu_alias_table[dev_i] = devid_to; |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 784 | set_dev_entry_from_acpi(iommu, |
| 785 | devid_to, flags, ext_flags); |
| 786 | } |
| 787 | set_dev_entry_from_acpi(iommu, dev_i, |
| 788 | flags, ext_flags); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 789 | } |
| 790 | break; |
| 791 | default: |
| 792 | break; |
| 793 | } |
| 794 | |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 795 | p += ivhd_entry_length(p); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 796 | } |
| 797 | } |
| 798 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 799 | /* Initializes the device->iommu mapping for the driver */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 800 | static int __init init_iommu_devices(struct amd_iommu *iommu) |
| 801 | { |
| 802 | u16 i; |
| 803 | |
| 804 | for (i = iommu->first_device; i <= iommu->last_device; ++i) |
| 805 | set_iommu_for_device(iommu, i); |
| 806 | |
| 807 | return 0; |
| 808 | } |
| 809 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 810 | static void __init free_iommu_one(struct amd_iommu *iommu) |
| 811 | { |
| 812 | free_command_buffer(iommu); |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 813 | free_event_buffer(iommu); |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 814 | iommu_unmap_mmio_space(iommu); |
| 815 | } |
| 816 | |
| 817 | static void __init free_iommu_all(void) |
| 818 | { |
| 819 | struct amd_iommu *iommu, *next; |
| 820 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 821 | for_each_iommu_safe(iommu, next) { |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 822 | list_del(&iommu->list); |
| 823 | free_iommu_one(iommu); |
| 824 | kfree(iommu); |
| 825 | } |
| 826 | } |
| 827 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 828 | /* |
| 829 | * This function clues the initialization function for one IOMMU |
| 830 | * together and also allocates the command buffer and programs the |
| 831 | * hardware. It does NOT enable the IOMMU. This is done afterwards. |
| 832 | */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 833 | static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) |
| 834 | { |
| 835 | spin_lock_init(&iommu->lock); |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 836 | |
| 837 | /* Add IOMMU to internal data structures */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 838 | list_add_tail(&iommu->list, &amd_iommu_list); |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 839 | iommu->index = amd_iommus_present++; |
| 840 | |
| 841 | if (unlikely(iommu->index >= MAX_IOMMUS)) { |
| 842 | WARN(1, "AMD-Vi: System has more IOMMUs than supported by this driver\n"); |
| 843 | return -ENOSYS; |
| 844 | } |
| 845 | |
| 846 | /* Index is fine - add IOMMU to the array */ |
| 847 | amd_iommus[iommu->index] = iommu; |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 848 | |
| 849 | /* |
| 850 | * Copy data from ACPI table entry to the iommu struct |
| 851 | */ |
Joerg Roedel | 3eaf28a | 2008-09-08 15:55:10 +0200 | [diff] [blame] | 852 | iommu->dev = pci_get_bus_and_slot(PCI_BUS(h->devid), h->devid & 0xff); |
| 853 | if (!iommu->dev) |
| 854 | return 1; |
| 855 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 856 | iommu->cap_ptr = h->cap_ptr; |
Joerg Roedel | ee893c2 | 2008-09-08 14:48:04 +0200 | [diff] [blame] | 857 | iommu->pci_seg = h->pci_seg; |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 858 | iommu->mmio_phys = h->mmio_phys; |
| 859 | iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys); |
| 860 | if (!iommu->mmio_base) |
| 861 | return -ENOMEM; |
| 862 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 863 | iommu->cmd_buf = alloc_command_buffer(iommu); |
| 864 | if (!iommu->cmd_buf) |
| 865 | return -ENOMEM; |
| 866 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 867 | iommu->evt_buf = alloc_event_buffer(iommu); |
| 868 | if (!iommu->evt_buf) |
| 869 | return -ENOMEM; |
| 870 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 871 | iommu->int_enabled = false; |
| 872 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 873 | init_iommu_from_pci(iommu); |
| 874 | init_iommu_from_acpi(iommu, h); |
| 875 | init_iommu_devices(iommu); |
| 876 | |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 877 | if (iommu->cap & (1UL << IOMMU_CAP_NPCACHE)) |
| 878 | amd_iommu_np_cache = true; |
| 879 | |
Ingo Molnar | 8a66712 | 2008-10-12 15:24:53 +0200 | [diff] [blame] | 880 | return pci_enable_device(iommu->dev); |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 881 | } |
| 882 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 883 | /* |
| 884 | * Iterates over all IOMMU entries in the ACPI table, allocates the |
| 885 | * IOMMU structure and initializes it with init_iommu_one() |
| 886 | */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 887 | static int __init init_iommu_all(struct acpi_table_header *table) |
| 888 | { |
| 889 | u8 *p = (u8 *)table, *end = (u8 *)table; |
| 890 | struct ivhd_header *h; |
| 891 | struct amd_iommu *iommu; |
| 892 | int ret; |
| 893 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 894 | end += table->length; |
| 895 | p += IVRS_HEADER_LENGTH; |
| 896 | |
| 897 | while (p < end) { |
| 898 | h = (struct ivhd_header *)p; |
| 899 | switch (*p) { |
| 900 | case ACPI_IVHD_TYPE: |
Joerg Roedel | 9c72041 | 2009-05-20 13:53:57 +0200 | [diff] [blame] | 901 | |
Joerg Roedel | ae908c2 | 2009-09-01 16:52:16 +0200 | [diff] [blame] | 902 | DUMP_printk("device: %02x:%02x.%01x cap: %04x " |
Joerg Roedel | 9c72041 | 2009-05-20 13:53:57 +0200 | [diff] [blame] | 903 | "seg: %d flags: %01x info %04x\n", |
| 904 | PCI_BUS(h->devid), PCI_SLOT(h->devid), |
| 905 | PCI_FUNC(h->devid), h->cap_ptr, |
| 906 | h->pci_seg, h->flags, h->info); |
| 907 | DUMP_printk(" mmio-addr: %016llx\n", |
| 908 | h->mmio_phys); |
| 909 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 910 | iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL); |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 911 | if (iommu == NULL) { |
| 912 | amd_iommu_init_err = -ENOMEM; |
| 913 | return 0; |
| 914 | } |
| 915 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 916 | ret = init_iommu_one(iommu, h); |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 917 | if (ret) { |
| 918 | amd_iommu_init_err = ret; |
| 919 | return 0; |
| 920 | } |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 921 | break; |
| 922 | default: |
| 923 | break; |
| 924 | } |
| 925 | p += h->length; |
| 926 | |
| 927 | } |
| 928 | WARN_ON(p != end); |
| 929 | |
| 930 | return 0; |
| 931 | } |
| 932 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 933 | /**************************************************************************** |
| 934 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 935 | * The following functions initialize the MSI interrupts for all IOMMUs |
| 936 | * in the system. Its a bit challenging because there could be multiple |
| 937 | * IOMMUs per PCI BDF but we can call pci_enable_msi(x) only once per |
| 938 | * pci_dev. |
| 939 | * |
| 940 | ****************************************************************************/ |
| 941 | |
Joerg Roedel | 9f800de | 2009-11-23 12:45:25 +0100 | [diff] [blame] | 942 | static int iommu_setup_msi(struct amd_iommu *iommu) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 943 | { |
| 944 | int r; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 945 | |
| 946 | if (pci_enable_msi(iommu->dev)) |
| 947 | return 1; |
| 948 | |
| 949 | r = request_irq(iommu->dev->irq, amd_iommu_int_handler, |
| 950 | IRQF_SAMPLE_RANDOM, |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 951 | "AMD-Vi", |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 952 | NULL); |
| 953 | |
| 954 | if (r) { |
| 955 | pci_disable_msi(iommu->dev); |
| 956 | return 1; |
| 957 | } |
| 958 | |
Joerg Roedel | fab6afa | 2009-05-04 18:46:34 +0200 | [diff] [blame] | 959 | iommu->int_enabled = true; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 960 | iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); |
| 961 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 962 | return 0; |
| 963 | } |
| 964 | |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 965 | static int iommu_init_msi(struct amd_iommu *iommu) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 966 | { |
| 967 | if (iommu->int_enabled) |
| 968 | return 0; |
| 969 | |
Joerg Roedel | d91cecd | 2009-05-04 18:51:00 +0200 | [diff] [blame] | 970 | if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI)) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 971 | return iommu_setup_msi(iommu); |
| 972 | |
| 973 | return 1; |
| 974 | } |
| 975 | |
| 976 | /**************************************************************************** |
| 977 | * |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 978 | * The next functions belong to the third pass of parsing the ACPI |
| 979 | * table. In this last pass the memory mapping requirements are |
| 980 | * gathered (like exclusion and unity mapping reanges). |
| 981 | * |
| 982 | ****************************************************************************/ |
| 983 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 984 | static void __init free_unity_maps(void) |
| 985 | { |
| 986 | struct unity_map_entry *entry, *next; |
| 987 | |
| 988 | list_for_each_entry_safe(entry, next, &amd_iommu_unity_map, list) { |
| 989 | list_del(&entry->list); |
| 990 | kfree(entry); |
| 991 | } |
| 992 | } |
| 993 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 994 | /* called when we find an exclusion range definition in ACPI */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 995 | static int __init init_exclusion_range(struct ivmd_header *m) |
| 996 | { |
| 997 | int i; |
| 998 | |
| 999 | switch (m->type) { |
| 1000 | case ACPI_IVMD_TYPE: |
| 1001 | set_device_exclusion_range(m->devid, m); |
| 1002 | break; |
| 1003 | case ACPI_IVMD_TYPE_ALL: |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1004 | for (i = 0; i <= amd_iommu_last_bdf; ++i) |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1005 | set_device_exclusion_range(i, m); |
| 1006 | break; |
| 1007 | case ACPI_IVMD_TYPE_RANGE: |
| 1008 | for (i = m->devid; i <= m->aux; ++i) |
| 1009 | set_device_exclusion_range(i, m); |
| 1010 | break; |
| 1011 | default: |
| 1012 | break; |
| 1013 | } |
| 1014 | |
| 1015 | return 0; |
| 1016 | } |
| 1017 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1018 | /* called for unity map ACPI definition */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1019 | static int __init init_unity_map_range(struct ivmd_header *m) |
| 1020 | { |
| 1021 | struct unity_map_entry *e = 0; |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1022 | char *s; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1023 | |
| 1024 | e = kzalloc(sizeof(*e), GFP_KERNEL); |
| 1025 | if (e == NULL) |
| 1026 | return -ENOMEM; |
| 1027 | |
| 1028 | switch (m->type) { |
| 1029 | default: |
Joerg Roedel | 0bc252f | 2009-05-22 12:48:05 +0200 | [diff] [blame] | 1030 | kfree(e); |
| 1031 | return 0; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1032 | case ACPI_IVMD_TYPE: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1033 | s = "IVMD_TYPEi\t\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1034 | e->devid_start = e->devid_end = m->devid; |
| 1035 | break; |
| 1036 | case ACPI_IVMD_TYPE_ALL: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1037 | s = "IVMD_TYPE_ALL\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1038 | e->devid_start = 0; |
| 1039 | e->devid_end = amd_iommu_last_bdf; |
| 1040 | break; |
| 1041 | case ACPI_IVMD_TYPE_RANGE: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1042 | s = "IVMD_TYPE_RANGE\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1043 | e->devid_start = m->devid; |
| 1044 | e->devid_end = m->aux; |
| 1045 | break; |
| 1046 | } |
| 1047 | e->address_start = PAGE_ALIGN(m->range_start); |
| 1048 | e->address_end = e->address_start + PAGE_ALIGN(m->range_length); |
| 1049 | e->prot = m->flags >> 1; |
| 1050 | |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1051 | DUMP_printk("%s devid_start: %02x:%02x.%x devid_end: %02x:%02x.%x" |
| 1052 | " range_start: %016llx range_end: %016llx flags: %x\n", s, |
| 1053 | PCI_BUS(e->devid_start), PCI_SLOT(e->devid_start), |
| 1054 | PCI_FUNC(e->devid_start), PCI_BUS(e->devid_end), |
| 1055 | PCI_SLOT(e->devid_end), PCI_FUNC(e->devid_end), |
| 1056 | e->address_start, e->address_end, m->flags); |
| 1057 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1058 | list_add_tail(&e->list, &amd_iommu_unity_map); |
| 1059 | |
| 1060 | return 0; |
| 1061 | } |
| 1062 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1063 | /* iterates over all memory definitions we find in the ACPI table */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1064 | static int __init init_memory_definitions(struct acpi_table_header *table) |
| 1065 | { |
| 1066 | u8 *p = (u8 *)table, *end = (u8 *)table; |
| 1067 | struct ivmd_header *m; |
| 1068 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1069 | end += table->length; |
| 1070 | p += IVRS_HEADER_LENGTH; |
| 1071 | |
| 1072 | while (p < end) { |
| 1073 | m = (struct ivmd_header *)p; |
| 1074 | if (m->flags & IVMD_FLAG_EXCL_RANGE) |
| 1075 | init_exclusion_range(m); |
| 1076 | else if (m->flags & IVMD_FLAG_UNITY_MAP) |
| 1077 | init_unity_map_range(m); |
| 1078 | |
| 1079 | p += m->length; |
| 1080 | } |
| 1081 | |
| 1082 | return 0; |
| 1083 | } |
| 1084 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1085 | /* |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1086 | * Init the device table to not allow DMA access for devices and |
| 1087 | * suppress all page faults |
| 1088 | */ |
| 1089 | static void init_device_table(void) |
| 1090 | { |
| 1091 | u16 devid; |
| 1092 | |
| 1093 | for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { |
| 1094 | set_dev_entry_bit(devid, DEV_ENTRY_VALID); |
| 1095 | set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION); |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1096 | } |
| 1097 | } |
| 1098 | |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame^] | 1099 | static void iommu_init_flags(struct amd_iommu *iommu) |
| 1100 | { |
| 1101 | iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ? |
| 1102 | iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : |
| 1103 | iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); |
| 1104 | |
| 1105 | iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ? |
| 1106 | iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : |
| 1107 | iommu_feature_disable(iommu, CONTROL_PASSPW_EN); |
| 1108 | |
| 1109 | iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ? |
| 1110 | iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : |
| 1111 | iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); |
| 1112 | |
| 1113 | iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ? |
| 1114 | iommu_feature_enable(iommu, CONTROL_ISOC_EN) : |
| 1115 | iommu_feature_disable(iommu, CONTROL_ISOC_EN); |
| 1116 | |
| 1117 | /* |
| 1118 | * make IOMMU memory accesses cache coherent |
| 1119 | */ |
| 1120 | iommu_feature_enable(iommu, CONTROL_COHERENT_EN); |
| 1121 | } |
| 1122 | |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1123 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1124 | * This function finally enables all IOMMUs found in the system after |
| 1125 | * they have been initialized |
| 1126 | */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 1127 | static void enable_iommus(void) |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1128 | { |
| 1129 | struct amd_iommu *iommu; |
| 1130 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 1131 | for_each_iommu(iommu) { |
Chris Wright | a8c485b | 2009-06-15 15:53:45 +0200 | [diff] [blame] | 1132 | iommu_disable(iommu); |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame^] | 1133 | iommu_init_flags(iommu); |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 1134 | iommu_set_device_table(iommu); |
| 1135 | iommu_enable_command_buffer(iommu); |
| 1136 | iommu_enable_event_buffer(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1137 | iommu_set_exclusion_range(iommu); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1138 | iommu_init_msi(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1139 | iommu_enable(iommu); |
| 1140 | } |
| 1141 | } |
| 1142 | |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 1143 | static void disable_iommus(void) |
| 1144 | { |
| 1145 | struct amd_iommu *iommu; |
| 1146 | |
| 1147 | for_each_iommu(iommu) |
| 1148 | iommu_disable(iommu); |
| 1149 | } |
| 1150 | |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1151 | /* |
| 1152 | * Suspend/Resume support |
| 1153 | * disable suspend until real resume implemented |
| 1154 | */ |
| 1155 | |
| 1156 | static int amd_iommu_resume(struct sys_device *dev) |
| 1157 | { |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1158 | /* re-load the hardware */ |
| 1159 | enable_iommus(); |
| 1160 | |
| 1161 | /* |
| 1162 | * we have to flush after the IOMMUs are enabled because a |
| 1163 | * disabled IOMMU will never execute the commands we send |
| 1164 | */ |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1165 | amd_iommu_flush_all_devices(); |
Chris Wright | 6a047d8 | 2009-06-16 03:01:37 -0400 | [diff] [blame] | 1166 | amd_iommu_flush_all_domains(); |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1167 | |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1168 | return 0; |
| 1169 | } |
| 1170 | |
| 1171 | static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state) |
| 1172 | { |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1173 | /* disable IOMMUs to go out of the way for BIOS */ |
| 1174 | disable_iommus(); |
| 1175 | |
| 1176 | return 0; |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1177 | } |
| 1178 | |
| 1179 | static struct sysdev_class amd_iommu_sysdev_class = { |
| 1180 | .name = "amd_iommu", |
| 1181 | .suspend = amd_iommu_suspend, |
| 1182 | .resume = amd_iommu_resume, |
| 1183 | }; |
| 1184 | |
| 1185 | static struct sys_device device_amd_iommu = { |
| 1186 | .id = 0, |
| 1187 | .cls = &amd_iommu_sysdev_class, |
| 1188 | }; |
| 1189 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1190 | /* |
| 1191 | * This is the core init function for AMD IOMMU hardware in the system. |
| 1192 | * This function is called from the generic x86 DMA layer initialization |
| 1193 | * code. |
| 1194 | * |
| 1195 | * This function basically parses the ACPI table for AMD IOMMU (IVRS) |
| 1196 | * three times: |
| 1197 | * |
| 1198 | * 1 pass) Find the highest PCI device id the driver has to handle. |
| 1199 | * Upon this information the size of the data structures is |
| 1200 | * determined that needs to be allocated. |
| 1201 | * |
| 1202 | * 2 pass) Initialize the data structures just allocated with the |
| 1203 | * information in the ACPI table about available AMD IOMMUs |
| 1204 | * in the system. It also maps the PCI devices in the |
| 1205 | * system to specific IOMMUs |
| 1206 | * |
| 1207 | * 3 pass) After the basic data structures are allocated and |
| 1208 | * initialized we update them with information about memory |
| 1209 | * remapping requirements parsed out of the ACPI table in |
| 1210 | * this last pass. |
| 1211 | * |
| 1212 | * After that the hardware is initialized and ready to go. In the last |
| 1213 | * step we do some Linux specific things like registering the driver in |
| 1214 | * the dma_ops interface and initializing the suspend/resume support |
| 1215 | * functions. Finally it prints some information about AMD IOMMUs and |
| 1216 | * the driver state and enables the hardware. |
| 1217 | */ |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 1218 | static int __init amd_iommu_init(void) |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1219 | { |
| 1220 | int i, ret = 0; |
| 1221 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1222 | /* |
| 1223 | * First parse ACPI tables to find the largest Bus/Dev/Func |
| 1224 | * we need to handle. Upon this information the shared data |
| 1225 | * structures for the IOMMUs in the system will be allocated |
| 1226 | */ |
| 1227 | if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0) |
| 1228 | return -ENODEV; |
| 1229 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1230 | ret = amd_iommu_init_err; |
| 1231 | if (ret) |
| 1232 | goto out; |
| 1233 | |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 1234 | dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE); |
| 1235 | alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE); |
| 1236 | rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1237 | |
| 1238 | ret = -ENOMEM; |
| 1239 | |
| 1240 | /* Device table - directly used by all IOMMUs */ |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1241 | amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1242 | get_order(dev_table_size)); |
| 1243 | if (amd_iommu_dev_table == NULL) |
| 1244 | goto out; |
| 1245 | |
| 1246 | /* |
| 1247 | * Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the |
| 1248 | * IOMMU see for that device |
| 1249 | */ |
| 1250 | amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL, |
| 1251 | get_order(alias_table_size)); |
| 1252 | if (amd_iommu_alias_table == NULL) |
| 1253 | goto free; |
| 1254 | |
| 1255 | /* IOMMU rlookup table - find the IOMMU for a specific device */ |
Joerg Roedel | 83fd5cc | 2008-12-16 19:17:11 +0100 | [diff] [blame] | 1256 | amd_iommu_rlookup_table = (void *)__get_free_pages( |
| 1257 | GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1258 | get_order(rlookup_table_size)); |
| 1259 | if (amd_iommu_rlookup_table == NULL) |
| 1260 | goto free; |
| 1261 | |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1262 | amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages( |
| 1263 | GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1264 | get_order(MAX_DOMAIN_ID/8)); |
| 1265 | if (amd_iommu_pd_alloc_bitmap == NULL) |
| 1266 | goto free; |
| 1267 | |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1268 | /* init the device table */ |
| 1269 | init_device_table(); |
| 1270 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1271 | /* |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1272 | * let all alias entries point to itself |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1273 | */ |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1274 | for (i = 0; i <= amd_iommu_last_bdf; ++i) |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1275 | amd_iommu_alias_table[i] = i; |
| 1276 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1277 | /* |
| 1278 | * never allocate domain 0 because its used as the non-allocated and |
| 1279 | * error value placeholder |
| 1280 | */ |
| 1281 | amd_iommu_pd_alloc_bitmap[0] = 1; |
| 1282 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1283 | spin_lock_init(&amd_iommu_pd_lock); |
| 1284 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1285 | /* |
| 1286 | * now the data structures are allocated and basically initialized |
| 1287 | * start the real acpi table scan |
| 1288 | */ |
| 1289 | ret = -ENODEV; |
| 1290 | if (acpi_table_parse("IVRS", init_iommu_all) != 0) |
| 1291 | goto free; |
| 1292 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1293 | if (amd_iommu_init_err) { |
| 1294 | ret = amd_iommu_init_err; |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 1295 | goto free; |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1296 | } |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 1297 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1298 | if (acpi_table_parse("IVRS", init_memory_definitions) != 0) |
| 1299 | goto free; |
| 1300 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1301 | if (amd_iommu_init_err) { |
| 1302 | ret = amd_iommu_init_err; |
| 1303 | goto free; |
| 1304 | } |
| 1305 | |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1306 | ret = sysdev_class_register(&amd_iommu_sysdev_class); |
| 1307 | if (ret) |
| 1308 | goto free; |
| 1309 | |
| 1310 | ret = sysdev_register(&device_amd_iommu); |
| 1311 | if (ret) |
| 1312 | goto free; |
| 1313 | |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1314 | ret = amd_iommu_init_devices(); |
| 1315 | if (ret) |
| 1316 | goto free; |
| 1317 | |
Chris Wright | 75f6653 | 2010-04-02 18:27:52 -0700 | [diff] [blame] | 1318 | enable_iommus(); |
| 1319 | |
Joerg Roedel | 4751a95 | 2009-09-01 15:53:54 +0200 | [diff] [blame] | 1320 | if (iommu_pass_through) |
| 1321 | ret = amd_iommu_init_passthrough(); |
| 1322 | else |
| 1323 | ret = amd_iommu_init_dma_ops(); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 1324 | |
Joerg Roedel | 129d6ab | 2008-08-14 19:55:18 +0200 | [diff] [blame] | 1325 | if (ret) |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 1326 | goto free_disable; |
Joerg Roedel | 129d6ab | 2008-08-14 19:55:18 +0200 | [diff] [blame] | 1327 | |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 1328 | amd_iommu_init_api(); |
| 1329 | |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 1330 | amd_iommu_init_notifier(); |
| 1331 | |
Joerg Roedel | 4751a95 | 2009-09-01 15:53:54 +0200 | [diff] [blame] | 1332 | if (iommu_pass_through) |
| 1333 | goto out; |
| 1334 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1335 | if (amd_iommu_unmap_flush) |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1336 | printk(KERN_INFO "AMD-Vi: IO/TLB flush on unmap enabled\n"); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1337 | else |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1338 | printk(KERN_INFO "AMD-Vi: Lazy IO/TLB flushing enabled\n"); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1339 | |
FUJITA Tomonori | 338bac5 | 2009-10-27 16:34:44 +0900 | [diff] [blame] | 1340 | x86_platform.iommu_shutdown = disable_iommus; |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1341 | out: |
| 1342 | return ret; |
| 1343 | |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 1344 | free_disable: |
Chris Wright | 75f6653 | 2010-04-02 18:27:52 -0700 | [diff] [blame] | 1345 | disable_iommus(); |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1346 | |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 1347 | free: |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1348 | amd_iommu_uninit_devices(); |
| 1349 | |
Joerg Roedel | d58befd | 2008-09-17 12:19:58 +0200 | [diff] [blame] | 1350 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, |
| 1351 | get_order(MAX_DOMAIN_ID/8)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1352 | |
Joerg Roedel | 9a836de | 2008-07-11 17:14:26 +0200 | [diff] [blame] | 1353 | free_pages((unsigned long)amd_iommu_rlookup_table, |
| 1354 | get_order(rlookup_table_size)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1355 | |
Joerg Roedel | 9a836de | 2008-07-11 17:14:26 +0200 | [diff] [blame] | 1356 | free_pages((unsigned long)amd_iommu_alias_table, |
| 1357 | get_order(alias_table_size)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1358 | |
Joerg Roedel | 9a836de | 2008-07-11 17:14:26 +0200 | [diff] [blame] | 1359 | free_pages((unsigned long)amd_iommu_dev_table, |
| 1360 | get_order(dev_table_size)); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1361 | |
| 1362 | free_iommu_all(); |
| 1363 | |
| 1364 | free_unity_maps(); |
| 1365 | |
Joerg Roedel | d7f0776 | 2010-05-31 15:05:20 +0200 | [diff] [blame] | 1366 | #ifdef CONFIG_GART_IOMMU |
| 1367 | /* |
| 1368 | * We failed to initialize the AMD IOMMU - try fallback to GART |
| 1369 | * if possible. |
| 1370 | */ |
| 1371 | gart_iommu_init(); |
| 1372 | |
| 1373 | #endif |
| 1374 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1375 | goto out; |
| 1376 | } |
| 1377 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1378 | /**************************************************************************** |
| 1379 | * |
| 1380 | * Early detect code. This code runs at IOMMU detection time in the DMA |
| 1381 | * layer. It just looks if there is an IVRS ACPI table to detect AMD |
| 1382 | * IOMMUs |
| 1383 | * |
| 1384 | ****************************************************************************/ |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1385 | static int __init early_amd_iommu_detect(struct acpi_table_header *table) |
| 1386 | { |
| 1387 | return 0; |
| 1388 | } |
| 1389 | |
| 1390 | void __init amd_iommu_detect(void) |
| 1391 | { |
FUJITA Tomonori | 75f1cdf | 2009-11-10 19:46:20 +0900 | [diff] [blame] | 1392 | if (no_iommu || (iommu_detected && !gart_iommu_aperture)) |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1393 | return; |
| 1394 | |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1395 | if (amd_iommu_disabled) |
| 1396 | return; |
| 1397 | |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1398 | if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { |
| 1399 | iommu_detected = 1; |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 1400 | amd_iommu_detected = 1; |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 1401 | x86_init.iommu.iommu_init = amd_iommu_init; |
Linus Torvalds | 11bd04f | 2009-12-11 12:18:16 -0800 | [diff] [blame] | 1402 | |
Chris Wright | 5d990b6 | 2009-12-04 12:15:21 -0800 | [diff] [blame] | 1403 | /* Make sure ACS will be enabled */ |
| 1404 | pci_request_acs(); |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1405 | } |
| 1406 | } |
| 1407 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1408 | /**************************************************************************** |
| 1409 | * |
| 1410 | * Parsing functions for the AMD IOMMU specific kernel command line |
| 1411 | * options. |
| 1412 | * |
| 1413 | ****************************************************************************/ |
| 1414 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 1415 | static int __init parse_amd_iommu_dump(char *str) |
| 1416 | { |
| 1417 | amd_iommu_dump = true; |
| 1418 | |
| 1419 | return 1; |
| 1420 | } |
| 1421 | |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1422 | static int __init parse_amd_iommu_options(char *str) |
| 1423 | { |
| 1424 | for (; *str; ++str) { |
Joerg Roedel | 695b567 | 2008-11-17 15:16:43 +0100 | [diff] [blame] | 1425 | if (strncmp(str, "fullflush", 9) == 0) |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1426 | amd_iommu_unmap_flush = true; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1427 | if (strncmp(str, "off", 3) == 0) |
| 1428 | amd_iommu_disabled = true; |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1429 | } |
| 1430 | |
| 1431 | return 1; |
| 1432 | } |
| 1433 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 1434 | __setup("amd_iommu_dump", parse_amd_iommu_dump); |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1435 | __setup("amd_iommu=", parse_amd_iommu_options); |