Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 1 | #undef DEBUG |
| 2 | |
| 3 | /* |
| 4 | * ARM performance counter support. |
| 5 | * |
| 6 | * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles |
Will Deacon | 43eab87 | 2010-11-13 19:04:32 +0000 | [diff] [blame] | 7 | * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com> |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 8 | * |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 9 | * This code is based on the sparc64 perf event code, which is in turn based |
Mark Rutland | d39976f | 2014-09-29 17:15:32 +0100 | [diff] [blame] | 10 | * on the x86 code. |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 11 | */ |
| 12 | #define pr_fmt(fmt) "hw perfevents: " fmt |
| 13 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 14 | #include <linux/kernel.h> |
Will Deacon | 49c006b | 2010-04-29 17:13:24 +0100 | [diff] [blame] | 15 | #include <linux/platform_device.h> |
Jon Hunter | 7be2958 | 2012-05-31 13:05:20 -0500 | [diff] [blame] | 16 | #include <linux/pm_runtime.h> |
Stephen Boyd | bbd6455 | 2014-02-07 21:01:19 +0000 | [diff] [blame] | 17 | #include <linux/irq.h> |
| 18 | #include <linux/irqdesc.h> |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 19 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 20 | #include <asm/irq_regs.h> |
| 21 | #include <asm/pmu.h> |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 22 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 23 | static int |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 24 | armpmu_map_cache_event(const unsigned (*cache_map) |
| 25 | [PERF_COUNT_HW_CACHE_MAX] |
| 26 | [PERF_COUNT_HW_CACHE_OP_MAX] |
| 27 | [PERF_COUNT_HW_CACHE_RESULT_MAX], |
| 28 | u64 config) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 29 | { |
| 30 | unsigned int cache_type, cache_op, cache_result, ret; |
| 31 | |
| 32 | cache_type = (config >> 0) & 0xff; |
| 33 | if (cache_type >= PERF_COUNT_HW_CACHE_MAX) |
| 34 | return -EINVAL; |
| 35 | |
| 36 | cache_op = (config >> 8) & 0xff; |
| 37 | if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) |
| 38 | return -EINVAL; |
| 39 | |
| 40 | cache_result = (config >> 16) & 0xff; |
| 41 | if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) |
| 42 | return -EINVAL; |
| 43 | |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 44 | ret = (int)(*cache_map)[cache_type][cache_op][cache_result]; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 45 | |
| 46 | if (ret == CACHE_OP_UNSUPPORTED) |
| 47 | return -ENOENT; |
| 48 | |
| 49 | return ret; |
| 50 | } |
| 51 | |
| 52 | static int |
Will Deacon | 6dbc002 | 2012-07-29 12:36:28 +0100 | [diff] [blame] | 53 | armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config) |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 54 | { |
Stephen Boyd | d9f9663 | 2013-08-08 18:41:59 +0100 | [diff] [blame] | 55 | int mapping; |
| 56 | |
| 57 | if (config >= PERF_COUNT_HW_MAX) |
| 58 | return -EINVAL; |
| 59 | |
| 60 | mapping = (*event_map)[config]; |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 61 | return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping; |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | static int |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 65 | armpmu_map_raw_event(u32 raw_event_mask, u64 config) |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 66 | { |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 67 | return (int)(config & raw_event_mask); |
| 68 | } |
| 69 | |
Will Deacon | 6dbc002 | 2012-07-29 12:36:28 +0100 | [diff] [blame] | 70 | int |
| 71 | armpmu_map_event(struct perf_event *event, |
| 72 | const unsigned (*event_map)[PERF_COUNT_HW_MAX], |
| 73 | const unsigned (*cache_map) |
| 74 | [PERF_COUNT_HW_CACHE_MAX] |
| 75 | [PERF_COUNT_HW_CACHE_OP_MAX] |
| 76 | [PERF_COUNT_HW_CACHE_RESULT_MAX], |
| 77 | u32 raw_event_mask) |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 78 | { |
| 79 | u64 config = event->attr.config; |
Mark Rutland | 67b4305 | 2012-09-12 10:53:23 +0100 | [diff] [blame^] | 80 | int type = event->attr.type; |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 81 | |
Mark Rutland | 67b4305 | 2012-09-12 10:53:23 +0100 | [diff] [blame^] | 82 | if (type == event->pmu->type) |
| 83 | return armpmu_map_raw_event(raw_event_mask, config); |
| 84 | |
| 85 | switch (type) { |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 86 | case PERF_TYPE_HARDWARE: |
Will Deacon | 6dbc002 | 2012-07-29 12:36:28 +0100 | [diff] [blame] | 87 | return armpmu_map_hw_event(event_map, config); |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 88 | case PERF_TYPE_HW_CACHE: |
| 89 | return armpmu_map_cache_event(cache_map, config); |
| 90 | case PERF_TYPE_RAW: |
| 91 | return armpmu_map_raw_event(raw_event_mask, config); |
| 92 | } |
| 93 | |
| 94 | return -ENOENT; |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 95 | } |
| 96 | |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 97 | int armpmu_event_set_period(struct perf_event *event) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 98 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 99 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 100 | struct hw_perf_event *hwc = &event->hw; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 101 | s64 left = local64_read(&hwc->period_left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 102 | s64 period = hwc->sample_period; |
| 103 | int ret = 0; |
| 104 | |
| 105 | if (unlikely(left <= -period)) { |
| 106 | left = period; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 107 | local64_set(&hwc->period_left, left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 108 | hwc->last_period = period; |
| 109 | ret = 1; |
| 110 | } |
| 111 | |
| 112 | if (unlikely(left <= 0)) { |
| 113 | left += period; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 114 | local64_set(&hwc->period_left, left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 115 | hwc->last_period = period; |
| 116 | ret = 1; |
| 117 | } |
| 118 | |
| 119 | if (left > (s64)armpmu->max_period) |
| 120 | left = armpmu->max_period; |
| 121 | |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 122 | local64_set(&hwc->prev_count, (u64)-left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 123 | |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 124 | armpmu->write_counter(event, (u64)(-left) & 0xffffffff); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 125 | |
| 126 | perf_event_update_userpage(event); |
| 127 | |
| 128 | return ret; |
| 129 | } |
| 130 | |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 131 | u64 armpmu_event_update(struct perf_event *event) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 132 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 133 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 134 | struct hw_perf_event *hwc = &event->hw; |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 135 | u64 delta, prev_raw_count, new_raw_count; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 136 | |
| 137 | again: |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 138 | prev_raw_count = local64_read(&hwc->prev_count); |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 139 | new_raw_count = armpmu->read_counter(event); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 140 | |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 141 | if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 142 | new_raw_count) != prev_raw_count) |
| 143 | goto again; |
| 144 | |
Will Deacon | 5727347 | 2012-03-06 17:33:17 +0100 | [diff] [blame] | 145 | delta = (new_raw_count - prev_raw_count) & armpmu->max_period; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 146 | |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 147 | local64_add(delta, &event->count); |
| 148 | local64_sub(delta, &hwc->period_left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 149 | |
| 150 | return new_raw_count; |
| 151 | } |
| 152 | |
| 153 | static void |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 154 | armpmu_read(struct perf_event *event) |
| 155 | { |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 156 | armpmu_event_update(event); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 157 | } |
| 158 | |
| 159 | static void |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 160 | armpmu_stop(struct perf_event *event, int flags) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 161 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 162 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 163 | struct hw_perf_event *hwc = &event->hw; |
| 164 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 165 | /* |
| 166 | * ARM pmu always has to update the counter, so ignore |
| 167 | * PERF_EF_UPDATE, see comments in armpmu_start(). |
| 168 | */ |
| 169 | if (!(hwc->state & PERF_HES_STOPPED)) { |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 170 | armpmu->disable(event); |
| 171 | armpmu_event_update(event); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 172 | hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; |
| 173 | } |
| 174 | } |
| 175 | |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 176 | static void armpmu_start(struct perf_event *event, int flags) |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 177 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 178 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 179 | struct hw_perf_event *hwc = &event->hw; |
| 180 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 181 | /* |
| 182 | * ARM pmu always has to reprogram the period, so ignore |
| 183 | * PERF_EF_RELOAD, see the comment below. |
| 184 | */ |
| 185 | if (flags & PERF_EF_RELOAD) |
| 186 | WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); |
| 187 | |
| 188 | hwc->state = 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 189 | /* |
| 190 | * Set the period again. Some counters can't be stopped, so when we |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 191 | * were stopped we simply disabled the IRQ source and the counter |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 192 | * may have been left counting. If we don't do this step then we may |
| 193 | * get an interrupt too soon or *way* too late if the overflow has |
| 194 | * happened since disabling. |
| 195 | */ |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 196 | armpmu_event_set_period(event); |
| 197 | armpmu->enable(event); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 198 | } |
| 199 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 200 | static void |
| 201 | armpmu_del(struct perf_event *event, int flags) |
| 202 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 203 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 204 | struct pmu_hw_events *hw_events = armpmu->get_hw_events(); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 205 | struct hw_perf_event *hwc = &event->hw; |
| 206 | int idx = hwc->idx; |
| 207 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 208 | armpmu_stop(event, PERF_EF_UPDATE); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 209 | hw_events->events[idx] = NULL; |
| 210 | clear_bit(idx, hw_events->used_mask); |
Stephen Boyd | eab443e | 2014-02-07 21:01:22 +0000 | [diff] [blame] | 211 | if (armpmu->clear_event_idx) |
| 212 | armpmu->clear_event_idx(hw_events, event); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 213 | |
| 214 | perf_event_update_userpage(event); |
| 215 | } |
| 216 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 217 | static int |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 218 | armpmu_add(struct perf_event *event, int flags) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 219 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 220 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 221 | struct pmu_hw_events *hw_events = armpmu->get_hw_events(); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 222 | struct hw_perf_event *hwc = &event->hw; |
| 223 | int idx; |
| 224 | int err = 0; |
| 225 | |
Peter Zijlstra | 33696fc | 2010-06-14 08:49:00 +0200 | [diff] [blame] | 226 | perf_pmu_disable(event->pmu); |
Peter Zijlstra | 24cd7f5 | 2010-06-11 17:32:03 +0200 | [diff] [blame] | 227 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 228 | /* If we don't have a space for the counter then finish early. */ |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 229 | idx = armpmu->get_event_idx(hw_events, event); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 230 | if (idx < 0) { |
| 231 | err = idx; |
| 232 | goto out; |
| 233 | } |
| 234 | |
| 235 | /* |
| 236 | * If there is an event in the counter we are going to use then make |
| 237 | * sure it is disabled. |
| 238 | */ |
| 239 | event->hw.idx = idx; |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 240 | armpmu->disable(event); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 241 | hw_events->events[idx] = event; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 242 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 243 | hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; |
| 244 | if (flags & PERF_EF_START) |
| 245 | armpmu_start(event, PERF_EF_RELOAD); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 246 | |
| 247 | /* Propagate our changes to the userspace mapping. */ |
| 248 | perf_event_update_userpage(event); |
| 249 | |
| 250 | out: |
Peter Zijlstra | 33696fc | 2010-06-14 08:49:00 +0200 | [diff] [blame] | 251 | perf_pmu_enable(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 252 | return err; |
| 253 | } |
| 254 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 255 | static int |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 256 | validate_event(struct pmu_hw_events *hw_events, |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 257 | struct perf_event *event) |
| 258 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 259 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 260 | |
Will Deacon | c95eb31 | 2013-08-07 23:39:41 +0100 | [diff] [blame] | 261 | if (is_software_event(event)) |
| 262 | return 1; |
| 263 | |
Will Deacon | 2dfcb80 | 2013-10-09 13:51:29 +0100 | [diff] [blame] | 264 | if (event->state < PERF_EVENT_STATE_OFF) |
Will Deacon | cb2d8b3 | 2013-04-12 19:04:19 +0100 | [diff] [blame] | 265 | return 1; |
| 266 | |
| 267 | if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec) |
Will Deacon | 65b4711 | 2010-09-02 09:32:08 +0100 | [diff] [blame] | 268 | return 1; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 269 | |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 270 | return armpmu->get_event_idx(hw_events, event) >= 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 271 | } |
| 272 | |
| 273 | static int |
| 274 | validate_group(struct perf_event *event) |
| 275 | { |
| 276 | struct perf_event *sibling, *leader = event->group_leader; |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 277 | struct pmu_hw_events fake_pmu; |
Will Deacon | bce34d1 | 2011-11-17 15:05:14 +0000 | [diff] [blame] | 278 | DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 279 | |
Will Deacon | bce34d1 | 2011-11-17 15:05:14 +0000 | [diff] [blame] | 280 | /* |
| 281 | * Initialise the fake PMU. We only need to populate the |
| 282 | * used_mask for the purposes of validation. |
| 283 | */ |
| 284 | memset(fake_used_mask, 0, sizeof(fake_used_mask)); |
| 285 | fake_pmu.used_mask = fake_used_mask; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 286 | |
| 287 | if (!validate_event(&fake_pmu, leader)) |
Peter Zijlstra | aa2bc1a | 2011-11-09 17:56:37 +0100 | [diff] [blame] | 288 | return -EINVAL; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 289 | |
| 290 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { |
| 291 | if (!validate_event(&fake_pmu, sibling)) |
Peter Zijlstra | aa2bc1a | 2011-11-09 17:56:37 +0100 | [diff] [blame] | 292 | return -EINVAL; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | if (!validate_event(&fake_pmu, event)) |
Peter Zijlstra | aa2bc1a | 2011-11-09 17:56:37 +0100 | [diff] [blame] | 296 | return -EINVAL; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 297 | |
| 298 | return 0; |
| 299 | } |
| 300 | |
Sudeep KarkadaNagesha | 051f1b1 | 2012-07-31 10:34:25 +0100 | [diff] [blame] | 301 | static irqreturn_t armpmu_dispatch_irq(int irq, void *dev) |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 302 | { |
Stephen Boyd | bbd6455 | 2014-02-07 21:01:19 +0000 | [diff] [blame] | 303 | struct arm_pmu *armpmu; |
| 304 | struct platform_device *plat_device; |
| 305 | struct arm_pmu_platdata *plat; |
Will Deacon | 5f5092e | 2014-02-11 18:08:41 +0000 | [diff] [blame] | 306 | int ret; |
| 307 | u64 start_clock, finish_clock; |
Stephen Boyd | bbd6455 | 2014-02-07 21:01:19 +0000 | [diff] [blame] | 308 | |
| 309 | if (irq_is_percpu(irq)) |
| 310 | dev = *(void **)dev; |
| 311 | armpmu = dev; |
| 312 | plat_device = armpmu->plat_device; |
| 313 | plat = dev_get_platdata(&plat_device->dev); |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 314 | |
Will Deacon | 5f5092e | 2014-02-11 18:08:41 +0000 | [diff] [blame] | 315 | start_clock = sched_clock(); |
Sudeep KarkadaNagesha | 051f1b1 | 2012-07-31 10:34:25 +0100 | [diff] [blame] | 316 | if (plat && plat->handle_irq) |
Will Deacon | 5f5092e | 2014-02-11 18:08:41 +0000 | [diff] [blame] | 317 | ret = plat->handle_irq(irq, dev, armpmu->handle_irq); |
Sudeep KarkadaNagesha | 051f1b1 | 2012-07-31 10:34:25 +0100 | [diff] [blame] | 318 | else |
Will Deacon | 5f5092e | 2014-02-11 18:08:41 +0000 | [diff] [blame] | 319 | ret = armpmu->handle_irq(irq, dev); |
| 320 | finish_clock = sched_clock(); |
| 321 | |
| 322 | perf_sample_event_took(finish_clock - start_clock); |
| 323 | return ret; |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 324 | } |
| 325 | |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 326 | static void |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 327 | armpmu_release_hardware(struct arm_pmu *armpmu) |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 328 | { |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 329 | armpmu->free_irq(armpmu); |
Sudeep KarkadaNagesha | 051f1b1 | 2012-07-31 10:34:25 +0100 | [diff] [blame] | 330 | pm_runtime_put_sync(&armpmu->plat_device->dev); |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 331 | } |
| 332 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 333 | static int |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 334 | armpmu_reserve_hardware(struct arm_pmu *armpmu) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 335 | { |
Sudeep KarkadaNagesha | 051f1b1 | 2012-07-31 10:34:25 +0100 | [diff] [blame] | 336 | int err; |
Mark Rutland | a9356a0 | 2011-05-04 09:23:15 +0100 | [diff] [blame] | 337 | struct platform_device *pmu_device = armpmu->plat_device; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 338 | |
Will Deacon | e5a2132 | 2011-11-22 18:01:46 +0000 | [diff] [blame] | 339 | if (!pmu_device) |
| 340 | return -ENODEV; |
| 341 | |
Jon Hunter | 7be2958 | 2012-05-31 13:05:20 -0500 | [diff] [blame] | 342 | pm_runtime_get_sync(&pmu_device->dev); |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 343 | err = armpmu->request_irq(armpmu, armpmu_dispatch_irq); |
Sudeep KarkadaNagesha | 051f1b1 | 2012-07-31 10:34:25 +0100 | [diff] [blame] | 344 | if (err) { |
| 345 | armpmu_release_hardware(armpmu); |
| 346 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 347 | } |
| 348 | |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 349 | return 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 350 | } |
| 351 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 352 | static void |
| 353 | hw_perf_event_destroy(struct perf_event *event) |
| 354 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 355 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 356 | atomic_t *active_events = &armpmu->active_events; |
| 357 | struct mutex *pmu_reserve_mutex = &armpmu->reserve_mutex; |
| 358 | |
| 359 | if (atomic_dec_and_mutex_lock(active_events, pmu_reserve_mutex)) { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 360 | armpmu_release_hardware(armpmu); |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 361 | mutex_unlock(pmu_reserve_mutex); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 362 | } |
| 363 | } |
| 364 | |
| 365 | static int |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 366 | event_requires_mode_exclusion(struct perf_event_attr *attr) |
| 367 | { |
| 368 | return attr->exclude_idle || attr->exclude_user || |
| 369 | attr->exclude_kernel || attr->exclude_hv; |
| 370 | } |
| 371 | |
| 372 | static int |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 373 | __hw_perf_event_init(struct perf_event *event) |
| 374 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 375 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 376 | struct hw_perf_event *hwc = &event->hw; |
Mark Rutland | 9dcbf46 | 2013-01-18 16:10:06 +0000 | [diff] [blame] | 377 | int mapping; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 378 | |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 379 | mapping = armpmu->map_event(event); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 380 | |
| 381 | if (mapping < 0) { |
| 382 | pr_debug("event %x:%llx not supported\n", event->attr.type, |
| 383 | event->attr.config); |
| 384 | return mapping; |
| 385 | } |
| 386 | |
| 387 | /* |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 388 | * We don't assign an index until we actually place the event onto |
| 389 | * hardware. Use -1 to signify that we haven't decided where to put it |
| 390 | * yet. For SMP systems, each core has it's own PMU so we can't do any |
| 391 | * clever allocation or constraints checking at this point. |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 392 | */ |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 393 | hwc->idx = -1; |
| 394 | hwc->config_base = 0; |
| 395 | hwc->config = 0; |
| 396 | hwc->event_base = 0; |
| 397 | |
| 398 | /* |
| 399 | * Check whether we need to exclude the counter from certain modes. |
| 400 | */ |
| 401 | if ((!armpmu->set_event_filter || |
| 402 | armpmu->set_event_filter(hwc, &event->attr)) && |
| 403 | event_requires_mode_exclusion(&event->attr)) { |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 404 | pr_debug("ARM performance counters do not support " |
| 405 | "mode exclusion\n"); |
Will Deacon | fdeb8e3 | 2012-07-04 18:15:42 +0100 | [diff] [blame] | 406 | return -EOPNOTSUPP; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | /* |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 410 | * Store the event encoding into the config_base field. |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 411 | */ |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 412 | hwc->config_base |= (unsigned long)mapping; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 413 | |
Vince Weaver | edcb4d3 | 2014-05-16 17:15:49 -0400 | [diff] [blame] | 414 | if (!is_sampling_event(event)) { |
Will Deacon | 5727347 | 2012-03-06 17:33:17 +0100 | [diff] [blame] | 415 | /* |
| 416 | * For non-sampling runs, limit the sample_period to half |
| 417 | * of the counter width. That way, the new counter value |
| 418 | * is far less likely to overtake the previous one unless |
| 419 | * you have some serious IRQ latency issues. |
| 420 | */ |
| 421 | hwc->sample_period = armpmu->max_period >> 1; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 422 | hwc->last_period = hwc->sample_period; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 423 | local64_set(&hwc->period_left, hwc->sample_period); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 424 | } |
| 425 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 426 | if (event->group_leader != event) { |
Chen Gang | e595ede | 2013-02-28 17:51:29 +0100 | [diff] [blame] | 427 | if (validate_group(event) != 0) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 428 | return -EINVAL; |
| 429 | } |
| 430 | |
Mark Rutland | 9dcbf46 | 2013-01-18 16:10:06 +0000 | [diff] [blame] | 431 | return 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 432 | } |
| 433 | |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 434 | static int armpmu_event_init(struct perf_event *event) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 435 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 436 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 437 | int err = 0; |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 438 | atomic_t *active_events = &armpmu->active_events; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 439 | |
Stephane Eranian | 2481c5f | 2012-02-09 23:20:59 +0100 | [diff] [blame] | 440 | /* does not support taken branch sampling */ |
| 441 | if (has_branch_stack(event)) |
| 442 | return -EOPNOTSUPP; |
| 443 | |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 444 | if (armpmu->map_event(event) == -ENOENT) |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 445 | return -ENOENT; |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 446 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 447 | event->destroy = hw_perf_event_destroy; |
| 448 | |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 449 | if (!atomic_inc_not_zero(active_events)) { |
| 450 | mutex_lock(&armpmu->reserve_mutex); |
| 451 | if (atomic_read(active_events) == 0) |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 452 | err = armpmu_reserve_hardware(armpmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 453 | |
| 454 | if (!err) |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 455 | atomic_inc(active_events); |
| 456 | mutex_unlock(&armpmu->reserve_mutex); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | if (err) |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 460 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 461 | |
| 462 | err = __hw_perf_event_init(event); |
| 463 | if (err) |
| 464 | hw_perf_event_destroy(event); |
| 465 | |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 466 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 467 | } |
| 468 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 469 | static void armpmu_enable(struct pmu *pmu) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 470 | { |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 471 | struct arm_pmu *armpmu = to_arm_pmu(pmu); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 472 | struct pmu_hw_events *hw_events = armpmu->get_hw_events(); |
Mark Rutland | 7325eae | 2011-08-23 11:59:49 +0100 | [diff] [blame] | 473 | int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 474 | |
Will Deacon | f4f3843 | 2011-07-01 14:38:12 +0100 | [diff] [blame] | 475 | if (enabled) |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 476 | armpmu->start(armpmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 477 | } |
| 478 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 479 | static void armpmu_disable(struct pmu *pmu) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 480 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 481 | struct arm_pmu *armpmu = to_arm_pmu(pmu); |
Sudeep KarkadaNagesha | ed6f2a5 | 2012-07-30 12:00:02 +0100 | [diff] [blame] | 482 | armpmu->stop(armpmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 483 | } |
| 484 | |
Jon Hunter | 7be2958 | 2012-05-31 13:05:20 -0500 | [diff] [blame] | 485 | #ifdef CONFIG_PM_RUNTIME |
| 486 | static int armpmu_runtime_resume(struct device *dev) |
| 487 | { |
| 488 | struct arm_pmu_platdata *plat = dev_get_platdata(dev); |
| 489 | |
| 490 | if (plat && plat->runtime_resume) |
| 491 | return plat->runtime_resume(dev); |
| 492 | |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | static int armpmu_runtime_suspend(struct device *dev) |
| 497 | { |
| 498 | struct arm_pmu_platdata *plat = dev_get_platdata(dev); |
| 499 | |
| 500 | if (plat && plat->runtime_suspend) |
| 501 | return plat->runtime_suspend(dev); |
| 502 | |
| 503 | return 0; |
| 504 | } |
| 505 | #endif |
| 506 | |
Will Deacon | 6dbc002 | 2012-07-29 12:36:28 +0100 | [diff] [blame] | 507 | const struct dev_pm_ops armpmu_dev_pm_ops = { |
| 508 | SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL) |
| 509 | }; |
| 510 | |
Stephen Boyd | 44d6b1f | 2013-03-05 03:54:06 +0100 | [diff] [blame] | 511 | static void armpmu_init(struct arm_pmu *armpmu) |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 512 | { |
| 513 | atomic_set(&armpmu->active_events, 0); |
| 514 | mutex_init(&armpmu->reserve_mutex); |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 515 | |
| 516 | armpmu->pmu = (struct pmu) { |
| 517 | .pmu_enable = armpmu_enable, |
| 518 | .pmu_disable = armpmu_disable, |
| 519 | .event_init = armpmu_event_init, |
| 520 | .add = armpmu_add, |
| 521 | .del = armpmu_del, |
| 522 | .start = armpmu_start, |
| 523 | .stop = armpmu_stop, |
| 524 | .read = armpmu_read, |
| 525 | }; |
| 526 | } |
| 527 | |
Will Deacon | 0305230 | 2012-09-21 14:23:47 +0100 | [diff] [blame] | 528 | int armpmu_register(struct arm_pmu *armpmu, int type) |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 529 | { |
| 530 | armpmu_init(armpmu); |
Jon Hunter | 2ac29a1 | 2012-10-25 21:23:18 +0100 | [diff] [blame] | 531 | pm_runtime_enable(&armpmu->plat_device->dev); |
Will Deacon | 04236f9 | 2012-07-28 17:42:22 +0100 | [diff] [blame] | 532 | pr_info("enabled with %s PMU driver, %d counters available\n", |
| 533 | armpmu->name, armpmu->num_events); |
Will Deacon | 0305230 | 2012-09-21 14:23:47 +0100 | [diff] [blame] | 534 | return perf_pmu_register(&armpmu->pmu, armpmu->name, type); |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 535 | } |
| 536 | |