Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 1 | #undef DEBUG |
| 2 | |
| 3 | /* |
| 4 | * ARM performance counter support. |
| 5 | * |
| 6 | * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles |
Will Deacon | 43eab87 | 2010-11-13 19:04:32 +0000 | [diff] [blame] | 7 | * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com> |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 8 | * |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 9 | * This code is based on the sparc64 perf event code, which is in turn based |
| 10 | * on the x86 code. Callchain code is based on the ARM OProfile backtrace |
| 11 | * code. |
| 12 | */ |
| 13 | #define pr_fmt(fmt) "hw perfevents: " fmt |
| 14 | |
Mark Rutland | 7325eae | 2011-08-23 11:59:49 +0100 | [diff] [blame^] | 15 | #include <linux/bitmap.h> |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/kernel.h> |
Will Deacon | 181193f | 2010-04-30 11:32:44 +0100 | [diff] [blame] | 18 | #include <linux/module.h> |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 19 | #include <linux/perf_event.h> |
Will Deacon | 49c006b | 2010-04-29 17:13:24 +0100 | [diff] [blame] | 20 | #include <linux/platform_device.h> |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 21 | #include <linux/spinlock.h> |
| 22 | #include <linux/uaccess.h> |
| 23 | |
| 24 | #include <asm/cputype.h> |
| 25 | #include <asm/irq.h> |
| 26 | #include <asm/irq_regs.h> |
| 27 | #include <asm/pmu.h> |
| 28 | #include <asm/stacktrace.h> |
| 29 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 30 | /* |
Will Deacon | ecf5a89 | 2011-07-19 22:43:28 +0100 | [diff] [blame] | 31 | * ARMv6 supports a maximum of 3 events, starting from index 0. If we add |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 32 | * another platform that supports more, we need to increase this to be the |
| 33 | * largest of all platforms. |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 34 | * |
| 35 | * ARMv7 supports up to 32 events: |
| 36 | * cycle counter CCNT + 31 events counters CNT0..30. |
| 37 | * Cortex-A8 has 1+4 counters, Cortex-A9 has 1+6 counters. |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 38 | */ |
Will Deacon | ecf5a89 | 2011-07-19 22:43:28 +0100 | [diff] [blame] | 39 | #define ARMPMU_MAX_HWEVENTS 32 |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 40 | |
Mark Rutland | 3fc2c83 | 2011-06-24 11:30:59 +0100 | [diff] [blame] | 41 | static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events); |
| 42 | static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 43 | static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); |
Will Deacon | 181193f | 2010-04-30 11:32:44 +0100 | [diff] [blame] | 44 | |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 45 | #define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu)) |
| 46 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 47 | /* Set at runtime when we know what CPU type we are. */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 48 | static struct arm_pmu *cpu_pmu; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 49 | |
Will Deacon | 181193f | 2010-04-30 11:32:44 +0100 | [diff] [blame] | 50 | enum arm_perf_pmu_ids |
| 51 | armpmu_get_pmu_id(void) |
| 52 | { |
| 53 | int id = -ENODEV; |
| 54 | |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 55 | if (cpu_pmu != NULL) |
| 56 | id = cpu_pmu->id; |
Will Deacon | 181193f | 2010-04-30 11:32:44 +0100 | [diff] [blame] | 57 | |
| 58 | return id; |
| 59 | } |
| 60 | EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); |
| 61 | |
Will Deacon | 929f519 | 2010-04-30 11:34:26 +0100 | [diff] [blame] | 62 | int |
| 63 | armpmu_get_max_events(void) |
| 64 | { |
| 65 | int max_events = 0; |
| 66 | |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 67 | if (cpu_pmu != NULL) |
| 68 | max_events = cpu_pmu->num_events; |
Will Deacon | 929f519 | 2010-04-30 11:34:26 +0100 | [diff] [blame] | 69 | |
| 70 | return max_events; |
| 71 | } |
| 72 | EXPORT_SYMBOL_GPL(armpmu_get_max_events); |
| 73 | |
Matt Fleming | 3bf101b | 2010-09-27 20:22:24 +0100 | [diff] [blame] | 74 | int perf_num_counters(void) |
| 75 | { |
| 76 | return armpmu_get_max_events(); |
| 77 | } |
| 78 | EXPORT_SYMBOL_GPL(perf_num_counters); |
| 79 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 80 | #define HW_OP_UNSUPPORTED 0xFFFF |
| 81 | |
| 82 | #define C(_x) \ |
| 83 | PERF_COUNT_HW_CACHE_##_x |
| 84 | |
| 85 | #define CACHE_OP_UNSUPPORTED 0xFFFF |
| 86 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 87 | static int |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 88 | armpmu_map_cache_event(const unsigned (*cache_map) |
| 89 | [PERF_COUNT_HW_CACHE_MAX] |
| 90 | [PERF_COUNT_HW_CACHE_OP_MAX] |
| 91 | [PERF_COUNT_HW_CACHE_RESULT_MAX], |
| 92 | u64 config) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 93 | { |
| 94 | unsigned int cache_type, cache_op, cache_result, ret; |
| 95 | |
| 96 | cache_type = (config >> 0) & 0xff; |
| 97 | if (cache_type >= PERF_COUNT_HW_CACHE_MAX) |
| 98 | return -EINVAL; |
| 99 | |
| 100 | cache_op = (config >> 8) & 0xff; |
| 101 | if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) |
| 102 | return -EINVAL; |
| 103 | |
| 104 | cache_result = (config >> 16) & 0xff; |
| 105 | if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) |
| 106 | return -EINVAL; |
| 107 | |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 108 | ret = (int)(*cache_map)[cache_type][cache_op][cache_result]; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 109 | |
| 110 | if (ret == CACHE_OP_UNSUPPORTED) |
| 111 | return -ENOENT; |
| 112 | |
| 113 | return ret; |
| 114 | } |
| 115 | |
| 116 | static int |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 117 | armpmu_map_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config) |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 118 | { |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 119 | int mapping = (*event_map)[config]; |
| 120 | return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping; |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | static int |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 124 | armpmu_map_raw_event(u32 raw_event_mask, u64 config) |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 125 | { |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 126 | return (int)(config & raw_event_mask); |
| 127 | } |
| 128 | |
| 129 | static int map_cpu_event(struct perf_event *event, |
| 130 | const unsigned (*event_map)[PERF_COUNT_HW_MAX], |
| 131 | const unsigned (*cache_map) |
| 132 | [PERF_COUNT_HW_CACHE_MAX] |
| 133 | [PERF_COUNT_HW_CACHE_OP_MAX] |
| 134 | [PERF_COUNT_HW_CACHE_RESULT_MAX], |
| 135 | u32 raw_event_mask) |
| 136 | { |
| 137 | u64 config = event->attr.config; |
| 138 | |
| 139 | switch (event->attr.type) { |
| 140 | case PERF_TYPE_HARDWARE: |
| 141 | return armpmu_map_event(event_map, config); |
| 142 | case PERF_TYPE_HW_CACHE: |
| 143 | return armpmu_map_cache_event(cache_map, config); |
| 144 | case PERF_TYPE_RAW: |
| 145 | return armpmu_map_raw_event(raw_event_mask, config); |
| 146 | } |
| 147 | |
| 148 | return -ENOENT; |
Will Deacon | 84fee97 | 2010-11-13 17:13:56 +0000 | [diff] [blame] | 149 | } |
| 150 | |
Mark Rutland | 0ce4708 | 2011-05-19 10:07:57 +0100 | [diff] [blame] | 151 | int |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 152 | armpmu_event_set_period(struct perf_event *event, |
| 153 | struct hw_perf_event *hwc, |
| 154 | int idx) |
| 155 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 156 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 157 | s64 left = local64_read(&hwc->period_left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 158 | s64 period = hwc->sample_period; |
| 159 | int ret = 0; |
| 160 | |
| 161 | if (unlikely(left <= -period)) { |
| 162 | left = period; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 163 | local64_set(&hwc->period_left, left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 164 | hwc->last_period = period; |
| 165 | ret = 1; |
| 166 | } |
| 167 | |
| 168 | if (unlikely(left <= 0)) { |
| 169 | left += period; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 170 | local64_set(&hwc->period_left, left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 171 | hwc->last_period = period; |
| 172 | ret = 1; |
| 173 | } |
| 174 | |
| 175 | if (left > (s64)armpmu->max_period) |
| 176 | left = armpmu->max_period; |
| 177 | |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 178 | local64_set(&hwc->prev_count, (u64)-left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 179 | |
| 180 | armpmu->write_counter(idx, (u64)(-left) & 0xffffffff); |
| 181 | |
| 182 | perf_event_update_userpage(event); |
| 183 | |
| 184 | return ret; |
| 185 | } |
| 186 | |
Mark Rutland | 0ce4708 | 2011-05-19 10:07:57 +0100 | [diff] [blame] | 187 | u64 |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 188 | armpmu_event_update(struct perf_event *event, |
| 189 | struct hw_perf_event *hwc, |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 190 | int idx, int overflow) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 191 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 192 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 193 | u64 delta, prev_raw_count, new_raw_count; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 194 | |
| 195 | again: |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 196 | prev_raw_count = local64_read(&hwc->prev_count); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 197 | new_raw_count = armpmu->read_counter(idx); |
| 198 | |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 199 | if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 200 | new_raw_count) != prev_raw_count) |
| 201 | goto again; |
| 202 | |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 203 | new_raw_count &= armpmu->max_period; |
| 204 | prev_raw_count &= armpmu->max_period; |
| 205 | |
| 206 | if (overflow) |
Will Deacon | 6759788 | 2011-04-05 14:01:24 +0100 | [diff] [blame] | 207 | delta = armpmu->max_period - prev_raw_count + new_raw_count + 1; |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 208 | else |
| 209 | delta = new_raw_count - prev_raw_count; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 210 | |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 211 | local64_add(delta, &event->count); |
| 212 | local64_sub(delta, &hwc->period_left); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 213 | |
| 214 | return new_raw_count; |
| 215 | } |
| 216 | |
| 217 | static void |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 218 | armpmu_read(struct perf_event *event) |
| 219 | { |
| 220 | struct hw_perf_event *hwc = &event->hw; |
| 221 | |
| 222 | /* Don't read disabled counters! */ |
| 223 | if (hwc->idx < 0) |
| 224 | return; |
| 225 | |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 226 | armpmu_event_update(event, hwc, hwc->idx, 0); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 227 | } |
| 228 | |
| 229 | static void |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 230 | armpmu_stop(struct perf_event *event, int flags) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 231 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 232 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 233 | struct hw_perf_event *hwc = &event->hw; |
| 234 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 235 | /* |
| 236 | * ARM pmu always has to update the counter, so ignore |
| 237 | * PERF_EF_UPDATE, see comments in armpmu_start(). |
| 238 | */ |
| 239 | if (!(hwc->state & PERF_HES_STOPPED)) { |
| 240 | armpmu->disable(hwc, hwc->idx); |
| 241 | barrier(); /* why? */ |
Will Deacon | a737823 | 2011-03-25 17:12:37 +0100 | [diff] [blame] | 242 | armpmu_event_update(event, hwc, hwc->idx, 0); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 243 | hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; |
| 244 | } |
| 245 | } |
| 246 | |
| 247 | static void |
| 248 | armpmu_start(struct perf_event *event, int flags) |
| 249 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 250 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 251 | struct hw_perf_event *hwc = &event->hw; |
| 252 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 253 | /* |
| 254 | * ARM pmu always has to reprogram the period, so ignore |
| 255 | * PERF_EF_RELOAD, see the comment below. |
| 256 | */ |
| 257 | if (flags & PERF_EF_RELOAD) |
| 258 | WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); |
| 259 | |
| 260 | hwc->state = 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 261 | /* |
| 262 | * Set the period again. Some counters can't be stopped, so when we |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 263 | * were stopped we simply disabled the IRQ source and the counter |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 264 | * may have been left counting. If we don't do this step then we may |
| 265 | * get an interrupt too soon or *way* too late if the overflow has |
| 266 | * happened since disabling. |
| 267 | */ |
| 268 | armpmu_event_set_period(event, hwc, hwc->idx); |
| 269 | armpmu->enable(hwc, hwc->idx); |
| 270 | } |
| 271 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 272 | static void |
| 273 | armpmu_del(struct perf_event *event, int flags) |
| 274 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 275 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 276 | struct pmu_hw_events *hw_events = armpmu->get_hw_events(); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 277 | struct hw_perf_event *hwc = &event->hw; |
| 278 | int idx = hwc->idx; |
| 279 | |
| 280 | WARN_ON(idx < 0); |
| 281 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 282 | armpmu_stop(event, PERF_EF_UPDATE); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 283 | hw_events->events[idx] = NULL; |
| 284 | clear_bit(idx, hw_events->used_mask); |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 285 | |
| 286 | perf_event_update_userpage(event); |
| 287 | } |
| 288 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 289 | static int |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 290 | armpmu_add(struct perf_event *event, int flags) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 291 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 292 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 293 | struct pmu_hw_events *hw_events = armpmu->get_hw_events(); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 294 | struct hw_perf_event *hwc = &event->hw; |
| 295 | int idx; |
| 296 | int err = 0; |
| 297 | |
Peter Zijlstra | 33696fc | 2010-06-14 08:49:00 +0200 | [diff] [blame] | 298 | perf_pmu_disable(event->pmu); |
Peter Zijlstra | 24cd7f5 | 2010-06-11 17:32:03 +0200 | [diff] [blame] | 299 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 300 | /* If we don't have a space for the counter then finish early. */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 301 | idx = armpmu->get_event_idx(hw_events, hwc); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 302 | if (idx < 0) { |
| 303 | err = idx; |
| 304 | goto out; |
| 305 | } |
| 306 | |
| 307 | /* |
| 308 | * If there is an event in the counter we are going to use then make |
| 309 | * sure it is disabled. |
| 310 | */ |
| 311 | event->hw.idx = idx; |
| 312 | armpmu->disable(hwc, idx); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 313 | hw_events->events[idx] = event; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 314 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 315 | hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; |
| 316 | if (flags & PERF_EF_START) |
| 317 | armpmu_start(event, PERF_EF_RELOAD); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 318 | |
| 319 | /* Propagate our changes to the userspace mapping. */ |
| 320 | perf_event_update_userpage(event); |
| 321 | |
| 322 | out: |
Peter Zijlstra | 33696fc | 2010-06-14 08:49:00 +0200 | [diff] [blame] | 323 | perf_pmu_enable(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 324 | return err; |
| 325 | } |
| 326 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 327 | static int |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 328 | validate_event(struct pmu_hw_events *hw_events, |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 329 | struct perf_event *event) |
| 330 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 331 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 332 | struct hw_perf_event fake_event = event->hw; |
Mark Rutland | 7b9f72c | 2011-04-27 16:22:21 +0100 | [diff] [blame] | 333 | struct pmu *leader_pmu = event->group_leader->pmu; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 334 | |
Mark Rutland | 7b9f72c | 2011-04-27 16:22:21 +0100 | [diff] [blame] | 335 | if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF) |
Will Deacon | 65b4711 | 2010-09-02 09:32:08 +0100 | [diff] [blame] | 336 | return 1; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 337 | |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 338 | return armpmu->get_event_idx(hw_events, &fake_event) >= 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | static int |
| 342 | validate_group(struct perf_event *event) |
| 343 | { |
| 344 | struct perf_event *sibling, *leader = event->group_leader; |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 345 | struct pmu_hw_events fake_pmu; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 346 | |
| 347 | memset(&fake_pmu, 0, sizeof(fake_pmu)); |
| 348 | |
| 349 | if (!validate_event(&fake_pmu, leader)) |
| 350 | return -ENOSPC; |
| 351 | |
| 352 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { |
| 353 | if (!validate_event(&fake_pmu, sibling)) |
| 354 | return -ENOSPC; |
| 355 | } |
| 356 | |
| 357 | if (!validate_event(&fake_pmu, event)) |
| 358 | return -ENOSPC; |
| 359 | |
| 360 | return 0; |
| 361 | } |
| 362 | |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 363 | static irqreturn_t armpmu_platform_irq(int irq, void *dev) |
| 364 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 365 | struct arm_pmu *armpmu = (struct arm_pmu *) dev; |
Mark Rutland | a9356a0 | 2011-05-04 09:23:15 +0100 | [diff] [blame] | 366 | struct platform_device *plat_device = armpmu->plat_device; |
| 367 | struct arm_pmu_platdata *plat = dev_get_platdata(&plat_device->dev); |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 368 | |
| 369 | return plat->handle_irq(irq, dev, armpmu->handle_irq); |
| 370 | } |
| 371 | |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 372 | static void |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 373 | armpmu_release_hardware(struct arm_pmu *armpmu) |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 374 | { |
| 375 | int i, irq, irqs; |
Mark Rutland | a9356a0 | 2011-05-04 09:23:15 +0100 | [diff] [blame] | 376 | struct platform_device *pmu_device = armpmu->plat_device; |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 377 | |
| 378 | irqs = min(pmu_device->num_resources, num_possible_cpus()); |
| 379 | |
| 380 | for (i = 0; i < irqs; ++i) { |
| 381 | if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs)) |
| 382 | continue; |
| 383 | irq = platform_get_irq(pmu_device, i); |
| 384 | if (irq >= 0) |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 385 | free_irq(irq, armpmu); |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 386 | } |
| 387 | |
Mark Rutland | 7ae18a5 | 2011-06-06 10:37:50 +0100 | [diff] [blame] | 388 | release_pmu(armpmu->type); |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 389 | } |
| 390 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 391 | static int |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 392 | armpmu_reserve_hardware(struct arm_pmu *armpmu) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 393 | { |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 394 | struct arm_pmu_platdata *plat; |
| 395 | irq_handler_t handle_irq; |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 396 | int i, err, irq, irqs; |
Mark Rutland | a9356a0 | 2011-05-04 09:23:15 +0100 | [diff] [blame] | 397 | struct platform_device *pmu_device = armpmu->plat_device; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 398 | |
Mark Rutland | 7ae18a5 | 2011-06-06 10:37:50 +0100 | [diff] [blame] | 399 | err = reserve_pmu(armpmu->type); |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 400 | if (err) { |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 401 | pr_warning("unable to reserve pmu\n"); |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 402 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 403 | } |
| 404 | |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 405 | plat = dev_get_platdata(&pmu_device->dev); |
| 406 | if (plat && plat->handle_irq) |
| 407 | handle_irq = armpmu_platform_irq; |
| 408 | else |
| 409 | handle_irq = armpmu->handle_irq; |
| 410 | |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 411 | irqs = min(pmu_device->num_resources, num_possible_cpus()); |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 412 | if (irqs < 1) { |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 413 | pr_err("no irqs for PMUs defined\n"); |
| 414 | return -ENODEV; |
| 415 | } |
| 416 | |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 417 | for (i = 0; i < irqs; ++i) { |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 418 | err = 0; |
Will Deacon | 49c006b | 2010-04-29 17:13:24 +0100 | [diff] [blame] | 419 | irq = platform_get_irq(pmu_device, i); |
| 420 | if (irq < 0) |
| 421 | continue; |
| 422 | |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 423 | /* |
| 424 | * If we have a single PMU interrupt that we can't shift, |
| 425 | * assume that we're running on a uniprocessor machine and |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 426 | * continue. Otherwise, continue without this interrupt. |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 427 | */ |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 428 | if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) { |
| 429 | pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", |
| 430 | irq, i); |
| 431 | continue; |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 432 | } |
| 433 | |
Rabin Vincent | 0e25a5c | 2011-02-08 09:24:36 +0530 | [diff] [blame] | 434 | err = request_irq(irq, handle_irq, |
Will Deacon | ddee87f | 2010-02-25 15:04:14 +0100 | [diff] [blame] | 435 | IRQF_DISABLED | IRQF_NOBALANCING, |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 436 | "arm-pmu", armpmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 437 | if (err) { |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 438 | pr_err("unable to request IRQ%d for ARM PMU counters\n", |
| 439 | irq); |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 440 | armpmu_release_hardware(armpmu); |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 441 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 442 | } |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 443 | |
| 444 | cpumask_set_cpu(i, &armpmu->active_irqs); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 445 | } |
| 446 | |
Will Deacon | 0b390e2 | 2011-07-27 15:18:59 +0100 | [diff] [blame] | 447 | return 0; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 448 | } |
| 449 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 450 | static void |
| 451 | hw_perf_event_destroy(struct perf_event *event) |
| 452 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 453 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 454 | atomic_t *active_events = &armpmu->active_events; |
| 455 | struct mutex *pmu_reserve_mutex = &armpmu->reserve_mutex; |
| 456 | |
| 457 | if (atomic_dec_and_mutex_lock(active_events, pmu_reserve_mutex)) { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 458 | armpmu_release_hardware(armpmu); |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 459 | mutex_unlock(pmu_reserve_mutex); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 460 | } |
| 461 | } |
| 462 | |
| 463 | static int |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 464 | event_requires_mode_exclusion(struct perf_event_attr *attr) |
| 465 | { |
| 466 | return attr->exclude_idle || attr->exclude_user || |
| 467 | attr->exclude_kernel || attr->exclude_hv; |
| 468 | } |
| 469 | |
| 470 | static int |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 471 | __hw_perf_event_init(struct perf_event *event) |
| 472 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 473 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 474 | struct hw_perf_event *hwc = &event->hw; |
| 475 | int mapping, err; |
| 476 | |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 477 | mapping = armpmu->map_event(event); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 478 | |
| 479 | if (mapping < 0) { |
| 480 | pr_debug("event %x:%llx not supported\n", event->attr.type, |
| 481 | event->attr.config); |
| 482 | return mapping; |
| 483 | } |
| 484 | |
| 485 | /* |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 486 | * We don't assign an index until we actually place the event onto |
| 487 | * hardware. Use -1 to signify that we haven't decided where to put it |
| 488 | * yet. For SMP systems, each core has it's own PMU so we can't do any |
| 489 | * clever allocation or constraints checking at this point. |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 490 | */ |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 491 | hwc->idx = -1; |
| 492 | hwc->config_base = 0; |
| 493 | hwc->config = 0; |
| 494 | hwc->event_base = 0; |
| 495 | |
| 496 | /* |
| 497 | * Check whether we need to exclude the counter from certain modes. |
| 498 | */ |
| 499 | if ((!armpmu->set_event_filter || |
| 500 | armpmu->set_event_filter(hwc, &event->attr)) && |
| 501 | event_requires_mode_exclusion(&event->attr)) { |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 502 | pr_debug("ARM performance counters do not support " |
| 503 | "mode exclusion\n"); |
| 504 | return -EPERM; |
| 505 | } |
| 506 | |
| 507 | /* |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 508 | * Store the event encoding into the config_base field. |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 509 | */ |
Will Deacon | 05d22fd | 2011-07-19 11:57:30 +0100 | [diff] [blame] | 510 | hwc->config_base |= (unsigned long)mapping; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 511 | |
| 512 | if (!hwc->sample_period) { |
| 513 | hwc->sample_period = armpmu->max_period; |
| 514 | hwc->last_period = hwc->sample_period; |
Peter Zijlstra | e785059 | 2010-05-21 14:43:08 +0200 | [diff] [blame] | 515 | local64_set(&hwc->period_left, hwc->sample_period); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 516 | } |
| 517 | |
| 518 | err = 0; |
| 519 | if (event->group_leader != event) { |
| 520 | err = validate_group(event); |
| 521 | if (err) |
| 522 | return -EINVAL; |
| 523 | } |
| 524 | |
| 525 | return err; |
| 526 | } |
| 527 | |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 528 | static int armpmu_event_init(struct perf_event *event) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 529 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 530 | struct arm_pmu *armpmu = to_arm_pmu(event->pmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 531 | int err = 0; |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 532 | atomic_t *active_events = &armpmu->active_events; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 533 | |
Mark Rutland | e1f431b | 2011-04-28 15:47:10 +0100 | [diff] [blame] | 534 | if (armpmu->map_event(event) == -ENOENT) |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 535 | return -ENOENT; |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 536 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 537 | event->destroy = hw_perf_event_destroy; |
| 538 | |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 539 | if (!atomic_inc_not_zero(active_events)) { |
| 540 | mutex_lock(&armpmu->reserve_mutex); |
| 541 | if (atomic_read(active_events) == 0) |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 542 | err = armpmu_reserve_hardware(armpmu); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 543 | |
| 544 | if (!err) |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 545 | atomic_inc(active_events); |
| 546 | mutex_unlock(&armpmu->reserve_mutex); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 547 | } |
| 548 | |
| 549 | if (err) |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 550 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 551 | |
| 552 | err = __hw_perf_event_init(event); |
| 553 | if (err) |
| 554 | hw_perf_event_destroy(event); |
| 555 | |
Peter Zijlstra | b0a873e | 2010-06-11 13:35:08 +0200 | [diff] [blame] | 556 | return err; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 557 | } |
| 558 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 559 | static void armpmu_enable(struct pmu *pmu) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 560 | { |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 561 | struct arm_pmu *armpmu = to_arm_pmu(pmu); |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 562 | struct pmu_hw_events *hw_events = armpmu->get_hw_events(); |
Mark Rutland | 7325eae | 2011-08-23 11:59:49 +0100 | [diff] [blame^] | 563 | int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 564 | |
Will Deacon | f4f3843 | 2011-07-01 14:38:12 +0100 | [diff] [blame] | 565 | if (enabled) |
| 566 | armpmu->start(); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 567 | } |
| 568 | |
Peter Zijlstra | a4eaf7f | 2010-06-16 14:37:10 +0200 | [diff] [blame] | 569 | static void armpmu_disable(struct pmu *pmu) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 570 | { |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 571 | struct arm_pmu *armpmu = to_arm_pmu(pmu); |
Mark Rutland | 4895715 | 2011-04-27 10:31:51 +0100 | [diff] [blame] | 572 | armpmu->stop(); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 573 | } |
| 574 | |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 575 | static void __init armpmu_init(struct arm_pmu *armpmu) |
| 576 | { |
| 577 | atomic_set(&armpmu->active_events, 0); |
| 578 | mutex_init(&armpmu->reserve_mutex); |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 579 | |
| 580 | armpmu->pmu = (struct pmu) { |
| 581 | .pmu_enable = armpmu_enable, |
| 582 | .pmu_disable = armpmu_disable, |
| 583 | .event_init = armpmu_event_init, |
| 584 | .add = armpmu_add, |
| 585 | .del = armpmu_del, |
| 586 | .start = armpmu_start, |
| 587 | .stop = armpmu_stop, |
| 588 | .read = armpmu_read, |
| 589 | }; |
| 590 | } |
| 591 | |
Mark Rutland | 0ce4708 | 2011-05-19 10:07:57 +0100 | [diff] [blame] | 592 | int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type) |
Mark Rutland | 8a16b34 | 2011-04-28 16:27:54 +0100 | [diff] [blame] | 593 | { |
| 594 | armpmu_init(armpmu); |
| 595 | return perf_pmu_register(&armpmu->pmu, name, type); |
Mark Rutland | 03b7898 | 2011-04-27 11:20:11 +0100 | [diff] [blame] | 596 | } |
| 597 | |
Will Deacon | 43eab87 | 2010-11-13 19:04:32 +0000 | [diff] [blame] | 598 | /* Include the PMU-specific implementations. */ |
| 599 | #include "perf_event_xscale.c" |
| 600 | #include "perf_event_v6.c" |
| 601 | #include "perf_event_v7.c" |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 602 | |
Will Deacon | 574b69c | 2011-03-25 13:13:34 +0100 | [diff] [blame] | 603 | /* |
| 604 | * Ensure the PMU has sane values out of reset. |
| 605 | * This requires SMP to be available, so exists as a separate initcall. |
| 606 | */ |
| 607 | static int __init |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 608 | cpu_pmu_reset(void) |
Will Deacon | 574b69c | 2011-03-25 13:13:34 +0100 | [diff] [blame] | 609 | { |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 610 | if (cpu_pmu && cpu_pmu->reset) |
| 611 | return on_each_cpu(cpu_pmu->reset, NULL, 1); |
Will Deacon | 574b69c | 2011-03-25 13:13:34 +0100 | [diff] [blame] | 612 | return 0; |
| 613 | } |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 614 | arch_initcall(cpu_pmu_reset); |
Will Deacon | 574b69c | 2011-03-25 13:13:34 +0100 | [diff] [blame] | 615 | |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 616 | /* |
| 617 | * PMU platform driver and devicetree bindings. |
| 618 | */ |
| 619 | static struct of_device_id armpmu_of_device_ids[] = { |
| 620 | {.compatible = "arm,cortex-a9-pmu"}, |
| 621 | {.compatible = "arm,cortex-a8-pmu"}, |
| 622 | {.compatible = "arm,arm1136-pmu"}, |
| 623 | {.compatible = "arm,arm1176-pmu"}, |
| 624 | {}, |
| 625 | }; |
| 626 | |
| 627 | static struct platform_device_id armpmu_plat_device_ids[] = { |
| 628 | {.name = "arm-pmu"}, |
| 629 | {}, |
| 630 | }; |
| 631 | |
| 632 | static int __devinit armpmu_device_probe(struct platform_device *pdev) |
| 633 | { |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 634 | cpu_pmu->plat_device = pdev; |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 635 | return 0; |
| 636 | } |
| 637 | |
| 638 | static struct platform_driver armpmu_driver = { |
| 639 | .driver = { |
| 640 | .name = "arm-pmu", |
| 641 | .of_match_table = armpmu_of_device_ids, |
| 642 | }, |
| 643 | .probe = armpmu_device_probe, |
| 644 | .id_table = armpmu_plat_device_ids, |
| 645 | }; |
| 646 | |
| 647 | static int __init register_pmu_driver(void) |
| 648 | { |
| 649 | return platform_driver_register(&armpmu_driver); |
| 650 | } |
| 651 | device_initcall(register_pmu_driver); |
| 652 | |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 653 | static struct pmu_hw_events *armpmu_get_cpu_events(void) |
Mark Rutland | 92f701e | 2011-05-04 09:23:51 +0100 | [diff] [blame] | 654 | { |
| 655 | return &__get_cpu_var(cpu_hw_events); |
| 656 | } |
| 657 | |
| 658 | static void __init cpu_pmu_init(struct arm_pmu *armpmu) |
| 659 | { |
Mark Rutland | 0f78d2d | 2011-04-28 10:17:04 +0100 | [diff] [blame] | 660 | int cpu; |
| 661 | for_each_possible_cpu(cpu) { |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 662 | struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu); |
Mark Rutland | 3fc2c83 | 2011-06-24 11:30:59 +0100 | [diff] [blame] | 663 | events->events = per_cpu(hw_events, cpu); |
| 664 | events->used_mask = per_cpu(used_mask, cpu); |
Mark Rutland | 0f78d2d | 2011-04-28 10:17:04 +0100 | [diff] [blame] | 665 | raw_spin_lock_init(&events->pmu_lock); |
| 666 | } |
Mark Rutland | 92f701e | 2011-05-04 09:23:51 +0100 | [diff] [blame] | 667 | armpmu->get_hw_events = armpmu_get_cpu_events; |
Mark Rutland | 7ae18a5 | 2011-06-06 10:37:50 +0100 | [diff] [blame] | 668 | armpmu->type = ARM_PMU_DEVICE_CPU; |
Mark Rutland | 92f701e | 2011-05-04 09:23:51 +0100 | [diff] [blame] | 669 | } |
| 670 | |
Will Deacon | b0e8959 | 2011-07-26 22:10:28 +0100 | [diff] [blame] | 671 | /* |
| 672 | * CPU PMU identification and registration. |
| 673 | */ |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 674 | static int __init |
| 675 | init_hw_perf_events(void) |
| 676 | { |
| 677 | unsigned long cpuid = read_cpuid_id(); |
| 678 | unsigned long implementor = (cpuid & 0xFF000000) >> 24; |
| 679 | unsigned long part_number = (cpuid & 0xFFF0); |
| 680 | |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 681 | /* ARM Ltd CPUs. */ |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 682 | if (0x41 == implementor) { |
| 683 | switch (part_number) { |
| 684 | case 0xB360: /* ARM1136 */ |
| 685 | case 0xB560: /* ARM1156 */ |
| 686 | case 0xB760: /* ARM1176 */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 687 | cpu_pmu = armv6pmu_init(); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 688 | break; |
| 689 | case 0xB020: /* ARM11mpcore */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 690 | cpu_pmu = armv6mpcore_pmu_init(); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 691 | break; |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 692 | case 0xC080: /* Cortex-A8 */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 693 | cpu_pmu = armv7_a8_pmu_init(); |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 694 | break; |
| 695 | case 0xC090: /* Cortex-A9 */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 696 | cpu_pmu = armv7_a9_pmu_init(); |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 697 | break; |
Will Deacon | 0c205cb | 2011-06-03 17:40:15 +0100 | [diff] [blame] | 698 | case 0xC050: /* Cortex-A5 */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 699 | cpu_pmu = armv7_a5_pmu_init(); |
Will Deacon | 0c205cb | 2011-06-03 17:40:15 +0100 | [diff] [blame] | 700 | break; |
Will Deacon | 14abd03 | 2011-01-19 14:24:38 +0000 | [diff] [blame] | 701 | case 0xC0F0: /* Cortex-A15 */ |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 702 | cpu_pmu = armv7_a15_pmu_init(); |
Will Deacon | 14abd03 | 2011-01-19 14:24:38 +0000 | [diff] [blame] | 703 | break; |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 704 | } |
| 705 | /* Intel CPUs [xscale]. */ |
| 706 | } else if (0x69 == implementor) { |
| 707 | part_number = (cpuid >> 13) & 0x7; |
| 708 | switch (part_number) { |
| 709 | case 1: |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 710 | cpu_pmu = xscale1pmu_init(); |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 711 | break; |
| 712 | case 2: |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 713 | cpu_pmu = xscale2pmu_init(); |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 714 | break; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 715 | } |
| 716 | } |
| 717 | |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 718 | if (cpu_pmu) { |
Jean PIHET | 796d129 | 2010-01-26 18:51:05 +0100 | [diff] [blame] | 719 | pr_info("enabled with %s PMU driver, %d counters available\n", |
Mark Rutland | 8be3f9a | 2011-05-17 11:20:11 +0100 | [diff] [blame] | 720 | cpu_pmu->name, cpu_pmu->num_events); |
| 721 | cpu_pmu_init(cpu_pmu); |
| 722 | armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 723 | } else { |
| 724 | pr_info("no hardware support available\n"); |
Will Deacon | 49e6a32 | 2010-04-30 11:33:33 +0100 | [diff] [blame] | 725 | } |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 726 | |
| 727 | return 0; |
| 728 | } |
Peter Zijlstra | 004417a | 2010-11-25 18:38:29 +0100 | [diff] [blame] | 729 | early_initcall(init_hw_perf_events); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 730 | |
| 731 | /* |
| 732 | * Callchain handling code. |
| 733 | */ |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 734 | |
| 735 | /* |
| 736 | * The registers we're interested in are at the end of the variable |
| 737 | * length saved register structure. The fp points at the end of this |
| 738 | * structure so the address of this struct is: |
| 739 | * (struct frame_tail *)(xxx->fp)-1 |
| 740 | * |
| 741 | * This code has been adapted from the ARM OProfile support. |
| 742 | */ |
| 743 | struct frame_tail { |
Will Deacon | 4d6b7a7 | 2010-11-30 18:15:53 +0100 | [diff] [blame] | 744 | struct frame_tail __user *fp; |
| 745 | unsigned long sp; |
| 746 | unsigned long lr; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 747 | } __attribute__((packed)); |
| 748 | |
| 749 | /* |
| 750 | * Get the return address for a single stackframe and return a pointer to the |
| 751 | * next frame tail. |
| 752 | */ |
Will Deacon | 4d6b7a7 | 2010-11-30 18:15:53 +0100 | [diff] [blame] | 753 | static struct frame_tail __user * |
| 754 | user_backtrace(struct frame_tail __user *tail, |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 755 | struct perf_callchain_entry *entry) |
| 756 | { |
| 757 | struct frame_tail buftail; |
| 758 | |
| 759 | /* Also check accessibility of one struct frame_tail beyond */ |
| 760 | if (!access_ok(VERIFY_READ, tail, sizeof(buftail))) |
| 761 | return NULL; |
| 762 | if (__copy_from_user_inatomic(&buftail, tail, sizeof(buftail))) |
| 763 | return NULL; |
| 764 | |
Frederic Weisbecker | 70791ce | 2010-06-29 19:34:05 +0200 | [diff] [blame] | 765 | perf_callchain_store(entry, buftail.lr); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 766 | |
| 767 | /* |
| 768 | * Frame pointers should strictly progress back up the stack |
| 769 | * (towards higher addresses). |
| 770 | */ |
Rabin Vincent | cb06199 | 2011-02-09 11:35:12 +0100 | [diff] [blame] | 771 | if (tail + 1 >= buftail.fp) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 772 | return NULL; |
| 773 | |
| 774 | return buftail.fp - 1; |
| 775 | } |
| 776 | |
Frederic Weisbecker | 56962b444 | 2010-06-30 23:03:51 +0200 | [diff] [blame] | 777 | void |
| 778 | perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 779 | { |
Will Deacon | 4d6b7a7 | 2010-11-30 18:15:53 +0100 | [diff] [blame] | 780 | struct frame_tail __user *tail; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 781 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 782 | |
Will Deacon | 4d6b7a7 | 2010-11-30 18:15:53 +0100 | [diff] [blame] | 783 | tail = (struct frame_tail __user *)regs->ARM_fp - 1; |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 784 | |
Sonny Rao | 860ad78 | 2011-04-18 22:12:59 +0100 | [diff] [blame] | 785 | while ((entry->nr < PERF_MAX_STACK_DEPTH) && |
| 786 | tail && !((unsigned long)tail & 0x3)) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 787 | tail = user_backtrace(tail, entry); |
| 788 | } |
| 789 | |
| 790 | /* |
| 791 | * Gets called by walk_stackframe() for every stackframe. This will be called |
| 792 | * whist unwinding the stackframe and is like a subroutine return so we use |
| 793 | * the PC. |
| 794 | */ |
| 795 | static int |
| 796 | callchain_trace(struct stackframe *fr, |
| 797 | void *data) |
| 798 | { |
| 799 | struct perf_callchain_entry *entry = data; |
Frederic Weisbecker | 70791ce | 2010-06-29 19:34:05 +0200 | [diff] [blame] | 800 | perf_callchain_store(entry, fr->pc); |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 801 | return 0; |
| 802 | } |
| 803 | |
Frederic Weisbecker | 56962b444 | 2010-06-30 23:03:51 +0200 | [diff] [blame] | 804 | void |
| 805 | perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs) |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 806 | { |
| 807 | struct stackframe fr; |
| 808 | |
Jamie Iles | 1b8873a | 2010-02-02 20:25:44 +0100 | [diff] [blame] | 809 | fr.fp = regs->ARM_fp; |
| 810 | fr.sp = regs->ARM_sp; |
| 811 | fr.lr = regs->ARM_lr; |
| 812 | fr.pc = regs->ARM_pc; |
| 813 | walk_stackframe(&fr, callchain_trace, entry); |
| 814 | } |