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Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
Tomi Valkeinen559d6702009-11-03 11:23:50 +02002 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030018#ifndef __OMAP_OMAPDSS_H
19#define __OMAP_OMAPDSS_H
Tomi Valkeinen559d6702009-11-03 11:23:50 +020020
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/device.h>
Tomi Valkeinen348be692012-11-07 18:17:35 +020024#include <linux/interrupt.h>
Tomi Valkeinen559d6702009-11-03 11:23:50 +020025
Tomi Valkeinen6fcd4852013-05-10 13:02:32 +030026#include <video/videomode.h>
27
Tomi Valkeinen559d6702009-11-03 11:23:50 +020028#define DISPC_IRQ_FRAMEDONE (1 << 0)
29#define DISPC_IRQ_VSYNC (1 << 1)
30#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35#define DISPC_IRQ_GFX_END_WIN (1 << 7)
36#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37#define DISPC_IRQ_OCP_ERR (1 << 9)
38#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39#define DISPC_IRQ_VID1_END_WIN (1 << 11)
40#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41#define DISPC_IRQ_VID2_END_WIN (1 << 13)
42#define DISPC_IRQ_SYNC_LOST (1 << 14)
43#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44#define DISPC_IRQ_WAKEUP (1 << 16)
Sumit Semwal2a205f32010-12-02 11:27:12 +000045#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
46#define DISPC_IRQ_VSYNC2 (1 << 18)
Archit Tanejab8c095b2011-09-13 18:20:33 +053047#define DISPC_IRQ_VID3_END_WIN (1 << 19)
48#define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
Sumit Semwal2a205f32010-12-02 11:27:12 +000049#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
50#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
Tomi Valkeinen7f6f3c42011-08-31 13:39:03 +030051#define DISPC_IRQ_FRAMEDONEWB (1 << 23)
52#define DISPC_IRQ_FRAMEDONETV (1 << 24)
53#define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
Chandrabhanu Mahapatra14d33d32012-08-27 14:23:19 +053054#define DISPC_IRQ_SYNC_LOST3 (1 << 27)
55#define DISPC_IRQ_VSYNC3 (1 << 28)
56#define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
57#define DISPC_IRQ_FRAMEDONE3 (1 << 30)
Tomi Valkeinen559d6702009-11-03 11:23:50 +020058
59struct omap_dss_device;
60struct omap_overlay_manager;
Tomi Valkeinena97a9632012-10-24 13:52:40 +030061struct dss_lcd_mgr_config;
Ricardo Neri9c0b8422012-03-06 18:20:37 -060062struct snd_aes_iec958;
63struct snd_cea_861_aud_if;
Tomi Valkeinen559d6702009-11-03 11:23:50 +020064
65enum omap_display_type {
66 OMAP_DISPLAY_TYPE_NONE = 0,
67 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
68 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
69 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
70 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
71 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
Mythri P Kb1196012011-03-08 17:15:54 +053072 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020073};
74
75enum omap_plane {
76 OMAP_DSS_GFX = 0,
77 OMAP_DSS_VIDEO1 = 1,
Archit Tanejab8c095b2011-09-13 18:20:33 +053078 OMAP_DSS_VIDEO2 = 2,
79 OMAP_DSS_VIDEO3 = 3,
Tomi Valkeinen66a0f9e2012-08-22 16:57:02 +030080 OMAP_DSS_WB = 4,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020081};
82
83enum omap_channel {
84 OMAP_DSS_CHANNEL_LCD = 0,
85 OMAP_DSS_CHANNEL_DIGIT = 1,
Sumit Semwal8613b002010-12-02 11:27:09 +000086 OMAP_DSS_CHANNEL_LCD2 = 2,
Chandrabhanu Mahapatraff6331e2012-06-19 15:08:16 +053087 OMAP_DSS_CHANNEL_LCD3 = 3,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020088};
89
90enum omap_color_mode {
91 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
92 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
93 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
94 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
95 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
96 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
97 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
98 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
99 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
100 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
101 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
102 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
103 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
104 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
Amber Jainf20e4222011-05-19 19:47:50 +0530105 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
106 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
107 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
108 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
109 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200110};
111
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200112enum omap_dss_load_mode {
113 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
114 OMAP_DSS_LOAD_CLUT_ONLY = 1,
115 OMAP_DSS_LOAD_FRAME_ONLY = 2,
116 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
117};
118
119enum omap_dss_trans_key_type {
120 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
121 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
122};
123
124enum omap_rfbi_te_mode {
125 OMAP_DSS_RFBI_TE_MODE_1 = 1,
126 OMAP_DSS_RFBI_TE_MODE_2 = 2,
127};
128
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530129enum omap_dss_signal_level {
130 OMAPDSS_SIG_ACTIVE_HIGH = 0,
131 OMAPDSS_SIG_ACTIVE_LOW = 1,
132};
133
134enum omap_dss_signal_edge {
135 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
136 OMAPDSS_DRIVE_SIG_RISING_EDGE,
137 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
138};
139
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200140enum omap_dss_venc_type {
141 OMAP_DSS_VENC_TYPE_COMPOSITE,
142 OMAP_DSS_VENC_TYPE_SVIDEO,
143};
144
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530145enum omap_dss_dsi_pixel_format {
146 OMAP_DSS_DSI_FMT_RGB888,
147 OMAP_DSS_DSI_FMT_RGB666,
148 OMAP_DSS_DSI_FMT_RGB666_PACKED,
149 OMAP_DSS_DSI_FMT_RGB565,
150};
151
Archit Taneja7e951ee2011-07-22 12:45:04 +0530152enum omap_dss_dsi_mode {
153 OMAP_DSS_DSI_CMD_MODE = 0,
154 OMAP_DSS_DSI_VIDEO_MODE,
155};
156
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200157enum omap_display_caps {
158 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
159 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
160};
161
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200162enum omap_dss_display_state {
163 OMAP_DSS_DISPLAY_DISABLED = 0,
164 OMAP_DSS_DISPLAY_ACTIVE,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200165};
166
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600167enum omap_dss_audio_state {
168 OMAP_DSS_AUDIO_DISABLED = 0,
169 OMAP_DSS_AUDIO_ENABLED,
170 OMAP_DSS_AUDIO_CONFIGURED,
171 OMAP_DSS_AUDIO_PLAYING,
172};
173
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200174enum omap_dss_rotation_type {
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530175 OMAP_DSS_ROT_DMA = 1 << 0,
176 OMAP_DSS_ROT_VRFB = 1 << 1,
177 OMAP_DSS_ROT_TILER = 1 << 2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200178};
179
180/* clockwise rotation angle */
181enum omap_dss_rotation_angle {
182 OMAP_DSS_ROT_0 = 0,
183 OMAP_DSS_ROT_90 = 1,
184 OMAP_DSS_ROT_180 = 2,
185 OMAP_DSS_ROT_270 = 3,
186};
187
188enum omap_overlay_caps {
189 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300190 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
191 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
Archit Taneja11354dd2011-09-26 11:47:29 +0530192 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
Archit Tanejad79db852012-09-22 12:30:17 +0530193 OMAP_DSS_OVL_CAP_POS = 1 << 4,
194 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200195};
196
197enum omap_overlay_manager_caps {
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300198 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200199};
200
Archit Taneja89a35e52011-04-12 13:52:23 +0530201enum omap_dss_clk_source {
202 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
203 * OMAP4: DSS_FCLK */
204 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
205 * OMAP4: PLL1_CLK1 */
206 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
207 * OMAP4: PLL1_CLK2 */
Archit Taneja5a8b5722011-05-12 17:26:29 +0530208 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
209 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
Archit Taneja89a35e52011-04-12 13:52:23 +0530210};
211
Mythri P K9a901682012-01-02 14:02:38 +0530212enum omap_hdmi_flags {
213 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
214};
215
Archit Taneja484dc402012-09-07 17:38:00 +0530216enum omap_dss_output_id {
217 OMAP_DSS_OUTPUT_DPI = 1 << 0,
218 OMAP_DSS_OUTPUT_DBI = 1 << 1,
219 OMAP_DSS_OUTPUT_SDI = 1 << 2,
220 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
221 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
222 OMAP_DSS_OUTPUT_VENC = 1 << 5,
223 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
224};
225
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200226/* RFBI */
227
228struct rfbi_timings {
229 int cs_on_time;
230 int cs_off_time;
231 int we_on_time;
232 int we_off_time;
233 int re_on_time;
234 int re_off_time;
235 int we_cycle_time;
236 int re_cycle_time;
237 int cs_pulse_width;
238 int access_time;
239
240 int clk_div;
241
242 u32 tim[5]; /* set by rfbi_convert_timings() */
243
244 int converted;
245};
246
247void omap_rfbi_write_command(const void *buf, u32 len);
248void omap_rfbi_read_data(void *buf, u32 len);
249void omap_rfbi_write_data(const void *buf, u32 len);
250void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
251 u16 x, u16 y,
252 u16 w, u16 h);
253int omap_rfbi_enable_te(bool enable, unsigned line);
254int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
255 unsigned hs_pulse_time, unsigned vs_pulse_time,
256 int hs_pol_inv, int vs_pol_inv, int extif_div);
Tomi Valkeinen773139f2011-04-21 19:50:31 +0300257void rfbi_bus_lock(void);
258void rfbi_bus_unlock(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200259
260/* DSI */
Archit Taneja8af6ff02011-09-05 16:48:27 +0530261
Tomi Valkeinen478d7df2013-03-05 16:29:36 +0200262enum omap_dss_dsi_trans_mode {
263 /* Sync Pulses: both sync start and end packets sent */
264 OMAP_DSS_DSI_PULSE_MODE,
265 /* Sync Events: only sync start packets sent */
266 OMAP_DSS_DSI_EVENT_MODE,
267 /* Burst: only sync start packets sent, pixels are time compressed */
268 OMAP_DSS_DSI_BURST_MODE,
269};
270
Archit Taneja6b8493752012-08-13 22:12:24 +0530271struct omap_dss_dsi_videomode_timings {
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200272 unsigned long hsclk;
273
274 unsigned ndl;
275 unsigned bitspp;
276
277 /* pixels */
278 u16 hact;
279 /* lines */
280 u16 vact;
281
Archit Taneja8af6ff02011-09-05 16:48:27 +0530282 /* DSI video mode blanking data */
283 /* Unit: byte clock cycles */
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200284 u16 hss;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530285 u16 hsa;
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200286 u16 hse;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530287 u16 hfp;
288 u16 hbp;
289 /* Unit: line clocks */
290 u16 vsa;
291 u16 vfp;
292 u16 vbp;
293
294 /* DSI blanking modes */
295 int blanking_mode;
296 int hsa_blanking_mode;
297 int hbp_blanking_mode;
298 int hfp_blanking_mode;
299
Tomi Valkeinen478d7df2013-03-05 16:29:36 +0200300 enum omap_dss_dsi_trans_mode trans_mode;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530301
302 bool ddr_clk_always_on;
303 int window_sync;
304};
305
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200306struct omap_dss_dsi_config {
307 enum omap_dss_dsi_mode mode;
308 enum omap_dss_dsi_pixel_format pixel_format;
309 const struct omap_video_timings *timings;
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200310
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200311 unsigned long hs_clk_min, hs_clk_max;
312 unsigned long lp_clk_min, lp_clk_max;
313
314 bool ddr_clk_always_on;
315 enum omap_dss_dsi_trans_mode trans_mode;
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200316};
317
Archit Taneja1ffefe72011-05-12 17:26:24 +0530318void dsi_bus_lock(struct omap_dss_device *dssdev);
319void dsi_bus_unlock(struct omap_dss_device *dssdev);
320int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
321 int len);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530322int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
323 int len);
324int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
325int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530326int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
327 u8 param);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530328int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
329 u8 param);
330int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
331 u8 param1, u8 param2);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530332int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
333 u8 *data, int len);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530334int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
335 u8 *data, int len);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530336int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
337 u8 *buf, int buflen);
Archit Tanejab3b89c02011-08-30 16:07:39 +0530338int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
339 int buflen);
340int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
341 u8 *buf, int buflen);
342int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
343 u8 param1, u8 param2, u8 *buf, int buflen);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530344int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
345 u16 len);
346int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
347int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen9a147a62011-11-09 15:30:11 +0200348int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
349void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200350
Tomi Valkeinenacd18af2012-09-28 12:42:28 +0300351enum omapdss_version {
352 OMAPDSS_VER_UNKNOWN = 0,
353 OMAPDSS_VER_OMAP24xx,
354 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
355 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
356 OMAPDSS_VER_OMAP3630,
357 OMAPDSS_VER_AM35xx,
358 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
359 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
360 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
361 OMAPDSS_VER_OMAP5,
362};
363
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200364/* Board specific data */
365struct omap_dss_board_info {
Tomi Valkeinenaac927c2011-05-23 15:46:54 +0300366 int (*get_context_loss_count)(struct device *dev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200367 int num_devices;
368 struct omap_dss_device **devices;
369 struct omap_dss_device *default_device;
Tomi Valkeinen0a200122012-11-16 14:59:56 +0200370 const char *default_display_name;
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300371 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
372 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
Tomi Valkeinen62c1dcf2012-03-08 12:37:58 +0200373 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
Tomi Valkeinenacd18af2012-09-28 12:42:28 +0300374 enum omapdss_version version;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200375};
376
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000377/* Init with the board info */
378extern int omap_display_init(struct omap_dss_board_info *board_data);
Mythri P Kee9dfd82012-01-02 14:02:37 +0530379/* HDMI mux init*/
Mythri P K9a901682012-01-02 14:02:38 +0530380extern int omap_hdmi_init(enum omap_hdmi_flags flags);
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000381
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200382struct omap_video_timings {
383 /* Unit: pixels */
384 u16 x_res;
385 /* Unit: pixels */
386 u16 y_res;
387 /* Unit: KHz */
388 u32 pixel_clock;
389 /* Unit: pixel clocks */
390 u16 hsw; /* Horizontal synchronization pulse width */
391 /* Unit: pixel clocks */
392 u16 hfp; /* Horizontal front porch */
393 /* Unit: pixel clocks */
394 u16 hbp; /* Horizontal back porch */
395 /* Unit: line clocks */
396 u16 vsw; /* Vertical synchronization pulse width */
397 /* Unit: line clocks */
398 u16 vfp; /* Vertical front porch */
399 /* Unit: line clocks */
400 u16 vbp; /* Vertical back porch */
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530401
402 /* Vsync logic level */
403 enum omap_dss_signal_level vsync_level;
404 /* Hsync logic level */
405 enum omap_dss_signal_level hsync_level;
Archit Taneja23c8f882012-06-28 11:15:51 +0530406 /* Interlaced or Progressive timings */
407 bool interlace;
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530408 /* Pixel clock edge to drive LCD data */
409 enum omap_dss_signal_edge data_pclk_edge;
410 /* Data enable logic level */
411 enum omap_dss_signal_level de_level;
412 /* Pixel clock edges to drive HSYNC and VSYNC signals */
413 enum omap_dss_signal_edge sync_pclk_edge;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200414};
415
416#ifdef CONFIG_OMAP2_DSS_VENC
417/* Hardcoded timings for tv modes. Venc only uses these to
418 * identify the mode, and does not actually use the configs
419 * itself. However, the configs should be something that
420 * a normal monitor can also show */
Tobias Klauser5a1819e2010-05-20 17:12:52 +0200421extern const struct omap_video_timings omap_dss_pal_timings;
422extern const struct omap_video_timings omap_dss_ntsc_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200423#endif
424
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300425struct omap_dss_cpr_coefs {
426 s16 rr, rg, rb;
427 s16 gr, gg, gb;
428 s16 br, bg, bb;
429};
430
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200431struct omap_overlay_info {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200432 u32 paddr;
Amber Jain0d66cbb2011-05-19 19:47:54 +0530433 u32 p_uv_addr; /* for NV12 format */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200434 u16 screen_width;
435 u16 width;
436 u16 height;
437 enum omap_color_mode color_mode;
438 u8 rotation;
439 enum omap_dss_rotation_type rotation_type;
440 bool mirror;
441
442 u16 pos_x;
443 u16 pos_y;
444 u16 out_width; /* if 0, out_width == width */
445 u16 out_height; /* if 0, out_height == height */
446 u8 global_alpha;
Rajkumar Nfd28a392010-11-04 12:28:42 +0100447 u8 pre_mult_alpha;
Archit Taneja54128702011-09-08 11:29:17 +0530448 u8 zorder;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200449};
450
451struct omap_overlay {
452 struct kobject kobj;
453 struct list_head list;
454
455 /* static fields */
456 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300457 enum omap_plane id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200458 enum omap_color_mode supported_modes;
459 enum omap_overlay_caps caps;
460
461 /* dynamic fields */
462 struct omap_overlay_manager *manager;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200463
Tomi Valkeinen9d11c322011-11-18 12:38:38 +0200464 /*
465 * The following functions do not block:
466 *
467 * is_enabled
468 * set_overlay_info
469 * get_overlay_info
470 *
471 * The rest of the functions may block and cannot be called from
472 * interrupt context
473 */
474
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200475 int (*enable)(struct omap_overlay *ovl);
476 int (*disable)(struct omap_overlay *ovl);
477 bool (*is_enabled)(struct omap_overlay *ovl);
478
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200479 int (*set_manager)(struct omap_overlay *ovl,
480 struct omap_overlay_manager *mgr);
481 int (*unset_manager)(struct omap_overlay *ovl);
482
483 int (*set_overlay_info)(struct omap_overlay *ovl,
484 struct omap_overlay_info *info);
485 void (*get_overlay_info)(struct omap_overlay *ovl,
486 struct omap_overlay_info *info);
487
488 int (*wait_for_go)(struct omap_overlay *ovl);
Archit Taneja794bc4e2012-09-07 17:44:51 +0530489
490 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200491};
492
493struct omap_overlay_manager_info {
494 u32 default_color;
495
496 enum omap_dss_trans_key_type trans_key_type;
497 u32 trans_key;
498 bool trans_enabled;
499
Archit Taneja11354dd2011-09-26 11:47:29 +0530500 bool partial_alpha_enabled;
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300501
502 bool cpr_enable;
503 struct omap_dss_cpr_coefs cpr_coefs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200504};
505
506struct omap_overlay_manager {
507 struct kobject kobj;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200508
509 /* static fields */
510 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300511 enum omap_channel id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200512 enum omap_overlay_manager_caps caps;
Tomi Valkeinen07e327c2011-11-05 10:59:59 +0200513 struct list_head overlays;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200514 enum omap_display_type supported_displays;
Archit Taneja97f01b32012-09-26 16:42:39 +0530515 enum omap_dss_output_id supported_outputs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200516
517 /* dynamic fields */
Archit Taneja97f01b32012-09-26 16:42:39 +0530518 struct omap_dss_output *output;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200519
Tomi Valkeinen9d11c322011-11-18 12:38:38 +0200520 /*
521 * The following functions do not block:
522 *
523 * set_manager_info
524 * get_manager_info
525 * apply
526 *
527 * The rest of the functions may block and cannot be called from
528 * interrupt context
529 */
530
Archit Taneja97f01b32012-09-26 16:42:39 +0530531 int (*set_output)(struct omap_overlay_manager *mgr,
532 struct omap_dss_output *output);
533 int (*unset_output)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200534
535 int (*set_manager_info)(struct omap_overlay_manager *mgr,
536 struct omap_overlay_manager_info *info);
537 void (*get_manager_info)(struct omap_overlay_manager *mgr,
538 struct omap_overlay_manager_info *info);
539
540 int (*apply)(struct omap_overlay_manager *mgr);
541 int (*wait_for_go)(struct omap_overlay_manager *mgr);
Tomi Valkeinen3f71cbe2010-01-08 17:06:04 +0200542 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
Archit Taneja794bc4e2012-09-07 17:44:51 +0530543
544 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200545};
546
Tomi Valkeinene4a9e942012-03-28 15:58:56 +0300547/* 22 pins means 1 clk lane and 10 data lanes */
548#define OMAP_DSS_MAX_DSI_PINS 22
549
550struct omap_dsi_pin_config {
551 int num_pins;
552 /*
553 * pin numbers in the following order:
554 * clk+, clk-
555 * data1+, data1-
556 * data2+, data2-
557 * ...
558 */
559 int pins[OMAP_DSS_MAX_DSI_PINS];
560};
561
Archit Taneja749feff2012-08-31 12:32:52 +0530562struct omap_dss_writeback_info {
563 u32 paddr;
564 u32 p_uv_addr;
565 u16 buf_width;
566 u16 width;
567 u16 height;
568 enum omap_color_mode color_mode;
569 u8 rotation;
570 enum omap_dss_rotation_type rotation_type;
571 bool mirror;
572 u8 pre_mult_alpha;
573};
574
Archit Taneja484dc402012-09-07 17:38:00 +0530575struct omap_dss_output {
576 struct list_head list;
577
Tomi Valkeinen7286a082013-02-18 13:06:01 +0200578 const char *name;
579
Archit Taneja484dc402012-09-07 17:38:00 +0530580 /* display type supported by the output */
581 enum omap_display_type type;
582
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200583 /* DISPC channel for this output */
584 enum omap_channel dispc_channel;
585
Archit Taneja484dc402012-09-07 17:38:00 +0530586 /* output instance */
587 enum omap_dss_output_id id;
588
589 /* output's platform device pointer */
590 struct platform_device *pdev;
591
592 /* dynamic fields */
593 struct omap_overlay_manager *manager;
594
595 struct omap_dss_device *device;
596};
597
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200598struct omap_dss_device {
Tomi Valkeinenecc8b372013-02-14 14:17:28 +0200599 /* old device, to be removed */
600 struct device old_dev;
601
602 /* new device, pointer to panel device */
603 struct device *dev;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200604
Tomi Valkeinen2e7e3dc2012-11-16 15:45:26 +0200605 struct list_head panel_list;
606
607 /* alias in the form of "display%d" */
608 char alias[16];
609
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200610 enum omap_display_type type;
611
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200612 /* obsolete, to be removed */
Sumit Semwal18faa1b2010-12-02 11:27:14 +0000613 enum omap_channel channel;
614
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200615 union {
616 struct {
617 u8 data_lines;
618 } dpi;
619
620 struct {
621 u8 channel;
622 u8 data_lines;
623 } rfbi;
624
625 struct {
626 u8 datapairs;
627 } sdi;
628
629 struct {
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530630 int module;
631
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200632 bool ext_te;
633 u8 ext_te_gpio;
634 } dsi;
635
636 struct {
637 enum omap_dss_venc_type type;
638 bool invert_polarity;
639 } venc;
640 } phy;
641
642 struct {
643 struct omap_video_timings timings;
644
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530645 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
Archit Taneja7e951ee2011-07-22 12:45:04 +0530646 enum omap_dss_dsi_mode dsi_mode;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200647 } panel;
648
649 struct {
650 u8 pixel_size;
651 struct rfbi_timings rfbi_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200652 } ctrl;
653
654 int reset_gpio;
655
656 int max_backlight_level;
657
658 const char *name;
659
660 /* used to match device to driver */
661 const char *driver_name;
662
663 void *data;
664
665 struct omap_dss_driver *driver;
666
667 /* helper variable for driver suspend/resume */
668 bool activate_after_resume;
669
670 enum omap_display_caps caps;
671
Archit Taneja6d71b922012-08-29 13:30:15 +0530672 struct omap_dss_output *output;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200673
674 enum omap_dss_display_state state;
675
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600676 enum omap_dss_audio_state audio_state;
677
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200678 /* platform specific */
679 int (*platform_enable)(struct omap_dss_device *dssdev);
680 void (*platform_disable)(struct omap_dss_device *dssdev);
681 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
682 int (*get_backlight)(struct omap_dss_device *dssdev);
683};
684
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200685struct omap_dss_hdmi_data
686{
Tomi Valkeinencca35012012-04-26 14:48:32 +0300687 int ct_cp_hpd_gpio;
688 int ls_oe_gpio;
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200689 int hpd_gpio;
690};
691
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600692struct omap_dss_audio {
693 struct snd_aes_iec958 *iec;
694 struct snd_cea_861_aud_if *cea;
695};
696
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200697struct omap_dss_driver {
698 struct device_driver driver;
699
700 int (*probe)(struct omap_dss_device *);
701 void (*remove)(struct omap_dss_device *);
702
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300703 int (*connect)(struct omap_dss_device *dssdev);
704 void (*disconnect)(struct omap_dss_device *dssdev);
705
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200706 int (*enable)(struct omap_dss_device *display);
707 void (*disable)(struct omap_dss_device *display);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200708 int (*run_test)(struct omap_dss_device *display, int test);
709
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200710 int (*update)(struct omap_dss_device *dssdev,
711 u16 x, u16 y, u16 w, u16 h);
712 int (*sync)(struct omap_dss_device *dssdev);
713
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200714 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200715 int (*get_te)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200716
717 u8 (*get_rotate)(struct omap_dss_device *dssdev);
718 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
719
720 bool (*get_mirror)(struct omap_dss_device *dssdev);
721 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
722
723 int (*memory_read)(struct omap_dss_device *dssdev,
724 void *buf, size_t size,
725 u16 x, u16 y, u16 w, u16 h);
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200726
727 void (*get_resolution)(struct omap_dss_device *dssdev,
728 u16 *xres, u16 *yres);
Jani Nikula7a0987b2010-06-16 15:26:36 +0300729 void (*get_dimensions)(struct omap_dss_device *dssdev,
730 u32 *width, u32 *height);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200731 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
Tomi Valkeinen36511312010-01-19 15:53:16 +0200732
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200733 int (*check_timings)(struct omap_dss_device *dssdev,
734 struct omap_video_timings *timings);
735 void (*set_timings)(struct omap_dss_device *dssdev,
736 struct omap_video_timings *timings);
737 void (*get_timings)(struct omap_dss_device *dssdev,
738 struct omap_video_timings *timings);
739
Tomi Valkeinen36511312010-01-19 15:53:16 +0200740 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
741 u32 (*get_wss)(struct omap_dss_device *dssdev);
Tomi Valkeinen3d5e0ef2011-08-25 17:10:41 +0300742
743 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
Tomi Valkeinendf4769c2011-08-29 17:26:01 +0300744 bool (*detect)(struct omap_dss_device *dssdev);
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600745
746 /*
747 * For display drivers that support audio. This encompasses
748 * HDMI and DisplayPort at the moment.
749 */
750 /*
751 * Note: These functions might sleep. Do not call while
752 * holding a spinlock/readlock.
753 */
754 int (*audio_enable)(struct omap_dss_device *dssdev);
755 void (*audio_disable)(struct omap_dss_device *dssdev);
756 bool (*audio_supported)(struct omap_dss_device *dssdev);
757 int (*audio_config)(struct omap_dss_device *dssdev,
758 struct omap_dss_audio *audio);
759 /* Note: These functions may not sleep */
760 int (*audio_start)(struct omap_dss_device *dssdev);
761 void (*audio_stop)(struct omap_dss_device *dssdev);
762
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200763};
764
Tomi Valkeinenb2c7d542012-10-18 13:46:29 +0300765enum omapdss_version omapdss_get_version(void);
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300766bool omapdss_is_initialized(void);
Tomi Valkeinenb2c7d542012-10-18 13:46:29 +0300767
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200768int omap_dss_register_driver(struct omap_dss_driver *);
769void omap_dss_unregister_driver(struct omap_dss_driver *);
770
Tomi Valkeinen2e7e3dc2012-11-16 15:45:26 +0200771int omapdss_register_display(struct omap_dss_device *dssdev);
772void omapdss_unregister_display(struct omap_dss_device *dssdev);
773
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200774void omap_dss_get_device(struct omap_dss_device *dssdev);
775void omap_dss_put_device(struct omap_dss_device *dssdev);
776#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
777struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
778struct omap_dss_device *omap_dss_find_device(void *data,
779 int (*match)(struct omap_dss_device *dssdev, void *data));
Tomi Valkeinen2bbcce52012-10-29 12:40:46 +0200780const char *omapdss_get_default_display_name(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200781
782int omap_dss_start_device(struct omap_dss_device *dssdev);
783void omap_dss_stop_device(struct omap_dss_device *dssdev);
784
Tomi Valkeinen6fcd4852013-05-10 13:02:32 +0300785void videomode_to_omap_video_timings(const struct videomode *vm,
786 struct omap_video_timings *ovt);
787void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
788 struct videomode *vm);
789
Tomi Valkeineneda34272012-11-07 16:26:11 +0200790int dss_feat_get_num_mgrs(void);
791int dss_feat_get_num_ovls(void);
792enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
793enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
794enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
795
796
797
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200798int omap_dss_get_num_overlay_managers(void);
799struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
800
801int omap_dss_get_num_overlays(void);
802struct omap_overlay *omap_dss_get_overlay(int num);
803
Archit Taneja484dc402012-09-07 17:38:00 +0530804struct omap_dss_output *omap_dss_get_output(enum omap_dss_output_id id);
Tomi Valkeinen805cc2d2013-03-13 13:56:42 +0200805struct omap_dss_output *omap_dss_find_output(const char *name);
Tomi Valkeinen12ca7552013-03-13 14:22:30 +0200806struct omap_dss_output *omap_dss_find_output_by_node(struct device_node *node);
Archit Taneja6d71b922012-08-29 13:30:15 +0530807int omapdss_output_set_device(struct omap_dss_output *out,
808 struct omap_dss_device *dssdev);
809int omapdss_output_unset_device(struct omap_dss_output *out);
Archit Taneja484dc402012-09-07 17:38:00 +0530810
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300811struct omap_dss_output *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
812struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
813
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200814void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
815 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200816int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
Grazvydas Ignotas4b6430f2012-03-15 20:00:23 +0200817void omapdss_default_get_timings(struct omap_dss_device *dssdev,
818 struct omap_video_timings *timings);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200819
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200820typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
821int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
822int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
823
Tomi Valkeinen348be692012-11-07 18:17:35 +0200824u32 dispc_read_irqstatus(void);
825void dispc_clear_irqstatus(u32 mask);
826u32 dispc_read_irqenable(void);
827void dispc_write_irqenable(u32 mask);
828
829int dispc_request_irq(irq_handler_t handler, void *dev_id);
830void dispc_free_irq(void *dev_id);
831
832int dispc_runtime_get(void);
833void dispc_runtime_put(void);
834
835void dispc_mgr_enable(enum omap_channel channel, bool enable);
836bool dispc_mgr_is_enabled(enum omap_channel channel);
837u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
838u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
839u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
840bool dispc_mgr_go_busy(enum omap_channel channel);
841void dispc_mgr_go(enum omap_channel channel);
842void dispc_mgr_set_lcd_config(enum omap_channel channel,
843 const struct dss_lcd_mgr_config *config);
844void dispc_mgr_set_timings(enum omap_channel channel,
845 const struct omap_video_timings *timings);
846void dispc_mgr_setup(enum omap_channel channel,
847 const struct omap_overlay_manager_info *info);
848
849int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
850 const struct omap_overlay_info *oi,
851 const struct omap_video_timings *timings,
852 int *x_predecim, int *y_predecim);
853
854int dispc_ovl_enable(enum omap_plane plane, bool enable);
855bool dispc_ovl_enabled(enum omap_plane plane);
856void dispc_ovl_set_channel_out(enum omap_plane plane,
857 enum omap_channel channel);
858int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
859 bool replication, const struct omap_video_timings *mgr_timings,
860 bool mem_to_mem);
861
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200862#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
Tomi Valkeinenecc8b372013-02-14 14:17:28 +0200863#define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200864
Archit Taneja1ffefe72011-05-12 17:26:24 +0530865void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
866 bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200867int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200868int omapdss_dsi_set_config(struct omap_dss_device *dssdev,
869 const struct omap_dss_dsi_config *config);
Tomi Valkeinen61140c92010-01-12 16:00:30 +0200870
Tomi Valkeinen5476e742011-11-03 16:34:20 +0200871int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200872 void (*callback)(int, void *), void *data);
Archit Taneja5ee3c142011-03-02 12:35:53 +0530873int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
874int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
875void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinene4a9e942012-03-28 15:58:56 +0300876int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev,
877 const struct omap_dsi_pin_config *pin_cfg);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200878
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200879int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
Tomi Valkeinen2a89dc12010-07-30 12:39:34 +0300880void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
Tomi Valkeinen22d6d672010-10-11 11:33:30 +0300881 bool disconnect_lanes, bool enter_ulps);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200882
883int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
884void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
Archit Tanejac4991442012-08-08 14:28:54 +0530885void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
886 struct omap_video_timings *timings);
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200887int dpi_check_timings(struct omap_dss_device *dssdev,
888 struct omap_video_timings *timings);
Archit Tanejac6b393d2012-07-06 15:30:52 +0530889void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200890
891int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
892void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
Archit Tanejac7833f72012-07-05 17:11:12 +0530893void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
894 struct omap_video_timings *timings);
Archit Taneja889b4fd2012-07-20 17:18:49 +0530895void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200896
897int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
898void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
Archit Taneja43eab862012-08-13 12:24:53 +0530899int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
900 void *data);
Archit Taneja475989b2012-08-13 15:28:15 +0530901int omap_rfbi_configure(struct omap_dss_device *dssdev);
Archit Taneja6ff9dd52012-08-13 15:12:10 +0530902void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
Archit Tanejab02875b2012-08-13 15:26:49 +0530903void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
904 int pixel_size);
Archit Taneja475989b2012-08-13 15:28:15 +0530905void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
906 int data_lines);
Archit Taneja6e883322012-08-13 22:23:29 +0530907void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
908 struct rfbi_timings *timings);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200909
Tomi Valkeinen8dd24912012-10-10 10:26:45 +0300910int omapdss_compat_init(void);
911void omapdss_compat_uninit(void);
912
Tomi Valkeinena97a9632012-10-24 13:52:40 +0300913struct dss_mgr_ops {
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300914 int (*connect)(struct omap_overlay_manager *mgr,
915 struct omap_dss_output *dst);
916 void (*disconnect)(struct omap_overlay_manager *mgr,
917 struct omap_dss_output *dst);
918
Tomi Valkeinena97a9632012-10-24 13:52:40 +0300919 void (*start_update)(struct omap_overlay_manager *mgr);
920 int (*enable)(struct omap_overlay_manager *mgr);
921 void (*disable)(struct omap_overlay_manager *mgr);
922 void (*set_timings)(struct omap_overlay_manager *mgr,
923 const struct omap_video_timings *timings);
924 void (*set_lcd_config)(struct omap_overlay_manager *mgr,
925 const struct dss_lcd_mgr_config *config);
926 int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
927 void (*handler)(void *), void *data);
928 void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
929 void (*handler)(void *), void *data);
930};
931
932int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
933void dss_uninstall_mgr_ops(void);
934
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300935int dss_mgr_connect(struct omap_overlay_manager *mgr,
936 struct omap_dss_output *dst);
937void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
938 struct omap_dss_output *dst);
Tomi Valkeinena97a9632012-10-24 13:52:40 +0300939void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
940 const struct omap_video_timings *timings);
941void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
942 const struct dss_lcd_mgr_config *config);
943int dss_mgr_enable(struct omap_overlay_manager *mgr);
944void dss_mgr_disable(struct omap_overlay_manager *mgr);
945void dss_mgr_start_update(struct omap_overlay_manager *mgr);
946int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
947 void (*handler)(void *), void *data);
948void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
949 void (*handler)(void *), void *data);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300950
951static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
952{
953 return dssdev->output;
954}
955
956static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
957{
958 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
959}
960
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200961#endif