Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap iommu: tlb and pagetable primitives |
| 3 | * |
Hiroshi DOYU | c127c7d | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 4 | * Copyright (C) 2008-2010 Nokia Corporation |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 5 | * |
| 6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, |
| 7 | * Paul Mundt and Toshihiro Kobayashi |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 16 | #include <linux/slab.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/ioport.h> |
| 19 | #include <linux/clk.h> |
| 20 | #include <linux/platform_device.h> |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 21 | #include <linux/iommu.h> |
Tony Lindgren | c8d35c8 | 2012-11-02 12:24:03 -0700 | [diff] [blame] | 22 | #include <linux/omap-iommu.h> |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 23 | #include <linux/mutex.h> |
| 24 | #include <linux/spinlock.h> |
Tony Lindgren | ed1c7de | 2012-11-02 12:24:06 -0700 | [diff] [blame^] | 25 | #include <linux/io.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 26 | |
| 27 | #include <asm/cacheflush.h> |
| 28 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 29 | #include <plat/iommu.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 30 | |
Ido Yariv | 2f7702a | 2012-11-02 12:24:00 -0700 | [diff] [blame] | 31 | #include "omap-iopgtable.h" |
Tony Lindgren | ed1c7de | 2012-11-02 12:24:06 -0700 | [diff] [blame^] | 32 | #include "omap-iommu.h" |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 33 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 34 | #define for_each_iotlb_cr(obj, n, __i, cr) \ |
| 35 | for (__i = 0; \ |
| 36 | (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \ |
| 37 | __i++) |
| 38 | |
Ohad Ben-Cohen | 66bc8cf | 2011-11-10 11:32:27 +0200 | [diff] [blame] | 39 | /* bitmap of the page sizes currently supported */ |
| 40 | #define OMAP_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M) |
| 41 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 42 | /** |
| 43 | * struct omap_iommu_domain - omap iommu domain |
| 44 | * @pgtable: the page table |
| 45 | * @iommu_dev: an omap iommu device attached to this domain. only a single |
| 46 | * iommu device can be attached for now. |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 47 | * @dev: Device using this domain. |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 48 | * @lock: domain lock, should be taken when attaching/detaching |
| 49 | */ |
| 50 | struct omap_iommu_domain { |
| 51 | u32 *pgtable; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 52 | struct omap_iommu *iommu_dev; |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 53 | struct device *dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 54 | spinlock_t lock; |
| 55 | }; |
| 56 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 57 | /* accommodate the difference between omap1 and omap2/3 */ |
| 58 | static const struct iommu_functions *arch_iommu; |
| 59 | |
| 60 | static struct platform_driver omap_iommu_driver; |
| 61 | static struct kmem_cache *iopte_cachep; |
| 62 | |
| 63 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 64 | * omap_install_iommu_arch - Install archtecure specific iommu functions |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 65 | * @ops: a pointer to architecture specific iommu functions |
| 66 | * |
| 67 | * There are several kind of iommu algorithm(tlb, pagetable) among |
| 68 | * omap series. This interface installs such an iommu algorighm. |
| 69 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 70 | int omap_install_iommu_arch(const struct iommu_functions *ops) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 71 | { |
| 72 | if (arch_iommu) |
| 73 | return -EBUSY; |
| 74 | |
| 75 | arch_iommu = ops; |
| 76 | return 0; |
| 77 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 78 | EXPORT_SYMBOL_GPL(omap_install_iommu_arch); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 79 | |
| 80 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 81 | * omap_uninstall_iommu_arch - Uninstall archtecure specific iommu functions |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 82 | * @ops: a pointer to architecture specific iommu functions |
| 83 | * |
| 84 | * This interface uninstalls the iommu algorighm installed previously. |
| 85 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 86 | void omap_uninstall_iommu_arch(const struct iommu_functions *ops) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 87 | { |
| 88 | if (arch_iommu != ops) |
| 89 | pr_err("%s: not your arch\n", __func__); |
| 90 | |
| 91 | arch_iommu = NULL; |
| 92 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 93 | EXPORT_SYMBOL_GPL(omap_uninstall_iommu_arch); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 94 | |
| 95 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 96 | * omap_iommu_save_ctx - Save registers for pm off-mode support |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 97 | * @dev: client device |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 98 | **/ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 99 | void omap_iommu_save_ctx(struct device *dev) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 100 | { |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 101 | struct omap_iommu *obj = dev_to_omap_iommu(dev); |
| 102 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 103 | arch_iommu->save_ctx(obj); |
| 104 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 105 | EXPORT_SYMBOL_GPL(omap_iommu_save_ctx); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 106 | |
| 107 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 108 | * omap_iommu_restore_ctx - Restore registers for pm off-mode support |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 109 | * @dev: client device |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 110 | **/ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 111 | void omap_iommu_restore_ctx(struct device *dev) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 112 | { |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 113 | struct omap_iommu *obj = dev_to_omap_iommu(dev); |
| 114 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 115 | arch_iommu->restore_ctx(obj); |
| 116 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 117 | EXPORT_SYMBOL_GPL(omap_iommu_restore_ctx); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 118 | |
| 119 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 120 | * omap_iommu_arch_version - Return running iommu arch version |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 121 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 122 | u32 omap_iommu_arch_version(void) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 123 | { |
| 124 | return arch_iommu->version; |
| 125 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 126 | EXPORT_SYMBOL_GPL(omap_iommu_arch_version); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 127 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 128 | static int iommu_enable(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 129 | { |
| 130 | int err; |
| 131 | |
| 132 | if (!obj) |
| 133 | return -EINVAL; |
| 134 | |
Martin Hostettler | ef4815a | 2011-02-24 12:51:31 -0800 | [diff] [blame] | 135 | if (!arch_iommu) |
| 136 | return -ENODEV; |
| 137 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 138 | clk_enable(obj->clk); |
| 139 | |
| 140 | err = arch_iommu->enable(obj); |
| 141 | |
| 142 | clk_disable(obj->clk); |
| 143 | return err; |
| 144 | } |
| 145 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 146 | static void iommu_disable(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 147 | { |
| 148 | if (!obj) |
| 149 | return; |
| 150 | |
| 151 | clk_enable(obj->clk); |
| 152 | |
| 153 | arch_iommu->disable(obj); |
| 154 | |
| 155 | clk_disable(obj->clk); |
| 156 | } |
| 157 | |
| 158 | /* |
| 159 | * TLB operations |
| 160 | */ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 161 | void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 162 | { |
| 163 | BUG_ON(!cr || !e); |
| 164 | |
| 165 | arch_iommu->cr_to_e(cr, e); |
| 166 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 167 | EXPORT_SYMBOL_GPL(omap_iotlb_cr_to_e); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 168 | |
| 169 | static inline int iotlb_cr_valid(struct cr_regs *cr) |
| 170 | { |
| 171 | if (!cr) |
| 172 | return -EINVAL; |
| 173 | |
| 174 | return arch_iommu->cr_valid(cr); |
| 175 | } |
| 176 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 177 | static inline struct cr_regs *iotlb_alloc_cr(struct omap_iommu *obj, |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 178 | struct iotlb_entry *e) |
| 179 | { |
| 180 | if (!e) |
| 181 | return NULL; |
| 182 | |
| 183 | return arch_iommu->alloc_cr(obj, e); |
| 184 | } |
| 185 | |
Ohad Ben-Cohen | e1f2381 | 2011-08-16 14:58:14 +0300 | [diff] [blame] | 186 | static u32 iotlb_cr_to_virt(struct cr_regs *cr) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 187 | { |
| 188 | return arch_iommu->cr_to_virt(cr); |
| 189 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 190 | |
| 191 | static u32 get_iopte_attr(struct iotlb_entry *e) |
| 192 | { |
| 193 | return arch_iommu->get_pte_attr(e); |
| 194 | } |
| 195 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 196 | static u32 iommu_report_fault(struct omap_iommu *obj, u32 *da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 197 | { |
| 198 | return arch_iommu->fault_isr(obj, da); |
| 199 | } |
| 200 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 201 | static void iotlb_lock_get(struct omap_iommu *obj, struct iotlb_lock *l) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 202 | { |
| 203 | u32 val; |
| 204 | |
| 205 | val = iommu_read_reg(obj, MMU_LOCK); |
| 206 | |
| 207 | l->base = MMU_LOCK_BASE(val); |
| 208 | l->vict = MMU_LOCK_VICT(val); |
| 209 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 210 | } |
| 211 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 212 | static void iotlb_lock_set(struct omap_iommu *obj, struct iotlb_lock *l) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 213 | { |
| 214 | u32 val; |
| 215 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 216 | val = (l->base << MMU_LOCK_BASE_SHIFT); |
| 217 | val |= (l->vict << MMU_LOCK_VICT_SHIFT); |
| 218 | |
| 219 | iommu_write_reg(obj, val, MMU_LOCK); |
| 220 | } |
| 221 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 222 | static void iotlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 223 | { |
| 224 | arch_iommu->tlb_read_cr(obj, cr); |
| 225 | } |
| 226 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 227 | static void iotlb_load_cr(struct omap_iommu *obj, struct cr_regs *cr) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 228 | { |
| 229 | arch_iommu->tlb_load_cr(obj, cr); |
| 230 | |
| 231 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); |
| 232 | iommu_write_reg(obj, 1, MMU_LD_TLB); |
| 233 | } |
| 234 | |
| 235 | /** |
| 236 | * iotlb_dump_cr - Dump an iommu tlb entry into buf |
| 237 | * @obj: target iommu |
| 238 | * @cr: contents of cam and ram register |
| 239 | * @buf: output buffer |
| 240 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 241 | static inline ssize_t iotlb_dump_cr(struct omap_iommu *obj, struct cr_regs *cr, |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 242 | char *buf) |
| 243 | { |
| 244 | BUG_ON(!cr || !buf); |
| 245 | |
| 246 | return arch_iommu->dump_cr(obj, cr, buf); |
| 247 | } |
| 248 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 249 | /* only used in iotlb iteration for-loop */ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 250 | static struct cr_regs __iotlb_read_cr(struct omap_iommu *obj, int n) |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 251 | { |
| 252 | struct cr_regs cr; |
| 253 | struct iotlb_lock l; |
| 254 | |
| 255 | iotlb_lock_get(obj, &l); |
| 256 | l.vict = n; |
| 257 | iotlb_lock_set(obj, &l); |
| 258 | iotlb_read_cr(obj, &cr); |
| 259 | |
| 260 | return cr; |
| 261 | } |
| 262 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 263 | /** |
| 264 | * load_iotlb_entry - Set an iommu tlb entry |
| 265 | * @obj: target iommu |
| 266 | * @e: an iommu tlb entry info |
| 267 | **/ |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 268 | #ifdef PREFETCH_IOTLB |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 269 | static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 270 | { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 271 | int err = 0; |
| 272 | struct iotlb_lock l; |
| 273 | struct cr_regs *cr; |
| 274 | |
| 275 | if (!obj || !obj->nr_tlb_entries || !e) |
| 276 | return -EINVAL; |
| 277 | |
| 278 | clk_enable(obj->clk); |
| 279 | |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 280 | iotlb_lock_get(obj, &l); |
| 281 | if (l.base == obj->nr_tlb_entries) { |
| 282 | dev_warn(obj->dev, "%s: preserve entries full\n", __func__); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 283 | err = -EBUSY; |
| 284 | goto out; |
| 285 | } |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 286 | if (!e->prsvd) { |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 287 | int i; |
| 288 | struct cr_regs tmp; |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 289 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 290 | for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp) |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 291 | if (!iotlb_cr_valid(&tmp)) |
| 292 | break; |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 293 | |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 294 | if (i == obj->nr_tlb_entries) { |
| 295 | dev_dbg(obj->dev, "%s: full: no entry\n", __func__); |
| 296 | err = -EBUSY; |
| 297 | goto out; |
| 298 | } |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 299 | |
| 300 | iotlb_lock_get(obj, &l); |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 301 | } else { |
| 302 | l.vict = l.base; |
| 303 | iotlb_lock_set(obj, &l); |
| 304 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 305 | |
| 306 | cr = iotlb_alloc_cr(obj, e); |
| 307 | if (IS_ERR(cr)) { |
| 308 | clk_disable(obj->clk); |
| 309 | return PTR_ERR(cr); |
| 310 | } |
| 311 | |
| 312 | iotlb_load_cr(obj, cr); |
| 313 | kfree(cr); |
| 314 | |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 315 | if (e->prsvd) |
| 316 | l.base++; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 317 | /* increment victim for next tlb load */ |
| 318 | if (++l.vict == obj->nr_tlb_entries) |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 319 | l.vict = l.base; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 320 | iotlb_lock_set(obj, &l); |
| 321 | out: |
| 322 | clk_disable(obj->clk); |
| 323 | return err; |
| 324 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 325 | |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 326 | #else /* !PREFETCH_IOTLB */ |
| 327 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 328 | static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 329 | { |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | #endif /* !PREFETCH_IOTLB */ |
| 334 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 335 | static int prefetch_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 336 | { |
| 337 | return load_iotlb_entry(obj, e); |
| 338 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 339 | |
| 340 | /** |
| 341 | * flush_iotlb_page - Clear an iommu tlb entry |
| 342 | * @obj: target iommu |
| 343 | * @da: iommu device virtual address |
| 344 | * |
| 345 | * Clear an iommu tlb entry which includes 'da' address. |
| 346 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 347 | static void flush_iotlb_page(struct omap_iommu *obj, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 348 | { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 349 | int i; |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 350 | struct cr_regs cr; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 351 | |
| 352 | clk_enable(obj->clk); |
| 353 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 354 | for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 355 | u32 start; |
| 356 | size_t bytes; |
| 357 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 358 | if (!iotlb_cr_valid(&cr)) |
| 359 | continue; |
| 360 | |
| 361 | start = iotlb_cr_to_virt(&cr); |
| 362 | bytes = iopgsz_to_bytes(cr.cam & 3); |
| 363 | |
| 364 | if ((start <= da) && (da < start + bytes)) { |
| 365 | dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", |
| 366 | __func__, start, da, bytes); |
Hari Kanigeri | 0fa035e | 2010-08-20 13:50:18 +0000 | [diff] [blame] | 367 | iotlb_load_cr(obj, &cr); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 368 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); |
| 369 | } |
| 370 | } |
| 371 | clk_disable(obj->clk); |
| 372 | |
| 373 | if (i == obj->nr_tlb_entries) |
| 374 | dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da); |
| 375 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 376 | |
| 377 | /** |
| 378 | * flush_iotlb_all - Clear all iommu tlb entries |
| 379 | * @obj: target iommu |
| 380 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 381 | static void flush_iotlb_all(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 382 | { |
| 383 | struct iotlb_lock l; |
| 384 | |
| 385 | clk_enable(obj->clk); |
| 386 | |
| 387 | l.base = 0; |
| 388 | l.vict = 0; |
| 389 | iotlb_lock_set(obj, &l); |
| 390 | |
| 391 | iommu_write_reg(obj, 1, MMU_GFLUSH); |
| 392 | |
| 393 | clk_disable(obj->clk); |
| 394 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 395 | |
Arnd Bergmann | e4efd94 | 2011-10-02 14:34:05 -0400 | [diff] [blame] | 396 | #if defined(CONFIG_OMAP_IOMMU_DEBUG) || defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) |
Kanigeri, Hari | ddfa975 | 2010-05-24 02:01:51 +0000 | [diff] [blame] | 397 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 398 | ssize_t omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t bytes) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 399 | { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 400 | if (!obj || !buf) |
| 401 | return -EINVAL; |
| 402 | |
| 403 | clk_enable(obj->clk); |
| 404 | |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 405 | bytes = arch_iommu->dump_ctx(obj, buf, bytes); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 406 | |
| 407 | clk_disable(obj->clk); |
| 408 | |
| 409 | return bytes; |
| 410 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 411 | EXPORT_SYMBOL_GPL(omap_iommu_dump_ctx); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 412 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 413 | static int |
| 414 | __dump_tlb_entries(struct omap_iommu *obj, struct cr_regs *crs, int num) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 415 | { |
| 416 | int i; |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 417 | struct iotlb_lock saved; |
| 418 | struct cr_regs tmp; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 419 | struct cr_regs *p = crs; |
| 420 | |
| 421 | clk_enable(obj->clk); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 422 | iotlb_lock_get(obj, &saved); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 423 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 424 | for_each_iotlb_cr(obj, num, i, tmp) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 425 | if (!iotlb_cr_valid(&tmp)) |
| 426 | continue; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 427 | *p++ = tmp; |
| 428 | } |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 429 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 430 | iotlb_lock_set(obj, &saved); |
| 431 | clk_disable(obj->clk); |
| 432 | |
| 433 | return p - crs; |
| 434 | } |
| 435 | |
| 436 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 437 | * omap_dump_tlb_entries - dump cr arrays to given buffer |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 438 | * @obj: target iommu |
| 439 | * @buf: output buffer |
| 440 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 441 | size_t omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t bytes) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 442 | { |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 443 | int i, num; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 444 | struct cr_regs *cr; |
| 445 | char *p = buf; |
| 446 | |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 447 | num = bytes / sizeof(*cr); |
| 448 | num = min(obj->nr_tlb_entries, num); |
| 449 | |
| 450 | cr = kcalloc(num, sizeof(*cr), GFP_KERNEL); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 451 | if (!cr) |
| 452 | return 0; |
| 453 | |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 454 | num = __dump_tlb_entries(obj, cr, num); |
| 455 | for (i = 0; i < num; i++) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 456 | p += iotlb_dump_cr(obj, cr + i, p); |
| 457 | kfree(cr); |
| 458 | |
| 459 | return p - buf; |
| 460 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 461 | EXPORT_SYMBOL_GPL(omap_dump_tlb_entries); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 462 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 463 | int omap_foreach_iommu_device(void *data, int (*fn)(struct device *, void *)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 464 | { |
| 465 | return driver_for_each_device(&omap_iommu_driver.driver, |
| 466 | NULL, data, fn); |
| 467 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 468 | EXPORT_SYMBOL_GPL(omap_foreach_iommu_device); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 469 | |
| 470 | #endif /* CONFIG_OMAP_IOMMU_DEBUG_MODULE */ |
| 471 | |
| 472 | /* |
| 473 | * H/W pagetable operations |
| 474 | */ |
| 475 | static void flush_iopgd_range(u32 *first, u32 *last) |
| 476 | { |
| 477 | /* FIXME: L2 cache should be taken care of if it exists */ |
| 478 | do { |
| 479 | asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd" |
| 480 | : : "r" (first)); |
| 481 | first += L1_CACHE_BYTES / sizeof(*first); |
| 482 | } while (first <= last); |
| 483 | } |
| 484 | |
| 485 | static void flush_iopte_range(u32 *first, u32 *last) |
| 486 | { |
| 487 | /* FIXME: L2 cache should be taken care of if it exists */ |
| 488 | do { |
| 489 | asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte" |
| 490 | : : "r" (first)); |
| 491 | first += L1_CACHE_BYTES / sizeof(*first); |
| 492 | } while (first <= last); |
| 493 | } |
| 494 | |
| 495 | static void iopte_free(u32 *iopte) |
| 496 | { |
| 497 | /* Note: freed iopte's must be clean ready for re-use */ |
| 498 | kmem_cache_free(iopte_cachep, iopte); |
| 499 | } |
| 500 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 501 | static u32 *iopte_alloc(struct omap_iommu *obj, u32 *iopgd, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 502 | { |
| 503 | u32 *iopte; |
| 504 | |
| 505 | /* a table has already existed */ |
| 506 | if (*iopgd) |
| 507 | goto pte_ready; |
| 508 | |
| 509 | /* |
| 510 | * do the allocation outside the page table lock |
| 511 | */ |
| 512 | spin_unlock(&obj->page_table_lock); |
| 513 | iopte = kmem_cache_zalloc(iopte_cachep, GFP_KERNEL); |
| 514 | spin_lock(&obj->page_table_lock); |
| 515 | |
| 516 | if (!*iopgd) { |
| 517 | if (!iopte) |
| 518 | return ERR_PTR(-ENOMEM); |
| 519 | |
| 520 | *iopgd = virt_to_phys(iopte) | IOPGD_TABLE; |
| 521 | flush_iopgd_range(iopgd, iopgd); |
| 522 | |
| 523 | dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte); |
| 524 | } else { |
| 525 | /* We raced, free the reduniovant table */ |
| 526 | iopte_free(iopte); |
| 527 | } |
| 528 | |
| 529 | pte_ready: |
| 530 | iopte = iopte_offset(iopgd, da); |
| 531 | |
| 532 | dev_vdbg(obj->dev, |
| 533 | "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n", |
| 534 | __func__, da, iopgd, *iopgd, iopte, *iopte); |
| 535 | |
| 536 | return iopte; |
| 537 | } |
| 538 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 539 | static int iopgd_alloc_section(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 540 | { |
| 541 | u32 *iopgd = iopgd_offset(obj, da); |
| 542 | |
Hiroshi DOYU | 4abb761 | 2010-05-06 18:24:04 +0300 | [diff] [blame] | 543 | if ((da | pa) & ~IOSECTION_MASK) { |
| 544 | dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", |
| 545 | __func__, da, pa, IOSECTION_SIZE); |
| 546 | return -EINVAL; |
| 547 | } |
| 548 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 549 | *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION; |
| 550 | flush_iopgd_range(iopgd, iopgd); |
| 551 | return 0; |
| 552 | } |
| 553 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 554 | static int iopgd_alloc_super(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 555 | { |
| 556 | u32 *iopgd = iopgd_offset(obj, da); |
| 557 | int i; |
| 558 | |
Hiroshi DOYU | 4abb761 | 2010-05-06 18:24:04 +0300 | [diff] [blame] | 559 | if ((da | pa) & ~IOSUPER_MASK) { |
| 560 | dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", |
| 561 | __func__, da, pa, IOSUPER_SIZE); |
| 562 | return -EINVAL; |
| 563 | } |
| 564 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 565 | for (i = 0; i < 16; i++) |
| 566 | *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER; |
| 567 | flush_iopgd_range(iopgd, iopgd + 15); |
| 568 | return 0; |
| 569 | } |
| 570 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 571 | static int iopte_alloc_page(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 572 | { |
| 573 | u32 *iopgd = iopgd_offset(obj, da); |
| 574 | u32 *iopte = iopte_alloc(obj, iopgd, da); |
| 575 | |
| 576 | if (IS_ERR(iopte)) |
| 577 | return PTR_ERR(iopte); |
| 578 | |
| 579 | *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL; |
| 580 | flush_iopte_range(iopte, iopte); |
| 581 | |
| 582 | dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n", |
| 583 | __func__, da, pa, iopte, *iopte); |
| 584 | |
| 585 | return 0; |
| 586 | } |
| 587 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 588 | static int iopte_alloc_large(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 589 | { |
| 590 | u32 *iopgd = iopgd_offset(obj, da); |
| 591 | u32 *iopte = iopte_alloc(obj, iopgd, da); |
| 592 | int i; |
| 593 | |
Hiroshi DOYU | 4abb761 | 2010-05-06 18:24:04 +0300 | [diff] [blame] | 594 | if ((da | pa) & ~IOLARGE_MASK) { |
| 595 | dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", |
| 596 | __func__, da, pa, IOLARGE_SIZE); |
| 597 | return -EINVAL; |
| 598 | } |
| 599 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 600 | if (IS_ERR(iopte)) |
| 601 | return PTR_ERR(iopte); |
| 602 | |
| 603 | for (i = 0; i < 16; i++) |
| 604 | *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE; |
| 605 | flush_iopte_range(iopte, iopte + 15); |
| 606 | return 0; |
| 607 | } |
| 608 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 609 | static int |
| 610 | iopgtable_store_entry_core(struct omap_iommu *obj, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 611 | { |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 612 | int (*fn)(struct omap_iommu *, u32, u32, u32); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 613 | u32 prot; |
| 614 | int err; |
| 615 | |
| 616 | if (!obj || !e) |
| 617 | return -EINVAL; |
| 618 | |
| 619 | switch (e->pgsz) { |
| 620 | case MMU_CAM_PGSZ_16M: |
| 621 | fn = iopgd_alloc_super; |
| 622 | break; |
| 623 | case MMU_CAM_PGSZ_1M: |
| 624 | fn = iopgd_alloc_section; |
| 625 | break; |
| 626 | case MMU_CAM_PGSZ_64K: |
| 627 | fn = iopte_alloc_large; |
| 628 | break; |
| 629 | case MMU_CAM_PGSZ_4K: |
| 630 | fn = iopte_alloc_page; |
| 631 | break; |
| 632 | default: |
| 633 | fn = NULL; |
| 634 | BUG(); |
| 635 | break; |
| 636 | } |
| 637 | |
| 638 | prot = get_iopte_attr(e); |
| 639 | |
| 640 | spin_lock(&obj->page_table_lock); |
| 641 | err = fn(obj, e->da, e->pa, prot); |
| 642 | spin_unlock(&obj->page_table_lock); |
| 643 | |
| 644 | return err; |
| 645 | } |
| 646 | |
| 647 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 648 | * omap_iopgtable_store_entry - Make an iommu pte entry |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 649 | * @obj: target iommu |
| 650 | * @e: an iommu tlb entry info |
| 651 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 652 | int omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 653 | { |
| 654 | int err; |
| 655 | |
| 656 | flush_iotlb_page(obj, e->da); |
| 657 | err = iopgtable_store_entry_core(obj, e); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 658 | if (!err) |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 659 | prefetch_iotlb_entry(obj, e); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 660 | return err; |
| 661 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 662 | EXPORT_SYMBOL_GPL(omap_iopgtable_store_entry); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 663 | |
| 664 | /** |
| 665 | * iopgtable_lookup_entry - Lookup an iommu pte entry |
| 666 | * @obj: target iommu |
| 667 | * @da: iommu device virtual address |
| 668 | * @ppgd: iommu pgd entry pointer to be returned |
| 669 | * @ppte: iommu pte entry pointer to be returned |
| 670 | **/ |
Ohad Ben-Cohen | e1f2381 | 2011-08-16 14:58:14 +0300 | [diff] [blame] | 671 | static void |
| 672 | iopgtable_lookup_entry(struct omap_iommu *obj, u32 da, u32 **ppgd, u32 **ppte) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 673 | { |
| 674 | u32 *iopgd, *iopte = NULL; |
| 675 | |
| 676 | iopgd = iopgd_offset(obj, da); |
| 677 | if (!*iopgd) |
| 678 | goto out; |
| 679 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 680 | if (iopgd_is_table(*iopgd)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 681 | iopte = iopte_offset(iopgd, da); |
| 682 | out: |
| 683 | *ppgd = iopgd; |
| 684 | *ppte = iopte; |
| 685 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 686 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 687 | static size_t iopgtable_clear_entry_core(struct omap_iommu *obj, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 688 | { |
| 689 | size_t bytes; |
| 690 | u32 *iopgd = iopgd_offset(obj, da); |
| 691 | int nent = 1; |
| 692 | |
| 693 | if (!*iopgd) |
| 694 | return 0; |
| 695 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 696 | if (iopgd_is_table(*iopgd)) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 697 | int i; |
| 698 | u32 *iopte = iopte_offset(iopgd, da); |
| 699 | |
| 700 | bytes = IOPTE_SIZE; |
| 701 | if (*iopte & IOPTE_LARGE) { |
| 702 | nent *= 16; |
| 703 | /* rewind to the 1st entry */ |
Hiroshi DOYU | c127c7d | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 704 | iopte = iopte_offset(iopgd, (da & IOLARGE_MASK)); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 705 | } |
| 706 | bytes *= nent; |
| 707 | memset(iopte, 0, nent * sizeof(*iopte)); |
| 708 | flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte)); |
| 709 | |
| 710 | /* |
| 711 | * do table walk to check if this table is necessary or not |
| 712 | */ |
| 713 | iopte = iopte_offset(iopgd, 0); |
| 714 | for (i = 0; i < PTRS_PER_IOPTE; i++) |
| 715 | if (iopte[i]) |
| 716 | goto out; |
| 717 | |
| 718 | iopte_free(iopte); |
| 719 | nent = 1; /* for the next L1 entry */ |
| 720 | } else { |
| 721 | bytes = IOPGD_SIZE; |
Hiroshi DOYU | dcc730d | 2009-10-22 14:46:32 -0700 | [diff] [blame] | 722 | if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 723 | nent *= 16; |
| 724 | /* rewind to the 1st entry */ |
Hiroshi DOYU | 8d33ea5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 725 | iopgd = iopgd_offset(obj, (da & IOSUPER_MASK)); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 726 | } |
| 727 | bytes *= nent; |
| 728 | } |
| 729 | memset(iopgd, 0, nent * sizeof(*iopgd)); |
| 730 | flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd)); |
| 731 | out: |
| 732 | return bytes; |
| 733 | } |
| 734 | |
| 735 | /** |
| 736 | * iopgtable_clear_entry - Remove an iommu pte entry |
| 737 | * @obj: target iommu |
| 738 | * @da: iommu device virtual address |
| 739 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 740 | static size_t iopgtable_clear_entry(struct omap_iommu *obj, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 741 | { |
| 742 | size_t bytes; |
| 743 | |
| 744 | spin_lock(&obj->page_table_lock); |
| 745 | |
| 746 | bytes = iopgtable_clear_entry_core(obj, da); |
| 747 | flush_iotlb_page(obj, da); |
| 748 | |
| 749 | spin_unlock(&obj->page_table_lock); |
| 750 | |
| 751 | return bytes; |
| 752 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 753 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 754 | static void iopgtable_clear_entry_all(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 755 | { |
| 756 | int i; |
| 757 | |
| 758 | spin_lock(&obj->page_table_lock); |
| 759 | |
| 760 | for (i = 0; i < PTRS_PER_IOPGD; i++) { |
| 761 | u32 da; |
| 762 | u32 *iopgd; |
| 763 | |
| 764 | da = i << IOPGD_SHIFT; |
| 765 | iopgd = iopgd_offset(obj, da); |
| 766 | |
| 767 | if (!*iopgd) |
| 768 | continue; |
| 769 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 770 | if (iopgd_is_table(*iopgd)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 771 | iopte_free(iopte_offset(iopgd, 0)); |
| 772 | |
| 773 | *iopgd = 0; |
| 774 | flush_iopgd_range(iopgd, iopgd); |
| 775 | } |
| 776 | |
| 777 | flush_iotlb_all(obj); |
| 778 | |
| 779 | spin_unlock(&obj->page_table_lock); |
| 780 | } |
| 781 | |
| 782 | /* |
| 783 | * Device IOMMU generic operations |
| 784 | */ |
| 785 | static irqreturn_t iommu_fault_handler(int irq, void *data) |
| 786 | { |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 787 | u32 da, errs; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 788 | u32 *iopgd, *iopte; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 789 | struct omap_iommu *obj = data; |
Ohad Ben-Cohen | e7f10f0 | 2011-09-13 15:26:29 -0400 | [diff] [blame] | 790 | struct iommu_domain *domain = obj->domain; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 791 | |
| 792 | if (!obj->refcount) |
| 793 | return IRQ_NONE; |
| 794 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 795 | clk_enable(obj->clk); |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 796 | errs = iommu_report_fault(obj, &da); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 797 | clk_disable(obj->clk); |
Laurent Pinchart | c56b2dd | 2011-05-10 16:56:46 +0200 | [diff] [blame] | 798 | if (errs == 0) |
| 799 | return IRQ_HANDLED; |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 800 | |
| 801 | /* Fault callback or TLB/PTE Dynamic loading */ |
Ohad Ben-Cohen | e7f10f0 | 2011-09-13 15:26:29 -0400 | [diff] [blame] | 802 | if (!report_iommu_fault(domain, obj->dev, da, 0)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 803 | return IRQ_HANDLED; |
| 804 | |
Hiroshi DOYU | 37b2981 | 2010-05-24 02:01:52 +0000 | [diff] [blame] | 805 | iommu_disable(obj); |
| 806 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 807 | iopgd = iopgd_offset(obj, da); |
| 808 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 809 | if (!iopgd_is_table(*iopgd)) { |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 810 | dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p " |
| 811 | "*pgd:px%08x\n", obj->name, errs, da, iopgd, *iopgd); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 812 | return IRQ_NONE; |
| 813 | } |
| 814 | |
| 815 | iopte = iopte_offset(iopgd, da); |
| 816 | |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 817 | dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x " |
| 818 | "pte:0x%p *pte:0x%08x\n", obj->name, errs, da, iopgd, *iopgd, |
| 819 | iopte, *iopte); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 820 | |
| 821 | return IRQ_NONE; |
| 822 | } |
| 823 | |
| 824 | static int device_match_by_alias(struct device *dev, void *data) |
| 825 | { |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 826 | struct omap_iommu *obj = to_iommu(dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 827 | const char *name = data; |
| 828 | |
| 829 | pr_debug("%s: %s %s\n", __func__, obj->name, name); |
| 830 | |
| 831 | return strcmp(obj->name, name) == 0; |
| 832 | } |
| 833 | |
| 834 | /** |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 835 | * omap_iommu_attach() - attach iommu device to an iommu domain |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 836 | * @name: name of target omap iommu device |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 837 | * @iopgd: page table |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 838 | **/ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 839 | static struct omap_iommu *omap_iommu_attach(const char *name, u32 *iopgd) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 840 | { |
| 841 | int err = -ENOMEM; |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 842 | struct device *dev; |
| 843 | struct omap_iommu *obj; |
| 844 | |
| 845 | dev = driver_find_device(&omap_iommu_driver.driver, NULL, |
| 846 | (void *)name, |
| 847 | device_match_by_alias); |
| 848 | if (!dev) |
| 849 | return NULL; |
| 850 | |
| 851 | obj = to_iommu(dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 852 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 853 | spin_lock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 854 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 855 | /* an iommu device can only be attached once */ |
| 856 | if (++obj->refcount > 1) { |
| 857 | dev_err(dev, "%s: already attached!\n", obj->name); |
| 858 | err = -EBUSY; |
| 859 | goto err_enable; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 860 | } |
| 861 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 862 | obj->iopgd = iopgd; |
| 863 | err = iommu_enable(obj); |
| 864 | if (err) |
| 865 | goto err_enable; |
| 866 | flush_iotlb_all(obj); |
| 867 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 868 | if (!try_module_get(obj->owner)) |
| 869 | goto err_module; |
| 870 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 871 | spin_unlock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 872 | |
| 873 | dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); |
| 874 | return obj; |
| 875 | |
| 876 | err_module: |
| 877 | if (obj->refcount == 1) |
| 878 | iommu_disable(obj); |
| 879 | err_enable: |
| 880 | obj->refcount--; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 881 | spin_unlock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 882 | return ERR_PTR(err); |
| 883 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 884 | |
| 885 | /** |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 886 | * omap_iommu_detach - release iommu device |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 887 | * @obj: target iommu |
| 888 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 889 | static void omap_iommu_detach(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 890 | { |
Roel Kluin | acf9d46 | 2010-01-08 10:29:05 -0800 | [diff] [blame] | 891 | if (!obj || IS_ERR(obj)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 892 | return; |
| 893 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 894 | spin_lock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 895 | |
| 896 | if (--obj->refcount == 0) |
| 897 | iommu_disable(obj); |
| 898 | |
| 899 | module_put(obj->owner); |
| 900 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 901 | obj->iopgd = NULL; |
| 902 | |
| 903 | spin_unlock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 904 | |
| 905 | dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); |
| 906 | } |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 907 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 908 | /* |
| 909 | * OMAP Device MMU(IOMMU) detection |
| 910 | */ |
| 911 | static int __devinit omap_iommu_probe(struct platform_device *pdev) |
| 912 | { |
| 913 | int err = -ENODEV; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 914 | int irq; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 915 | struct omap_iommu *obj; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 916 | struct resource *res; |
| 917 | struct iommu_platform_data *pdata = pdev->dev.platform_data; |
| 918 | |
| 919 | if (pdev->num_resources != 2) |
| 920 | return -EINVAL; |
| 921 | |
| 922 | obj = kzalloc(sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL); |
| 923 | if (!obj) |
| 924 | return -ENOMEM; |
| 925 | |
| 926 | obj->clk = clk_get(&pdev->dev, pdata->clk_name); |
| 927 | if (IS_ERR(obj->clk)) |
| 928 | goto err_clk; |
| 929 | |
| 930 | obj->nr_tlb_entries = pdata->nr_tlb_entries; |
| 931 | obj->name = pdata->name; |
| 932 | obj->dev = &pdev->dev; |
| 933 | obj->ctx = (void *)obj + sizeof(*obj); |
Guzman Lugo, Fernando | c7f4ab2 | 2010-12-15 00:54:03 +0000 | [diff] [blame] | 934 | obj->da_start = pdata->da_start; |
| 935 | obj->da_end = pdata->da_end; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 936 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 937 | spin_lock_init(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 938 | mutex_init(&obj->mmap_lock); |
| 939 | spin_lock_init(&obj->page_table_lock); |
| 940 | INIT_LIST_HEAD(&obj->mmap); |
| 941 | |
| 942 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 943 | if (!res) { |
| 944 | err = -ENODEV; |
| 945 | goto err_mem; |
| 946 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 947 | |
| 948 | res = request_mem_region(res->start, resource_size(res), |
| 949 | dev_name(&pdev->dev)); |
| 950 | if (!res) { |
| 951 | err = -EIO; |
| 952 | goto err_mem; |
| 953 | } |
| 954 | |
Aaro Koskinen | da4a0f7 | 2011-03-14 12:28:32 +0000 | [diff] [blame] | 955 | obj->regbase = ioremap(res->start, resource_size(res)); |
| 956 | if (!obj->regbase) { |
| 957 | err = -ENOMEM; |
| 958 | goto err_ioremap; |
| 959 | } |
| 960 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 961 | irq = platform_get_irq(pdev, 0); |
| 962 | if (irq < 0) { |
| 963 | err = -ENODEV; |
| 964 | goto err_irq; |
| 965 | } |
| 966 | err = request_irq(irq, iommu_fault_handler, IRQF_SHARED, |
| 967 | dev_name(&pdev->dev), obj); |
| 968 | if (err < 0) |
| 969 | goto err_irq; |
| 970 | platform_set_drvdata(pdev, obj); |
| 971 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 972 | dev_info(&pdev->dev, "%s registered\n", obj->name); |
| 973 | return 0; |
| 974 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 975 | err_irq: |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 976 | iounmap(obj->regbase); |
Aaro Koskinen | da4a0f7 | 2011-03-14 12:28:32 +0000 | [diff] [blame] | 977 | err_ioremap: |
| 978 | release_mem_region(res->start, resource_size(res)); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 979 | err_mem: |
| 980 | clk_put(obj->clk); |
| 981 | err_clk: |
| 982 | kfree(obj); |
| 983 | return err; |
| 984 | } |
| 985 | |
| 986 | static int __devexit omap_iommu_remove(struct platform_device *pdev) |
| 987 | { |
| 988 | int irq; |
| 989 | struct resource *res; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 990 | struct omap_iommu *obj = platform_get_drvdata(pdev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 991 | |
| 992 | platform_set_drvdata(pdev, NULL); |
| 993 | |
| 994 | iopgtable_clear_entry_all(obj); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 995 | |
| 996 | irq = platform_get_irq(pdev, 0); |
| 997 | free_irq(irq, obj); |
| 998 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 999 | release_mem_region(res->start, resource_size(res)); |
| 1000 | iounmap(obj->regbase); |
| 1001 | |
| 1002 | clk_put(obj->clk); |
| 1003 | dev_info(&pdev->dev, "%s removed\n", obj->name); |
| 1004 | kfree(obj); |
| 1005 | return 0; |
| 1006 | } |
| 1007 | |
| 1008 | static struct platform_driver omap_iommu_driver = { |
| 1009 | .probe = omap_iommu_probe, |
| 1010 | .remove = __devexit_p(omap_iommu_remove), |
| 1011 | .driver = { |
| 1012 | .name = "omap-iommu", |
| 1013 | }, |
| 1014 | }; |
| 1015 | |
| 1016 | static void iopte_cachep_ctor(void *iopte) |
| 1017 | { |
| 1018 | clean_dcache_area(iopte, IOPTE_TABLE_SIZE); |
| 1019 | } |
| 1020 | |
Tony Lindgren | ed1c7de | 2012-11-02 12:24:06 -0700 | [diff] [blame^] | 1021 | static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, |
| 1022 | u32 flags) |
| 1023 | { |
| 1024 | memset(e, 0, sizeof(*e)); |
| 1025 | |
| 1026 | e->da = da; |
| 1027 | e->pa = pa; |
| 1028 | e->valid = 1; |
| 1029 | /* FIXME: add OMAP1 support */ |
| 1030 | e->pgsz = flags & MMU_CAM_PGSZ_MASK; |
| 1031 | e->endian = flags & MMU_RAM_ENDIAN_MASK; |
| 1032 | e->elsz = flags & MMU_RAM_ELSZ_MASK; |
| 1033 | e->mixed = flags & MMU_RAM_MIXED_MASK; |
| 1034 | |
| 1035 | return iopgsz_to_bytes(e->pgsz); |
| 1036 | } |
| 1037 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1038 | static int omap_iommu_map(struct iommu_domain *domain, unsigned long da, |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1039 | phys_addr_t pa, size_t bytes, int prot) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1040 | { |
| 1041 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1042 | struct omap_iommu *oiommu = omap_domain->iommu_dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1043 | struct device *dev = oiommu->dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1044 | struct iotlb_entry e; |
| 1045 | int omap_pgsz; |
| 1046 | u32 ret, flags; |
| 1047 | |
| 1048 | /* we only support mapping a single iommu page for now */ |
| 1049 | omap_pgsz = bytes_to_iopgsz(bytes); |
| 1050 | if (omap_pgsz < 0) { |
| 1051 | dev_err(dev, "invalid size to map: %d\n", bytes); |
| 1052 | return -EINVAL; |
| 1053 | } |
| 1054 | |
| 1055 | dev_dbg(dev, "mapping da 0x%lx to pa 0x%x size 0x%x\n", da, pa, bytes); |
| 1056 | |
| 1057 | flags = omap_pgsz | prot; |
| 1058 | |
| 1059 | iotlb_init_entry(&e, da, pa, flags); |
| 1060 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1061 | ret = omap_iopgtable_store_entry(oiommu, &e); |
Ohad Ben-Cohen | b4550d4 | 2011-09-02 13:32:31 -0400 | [diff] [blame] | 1062 | if (ret) |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1063 | dev_err(dev, "omap_iopgtable_store_entry failed: %d\n", ret); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1064 | |
Ohad Ben-Cohen | b4550d4 | 2011-09-02 13:32:31 -0400 | [diff] [blame] | 1065 | return ret; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1066 | } |
| 1067 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1068 | static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da, |
| 1069 | size_t size) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1070 | { |
| 1071 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1072 | struct omap_iommu *oiommu = omap_domain->iommu_dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1073 | struct device *dev = oiommu->dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1074 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1075 | dev_dbg(dev, "unmapping da 0x%lx size %u\n", da, size); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1076 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1077 | return iopgtable_clear_entry(oiommu, da); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1078 | } |
| 1079 | |
| 1080 | static int |
| 1081 | omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) |
| 1082 | { |
| 1083 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1084 | struct omap_iommu *oiommu; |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1085 | struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1086 | int ret = 0; |
| 1087 | |
| 1088 | spin_lock(&omap_domain->lock); |
| 1089 | |
| 1090 | /* only a single device is supported per domain for now */ |
| 1091 | if (omap_domain->iommu_dev) { |
| 1092 | dev_err(dev, "iommu domain is already attached\n"); |
| 1093 | ret = -EBUSY; |
| 1094 | goto out; |
| 1095 | } |
| 1096 | |
| 1097 | /* get a handle to and enable the omap iommu */ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1098 | oiommu = omap_iommu_attach(arch_data->name, omap_domain->pgtable); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1099 | if (IS_ERR(oiommu)) { |
| 1100 | ret = PTR_ERR(oiommu); |
| 1101 | dev_err(dev, "can't get omap iommu: %d\n", ret); |
| 1102 | goto out; |
| 1103 | } |
| 1104 | |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1105 | omap_domain->iommu_dev = arch_data->iommu_dev = oiommu; |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1106 | omap_domain->dev = dev; |
Ohad Ben-Cohen | e7f10f0 | 2011-09-13 15:26:29 -0400 | [diff] [blame] | 1107 | oiommu->domain = domain; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1108 | |
| 1109 | out: |
| 1110 | spin_unlock(&omap_domain->lock); |
| 1111 | return ret; |
| 1112 | } |
| 1113 | |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1114 | static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain, |
| 1115 | struct device *dev) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1116 | { |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1117 | struct omap_iommu *oiommu = dev_to_omap_iommu(dev); |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1118 | struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1119 | |
| 1120 | /* only a single device is supported per domain for now */ |
| 1121 | if (omap_domain->iommu_dev != oiommu) { |
| 1122 | dev_err(dev, "invalid iommu device\n"); |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1123 | return; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1124 | } |
| 1125 | |
| 1126 | iopgtable_clear_entry_all(oiommu); |
| 1127 | |
| 1128 | omap_iommu_detach(oiommu); |
| 1129 | |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1130 | omap_domain->iommu_dev = arch_data->iommu_dev = NULL; |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1131 | omap_domain->dev = NULL; |
| 1132 | } |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1133 | |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1134 | static void omap_iommu_detach_dev(struct iommu_domain *domain, |
| 1135 | struct device *dev) |
| 1136 | { |
| 1137 | struct omap_iommu_domain *omap_domain = domain->priv; |
| 1138 | |
| 1139 | spin_lock(&omap_domain->lock); |
| 1140 | _omap_iommu_detach_dev(omap_domain, dev); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1141 | spin_unlock(&omap_domain->lock); |
| 1142 | } |
| 1143 | |
| 1144 | static int omap_iommu_domain_init(struct iommu_domain *domain) |
| 1145 | { |
| 1146 | struct omap_iommu_domain *omap_domain; |
| 1147 | |
| 1148 | omap_domain = kzalloc(sizeof(*omap_domain), GFP_KERNEL); |
| 1149 | if (!omap_domain) { |
| 1150 | pr_err("kzalloc failed\n"); |
| 1151 | goto out; |
| 1152 | } |
| 1153 | |
| 1154 | omap_domain->pgtable = kzalloc(IOPGD_TABLE_SIZE, GFP_KERNEL); |
| 1155 | if (!omap_domain->pgtable) { |
| 1156 | pr_err("kzalloc failed\n"); |
| 1157 | goto fail_nomem; |
| 1158 | } |
| 1159 | |
| 1160 | /* |
| 1161 | * should never fail, but please keep this around to ensure |
| 1162 | * we keep the hardware happy |
| 1163 | */ |
| 1164 | BUG_ON(!IS_ALIGNED((long)omap_domain->pgtable, IOPGD_TABLE_SIZE)); |
| 1165 | |
| 1166 | clean_dcache_area(omap_domain->pgtable, IOPGD_TABLE_SIZE); |
| 1167 | spin_lock_init(&omap_domain->lock); |
| 1168 | |
| 1169 | domain->priv = omap_domain; |
| 1170 | |
Joerg Roedel | 2c6edb0 | 2012-01-26 19:40:55 +0100 | [diff] [blame] | 1171 | domain->geometry.aperture_start = 0; |
| 1172 | domain->geometry.aperture_end = (1ULL << 32) - 1; |
| 1173 | domain->geometry.force_aperture = true; |
| 1174 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1175 | return 0; |
| 1176 | |
| 1177 | fail_nomem: |
| 1178 | kfree(omap_domain); |
| 1179 | out: |
| 1180 | return -ENOMEM; |
| 1181 | } |
| 1182 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1183 | static void omap_iommu_domain_destroy(struct iommu_domain *domain) |
| 1184 | { |
| 1185 | struct omap_iommu_domain *omap_domain = domain->priv; |
| 1186 | |
| 1187 | domain->priv = NULL; |
| 1188 | |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1189 | /* |
| 1190 | * An iommu device is still attached |
| 1191 | * (currently, only one device can be attached) ? |
| 1192 | */ |
| 1193 | if (omap_domain->iommu_dev) |
| 1194 | _omap_iommu_detach_dev(omap_domain, omap_domain->dev); |
| 1195 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1196 | kfree(omap_domain->pgtable); |
| 1197 | kfree(omap_domain); |
| 1198 | } |
| 1199 | |
| 1200 | static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain, |
| 1201 | unsigned long da) |
| 1202 | { |
| 1203 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1204 | struct omap_iommu *oiommu = omap_domain->iommu_dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1205 | struct device *dev = oiommu->dev; |
| 1206 | u32 *pgd, *pte; |
| 1207 | phys_addr_t ret = 0; |
| 1208 | |
| 1209 | iopgtable_lookup_entry(oiommu, da, &pgd, &pte); |
| 1210 | |
| 1211 | if (pte) { |
| 1212 | if (iopte_is_small(*pte)) |
| 1213 | ret = omap_iommu_translate(*pte, da, IOPTE_MASK); |
| 1214 | else if (iopte_is_large(*pte)) |
| 1215 | ret = omap_iommu_translate(*pte, da, IOLARGE_MASK); |
| 1216 | else |
Ohad Ben-Cohen | 1a36ea8 | 2011-12-06 15:22:10 +0200 | [diff] [blame] | 1217 | dev_err(dev, "bogus pte 0x%x, da 0x%lx", *pte, da); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1218 | } else { |
| 1219 | if (iopgd_is_section(*pgd)) |
| 1220 | ret = omap_iommu_translate(*pgd, da, IOSECTION_MASK); |
| 1221 | else if (iopgd_is_super(*pgd)) |
| 1222 | ret = omap_iommu_translate(*pgd, da, IOSUPER_MASK); |
| 1223 | else |
Ohad Ben-Cohen | 1a36ea8 | 2011-12-06 15:22:10 +0200 | [diff] [blame] | 1224 | dev_err(dev, "bogus pgd 0x%x, da 0x%lx", *pgd, da); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1225 | } |
| 1226 | |
| 1227 | return ret; |
| 1228 | } |
| 1229 | |
| 1230 | static int omap_iommu_domain_has_cap(struct iommu_domain *domain, |
| 1231 | unsigned long cap) |
| 1232 | { |
| 1233 | return 0; |
| 1234 | } |
| 1235 | |
| 1236 | static struct iommu_ops omap_iommu_ops = { |
| 1237 | .domain_init = omap_iommu_domain_init, |
| 1238 | .domain_destroy = omap_iommu_domain_destroy, |
| 1239 | .attach_dev = omap_iommu_attach_dev, |
| 1240 | .detach_dev = omap_iommu_detach_dev, |
| 1241 | .map = omap_iommu_map, |
| 1242 | .unmap = omap_iommu_unmap, |
| 1243 | .iova_to_phys = omap_iommu_iova_to_phys, |
| 1244 | .domain_has_cap = omap_iommu_domain_has_cap, |
Ohad Ben-Cohen | 66bc8cf | 2011-11-10 11:32:27 +0200 | [diff] [blame] | 1245 | .pgsize_bitmap = OMAP_IOMMU_PGSIZES, |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1246 | }; |
| 1247 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1248 | static int __init omap_iommu_init(void) |
| 1249 | { |
| 1250 | struct kmem_cache *p; |
| 1251 | const unsigned long flags = SLAB_HWCACHE_ALIGN; |
| 1252 | size_t align = 1 << 10; /* L2 pagetable alignement */ |
| 1253 | |
| 1254 | p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags, |
| 1255 | iopte_cachep_ctor); |
| 1256 | if (!p) |
| 1257 | return -ENOMEM; |
| 1258 | iopte_cachep = p; |
| 1259 | |
Joerg Roedel | a65bc64 | 2011-09-06 17:56:07 +0200 | [diff] [blame] | 1260 | bus_set_iommu(&platform_bus_type, &omap_iommu_ops); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1261 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1262 | return platform_driver_register(&omap_iommu_driver); |
| 1263 | } |
Ohad Ben-Cohen | 435792d | 2012-02-26 12:14:14 +0200 | [diff] [blame] | 1264 | /* must be ready before omap3isp is probed */ |
| 1265 | subsys_initcall(omap_iommu_init); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1266 | |
| 1267 | static void __exit omap_iommu_exit(void) |
| 1268 | { |
| 1269 | kmem_cache_destroy(iopte_cachep); |
| 1270 | |
| 1271 | platform_driver_unregister(&omap_iommu_driver); |
| 1272 | } |
| 1273 | module_exit(omap_iommu_exit); |
| 1274 | |
| 1275 | MODULE_DESCRIPTION("omap iommu: tlb and pagetable primitives"); |
| 1276 | MODULE_ALIAS("platform:omap-iommu"); |
| 1277 | MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi"); |
| 1278 | MODULE_LICENSE("GPL v2"); |