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Balaji T Ke8deb282009-12-14 00:25:31 +01001/*
2 * twl6030-irq.c - TWL6030 irq support
3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 *
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
8 *
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
11 *
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
14 *
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 */
33
34#include <linux/init.h>
Paul Gortmaker5d4a3572011-07-10 12:41:10 -040035#include <linux/export.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010036#include <linux/interrupt.h>
37#include <linux/irq.h>
38#include <linux/kthread.h>
39#include <linux/i2c/twl.h>
kishore kadiyala72f2e2c2010-09-24 17:13:20 +000040#include <linux/platform_device.h>
Todd Poynorab2b9262011-10-04 11:52:29 +020041#include <linux/suspend.h>
Benoit Cousson78518ff2012-02-29 19:40:31 +010042#include <linux/of.h>
43#include <linux/irqdomain.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010044
G, Manjunath Kondaiahb0b4a7c2010-10-19 11:02:48 +020045#include "twl-core.h"
46
Balaji T Ke8deb282009-12-14 00:25:31 +010047/*
48 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
49 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
50 * It exposes status bits saying who has raised an interrupt. There are
51 * three mask registers that corresponds to these status registers, that
52 * enables/disables these interrupts.
53 *
54 * We set up IRQs starting at a platform-specified base. An interrupt map table,
55 * specifies mapping between interrupt number and the associated module.
56 *
57 */
Benoit Cousson78518ff2012-02-29 19:40:31 +010058#define TWL6030_NR_IRQS 20
Balaji T Ke8deb282009-12-14 00:25:31 +010059
60static int twl6030_interrupt_mapping[24] = {
61 PWR_INTR_OFFSET, /* Bit 0 PWRON */
62 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
63 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
64 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
65 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
66 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
67 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
68 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
69
70 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
71 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
72 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
73 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
74 RSV_INTR_OFFSET, /* Bit 12 Reserved */
75 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
76 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
77 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
78
79 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
80 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
81 USBOTG_INTR_OFFSET, /* Bit 18 ID */
Hema HK77b1d3f2010-12-10 17:55:37 +053082 USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
Balaji T Ke8deb282009-12-14 00:25:31 +010083 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
Graeme Gregory6523b142011-05-12 14:27:56 +010084 CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
85 CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
Balaji T Ke8deb282009-12-14 00:25:31 +010086 RSV_INTR_OFFSET, /* Bit 23 Reserved */
87};
88/*----------------------------------------------------------------------*/
89
90static unsigned twl6030_irq_base;
Todd Poynorab2b9262011-10-04 11:52:29 +020091static int twl_irq;
92static bool twl_irq_wake_enabled;
Balaji T Ke8deb282009-12-14 00:25:31 +010093
94static struct completion irq_event;
Todd Poynorab2b9262011-10-04 11:52:29 +020095static atomic_t twl6030_wakeirqs = ATOMIC_INIT(0);
96
97static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
98 unsigned long pm_event, void *unused)
99{
100 int chained_wakeups;
101
102 switch (pm_event) {
103 case PM_SUSPEND_PREPARE:
104 chained_wakeups = atomic_read(&twl6030_wakeirqs);
105
106 if (chained_wakeups && !twl_irq_wake_enabled) {
107 if (enable_irq_wake(twl_irq))
108 pr_err("twl6030 IRQ wake enable failed\n");
109 else
110 twl_irq_wake_enabled = true;
111 } else if (!chained_wakeups && twl_irq_wake_enabled) {
112 disable_irq_wake(twl_irq);
113 twl_irq_wake_enabled = false;
114 }
115
Todd Poynor782baa22011-09-26 16:44:24 -0700116 disable_irq(twl_irq);
Todd Poynorab2b9262011-10-04 11:52:29 +0200117 break;
Todd Poynor782baa22011-09-26 16:44:24 -0700118
119 case PM_POST_SUSPEND:
120 enable_irq(twl_irq);
121 break;
122
Todd Poynorab2b9262011-10-04 11:52:29 +0200123 default:
124 break;
125 }
126
127 return NOTIFY_DONE;
128}
129
130static struct notifier_block twl6030_irq_pm_notifier_block = {
131 .notifier_call = twl6030_irq_pm_notifier,
132};
Balaji T Ke8deb282009-12-14 00:25:31 +0100133
134/*
135 * This thread processes interrupts reported by the Primary Interrupt Handler.
136 */
137static int twl6030_irq_thread(void *data)
138{
139 long irq = (long)data;
140 static unsigned i2c_errors;
141 static const unsigned max_i2c_errors = 100;
142 int ret;
143
Balaji T Ke8deb282009-12-14 00:25:31 +0100144 while (!kthread_should_stop()) {
145 int i;
146 union {
147 u8 bytes[4];
148 u32 int_sts;
149 } sts;
150
151 /* Wait for IRQ, then read PIH irq status (also blocking) */
152 wait_for_completion_interruptible(&irq_event);
153
154 /* read INT_STS_A, B and C in one shot using a burst read */
155 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
156 REG_INT_STS_A, 3);
157 if (ret) {
158 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
159 ret);
160 if (++i2c_errors >= max_i2c_errors) {
161 printk(KERN_ERR "Maximum I2C error count"
162 " exceeded. Terminating %s.\n",
163 __func__);
164 break;
165 }
166 complete(&irq_event);
167 continue;
168 }
169
170
171
172 sts.bytes[3] = 0; /* Only 24 bits are valid*/
173
Hema HK77b1d3f2010-12-10 17:55:37 +0530174 /*
175 * Since VBUS status bit is not reliable for VBUS disconnect
176 * use CHARGER VBUS detection status bit instead.
177 */
178 if (sts.bytes[2] & 0x10)
179 sts.bytes[2] |= 0x08;
180
Balaji T Ke8deb282009-12-14 00:25:31 +0100181 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
182 local_irq_disable();
183 if (sts.int_sts & 0x1) {
184 int module_irq = twl6030_irq_base +
185 twl6030_interrupt_mapping[i];
Thomas Gleixnerc22435a32011-03-25 11:12:31 +0000186 generic_handle_irq(module_irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100187
188 }
189 local_irq_enable();
190 }
Nishanth Menon3f8349e2012-02-22 20:03:45 -0600191
192 /*
193 * NOTE:
194 * Simulation confirms that documentation is wrong w.r.t the
195 * interrupt status clear operation. A single *byte* write to
196 * any one of STS_A to STS_C register results in all three
197 * STS registers being reset. Since it does not matter which
198 * value is written, all three registers are cleared on a
199 * single byte write, so we just use 0x0 to clear.
200 */
201 ret = twl_i2c_write_u8(TWL_MODULE_PIH, 0x00, REG_INT_STS_A);
Balaji T Ke8deb282009-12-14 00:25:31 +0100202 if (ret)
203 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
204
205 enable_irq(irq);
206 }
207
208 return 0;
209}
210
211/*
212 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
213 * This is a chained interrupt, so there is no desc->action method for it.
214 * Now we need to query the interrupt controller in the twl6030 to determine
215 * which module is generating the interrupt request. However, we can't do i2c
216 * transactions in interrupt context, so we must defer that work to a kernel
217 * thread. All we do here is acknowledge and mask the interrupt and wakeup
218 * the kernel thread.
219 */
220static irqreturn_t handle_twl6030_pih(int irq, void *devid)
221{
222 disable_irq_nosync(irq);
223 complete(devid);
224 return IRQ_HANDLED;
225}
226
227/*----------------------------------------------------------------------*/
228
229static inline void activate_irq(int irq)
230{
231#ifdef CONFIG_ARM
232 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
233 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
234 */
235 set_irq_flags(irq, IRQF_VALID);
236#else
237 /* same effect on other architectures */
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000238 irq_set_noprobe(irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100239#endif
240}
241
Nishanth Menonb8b8d792012-02-22 20:03:59 -0600242static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530243{
Todd Poynorab2b9262011-10-04 11:52:29 +0200244 if (on)
245 atomic_inc(&twl6030_wakeirqs);
246 else
247 atomic_dec(&twl6030_wakeirqs);
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530248
Todd Poynorab2b9262011-10-04 11:52:29 +0200249 return 0;
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530250}
251
Balaji T Ke8deb282009-12-14 00:25:31 +0100252int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
253{
254 int ret;
255 u8 unmask_value;
256 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
257 REG_INT_STS_A + offset);
258 unmask_value &= (~(bit_mask));
259 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
260 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
261 return ret;
262}
263EXPORT_SYMBOL(twl6030_interrupt_unmask);
264
265int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
266{
267 int ret;
268 u8 mask_value;
269 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
270 REG_INT_STS_A + offset);
271 mask_value |= (bit_mask);
272 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
273 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
274 return ret;
275}
276EXPORT_SYMBOL(twl6030_interrupt_mask);
277
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000278int twl6030_mmc_card_detect_config(void)
279{
280 int ret;
281 u8 reg_val = 0;
282
283 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
284 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
285 REG_INT_MSK_LINE_B);
286 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
287 REG_INT_MSK_STS_B);
288 /*
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300289 * Initially Configuring MMC_CTRL for receiving interrupts &
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000290 * Card status on TWL6030 for MMC1
291 */
292 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
293 if (ret < 0) {
294 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
295 return ret;
296 }
297 reg_val &= ~VMMC_AUTO_OFF;
298 reg_val |= SW_FC;
299 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
300 if (ret < 0) {
301 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
302 return ret;
303 }
304
305 /* Configuring PullUp-PullDown register */
306 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
307 TWL6030_CFG_INPUT_PUPD3);
308 if (ret < 0) {
309 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
310 ret);
311 return ret;
312 }
313 reg_val &= ~(MMC_PU | MMC_PD);
314 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
315 TWL6030_CFG_INPUT_PUPD3);
316 if (ret < 0) {
317 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
318 ret);
319 return ret;
320 }
Benoit Coussonbdd61bc2012-03-02 16:15:22 +0100321
322 return twl6030_irq_base + MMCDETECT_INTR_OFFSET;
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000323}
324EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
325
326int twl6030_mmc_card_detect(struct device *dev, int slot)
327{
328 int ret = -EIO;
329 u8 read_reg = 0;
330 struct platform_device *pdev = to_platform_device(dev);
331
332 if (pdev->id) {
333 /* TWL6030 provide's Card detect support for
334 * only MMC1 controller.
335 */
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300336 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000337 return ret;
338 }
339 /*
340 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
341 * 0 - Card not present ,1 - Card present
342 */
343 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
344 TWL6030_MMCCTRL);
345 if (ret >= 0)
346 ret = read_reg & STS_MMC;
347 return ret;
348}
349EXPORT_SYMBOL(twl6030_mmc_card_detect);
350
Benoit Cousson78518ff2012-02-29 19:40:31 +0100351int twl6030_init_irq(struct device *dev, int irq_num)
Balaji T Ke8deb282009-12-14 00:25:31 +0100352{
Benoit Cousson78518ff2012-02-29 19:40:31 +0100353 struct device_node *node = dev->of_node;
354 int nr_irqs, irq_base, irq_end;
Balaji T Ke8deb282009-12-14 00:25:31 +0100355
356 int status = 0;
357 int i;
358 struct task_struct *task;
359 int ret;
360 u8 mask[4];
361
362 static struct irq_chip twl6030_irq_chip;
Benoit Cousson78518ff2012-02-29 19:40:31 +0100363
364 nr_irqs = TWL6030_NR_IRQS;
365
366 irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
367 if (IS_ERR_VALUE(irq_base)) {
368 dev_err(dev, "Fail to allocate IRQ descs\n");
369 return irq_base;
370 }
371
372 irq_domain_add_legacy(node, nr_irqs, irq_base, 0,
373 &irq_domain_simple_ops, NULL);
374
375 irq_end = irq_base + nr_irqs;
376
Balaji T Ke8deb282009-12-14 00:25:31 +0100377 mask[1] = 0xFF;
378 mask[2] = 0xFF;
379 mask[3] = 0xFF;
380 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
381 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
382 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
383 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
384 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
385 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
386
387 twl6030_irq_base = irq_base;
388
389 /* install an irq handler for each of the modules;
390 * clone dummy irq_chip since PIH can't *do* anything
391 */
392 twl6030_irq_chip = dummy_irq_chip;
393 twl6030_irq_chip.name = "twl6030";
Lennert Buytenhekc45c6852010-12-13 13:31:18 +0100394 twl6030_irq_chip.irq_set_type = NULL;
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530395 twl6030_irq_chip.irq_set_wake = twl6030_irq_set_wake;
Balaji T Ke8deb282009-12-14 00:25:31 +0100396
397 for (i = irq_base; i < irq_end; i++) {
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000398 irq_set_chip_and_handler(i, &twl6030_irq_chip,
399 handle_simple_irq);
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530400 irq_set_chip_data(i, (void *)irq_num);
Balaji T Ke8deb282009-12-14 00:25:31 +0100401 activate_irq(i);
402 }
403
Balaji T Ke8deb282009-12-14 00:25:31 +0100404 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
Benoit Cousson78518ff2012-02-29 19:40:31 +0100405 irq_num, irq_base, irq_end);
Balaji T Ke8deb282009-12-14 00:25:31 +0100406
407 /* install an irq handler to demultiplex the TWL6030 interrupt */
408 init_completion(&irq_event);
Balaji T Ke8deb282009-12-14 00:25:31 +0100409
Yong Zhangf742b962011-09-15 21:52:09 +0200410 status = request_irq(irq_num, handle_twl6030_pih, 0,
Balaji T Ke8deb282009-12-14 00:25:31 +0100411 "TWL6030-PIH", &irq_event);
412 if (status < 0) {
413 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
414 goto fail_irq;
415 }
Axel Lin862de702011-08-11 15:21:00 +0800416
417 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
418 if (IS_ERR(task)) {
419 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
420 status = PTR_ERR(task);
421 goto fail_kthread;
422 }
Todd Poynorab2b9262011-10-04 11:52:29 +0200423
424 twl_irq = irq_num;
425 register_pm_notifier(&twl6030_irq_pm_notifier_block);
Benoit Cousson78518ff2012-02-29 19:40:31 +0100426 return irq_base;
Balaji T Ke8deb282009-12-14 00:25:31 +0100427
428fail_kthread:
Axel Lin862de702011-08-11 15:21:00 +0800429 free_irq(irq_num, &irq_event);
430
431fail_irq:
Balaji T Ke8deb282009-12-14 00:25:31 +0100432 for (i = irq_base; i < irq_end; i++)
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000433 irq_set_chip_and_handler(i, NULL, NULL);
Balaji T Ke8deb282009-12-14 00:25:31 +0100434 return status;
435}
436
437int twl6030_exit_irq(void)
438{
Todd Poynorab2b9262011-10-04 11:52:29 +0200439 unregister_pm_notifier(&twl6030_irq_pm_notifier_block);
Balaji T Ke8deb282009-12-14 00:25:31 +0100440
441 if (twl6030_irq_base) {
442 pr_err("twl6030: can't yet clean up IRQs?\n");
443 return -ENOSYS;
444 }
445 return 0;
446}
447