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Balaji T Ke8deb282009-12-14 00:25:31 +01001/*
2 * twl6030-irq.c - TWL6030 irq support
3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 *
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
8 *
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
11 *
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
14 *
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 */
33
34#include <linux/init.h>
Paul Gortmaker5d4a3572011-07-10 12:41:10 -040035#include <linux/export.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010036#include <linux/interrupt.h>
37#include <linux/irq.h>
38#include <linux/kthread.h>
39#include <linux/i2c/twl.h>
kishore kadiyala72f2e2c2010-09-24 17:13:20 +000040#include <linux/platform_device.h>
Todd Poynorab2b9262011-10-04 11:52:29 +020041#include <linux/suspend.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010042
G, Manjunath Kondaiahb0b4a7c2010-10-19 11:02:48 +020043#include "twl-core.h"
44
Balaji T Ke8deb282009-12-14 00:25:31 +010045/*
46 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
47 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
48 * It exposes status bits saying who has raised an interrupt. There are
49 * three mask registers that corresponds to these status registers, that
50 * enables/disables these interrupts.
51 *
52 * We set up IRQs starting at a platform-specified base. An interrupt map table,
53 * specifies mapping between interrupt number and the associated module.
54 *
55 */
56
57static int twl6030_interrupt_mapping[24] = {
58 PWR_INTR_OFFSET, /* Bit 0 PWRON */
59 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
60 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
61 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
62 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
63 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
64 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
65 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
66
67 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
68 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
69 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
70 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
71 RSV_INTR_OFFSET, /* Bit 12 Reserved */
72 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
73 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
74 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
75
76 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
77 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
78 USBOTG_INTR_OFFSET, /* Bit 18 ID */
Hema HK77b1d3f2010-12-10 17:55:37 +053079 USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
Balaji T Ke8deb282009-12-14 00:25:31 +010080 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
Graeme Gregory6523b142011-05-12 14:27:56 +010081 CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
82 CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
Balaji T Ke8deb282009-12-14 00:25:31 +010083 RSV_INTR_OFFSET, /* Bit 23 Reserved */
84};
85/*----------------------------------------------------------------------*/
86
87static unsigned twl6030_irq_base;
Todd Poynorab2b9262011-10-04 11:52:29 +020088static int twl_irq;
89static bool twl_irq_wake_enabled;
Balaji T Ke8deb282009-12-14 00:25:31 +010090
91static struct completion irq_event;
Todd Poynorab2b9262011-10-04 11:52:29 +020092static atomic_t twl6030_wakeirqs = ATOMIC_INIT(0);
93
94static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
95 unsigned long pm_event, void *unused)
96{
97 int chained_wakeups;
98
99 switch (pm_event) {
100 case PM_SUSPEND_PREPARE:
101 chained_wakeups = atomic_read(&twl6030_wakeirqs);
102
103 if (chained_wakeups && !twl_irq_wake_enabled) {
104 if (enable_irq_wake(twl_irq))
105 pr_err("twl6030 IRQ wake enable failed\n");
106 else
107 twl_irq_wake_enabled = true;
108 } else if (!chained_wakeups && twl_irq_wake_enabled) {
109 disable_irq_wake(twl_irq);
110 twl_irq_wake_enabled = false;
111 }
112
Todd Poynor782baa22011-09-26 16:44:24 -0700113 disable_irq(twl_irq);
Todd Poynorab2b9262011-10-04 11:52:29 +0200114 break;
Todd Poynor782baa22011-09-26 16:44:24 -0700115
116 case PM_POST_SUSPEND:
117 enable_irq(twl_irq);
118 break;
119
Todd Poynorab2b9262011-10-04 11:52:29 +0200120 default:
121 break;
122 }
123
124 return NOTIFY_DONE;
125}
126
127static struct notifier_block twl6030_irq_pm_notifier_block = {
128 .notifier_call = twl6030_irq_pm_notifier,
129};
Balaji T Ke8deb282009-12-14 00:25:31 +0100130
131/*
132 * This thread processes interrupts reported by the Primary Interrupt Handler.
133 */
134static int twl6030_irq_thread(void *data)
135{
136 long irq = (long)data;
137 static unsigned i2c_errors;
138 static const unsigned max_i2c_errors = 100;
139 int ret;
140
Balaji T Ke8deb282009-12-14 00:25:31 +0100141 while (!kthread_should_stop()) {
142 int i;
143 union {
144 u8 bytes[4];
145 u32 int_sts;
146 } sts;
147
148 /* Wait for IRQ, then read PIH irq status (also blocking) */
149 wait_for_completion_interruptible(&irq_event);
150
151 /* read INT_STS_A, B and C in one shot using a burst read */
152 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
153 REG_INT_STS_A, 3);
154 if (ret) {
155 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
156 ret);
157 if (++i2c_errors >= max_i2c_errors) {
158 printk(KERN_ERR "Maximum I2C error count"
159 " exceeded. Terminating %s.\n",
160 __func__);
161 break;
162 }
163 complete(&irq_event);
164 continue;
165 }
166
167
168
169 sts.bytes[3] = 0; /* Only 24 bits are valid*/
170
Hema HK77b1d3f2010-12-10 17:55:37 +0530171 /*
172 * Since VBUS status bit is not reliable for VBUS disconnect
173 * use CHARGER VBUS detection status bit instead.
174 */
175 if (sts.bytes[2] & 0x10)
176 sts.bytes[2] |= 0x08;
177
Balaji T Ke8deb282009-12-14 00:25:31 +0100178 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
179 local_irq_disable();
180 if (sts.int_sts & 0x1) {
181 int module_irq = twl6030_irq_base +
182 twl6030_interrupt_mapping[i];
Thomas Gleixnerc22435a32011-03-25 11:12:31 +0000183 generic_handle_irq(module_irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100184
185 }
186 local_irq_enable();
187 }
Nishanth Menon3f8349e2012-02-22 20:03:45 -0600188
189 /*
190 * NOTE:
191 * Simulation confirms that documentation is wrong w.r.t the
192 * interrupt status clear operation. A single *byte* write to
193 * any one of STS_A to STS_C register results in all three
194 * STS registers being reset. Since it does not matter which
195 * value is written, all three registers are cleared on a
196 * single byte write, so we just use 0x0 to clear.
197 */
198 ret = twl_i2c_write_u8(TWL_MODULE_PIH, 0x00, REG_INT_STS_A);
Balaji T Ke8deb282009-12-14 00:25:31 +0100199 if (ret)
200 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
201
202 enable_irq(irq);
203 }
204
205 return 0;
206}
207
208/*
209 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
210 * This is a chained interrupt, so there is no desc->action method for it.
211 * Now we need to query the interrupt controller in the twl6030 to determine
212 * which module is generating the interrupt request. However, we can't do i2c
213 * transactions in interrupt context, so we must defer that work to a kernel
214 * thread. All we do here is acknowledge and mask the interrupt and wakeup
215 * the kernel thread.
216 */
217static irqreturn_t handle_twl6030_pih(int irq, void *devid)
218{
219 disable_irq_nosync(irq);
220 complete(devid);
221 return IRQ_HANDLED;
222}
223
224/*----------------------------------------------------------------------*/
225
226static inline void activate_irq(int irq)
227{
228#ifdef CONFIG_ARM
229 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
230 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
231 */
232 set_irq_flags(irq, IRQF_VALID);
233#else
234 /* same effect on other architectures */
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000235 irq_set_noprobe(irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100236#endif
237}
238
Nishanth Menonb8b8d792012-02-22 20:03:59 -0600239static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530240{
Todd Poynorab2b9262011-10-04 11:52:29 +0200241 if (on)
242 atomic_inc(&twl6030_wakeirqs);
243 else
244 atomic_dec(&twl6030_wakeirqs);
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530245
Todd Poynorab2b9262011-10-04 11:52:29 +0200246 return 0;
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530247}
248
Balaji T Ke8deb282009-12-14 00:25:31 +0100249/*----------------------------------------------------------------------*/
250
251static unsigned twl6030_irq_next;
252
253/*----------------------------------------------------------------------*/
254int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
255{
256 int ret;
257 u8 unmask_value;
258 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
259 REG_INT_STS_A + offset);
260 unmask_value &= (~(bit_mask));
261 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
262 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
263 return ret;
264}
265EXPORT_SYMBOL(twl6030_interrupt_unmask);
266
267int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
268{
269 int ret;
270 u8 mask_value;
271 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
272 REG_INT_STS_A + offset);
273 mask_value |= (bit_mask);
274 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
275 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
276 return ret;
277}
278EXPORT_SYMBOL(twl6030_interrupt_mask);
279
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000280int twl6030_mmc_card_detect_config(void)
281{
282 int ret;
283 u8 reg_val = 0;
284
285 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
286 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
287 REG_INT_MSK_LINE_B);
288 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
289 REG_INT_MSK_STS_B);
290 /*
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300291 * Initially Configuring MMC_CTRL for receiving interrupts &
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000292 * Card status on TWL6030 for MMC1
293 */
294 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
295 if (ret < 0) {
296 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
297 return ret;
298 }
299 reg_val &= ~VMMC_AUTO_OFF;
300 reg_val |= SW_FC;
301 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
302 if (ret < 0) {
303 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
304 return ret;
305 }
306
307 /* Configuring PullUp-PullDown register */
308 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
309 TWL6030_CFG_INPUT_PUPD3);
310 if (ret < 0) {
311 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
312 ret);
313 return ret;
314 }
315 reg_val &= ~(MMC_PU | MMC_PD);
316 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
317 TWL6030_CFG_INPUT_PUPD3);
318 if (ret < 0) {
319 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
320 ret);
321 return ret;
322 }
Benoit Coussonbdd61bc2012-03-02 16:15:22 +0100323
324 return twl6030_irq_base + MMCDETECT_INTR_OFFSET;
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000325}
326EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
327
328int twl6030_mmc_card_detect(struct device *dev, int slot)
329{
330 int ret = -EIO;
331 u8 read_reg = 0;
332 struct platform_device *pdev = to_platform_device(dev);
333
334 if (pdev->id) {
335 /* TWL6030 provide's Card detect support for
336 * only MMC1 controller.
337 */
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300338 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000339 return ret;
340 }
341 /*
342 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
343 * 0 - Card not present ,1 - Card present
344 */
345 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
346 TWL6030_MMCCTRL);
347 if (ret >= 0)
348 ret = read_reg & STS_MMC;
349 return ret;
350}
351EXPORT_SYMBOL(twl6030_mmc_card_detect);
352
Balaji T Ke8deb282009-12-14 00:25:31 +0100353int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
354{
355
356 int status = 0;
357 int i;
358 struct task_struct *task;
359 int ret;
360 u8 mask[4];
361
362 static struct irq_chip twl6030_irq_chip;
363 mask[1] = 0xFF;
364 mask[2] = 0xFF;
365 mask[3] = 0xFF;
366 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
367 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
368 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
369 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
370 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
371 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
372
373 twl6030_irq_base = irq_base;
374
375 /* install an irq handler for each of the modules;
376 * clone dummy irq_chip since PIH can't *do* anything
377 */
378 twl6030_irq_chip = dummy_irq_chip;
379 twl6030_irq_chip.name = "twl6030";
Lennert Buytenhekc45c6852010-12-13 13:31:18 +0100380 twl6030_irq_chip.irq_set_type = NULL;
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530381 twl6030_irq_chip.irq_set_wake = twl6030_irq_set_wake;
Balaji T Ke8deb282009-12-14 00:25:31 +0100382
383 for (i = irq_base; i < irq_end; i++) {
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000384 irq_set_chip_and_handler(i, &twl6030_irq_chip,
385 handle_simple_irq);
Santosh Shilimkar49dcd072011-09-06 21:29:30 +0530386 irq_set_chip_data(i, (void *)irq_num);
Balaji T Ke8deb282009-12-14 00:25:31 +0100387 activate_irq(i);
388 }
389
390 twl6030_irq_next = i;
391 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
392 irq_num, irq_base, twl6030_irq_next - 1);
393
394 /* install an irq handler to demultiplex the TWL6030 interrupt */
395 init_completion(&irq_event);
Balaji T Ke8deb282009-12-14 00:25:31 +0100396
Yong Zhangf742b962011-09-15 21:52:09 +0200397 status = request_irq(irq_num, handle_twl6030_pih, 0,
Balaji T Ke8deb282009-12-14 00:25:31 +0100398 "TWL6030-PIH", &irq_event);
399 if (status < 0) {
400 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
401 goto fail_irq;
402 }
Axel Lin862de702011-08-11 15:21:00 +0800403
404 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
405 if (IS_ERR(task)) {
406 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
407 status = PTR_ERR(task);
408 goto fail_kthread;
409 }
Todd Poynorab2b9262011-10-04 11:52:29 +0200410
411 twl_irq = irq_num;
412 register_pm_notifier(&twl6030_irq_pm_notifier_block);
Balaji T Ke8deb282009-12-14 00:25:31 +0100413 return status;
Balaji T Ke8deb282009-12-14 00:25:31 +0100414
415fail_kthread:
Axel Lin862de702011-08-11 15:21:00 +0800416 free_irq(irq_num, &irq_event);
417
418fail_irq:
Balaji T Ke8deb282009-12-14 00:25:31 +0100419 for (i = irq_base; i < irq_end; i++)
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000420 irq_set_chip_and_handler(i, NULL, NULL);
Balaji T Ke8deb282009-12-14 00:25:31 +0100421 return status;
422}
423
424int twl6030_exit_irq(void)
425{
Todd Poynorab2b9262011-10-04 11:52:29 +0200426 unregister_pm_notifier(&twl6030_irq_pm_notifier_block);
Balaji T Ke8deb282009-12-14 00:25:31 +0100427
428 if (twl6030_irq_base) {
429 pr_err("twl6030: can't yet clean up IRQs?\n");
430 return -ENOSYS;
431 }
432 return 0;
433}
434