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Balaji T Ke8deb282009-12-14 00:25:31 +01001/*
2 * twl6030-irq.c - TWL6030 irq support
3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 *
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
8 *
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
11 *
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
14 *
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 */
33
34#include <linux/init.h>
Paul Gortmaker5d4a3572011-07-10 12:41:10 -040035#include <linux/export.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010036#include <linux/interrupt.h>
37#include <linux/irq.h>
38#include <linux/kthread.h>
39#include <linux/i2c/twl.h>
kishore kadiyala72f2e2c2010-09-24 17:13:20 +000040#include <linux/platform_device.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010041
G, Manjunath Kondaiahb0b4a7c2010-10-19 11:02:48 +020042#include "twl-core.h"
43
Balaji T Ke8deb282009-12-14 00:25:31 +010044/*
45 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
46 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
47 * It exposes status bits saying who has raised an interrupt. There are
48 * three mask registers that corresponds to these status registers, that
49 * enables/disables these interrupts.
50 *
51 * We set up IRQs starting at a platform-specified base. An interrupt map table,
52 * specifies mapping between interrupt number and the associated module.
53 *
54 */
55
56static int twl6030_interrupt_mapping[24] = {
57 PWR_INTR_OFFSET, /* Bit 0 PWRON */
58 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
59 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
60 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
61 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
62 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
63 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
64 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
65
66 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
67 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
68 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
69 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
70 RSV_INTR_OFFSET, /* Bit 12 Reserved */
71 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
72 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
73 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
74
75 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
76 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
77 USBOTG_INTR_OFFSET, /* Bit 18 ID */
Hema HK77b1d3f2010-12-10 17:55:37 +053078 USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
Balaji T Ke8deb282009-12-14 00:25:31 +010079 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
Graeme Gregory6523b142011-05-12 14:27:56 +010080 CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
81 CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
Balaji T Ke8deb282009-12-14 00:25:31 +010082 RSV_INTR_OFFSET, /* Bit 23 Reserved */
83};
84/*----------------------------------------------------------------------*/
85
86static unsigned twl6030_irq_base;
87
88static struct completion irq_event;
89
90/*
91 * This thread processes interrupts reported by the Primary Interrupt Handler.
92 */
93static int twl6030_irq_thread(void *data)
94{
95 long irq = (long)data;
96 static unsigned i2c_errors;
97 static const unsigned max_i2c_errors = 100;
98 int ret;
99
100 current->flags |= PF_NOFREEZE;
101
102 while (!kthread_should_stop()) {
103 int i;
104 union {
105 u8 bytes[4];
106 u32 int_sts;
107 } sts;
108
109 /* Wait for IRQ, then read PIH irq status (also blocking) */
110 wait_for_completion_interruptible(&irq_event);
111
112 /* read INT_STS_A, B and C in one shot using a burst read */
113 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
114 REG_INT_STS_A, 3);
115 if (ret) {
116 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
117 ret);
118 if (++i2c_errors >= max_i2c_errors) {
119 printk(KERN_ERR "Maximum I2C error count"
120 " exceeded. Terminating %s.\n",
121 __func__);
122 break;
123 }
124 complete(&irq_event);
125 continue;
126 }
127
128
129
130 sts.bytes[3] = 0; /* Only 24 bits are valid*/
131
Hema HK77b1d3f2010-12-10 17:55:37 +0530132 /*
133 * Since VBUS status bit is not reliable for VBUS disconnect
134 * use CHARGER VBUS detection status bit instead.
135 */
136 if (sts.bytes[2] & 0x10)
137 sts.bytes[2] |= 0x08;
138
Balaji T Ke8deb282009-12-14 00:25:31 +0100139 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
140 local_irq_disable();
141 if (sts.int_sts & 0x1) {
142 int module_irq = twl6030_irq_base +
143 twl6030_interrupt_mapping[i];
Thomas Gleixnerc22435a32011-03-25 11:12:31 +0000144 generic_handle_irq(module_irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100145
146 }
147 local_irq_enable();
148 }
149 ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
150 REG_INT_STS_A, 3); /* clear INT_STS_A */
151 if (ret)
152 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
153
154 enable_irq(irq);
155 }
156
157 return 0;
158}
159
160/*
161 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
162 * This is a chained interrupt, so there is no desc->action method for it.
163 * Now we need to query the interrupt controller in the twl6030 to determine
164 * which module is generating the interrupt request. However, we can't do i2c
165 * transactions in interrupt context, so we must defer that work to a kernel
166 * thread. All we do here is acknowledge and mask the interrupt and wakeup
167 * the kernel thread.
168 */
169static irqreturn_t handle_twl6030_pih(int irq, void *devid)
170{
171 disable_irq_nosync(irq);
172 complete(devid);
173 return IRQ_HANDLED;
174}
175
176/*----------------------------------------------------------------------*/
177
178static inline void activate_irq(int irq)
179{
180#ifdef CONFIG_ARM
181 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
182 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
183 */
184 set_irq_flags(irq, IRQF_VALID);
185#else
186 /* same effect on other architectures */
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000187 irq_set_noprobe(irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100188#endif
189}
190
191/*----------------------------------------------------------------------*/
192
193static unsigned twl6030_irq_next;
194
195/*----------------------------------------------------------------------*/
196int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
197{
198 int ret;
199 u8 unmask_value;
200 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
201 REG_INT_STS_A + offset);
202 unmask_value &= (~(bit_mask));
203 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
204 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
205 return ret;
206}
207EXPORT_SYMBOL(twl6030_interrupt_unmask);
208
209int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
210{
211 int ret;
212 u8 mask_value;
213 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
214 REG_INT_STS_A + offset);
215 mask_value |= (bit_mask);
216 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
217 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
218 return ret;
219}
220EXPORT_SYMBOL(twl6030_interrupt_mask);
221
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000222int twl6030_mmc_card_detect_config(void)
223{
224 int ret;
225 u8 reg_val = 0;
226
227 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
228 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
229 REG_INT_MSK_LINE_B);
230 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
231 REG_INT_MSK_STS_B);
232 /*
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300233 * Initially Configuring MMC_CTRL for receiving interrupts &
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000234 * Card status on TWL6030 for MMC1
235 */
236 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
237 if (ret < 0) {
238 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
239 return ret;
240 }
241 reg_val &= ~VMMC_AUTO_OFF;
242 reg_val |= SW_FC;
243 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
244 if (ret < 0) {
245 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
246 return ret;
247 }
248
249 /* Configuring PullUp-PullDown register */
250 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
251 TWL6030_CFG_INPUT_PUPD3);
252 if (ret < 0) {
253 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
254 ret);
255 return ret;
256 }
257 reg_val &= ~(MMC_PU | MMC_PD);
258 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
259 TWL6030_CFG_INPUT_PUPD3);
260 if (ret < 0) {
261 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
262 ret);
263 return ret;
264 }
265 return 0;
266}
267EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
268
269int twl6030_mmc_card_detect(struct device *dev, int slot)
270{
271 int ret = -EIO;
272 u8 read_reg = 0;
273 struct platform_device *pdev = to_platform_device(dev);
274
275 if (pdev->id) {
276 /* TWL6030 provide's Card detect support for
277 * only MMC1 controller.
278 */
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300279 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000280 return ret;
281 }
282 /*
283 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
284 * 0 - Card not present ,1 - Card present
285 */
286 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
287 TWL6030_MMCCTRL);
288 if (ret >= 0)
289 ret = read_reg & STS_MMC;
290 return ret;
291}
292EXPORT_SYMBOL(twl6030_mmc_card_detect);
293
Balaji T Ke8deb282009-12-14 00:25:31 +0100294int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
295{
296
297 int status = 0;
298 int i;
299 struct task_struct *task;
300 int ret;
301 u8 mask[4];
302
303 static struct irq_chip twl6030_irq_chip;
304 mask[1] = 0xFF;
305 mask[2] = 0xFF;
306 mask[3] = 0xFF;
307 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
308 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
309 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
310 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
311 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
312 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
313
314 twl6030_irq_base = irq_base;
315
316 /* install an irq handler for each of the modules;
317 * clone dummy irq_chip since PIH can't *do* anything
318 */
319 twl6030_irq_chip = dummy_irq_chip;
320 twl6030_irq_chip.name = "twl6030";
Lennert Buytenhekc45c6852010-12-13 13:31:18 +0100321 twl6030_irq_chip.irq_set_type = NULL;
Balaji T Ke8deb282009-12-14 00:25:31 +0100322
323 for (i = irq_base; i < irq_end; i++) {
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000324 irq_set_chip_and_handler(i, &twl6030_irq_chip,
325 handle_simple_irq);
Balaji T Ke8deb282009-12-14 00:25:31 +0100326 activate_irq(i);
327 }
328
329 twl6030_irq_next = i;
330 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
331 irq_num, irq_base, twl6030_irq_next - 1);
332
333 /* install an irq handler to demultiplex the TWL6030 interrupt */
334 init_completion(&irq_event);
335 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
336 if (IS_ERR(task)) {
337 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
338 status = PTR_ERR(task);
339 goto fail_kthread;
340 }
341
342 status = request_irq(irq_num, handle_twl6030_pih, IRQF_DISABLED,
343 "TWL6030-PIH", &irq_event);
344 if (status < 0) {
345 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
346 goto fail_irq;
347 }
348 return status;
349fail_irq:
350 free_irq(irq_num, &irq_event);
351
352fail_kthread:
353 for (i = irq_base; i < irq_end; i++)
Thomas Gleixnerd5bb1222011-03-25 11:12:32 +0000354 irq_set_chip_and_handler(i, NULL, NULL);
Balaji T Ke8deb282009-12-14 00:25:31 +0100355 return status;
356}
357
358int twl6030_exit_irq(void)
359{
360
361 if (twl6030_irq_base) {
362 pr_err("twl6030: can't yet clean up IRQs?\n");
363 return -ENOSYS;
364 }
365 return 0;
366}
367