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Takashi Iwaie3d280f2015-02-17 21:46:37 +01001/*
2 * HD-audio core stuff
3 */
4
5#ifndef __SOUND_HDAUDIO_H
6#define __SOUND_HDAUDIO_H
7
8#include <linux/device.h>
Takashi Iwai14752412015-04-14 12:15:47 +02009#include <linux/interrupt.h>
10#include <linux/timecounter.h>
11#include <sound/core.h>
12#include <sound/memalloc.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010013#include <sound/hda_verbs.h>
Mengdong Lin98d8fc62015-05-19 22:29:30 +080014#include <drm/i915_component.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010015
Takashi Iwai7639a062015-03-03 10:07:24 +010016/* codec node id */
17typedef u16 hda_nid_t;
18
Takashi Iwaid068ebc2015-03-02 23:22:59 +010019struct hdac_bus;
Takashi Iwai14752412015-04-14 12:15:47 +020020struct hdac_stream;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010021struct hdac_device;
22struct hdac_driver;
Takashi Iwai3256be62015-02-24 14:59:42 +010023struct hdac_widget_tree;
Subhransu S. Prustyda23ac12015-09-29 13:56:10 +053024struct hda_device_id;
Takashi Iwaie3d280f2015-02-17 21:46:37 +010025
26/*
27 * exported bus type
28 */
29extern struct bus_type snd_hda_bus_type;
30
31/*
Takashi Iwai71fc4c72015-03-03 17:33:10 +010032 * generic arrays
33 */
34struct snd_array {
35 unsigned int used;
36 unsigned int alloced;
37 unsigned int elem_size;
38 unsigned int alloc_align;
39 void *list;
40};
41
42/*
Takashi Iwaie3d280f2015-02-17 21:46:37 +010043 * HD-audio codec base device
44 */
45struct hdac_device {
46 struct device dev;
47 int type;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010048 struct hdac_bus *bus;
49 unsigned int addr; /* codec address */
50 struct list_head list; /* list point for bus codec_list */
Takashi Iwai7639a062015-03-03 10:07:24 +010051
52 hda_nid_t afg; /* AFG node id */
53 hda_nid_t mfg; /* MFG node id */
54
55 /* ids */
56 unsigned int vendor_id;
57 unsigned int subsystem_id;
58 unsigned int revision_id;
59 unsigned int afg_function_id;
60 unsigned int mfg_function_id;
61 unsigned int afg_unsol:1;
62 unsigned int mfg_unsol:1;
63
64 unsigned int power_caps; /* FG power caps */
65
66 const char *vendor_name; /* codec vendor name */
67 const char *chip_name; /* codec chip name */
68
Takashi Iwai058524482015-03-03 15:40:08 +010069 /* verb exec op override */
70 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
71 unsigned int flags, unsigned int *res);
72
Takashi Iwai7639a062015-03-03 10:07:24 +010073 /* widgets */
74 unsigned int num_nodes;
75 hda_nid_t start_nid, end_nid;
76
77 /* misc flags */
78 atomic_t in_pm; /* suspend/resume being performed */
Mengdong Lina5e7e072015-04-29 17:43:20 +080079 bool link_power_control:1;
Takashi Iwai3256be62015-02-24 14:59:42 +010080
81 /* sysfs */
82 struct hdac_widget_tree *widgets;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010083
84 /* regmap */
85 struct regmap *regmap;
Takashi Iwai5e56bce2015-02-26 12:29:03 +010086 struct snd_array vendor_verbs;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010087 bool lazy_cache:1; /* don't wake up for writes */
Takashi Iwaifaa75f82015-02-26 08:54:56 +010088 bool caps_overwriting:1; /* caps overwrite being in process */
Takashi Iwai40ba66a2015-03-13 15:56:25 +010089 bool cache_coef:1; /* cache COEF read/write too */
Takashi Iwaie3d280f2015-02-17 21:46:37 +010090};
91
92/* device/driver type used for matching */
93enum {
94 HDA_DEV_CORE,
95 HDA_DEV_LEGACY,
Ramesh Babuc1cc18b2015-04-17 17:58:57 +053096 HDA_DEV_ASOC,
Takashi Iwaie3d280f2015-02-17 21:46:37 +010097};
98
Takashi Iwai7639a062015-03-03 10:07:24 +010099/* direction */
100enum {
101 HDA_INPUT, HDA_OUTPUT
102};
103
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100104#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
105
Takashi Iwai7639a062015-03-03 10:07:24 +0100106int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
107 const char *name, unsigned int addr);
108void snd_hdac_device_exit(struct hdac_device *dev);
Takashi Iwai3256be62015-02-24 14:59:42 +0100109int snd_hdac_device_register(struct hdac_device *codec);
110void snd_hdac_device_unregister(struct hdac_device *codec);
Takashi Iwaided255b2015-10-01 17:59:43 +0200111int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
Takashi Iwai7639a062015-03-03 10:07:24 +0100112
113int snd_hdac_refresh_widgets(struct hdac_device *codec);
Vinod Koul18dfd792015-08-21 15:47:43 +0530114int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100115
116unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
117 unsigned int verb, unsigned int parm);
Takashi Iwai058524482015-03-03 15:40:08 +0100118int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
119 unsigned int flags, unsigned int *res);
Takashi Iwai7639a062015-03-03 10:07:24 +0100120int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
121 unsigned int verb, unsigned int parm, unsigned int *res);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100122int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
123 unsigned int *res);
Takashi Iwai9ba17b42015-03-03 23:29:47 +0100124int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
125 int parm);
Takashi Iwaifaa75f82015-02-26 08:54:56 +0100126int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
127 unsigned int parm, unsigned int val);
Takashi Iwai7639a062015-03-03 10:07:24 +0100128int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
129 hda_nid_t *conn_list, int max_conns);
130int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
131 hda_nid_t *start_id);
Takashi Iwaib7d023e2015-04-16 08:19:06 +0200132unsigned int snd_hdac_calc_stream_format(unsigned int rate,
133 unsigned int channels,
134 unsigned int format,
135 unsigned int maxbps,
136 unsigned short spdif_ctls);
137int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
138 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
139bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
140 unsigned int format);
Takashi Iwai7639a062015-03-03 10:07:24 +0100141
Subhransu S. Prusty1b5e6162015-10-08 09:48:05 +0100142int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
143 int flags, unsigned int verb, unsigned int parm);
144int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
145 int flags, unsigned int verb, unsigned int parm);
146bool snd_hdac_check_power_state(struct hdac_device *hdac,
147 hda_nid_t nid, unsigned int target_state);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100148/**
149 * snd_hdac_read_parm - read a codec parameter
150 * @codec: the codec object
151 * @nid: NID to read a parameter
152 * @parm: parameter to read
153 *
154 * Returns -1 for error. If you need to distinguish the error more
155 * strictly, use _snd_hdac_read_parm() directly.
156 */
157static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
158 int parm)
159{
160 unsigned int val;
161
162 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
163}
164
Takashi Iwai7639a062015-03-03 10:07:24 +0100165#ifdef CONFIG_PM
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200166int snd_hdac_power_up(struct hdac_device *codec);
167int snd_hdac_power_down(struct hdac_device *codec);
168int snd_hdac_power_up_pm(struct hdac_device *codec);
169int snd_hdac_power_down_pm(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100170#else
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200171static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
172static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
173static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
174static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
Takashi Iwai7639a062015-03-03 10:07:24 +0100175#endif
176
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100177/*
178 * HD-audio codec base driver
179 */
180struct hdac_driver {
181 struct device_driver driver;
182 int type;
Vinod Koulec71efc2015-06-03 12:24:31 +0530183 const struct hda_device_id *id_table;
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100184 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100185 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100186};
187
188#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
189
Vinod Koulec71efc2015-06-03 12:24:31 +0530190const struct hda_device_id *
191hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
192
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100193/*
Takashi Iwai14752412015-04-14 12:15:47 +0200194 * Bus verb operators
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100195 */
196struct hdac_bus_ops {
197 /* send a single command */
198 int (*command)(struct hdac_bus *bus, unsigned int cmd);
199 /* get a response from the last command */
200 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
201 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800202 /* control the link power */
203 int (*link_power)(struct hdac_bus *bus, bool enable);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100204};
205
Takashi Iwai14752412015-04-14 12:15:47 +0200206/*
207 * Lowlevel I/O operators
208 */
209struct hdac_io_ops {
210 /* mapped register accesses */
211 void (*reg_writel)(u32 value, u32 __iomem *addr);
212 u32 (*reg_readl)(u32 __iomem *addr);
213 void (*reg_writew)(u16 value, u16 __iomem *addr);
214 u16 (*reg_readw)(u16 __iomem *addr);
215 void (*reg_writeb)(u8 value, u8 __iomem *addr);
216 u8 (*reg_readb)(u8 __iomem *addr);
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200217 /* Allocation ops */
218 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
219 struct snd_dma_buffer *buf);
220 void (*dma_free_pages)(struct hdac_bus *bus,
221 struct snd_dma_buffer *buf);
Takashi Iwai14752412015-04-14 12:15:47 +0200222};
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100223
Takashi Iwai14752412015-04-14 12:15:47 +0200224#define HDA_UNSOL_QUEUE_SIZE 64
225#define HDA_MAX_CODECS 8 /* limit by controller side */
226
227/* HD Audio class code */
228#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
229
230/*
231 * CORB/RIRB
232 *
233 * Each CORB entry is 4byte, RIRB is 8byte
234 */
235struct hdac_rb {
236 __le32 *buf; /* virtual address of CORB/RIRB buffer */
237 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
238 unsigned short rp, wp; /* RIRB read/write pointers */
239 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
240 u32 res[HDA_MAX_CODECS]; /* last read value */
241};
242
243/*
244 * HD-audio bus base driver
245 */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100246struct hdac_bus {
247 struct device *dev;
248 const struct hdac_bus_ops *ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200249 const struct hdac_io_ops *io_ops;
250
251 /* h/w resources */
252 unsigned long addr;
253 void __iomem *remap_addr;
254 int irq;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100255
256 /* codec linked list */
257 struct list_head codec_list;
258 unsigned int num_codecs;
259
260 /* link caddr -> codec */
261 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
262
263 /* unsolicited event queue */
264 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
265 unsigned int unsol_rp, unsol_wp;
266 struct work_struct unsol_work;
267
Takashi Iwai14752412015-04-14 12:15:47 +0200268 /* bit flags of detected codecs */
269 unsigned long codec_mask;
270
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100271 /* bit flags of powered codecs */
272 unsigned long codec_powered;
273
Takashi Iwai14752412015-04-14 12:15:47 +0200274 /* CORB/RIRB */
275 struct hdac_rb corb;
276 struct hdac_rb rirb;
277 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
278
279 /* CORB/RIRB and position buffers */
280 struct snd_dma_buffer rb;
281 struct snd_dma_buffer posbuf;
282
283 /* hdac_stream linked list */
284 struct list_head stream_list;
285
286 /* operation state */
287 bool chip_init:1; /* h/w initialized */
288
289 /* behavior flags */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100290 bool sync_write:1; /* sync after verb write */
Takashi Iwai14752412015-04-14 12:15:47 +0200291 bool use_posbuf:1; /* use position buffer */
292 bool snoop:1; /* enable snooping */
293 bool align_bdle_4k:1; /* BDLE align 4K boundary */
294 bool reverse_assign:1; /* assign devices in reverse order */
295 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
296
297 int bdl_pos_adj; /* BDL position adjustment */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100298
299 /* locks */
Takashi Iwai14752412015-04-14 12:15:47 +0200300 spinlock_t reg_lock;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100301 struct mutex cmd_mutex;
Mengdong Lin98d8fc62015-05-19 22:29:30 +0800302
303 /* i915 component interface */
304 struct i915_audio_component *audio_component;
305 int i915_power_refcount;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100306};
307
308int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
Takashi Iwai14752412015-04-14 12:15:47 +0200309 const struct hdac_bus_ops *ops,
310 const struct hdac_io_ops *io_ops);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100311void snd_hdac_bus_exit(struct hdac_bus *bus);
312int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
313 unsigned int cmd, unsigned int *res);
314int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
315 unsigned int cmd, unsigned int *res);
316void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
317
318int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
319void snd_hdac_bus_remove_device(struct hdac_bus *bus,
320 struct hdac_device *codec);
321
Takashi Iwai7639a062015-03-03 10:07:24 +0100322static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
323{
324 set_bit(codec->addr, &codec->bus->codec_powered);
325}
326
327static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
328{
329 clear_bit(codec->addr, &codec->bus->codec_powered);
330}
331
Takashi Iwai14752412015-04-14 12:15:47 +0200332int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
333int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
334 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800335int snd_hdac_link_power(struct hdac_device *codec, bool enable);
Takashi Iwai14752412015-04-14 12:15:47 +0200336
337bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
338void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
339void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
340void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
341void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
342void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
343
344void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
345void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
346 void (*ack)(struct hdac_bus *,
347 struct hdac_stream *));
348
Jeeja KP304dad32015-04-12 18:06:13 +0530349int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
350void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
351
Takashi Iwai14752412015-04-14 12:15:47 +0200352/*
353 * macros for easy use
354 */
355#define _snd_hdac_chip_write(type, chip, reg, value) \
356 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
357#define _snd_hdac_chip_read(type, chip, reg) \
358 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
359
360/* read/write a register, pass without AZX_REG_ prefix */
361#define snd_hdac_chip_writel(chip, reg, value) \
362 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
363#define snd_hdac_chip_writew(chip, reg, value) \
364 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
365#define snd_hdac_chip_writeb(chip, reg, value) \
366 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
367#define snd_hdac_chip_readl(chip, reg) \
368 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
369#define snd_hdac_chip_readw(chip, reg) \
370 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
371#define snd_hdac_chip_readb(chip, reg) \
372 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
373
374/* update a register, pass without AZX_REG_ prefix */
375#define snd_hdac_chip_updatel(chip, reg, mask, val) \
376 snd_hdac_chip_writel(chip, reg, \
377 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
378#define snd_hdac_chip_updatew(chip, reg, mask, val) \
379 snd_hdac_chip_writew(chip, reg, \
380 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
381#define snd_hdac_chip_updateb(chip, reg, mask, val) \
382 snd_hdac_chip_writeb(chip, reg, \
383 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
384
385/*
386 * HD-audio stream
387 */
388struct hdac_stream {
389 struct hdac_bus *bus;
390 struct snd_dma_buffer bdl; /* BDL buffer */
391 __le32 *posbuf; /* position buffer pointer */
392 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
393
394 unsigned int bufsize; /* size of the play buffer in bytes */
395 unsigned int period_bytes; /* size of the period in bytes */
396 unsigned int frags; /* number for period in the play buffer */
397 unsigned int fifo_size; /* FIFO size */
398
399 void __iomem *sd_addr; /* stream descriptor pointer */
400
401 u32 sd_int_sta_mask; /* stream int status mask */
402
403 /* pcm support */
404 struct snd_pcm_substream *substream; /* assigned substream,
405 * set in PCM open
406 */
407 unsigned int format_val; /* format value to be set in the
408 * controller and the codec
409 */
410 unsigned char stream_tag; /* assigned stream */
411 unsigned char index; /* stream index */
412 int assigned_key; /* last device# key assigned to */
413
414 bool opened:1;
415 bool running:1;
Takashi Iwai6d23c8f2015-04-17 13:34:30 +0200416 bool prepared:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200417 bool no_period_wakeup:1;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200418 bool locked:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200419
420 /* timestamp */
421 unsigned long start_wallclk; /* start + minimum wallclk */
422 unsigned long period_wallclk; /* wallclk for period */
423 struct timecounter tc;
424 struct cyclecounter cc;
425 int delay_negative_threshold;
426
427 struct list_head list;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200428#ifdef CONFIG_SND_HDA_DSP_LOADER
429 /* DSP access mutex */
430 struct mutex dsp_mutex;
431#endif
Takashi Iwai14752412015-04-14 12:15:47 +0200432};
433
434void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
435 int idx, int direction, int tag);
436struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
437 struct snd_pcm_substream *substream);
438void snd_hdac_stream_release(struct hdac_stream *azx_dev);
Jeeja KP4308c9b2015-08-23 11:52:51 +0530439struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
440 int dir, int stream_tag);
Takashi Iwai14752412015-04-14 12:15:47 +0200441
442int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
443void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
444int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
Jeeja KP86f65012015-04-17 17:58:58 +0530445int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
446 unsigned int format_val);
Takashi Iwai14752412015-04-14 12:15:47 +0200447void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
448void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
449void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
450void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
451void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
452 unsigned int streams, unsigned int reg);
453void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
454 unsigned int streams);
455void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
456 unsigned int streams);
457/*
458 * macros for easy use
459 */
460#define _snd_hdac_stream_write(type, dev, reg, value) \
461 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
462#define _snd_hdac_stream_read(type, dev, reg) \
463 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
464
465/* read/write a register, pass without AZX_REG_ prefix */
466#define snd_hdac_stream_writel(dev, reg, value) \
467 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
468#define snd_hdac_stream_writew(dev, reg, value) \
469 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
470#define snd_hdac_stream_writeb(dev, reg, value) \
471 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
472#define snd_hdac_stream_readl(dev, reg) \
473 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
474#define snd_hdac_stream_readw(dev, reg) \
475 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
476#define snd_hdac_stream_readb(dev, reg) \
477 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
478
479/* update a register, pass without AZX_REG_ prefix */
480#define snd_hdac_stream_updatel(dev, reg, mask, val) \
481 snd_hdac_stream_writel(dev, reg, \
482 (snd_hdac_stream_readl(dev, reg) & \
483 ~(mask)) | (val))
484#define snd_hdac_stream_updatew(dev, reg, mask, val) \
485 snd_hdac_stream_writew(dev, reg, \
486 (snd_hdac_stream_readw(dev, reg) & \
487 ~(mask)) | (val))
488#define snd_hdac_stream_updateb(dev, reg, mask, val) \
489 snd_hdac_stream_writeb(dev, reg, \
490 (snd_hdac_stream_readb(dev, reg) & \
491 ~(mask)) | (val))
492
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200493#ifdef CONFIG_SND_HDA_DSP_LOADER
494/* DSP lock helpers */
495#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
496#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
497#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
498#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
499/* DSP loader helpers */
500int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
501 unsigned int byte_size, struct snd_dma_buffer *bufp);
502void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
503void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
504 struct snd_dma_buffer *dmab);
505#else /* CONFIG_SND_HDA_DSP_LOADER */
506#define snd_hdac_dsp_lock_init(dev) do {} while (0)
507#define snd_hdac_dsp_lock(dev) do {} while (0)
508#define snd_hdac_dsp_unlock(dev) do {} while (0)
509#define snd_hdac_stream_is_locked(dev) 0
510
511static inline int
512snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
513 unsigned int byte_size, struct snd_dma_buffer *bufp)
514{
515 return 0;
516}
517
518static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
519{
520}
521
522static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
523 struct snd_dma_buffer *dmab)
524{
525}
526#endif /* CONFIG_SND_HDA_DSP_LOADER */
527
528
Takashi Iwai71fc4c72015-03-03 17:33:10 +0100529/*
530 * generic array helpers
531 */
532void *snd_array_new(struct snd_array *array);
533void snd_array_free(struct snd_array *array);
534static inline void snd_array_init(struct snd_array *array, unsigned int size,
535 unsigned int align)
536{
537 array->elem_size = size;
538 array->alloc_align = align;
539}
540
541static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
542{
543 return array->list + idx * array->elem_size;
544}
545
546static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
547{
548 return (unsigned long)(ptr - array->list) / array->elem_size;
549}
550
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100551#endif /* __SOUND_HDAUDIO_H */