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Takashi Iwaie3d280f2015-02-17 21:46:37 +01001/*
2 * HD-audio core stuff
3 */
4
5#ifndef __SOUND_HDAUDIO_H
6#define __SOUND_HDAUDIO_H
7
8#include <linux/device.h>
Takashi Iwai14752412015-04-14 12:15:47 +02009#include <linux/interrupt.h>
10#include <linux/timecounter.h>
11#include <sound/core.h>
12#include <sound/memalloc.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010013#include <sound/hda_verbs.h>
14
Takashi Iwai7639a062015-03-03 10:07:24 +010015/* codec node id */
16typedef u16 hda_nid_t;
17
Takashi Iwaid068ebc2015-03-02 23:22:59 +010018struct hdac_bus;
Takashi Iwai14752412015-04-14 12:15:47 +020019struct hdac_stream;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010020struct hdac_device;
21struct hdac_driver;
Takashi Iwai3256be62015-02-24 14:59:42 +010022struct hdac_widget_tree;
Takashi Iwaie3d280f2015-02-17 21:46:37 +010023
24/*
25 * exported bus type
26 */
27extern struct bus_type snd_hda_bus_type;
28
29/*
Takashi Iwai71fc4c72015-03-03 17:33:10 +010030 * generic arrays
31 */
32struct snd_array {
33 unsigned int used;
34 unsigned int alloced;
35 unsigned int elem_size;
36 unsigned int alloc_align;
37 void *list;
38};
39
40/*
Takashi Iwaie3d280f2015-02-17 21:46:37 +010041 * HD-audio codec base device
42 */
43struct hdac_device {
44 struct device dev;
45 int type;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010046 struct hdac_bus *bus;
47 unsigned int addr; /* codec address */
48 struct list_head list; /* list point for bus codec_list */
Takashi Iwai7639a062015-03-03 10:07:24 +010049
50 hda_nid_t afg; /* AFG node id */
51 hda_nid_t mfg; /* MFG node id */
52
53 /* ids */
54 unsigned int vendor_id;
55 unsigned int subsystem_id;
56 unsigned int revision_id;
57 unsigned int afg_function_id;
58 unsigned int mfg_function_id;
59 unsigned int afg_unsol:1;
60 unsigned int mfg_unsol:1;
61
62 unsigned int power_caps; /* FG power caps */
63
64 const char *vendor_name; /* codec vendor name */
65 const char *chip_name; /* codec chip name */
66
Takashi Iwai058524482015-03-03 15:40:08 +010067 /* verb exec op override */
68 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
69 unsigned int flags, unsigned int *res);
70
Takashi Iwai7639a062015-03-03 10:07:24 +010071 /* widgets */
72 unsigned int num_nodes;
73 hda_nid_t start_nid, end_nid;
74
75 /* misc flags */
76 atomic_t in_pm; /* suspend/resume being performed */
Takashi Iwai3256be62015-02-24 14:59:42 +010077
78 /* sysfs */
79 struct hdac_widget_tree *widgets;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010080
81 /* regmap */
82 struct regmap *regmap;
Takashi Iwai5e56bce2015-02-26 12:29:03 +010083 struct snd_array vendor_verbs;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010084 bool lazy_cache:1; /* don't wake up for writes */
Takashi Iwaifaa75f82015-02-26 08:54:56 +010085 bool caps_overwriting:1; /* caps overwrite being in process */
Takashi Iwai40ba66a2015-03-13 15:56:25 +010086 bool cache_coef:1; /* cache COEF read/write too */
Takashi Iwaie3d280f2015-02-17 21:46:37 +010087};
88
89/* device/driver type used for matching */
90enum {
91 HDA_DEV_CORE,
92 HDA_DEV_LEGACY,
93};
94
Takashi Iwai7639a062015-03-03 10:07:24 +010095/* direction */
96enum {
97 HDA_INPUT, HDA_OUTPUT
98};
99
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100100#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
101
Takashi Iwai7639a062015-03-03 10:07:24 +0100102int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
103 const char *name, unsigned int addr);
104void snd_hdac_device_exit(struct hdac_device *dev);
Takashi Iwai3256be62015-02-24 14:59:42 +0100105int snd_hdac_device_register(struct hdac_device *codec);
106void snd_hdac_device_unregister(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100107
108int snd_hdac_refresh_widgets(struct hdac_device *codec);
109
110unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
111 unsigned int verb, unsigned int parm);
Takashi Iwai058524482015-03-03 15:40:08 +0100112int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
113 unsigned int flags, unsigned int *res);
Takashi Iwai7639a062015-03-03 10:07:24 +0100114int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
115 unsigned int verb, unsigned int parm, unsigned int *res);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100116int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
117 unsigned int *res);
Takashi Iwai9ba17b42015-03-03 23:29:47 +0100118int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
119 int parm);
Takashi Iwaifaa75f82015-02-26 08:54:56 +0100120int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
121 unsigned int parm, unsigned int val);
Takashi Iwai7639a062015-03-03 10:07:24 +0100122int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
123 hda_nid_t *conn_list, int max_conns);
124int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
125 hda_nid_t *start_id);
126
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100127/**
128 * snd_hdac_read_parm - read a codec parameter
129 * @codec: the codec object
130 * @nid: NID to read a parameter
131 * @parm: parameter to read
132 *
133 * Returns -1 for error. If you need to distinguish the error more
134 * strictly, use _snd_hdac_read_parm() directly.
135 */
136static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
137 int parm)
138{
139 unsigned int val;
140
141 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
142}
143
Takashi Iwai7639a062015-03-03 10:07:24 +0100144#ifdef CONFIG_PM
145void snd_hdac_power_up(struct hdac_device *codec);
146void snd_hdac_power_down(struct hdac_device *codec);
Takashi Iwaic3aeda62015-04-13 11:01:14 +0200147void snd_hdac_power_up_pm(struct hdac_device *codec);
148void snd_hdac_power_down_pm(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100149#else
150static inline void snd_hdac_power_up(struct hdac_device *codec) {}
151static inline void snd_hdac_power_down(struct hdac_device *codec) {}
Takashi Iwaic3aeda62015-04-13 11:01:14 +0200152static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
153static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
Takashi Iwai7639a062015-03-03 10:07:24 +0100154#endif
155
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100156/*
157 * HD-audio codec base driver
158 */
159struct hdac_driver {
160 struct device_driver driver;
161 int type;
162 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100163 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100164};
165
166#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
167
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100168/*
Takashi Iwai14752412015-04-14 12:15:47 +0200169 * Bus verb operators
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100170 */
171struct hdac_bus_ops {
172 /* send a single command */
173 int (*command)(struct hdac_bus *bus, unsigned int cmd);
174 /* get a response from the last command */
175 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
176 unsigned int *res);
177};
178
Takashi Iwai14752412015-04-14 12:15:47 +0200179/*
180 * Lowlevel I/O operators
181 */
182struct hdac_io_ops {
183 /* mapped register accesses */
184 void (*reg_writel)(u32 value, u32 __iomem *addr);
185 u32 (*reg_readl)(u32 __iomem *addr);
186 void (*reg_writew)(u16 value, u16 __iomem *addr);
187 u16 (*reg_readw)(u16 __iomem *addr);
188 void (*reg_writeb)(u8 value, u8 __iomem *addr);
189 u8 (*reg_readb)(u8 __iomem *addr);
190};
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100191
Takashi Iwai14752412015-04-14 12:15:47 +0200192#define HDA_UNSOL_QUEUE_SIZE 64
193#define HDA_MAX_CODECS 8 /* limit by controller side */
194
195/* HD Audio class code */
196#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
197
198/*
199 * CORB/RIRB
200 *
201 * Each CORB entry is 4byte, RIRB is 8byte
202 */
203struct hdac_rb {
204 __le32 *buf; /* virtual address of CORB/RIRB buffer */
205 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
206 unsigned short rp, wp; /* RIRB read/write pointers */
207 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
208 u32 res[HDA_MAX_CODECS]; /* last read value */
209};
210
211/*
212 * HD-audio bus base driver
213 */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100214struct hdac_bus {
215 struct device *dev;
216 const struct hdac_bus_ops *ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200217 const struct hdac_io_ops *io_ops;
218
219 /* h/w resources */
220 unsigned long addr;
221 void __iomem *remap_addr;
222 int irq;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100223
224 /* codec linked list */
225 struct list_head codec_list;
226 unsigned int num_codecs;
227
228 /* link caddr -> codec */
229 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
230
231 /* unsolicited event queue */
232 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
233 unsigned int unsol_rp, unsol_wp;
234 struct work_struct unsol_work;
235
Takashi Iwai14752412015-04-14 12:15:47 +0200236 /* bit flags of detected codecs */
237 unsigned long codec_mask;
238
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100239 /* bit flags of powered codecs */
240 unsigned long codec_powered;
241
Takashi Iwai14752412015-04-14 12:15:47 +0200242 /* CORB/RIRB */
243 struct hdac_rb corb;
244 struct hdac_rb rirb;
245 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
246
247 /* CORB/RIRB and position buffers */
248 struct snd_dma_buffer rb;
249 struct snd_dma_buffer posbuf;
250
251 /* hdac_stream linked list */
252 struct list_head stream_list;
253
254 /* operation state */
255 bool chip_init:1; /* h/w initialized */
256
257 /* behavior flags */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100258 bool sync_write:1; /* sync after verb write */
Takashi Iwai14752412015-04-14 12:15:47 +0200259 bool use_posbuf:1; /* use position buffer */
260 bool snoop:1; /* enable snooping */
261 bool align_bdle_4k:1; /* BDLE align 4K boundary */
262 bool reverse_assign:1; /* assign devices in reverse order */
263 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
264
265 int bdl_pos_adj; /* BDL position adjustment */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100266
267 /* locks */
Takashi Iwai14752412015-04-14 12:15:47 +0200268 spinlock_t reg_lock;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100269 struct mutex cmd_mutex;
270};
271
272int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
Takashi Iwai14752412015-04-14 12:15:47 +0200273 const struct hdac_bus_ops *ops,
274 const struct hdac_io_ops *io_ops);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100275void snd_hdac_bus_exit(struct hdac_bus *bus);
276int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
277 unsigned int cmd, unsigned int *res);
278int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
279 unsigned int cmd, unsigned int *res);
280void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
281
282int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
283void snd_hdac_bus_remove_device(struct hdac_bus *bus,
284 struct hdac_device *codec);
285
Takashi Iwai7639a062015-03-03 10:07:24 +0100286static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
287{
288 set_bit(codec->addr, &codec->bus->codec_powered);
289}
290
291static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
292{
293 clear_bit(codec->addr, &codec->bus->codec_powered);
294}
295
Takashi Iwai14752412015-04-14 12:15:47 +0200296int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
297int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
298 unsigned int *res);
299
300bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
301void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
302void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
303void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
304void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
305void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
306
307void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
308void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
309 void (*ack)(struct hdac_bus *,
310 struct hdac_stream *));
311
312/*
313 * macros for easy use
314 */
315#define _snd_hdac_chip_write(type, chip, reg, value) \
316 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
317#define _snd_hdac_chip_read(type, chip, reg) \
318 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
319
320/* read/write a register, pass without AZX_REG_ prefix */
321#define snd_hdac_chip_writel(chip, reg, value) \
322 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
323#define snd_hdac_chip_writew(chip, reg, value) \
324 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
325#define snd_hdac_chip_writeb(chip, reg, value) \
326 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
327#define snd_hdac_chip_readl(chip, reg) \
328 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
329#define snd_hdac_chip_readw(chip, reg) \
330 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
331#define snd_hdac_chip_readb(chip, reg) \
332 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
333
334/* update a register, pass without AZX_REG_ prefix */
335#define snd_hdac_chip_updatel(chip, reg, mask, val) \
336 snd_hdac_chip_writel(chip, reg, \
337 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
338#define snd_hdac_chip_updatew(chip, reg, mask, val) \
339 snd_hdac_chip_writew(chip, reg, \
340 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
341#define snd_hdac_chip_updateb(chip, reg, mask, val) \
342 snd_hdac_chip_writeb(chip, reg, \
343 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
344
345/*
346 * HD-audio stream
347 */
348struct hdac_stream {
349 struct hdac_bus *bus;
350 struct snd_dma_buffer bdl; /* BDL buffer */
351 __le32 *posbuf; /* position buffer pointer */
352 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
353
354 unsigned int bufsize; /* size of the play buffer in bytes */
355 unsigned int period_bytes; /* size of the period in bytes */
356 unsigned int frags; /* number for period in the play buffer */
357 unsigned int fifo_size; /* FIFO size */
358
359 void __iomem *sd_addr; /* stream descriptor pointer */
360
361 u32 sd_int_sta_mask; /* stream int status mask */
362
363 /* pcm support */
364 struct snd_pcm_substream *substream; /* assigned substream,
365 * set in PCM open
366 */
367 unsigned int format_val; /* format value to be set in the
368 * controller and the codec
369 */
370 unsigned char stream_tag; /* assigned stream */
371 unsigned char index; /* stream index */
372 int assigned_key; /* last device# key assigned to */
373
374 bool opened:1;
375 bool running:1;
376 bool no_period_wakeup:1;
377
378 /* timestamp */
379 unsigned long start_wallclk; /* start + minimum wallclk */
380 unsigned long period_wallclk; /* wallclk for period */
381 struct timecounter tc;
382 struct cyclecounter cc;
383 int delay_negative_threshold;
384
385 struct list_head list;
386};
387
388void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
389 int idx, int direction, int tag);
390struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
391 struct snd_pcm_substream *substream);
392void snd_hdac_stream_release(struct hdac_stream *azx_dev);
393
394int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
395void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
396int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
397void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
398void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
399void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
400void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
401void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
402 unsigned int streams, unsigned int reg);
403void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
404 unsigned int streams);
405void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
406 unsigned int streams);
407/*
408 * macros for easy use
409 */
410#define _snd_hdac_stream_write(type, dev, reg, value) \
411 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
412#define _snd_hdac_stream_read(type, dev, reg) \
413 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
414
415/* read/write a register, pass without AZX_REG_ prefix */
416#define snd_hdac_stream_writel(dev, reg, value) \
417 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
418#define snd_hdac_stream_writew(dev, reg, value) \
419 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
420#define snd_hdac_stream_writeb(dev, reg, value) \
421 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
422#define snd_hdac_stream_readl(dev, reg) \
423 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
424#define snd_hdac_stream_readw(dev, reg) \
425 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
426#define snd_hdac_stream_readb(dev, reg) \
427 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
428
429/* update a register, pass without AZX_REG_ prefix */
430#define snd_hdac_stream_updatel(dev, reg, mask, val) \
431 snd_hdac_stream_writel(dev, reg, \
432 (snd_hdac_stream_readl(dev, reg) & \
433 ~(mask)) | (val))
434#define snd_hdac_stream_updatew(dev, reg, mask, val) \
435 snd_hdac_stream_writew(dev, reg, \
436 (snd_hdac_stream_readw(dev, reg) & \
437 ~(mask)) | (val))
438#define snd_hdac_stream_updateb(dev, reg, mask, val) \
439 snd_hdac_stream_writeb(dev, reg, \
440 (snd_hdac_stream_readb(dev, reg) & \
441 ~(mask)) | (val))
442
Takashi Iwai71fc4c72015-03-03 17:33:10 +0100443/*
444 * generic array helpers
445 */
446void *snd_array_new(struct snd_array *array);
447void snd_array_free(struct snd_array *array);
448static inline void snd_array_init(struct snd_array *array, unsigned int size,
449 unsigned int align)
450{
451 array->elem_size = size;
452 array->alloc_align = align;
453}
454
455static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
456{
457 return array->list + idx * array->elem_size;
458}
459
460static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
461{
462 return (unsigned long)(ptr - array->list) / array->elem_size;
463}
464
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100465#endif /* __SOUND_HDAUDIO_H */