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Patil, Rachna01636eb2012-10-16 12:55:43 +05301/*
2 * TI Touch Screen / ADC MFD driver
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053017#include <linux/slab.h>
18#include <linux/err.h>
19#include <linux/io.h>
20#include <linux/clk.h>
21#include <linux/regmap.h>
22#include <linux/mfd/core.h>
23#include <linux/pm_runtime.h>
Patil, Rachnaa6543a12013-01-24 03:45:09 +000024#include <linux/of.h>
25#include <linux/of_device.h>
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010026#include <linux/sched.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053027
28#include <linux/mfd/ti_am335x_tscadc.h>
29
Patil, Rachna01636eb2012-10-16 12:55:43 +053030static const struct regmap_config tscadc_regmap_config = {
31 .name = "ti_tscadc",
32 .reg_bits = 32,
33 .reg_stride = 4,
34 .val_bits = 32,
35};
36
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050037void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +000038{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020039 unsigned long flags;
40
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050041 spin_lock_irqsave(&tscadc->reg_lock, flags);
42 tscadc->reg_se_cache |= val;
43 if (tscadc->adc_waiting)
44 wake_up(&tscadc->reg_se_wait);
45 else if (!tscadc->adc_in_use)
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050046 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010047
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050048 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +000049}
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010050EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
51
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050052static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010053{
54 DEFINE_WAIT(wait);
55 u32 reg;
56
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050057 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010058 if (reg & SEQ_STATUS) {
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050059 tscadc->adc_waiting = true;
60 prepare_to_wait(&tscadc->reg_se_wait, &wait,
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010061 TASK_UNINTERRUPTIBLE);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050062 spin_unlock_irq(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010063
64 schedule();
65
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050066 spin_lock_irq(&tscadc->reg_lock);
67 finish_wait(&tscadc->reg_se_wait, &wait);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010068
Vignesh Rb10848e2015-01-07 11:19:36 +053069 /*
70 * Sequencer should either be idle or
71 * busy applying the charge step.
72 */
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050073 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
Vignesh Rb10848e2015-01-07 11:19:36 +053074 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050075 tscadc->adc_waiting = false;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010076 }
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050077 tscadc->adc_in_use = true;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010078}
79
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050080void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010081{
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050082 spin_lock_irq(&tscadc->reg_lock);
83 am335x_tscadc_need_adc(tscadc);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010084
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050085 regmap_write(tscadc->regmap, REG_SE, val);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050086 spin_unlock_irq(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010087}
88EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
89
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050090void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010091{
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010092 unsigned long flags;
93
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050094 spin_lock_irqsave(&tscadc->reg_lock, flags);
95 tscadc->adc_in_use = false;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -050096 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -050097 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010098}
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010099EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000100
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500101void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000102{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +0200103 unsigned long flags;
104
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500105 spin_lock_irqsave(&tscadc->reg_lock, flags);
106 tscadc->reg_se_cache &= ~val;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500107 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500108 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000109}
110EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
111
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500112static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530113{
114 unsigned int idleconfig;
115
116 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
117 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
118
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500119 regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530120}
121
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800122static int ti_tscadc_probe(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530123{
124 struct ti_tscadc_dev *tscadc;
125 struct resource *res;
126 struct clk *clk;
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000127 struct device_node *node = pdev->dev.of_node;
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530128 struct mfd_cell *cell;
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200129 struct property *prop;
130 const __be32 *cur;
131 u32 val;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530132 int err, ctrl;
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200133 int clock_rate;
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000134 int tsc_wires = 0, adc_channels = 0, total_channels;
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200135 int readouts = 0;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530136
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200137 if (!pdev->dev.of_node) {
138 dev_err(&pdev->dev, "Could not find valid DT data.\n");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530139 return -EINVAL;
140 }
141
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200142 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
143 of_property_read_u32(node, "ti,wires", &tsc_wires);
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200144 of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
Patil, Rachna5e53a692012-10-16 12:55:45 +0530145
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200146 node = of_get_child_by_name(pdev->dev.of_node, "adc");
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200147 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
148 adc_channels++;
149 if (val > 7) {
150 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
151 val);
152 return -EINVAL;
153 }
154 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530155 total_channels = tsc_wires + adc_channels;
Patil, Rachna5e53a692012-10-16 12:55:45 +0530156 if (total_channels > 8) {
157 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
158 return -EINVAL;
159 }
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300160 if (total_channels == 0) {
161 dev_err(&pdev->dev, "Need atleast one channel.\n");
162 return -EINVAL;
163 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530164
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200165 if (readouts * 2 + 2 + adc_channels > 16) {
166 dev_err(&pdev->dev, "Too many step configurations requested\n");
167 return -EINVAL;
168 }
169
Patil, Rachna01636eb2012-10-16 12:55:43 +0530170 /* Allocate memory for device */
Andrew F. Davisdea1c702016-06-08 10:54:36 -0500171 tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530172 if (!tscadc) {
173 dev_err(&pdev->dev, "failed to allocate memory.\n");
174 return -ENOMEM;
175 }
176 tscadc->dev = &pdev->dev;
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530177
178 err = platform_get_irq(pdev, 0);
179 if (err < 0) {
180 dev_err(&pdev->dev, "no irq ID is specified.\n");
181 goto ret;
182 } else
183 tscadc->irq = err;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530184
Jingoo Han924ff912014-02-12 14:31:49 +0900185 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
186 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
187 if (IS_ERR(tscadc->tscadc_base))
188 return PTR_ERR(tscadc->tscadc_base);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530189
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500190 tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530191 tscadc->tscadc_base, &tscadc_regmap_config);
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500192 if (IS_ERR(tscadc->regmap)) {
Patil, Rachna01636eb2012-10-16 12:55:43 +0530193 dev_err(&pdev->dev, "regmap init failed\n");
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500194 err = PTR_ERR(tscadc->regmap);
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530195 goto ret;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530196 }
197
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000198 spin_lock_init(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100199 init_waitqueue_head(&tscadc->reg_se_wait);
200
Patil, Rachna01636eb2012-10-16 12:55:43 +0530201 pm_runtime_enable(&pdev->dev);
202 pm_runtime_get_sync(&pdev->dev);
203
204 /*
205 * The TSC_ADC_Subsystem has 2 clock domains
206 * OCP_CLK and ADC_CLK.
207 * The ADC clock is expected to run at target of 3MHz,
208 * and expected to capture 12-bit data at a rate of 200 KSPS.
209 * The TSC_ADC_SS controller design assumes the OCP clock is
210 * at least 6x faster than the ADC clock.
211 */
212 clk = clk_get(&pdev->dev, "adc_tsc_fck");
213 if (IS_ERR(clk)) {
214 dev_err(&pdev->dev, "failed to get TSC fck\n");
215 err = PTR_ERR(clk);
216 goto err_disable_clk;
217 }
218 clock_rate = clk_get_rate(clk);
219 clk_put(clk);
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200220 tscadc->clk_div = clock_rate / ADC_CLK;
Patil, Rachnaefe31262013-07-20 17:27:35 +0100221
Patil, Rachna01636eb2012-10-16 12:55:43 +0530222 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200223 tscadc->clk_div--;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500224 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530225
226 /* Set the control register bits */
Jeff Lancef0933a62014-09-04 19:01:57 +0200227 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500228 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530229
230 /* Set register bits for Idle Config Mode */
Jeff Lancef0933a62014-09-04 19:01:57 +0200231 if (tsc_wires > 0) {
232 tscadc->tsc_wires = tsc_wires;
233 if (tsc_wires == 5)
234 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
235 else
236 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100237 tscadc_idle_config(tscadc);
Jeff Lancef0933a62014-09-04 19:01:57 +0200238 }
Patil, Rachna01636eb2012-10-16 12:55:43 +0530239
240 /* Enable the TSC module enable bit */
Patil, Rachna01636eb2012-10-16 12:55:43 +0530241 ctrl |= CNTRLREG_TSCSSENB;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500242 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530243
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300244 tscadc->used_cells = 0;
245 tscadc->tsc_cell = -1;
246 tscadc->adc_cell = -1;
247
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530248 /* TSC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300249 if (tsc_wires > 0) {
250 tscadc->tsc_cell = tscadc->used_cells;
251 cell = &tscadc->cells[tscadc->used_cells++];
Sebastian Andrzej Siewior5f184e62013-05-27 17:08:28 +0200252 cell->name = "TI-am335x-tsc";
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300253 cell->of_compatible = "ti,am3359-tsc";
254 cell->platform_data = &tscadc;
255 cell->pdata_size = sizeof(tscadc);
256 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530257
Patil, Rachna5e53a692012-10-16 12:55:45 +0530258 /* ADC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300259 if (adc_channels > 0) {
260 tscadc->adc_cell = tscadc->used_cells;
261 cell = &tscadc->cells[tscadc->used_cells++];
Sebastian Andrzej Siewior9f999282013-05-27 17:12:52 +0200262 cell->name = "TI-am335x-adc";
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300263 cell->of_compatible = "ti,am3359-adc";
264 cell->platform_data = &tscadc;
265 cell->pdata_size = sizeof(tscadc);
266 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530267
Patil, Rachna01636eb2012-10-16 12:55:43 +0530268 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300269 tscadc->used_cells, NULL, 0, NULL);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530270 if (err < 0)
271 goto err_disable_clk;
272
273 device_init_wakeup(&pdev->dev, true);
274 platform_set_drvdata(pdev, tscadc);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530275 return 0;
276
277err_disable_clk:
278 pm_runtime_put_sync(&pdev->dev);
279 pm_runtime_disable(&pdev->dev);
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530280ret:
Patil, Rachna01636eb2012-10-16 12:55:43 +0530281 return err;
282}
283
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800284static int ti_tscadc_remove(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530285{
286 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
287
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500288 regmap_write(tscadc->regmap, REG_SE, 0x00);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530289
290 pm_runtime_put_sync(&pdev->dev);
291 pm_runtime_disable(&pdev->dev);
292
293 mfd_remove_devices(tscadc->dev);
294
295 return 0;
296}
297
Andrew F. Davisdae936a092016-06-08 10:54:32 -0500298static int __maybe_unused tscadc_suspend(struct device *dev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530299{
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500300 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530301
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500302 regmap_write(tscadc->regmap, REG_SE, 0x00);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530303 pm_runtime_put_sync(dev);
304
305 return 0;
306}
307
Andrew F. Davisdae936a092016-06-08 10:54:32 -0500308static int __maybe_unused tscadc_resume(struct device *dev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530309{
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500310 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
Jeff Lancef0933a62014-09-04 19:01:57 +0200311 u32 ctrl;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530312
313 pm_runtime_get_sync(dev);
314
315 /* context restore */
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100316 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500317 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100318
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500319 if (tscadc->tsc_cell != -1) {
320 if (tscadc->tsc_wires == 5)
Jeff Lancef0933a62014-09-04 19:01:57 +0200321 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
322 else
323 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
Andrew F. Davisa318b7d2016-06-08 10:54:34 -0500324 tscadc_idle_config(tscadc);
Jeff Lancef0933a62014-09-04 19:01:57 +0200325 }
326 ctrl |= CNTRLREG_TSCSSENB;
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500327 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530328
Andrew F. Davis0d3a7cc2016-06-08 10:54:35 -0500329 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200330
Patil, Rachna01636eb2012-10-16 12:55:43 +0530331 return 0;
332}
333
Andrew F. Davisdae936a092016-06-08 10:54:32 -0500334static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530335
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000336static const struct of_device_id ti_tscadc_dt_ids[] = {
337 { .compatible = "ti,am3359-tscadc", },
338 { }
339};
340MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
341
Patil, Rachna01636eb2012-10-16 12:55:43 +0530342static struct platform_driver ti_tscadc_driver = {
343 .driver = {
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000344 .name = "ti_am3359-tscadc",
Andrew F. Davisdae936a092016-06-08 10:54:32 -0500345 .pm = &tscadc_pm_ops,
Sachin Kamat131221b2013-10-15 09:18:49 +0530346 .of_match_table = ti_tscadc_dt_ids,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530347 },
348 .probe = ti_tscadc_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800349 .remove = ti_tscadc_remove,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530350
351};
352
353module_platform_driver(ti_tscadc_driver);
354
355MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
356MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
357MODULE_LICENSE("GPL");