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Patil, Rachna01636eb2012-10-16 12:55:43 +05301/*
2 * TI Touch Screen / ADC MFD driver
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/slab.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <linux/clk.h>
22#include <linux/regmap.h>
23#include <linux/mfd/core.h>
24#include <linux/pm_runtime.h>
Patil, Rachnaa6543a12013-01-24 03:45:09 +000025#include <linux/of.h>
26#include <linux/of_device.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053027
28#include <linux/mfd/ti_am335x_tscadc.h>
29
30static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
31{
32 unsigned int val;
33
34 regmap_read(tsadc->regmap_tscadc, reg, &val);
35 return val;
36}
37
38static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
39 unsigned int val)
40{
41 regmap_write(tsadc->regmap_tscadc, reg, val);
42}
43
44static const struct regmap_config tscadc_regmap_config = {
45 .name = "ti_tscadc",
46 .reg_bits = 32,
47 .reg_stride = 4,
48 .val_bits = 32,
49};
50
Patil, Rachnaabeccee2013-01-24 03:45:05 +000051void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
52{
53 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
54}
55EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
56
57void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
58{
59 spin_lock(&tsadc->reg_lock);
60 tsadc->reg_se_cache |= val;
61 spin_unlock(&tsadc->reg_lock);
62
63 am335x_tsc_se_update(tsadc);
64}
65EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
66
67void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
68{
69 spin_lock(&tsadc->reg_lock);
70 tsadc->reg_se_cache &= ~val;
71 spin_unlock(&tsadc->reg_lock);
72
73 am335x_tsc_se_update(tsadc);
74}
75EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
76
Patil, Rachna01636eb2012-10-16 12:55:43 +053077static void tscadc_idle_config(struct ti_tscadc_dev *config)
78{
79 unsigned int idleconfig;
80
81 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
82 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
83
84 tscadc_writel(config, REG_IDLECONFIG, idleconfig);
85}
86
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -080087static int ti_tscadc_probe(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +053088{
89 struct ti_tscadc_dev *tscadc;
90 struct resource *res;
91 struct clk *clk;
Patil, Rachnaa6543a12013-01-24 03:45:09 +000092 struct device_node *node = pdev->dev.of_node;
Patil, Rachna2b99baf2012-10-16 12:55:44 +053093 struct mfd_cell *cell;
Patil, Rachna01636eb2012-10-16 12:55:43 +053094 int err, ctrl;
95 int clk_value, clock_rate;
Patil, Rachnaa6543a12013-01-24 03:45:09 +000096 int tsc_wires = 0, adc_channels = 0, total_channels;
Patil, Rachna01636eb2012-10-16 12:55:43 +053097
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +020098 if (!pdev->dev.of_node) {
99 dev_err(&pdev->dev, "Could not find valid DT data.\n");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530100 return -EINVAL;
101 }
102
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200103 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
104 of_property_read_u32(node, "ti,wires", &tsc_wires);
Patil, Rachna5e53a692012-10-16 12:55:45 +0530105
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200106 node = of_get_child_by_name(pdev->dev.of_node, "adc");
107 of_property_read_u32(node, "ti,adc-channels", &adc_channels);
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000108
Patil, Rachna5e53a692012-10-16 12:55:45 +0530109 total_channels = tsc_wires + adc_channels;
110
111 if (total_channels > 8) {
112 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
113 return -EINVAL;
114 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530115
Patil, Rachna01636eb2012-10-16 12:55:43 +0530116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
117 if (!res) {
118 dev_err(&pdev->dev, "no memory resource defined.\n");
119 return -EINVAL;
120 }
121
Patil, Rachna01636eb2012-10-16 12:55:43 +0530122 /* Allocate memory for device */
123 tscadc = devm_kzalloc(&pdev->dev,
124 sizeof(struct ti_tscadc_dev), GFP_KERNEL);
125 if (!tscadc) {
126 dev_err(&pdev->dev, "failed to allocate memory.\n");
127 return -ENOMEM;
128 }
129 tscadc->dev = &pdev->dev;
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530130
131 err = platform_get_irq(pdev, 0);
132 if (err < 0) {
133 dev_err(&pdev->dev, "no irq ID is specified.\n");
134 goto ret;
135 } else
136 tscadc->irq = err;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530137
138 res = devm_request_mem_region(&pdev->dev,
139 res->start, resource_size(res), pdev->name);
140 if (!res) {
141 dev_err(&pdev->dev, "failed to reserve registers.\n");
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530142 return -EBUSY;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530143 }
144
145 tscadc->tscadc_base = devm_ioremap(&pdev->dev,
146 res->start, resource_size(res));
147 if (!tscadc->tscadc_base) {
148 dev_err(&pdev->dev, "failed to map registers.\n");
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530149 return -ENOMEM;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530150 }
151
152 tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
153 tscadc->tscadc_base, &tscadc_regmap_config);
154 if (IS_ERR(tscadc->regmap_tscadc)) {
155 dev_err(&pdev->dev, "regmap init failed\n");
156 err = PTR_ERR(tscadc->regmap_tscadc);
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530157 goto ret;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530158 }
159
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000160 spin_lock_init(&tscadc->reg_lock);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530161 pm_runtime_enable(&pdev->dev);
162 pm_runtime_get_sync(&pdev->dev);
163
164 /*
165 * The TSC_ADC_Subsystem has 2 clock domains
166 * OCP_CLK and ADC_CLK.
167 * The ADC clock is expected to run at target of 3MHz,
168 * and expected to capture 12-bit data at a rate of 200 KSPS.
169 * The TSC_ADC_SS controller design assumes the OCP clock is
170 * at least 6x faster than the ADC clock.
171 */
172 clk = clk_get(&pdev->dev, "adc_tsc_fck");
173 if (IS_ERR(clk)) {
174 dev_err(&pdev->dev, "failed to get TSC fck\n");
175 err = PTR_ERR(clk);
176 goto err_disable_clk;
177 }
178 clock_rate = clk_get_rate(clk);
179 clk_put(clk);
180 clk_value = clock_rate / ADC_CLK;
181 if (clk_value < MAX_CLK_DIV) {
182 dev_err(&pdev->dev, "clock input less than min clock requirement\n");
183 err = -EINVAL;
184 goto err_disable_clk;
185 }
186 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
187 clk_value = clk_value - 1;
188 tscadc_writel(tscadc, REG_CLKDIV, clk_value);
189
190 /* Set the control register bits */
191 ctrl = CNTRLREG_STEPCONFIGWRT |
192 CNTRLREG_TSCENB |
193 CNTRLREG_STEPID |
194 CNTRLREG_4WIRE;
195 tscadc_writel(tscadc, REG_CTRL, ctrl);
196
197 /* Set register bits for Idle Config Mode */
198 tscadc_idle_config(tscadc);
199
200 /* Enable the TSC module enable bit */
201 ctrl = tscadc_readl(tscadc, REG_CTRL);
202 ctrl |= CNTRLREG_TSCSSENB;
203 tscadc_writel(tscadc, REG_CTRL, ctrl);
204
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530205 /* TSC Cell */
206 cell = &tscadc->cells[TSC_CELL];
207 cell->name = "tsc";
Patil, Rachna03963102013-01-24 03:45:10 +0000208 cell->of_compatible = "ti,am3359-tsc";
Sebastian Andrzej Siewiora9bce1b2013-06-05 16:13:47 +0200209 cell->platform_data = &tscadc;
210 cell->pdata_size = sizeof(tscadc);
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530211
Patil, Rachna5e53a692012-10-16 12:55:45 +0530212 /* ADC Cell */
213 cell = &tscadc->cells[ADC_CELL];
214 cell->name = "tiadc";
Patil, Rachna6f39ac42013-01-24 03:45:11 +0000215 cell->of_compatible = "ti,am3359-adc";
Sebastian Andrzej Siewiora9bce1b2013-06-05 16:13:47 +0200216 cell->platform_data = &tscadc;
217 cell->pdata_size = sizeof(tscadc);
Patil, Rachna5e53a692012-10-16 12:55:45 +0530218
Patil, Rachna01636eb2012-10-16 12:55:43 +0530219 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
220 TSCADC_CELLS, NULL, 0, NULL);
221 if (err < 0)
222 goto err_disable_clk;
223
224 device_init_wakeup(&pdev->dev, true);
225 platform_set_drvdata(pdev, tscadc);
226
227 return 0;
228
229err_disable_clk:
230 pm_runtime_put_sync(&pdev->dev);
231 pm_runtime_disable(&pdev->dev);
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530232ret:
Patil, Rachna01636eb2012-10-16 12:55:43 +0530233 return err;
234}
235
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800236static int ti_tscadc_remove(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530237{
238 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
239
240 tscadc_writel(tscadc, REG_SE, 0x00);
241
242 pm_runtime_put_sync(&pdev->dev);
243 pm_runtime_disable(&pdev->dev);
244
245 mfd_remove_devices(tscadc->dev);
246
247 return 0;
248}
249
250#ifdef CONFIG_PM
251static int tscadc_suspend(struct device *dev)
252{
253 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
254
255 tscadc_writel(tscadc_dev, REG_SE, 0x00);
256 pm_runtime_put_sync(dev);
257
258 return 0;
259}
260
261static int tscadc_resume(struct device *dev)
262{
263 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
264 unsigned int restore, ctrl;
265
266 pm_runtime_get_sync(dev);
267
268 /* context restore */
269 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
270 CNTRLREG_STEPID | CNTRLREG_4WIRE;
271 tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
272 tscadc_idle_config(tscadc_dev);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000273 am335x_tsc_se_update(tscadc_dev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530274 restore = tscadc_readl(tscadc_dev, REG_CTRL);
275 tscadc_writel(tscadc_dev, REG_CTRL,
276 (restore | CNTRLREG_TSCSSENB));
277
278 return 0;
279}
280
281static const struct dev_pm_ops tscadc_pm_ops = {
282 .suspend = tscadc_suspend,
283 .resume = tscadc_resume,
284};
285#define TSCADC_PM_OPS (&tscadc_pm_ops)
286#else
287#define TSCADC_PM_OPS NULL
288#endif
289
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000290static const struct of_device_id ti_tscadc_dt_ids[] = {
291 { .compatible = "ti,am3359-tscadc", },
292 { }
293};
294MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
295
Patil, Rachna01636eb2012-10-16 12:55:43 +0530296static struct platform_driver ti_tscadc_driver = {
297 .driver = {
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000298 .name = "ti_am3359-tscadc",
Patil, Rachna01636eb2012-10-16 12:55:43 +0530299 .owner = THIS_MODULE,
300 .pm = TSCADC_PM_OPS,
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000301 .of_match_table = of_match_ptr(ti_tscadc_dt_ids),
Patil, Rachna01636eb2012-10-16 12:55:43 +0530302 },
303 .probe = ti_tscadc_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800304 .remove = ti_tscadc_remove,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530305
306};
307
308module_platform_driver(ti_tscadc_driver);
309
310MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
311MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
312MODULE_LICENSE("GPL");