Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de> |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * |
| 5 | * Based on code from Freescale, |
Dinh Nguyen | e24798e | 2010-04-22 16:28:42 +0300 | [diff] [blame] | 6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * as published by the Free Software Foundation; either version 2 |
| 11 | * of the License, or (at your option) any later version. |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/init.h> |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 23 | #include <linux/interrupt.h> |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 24 | #include <linux/io.h> |
| 25 | #include <linux/irq.h> |
| 26 | #include <linux/gpio.h> |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/slab.h> |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 29 | #include <linux/basic_mmio_gpio.h> |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 30 | #include <linux/of.h> |
| 31 | #include <linux/of_device.h> |
Paul Gortmaker | bb207ef | 2011-07-03 13:38:09 -0400 | [diff] [blame] | 32 | #include <linux/module.h> |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 33 | #include <asm-generic/bug.h> |
Shawn Guo | 0e44b6e | 2011-09-21 21:24:04 +0800 | [diff] [blame] | 34 | #include <asm/mach/irq.h> |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 35 | |
Shawn Guo | a439561 | 2011-08-14 00:14:04 +0800 | [diff] [blame] | 36 | #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) |
| 37 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 38 | enum mxc_gpio_hwtype { |
| 39 | IMX1_GPIO, /* runs on i.mx1 */ |
| 40 | IMX21_GPIO, /* runs on i.mx21 and i.mx27 */ |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 41 | IMX31_GPIO, /* runs on i.mx31 */ |
| 42 | IMX35_GPIO, /* runs on all other i.mx */ |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 43 | }; |
| 44 | |
| 45 | /* device type dependent stuff */ |
| 46 | struct mxc_gpio_hwdata { |
| 47 | unsigned dr_reg; |
| 48 | unsigned gdir_reg; |
| 49 | unsigned psr_reg; |
| 50 | unsigned icr1_reg; |
| 51 | unsigned icr2_reg; |
| 52 | unsigned imr_reg; |
| 53 | unsigned isr_reg; |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 54 | int edge_sel_reg; |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 55 | unsigned low_level; |
| 56 | unsigned high_level; |
| 57 | unsigned rise_edge; |
| 58 | unsigned fall_edge; |
| 59 | }; |
| 60 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 61 | struct mxc_gpio_port { |
| 62 | struct list_head node; |
| 63 | void __iomem *base; |
| 64 | int irq; |
| 65 | int irq_high; |
| 66 | int virtual_irq_start; |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 67 | struct bgpio_chip bgc; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 68 | u32 both_edges; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 69 | }; |
| 70 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 71 | static struct mxc_gpio_hwdata imx1_imx21_gpio_hwdata = { |
| 72 | .dr_reg = 0x1c, |
| 73 | .gdir_reg = 0x00, |
| 74 | .psr_reg = 0x24, |
| 75 | .icr1_reg = 0x28, |
| 76 | .icr2_reg = 0x2c, |
| 77 | .imr_reg = 0x30, |
| 78 | .isr_reg = 0x34, |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 79 | .edge_sel_reg = -EINVAL, |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 80 | .low_level = 0x03, |
| 81 | .high_level = 0x02, |
| 82 | .rise_edge = 0x00, |
| 83 | .fall_edge = 0x01, |
| 84 | }; |
| 85 | |
| 86 | static struct mxc_gpio_hwdata imx31_gpio_hwdata = { |
| 87 | .dr_reg = 0x00, |
| 88 | .gdir_reg = 0x04, |
| 89 | .psr_reg = 0x08, |
| 90 | .icr1_reg = 0x0c, |
| 91 | .icr2_reg = 0x10, |
| 92 | .imr_reg = 0x14, |
| 93 | .isr_reg = 0x18, |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 94 | .edge_sel_reg = -EINVAL, |
| 95 | .low_level = 0x00, |
| 96 | .high_level = 0x01, |
| 97 | .rise_edge = 0x02, |
| 98 | .fall_edge = 0x03, |
| 99 | }; |
| 100 | |
| 101 | static struct mxc_gpio_hwdata imx35_gpio_hwdata = { |
| 102 | .dr_reg = 0x00, |
| 103 | .gdir_reg = 0x04, |
| 104 | .psr_reg = 0x08, |
| 105 | .icr1_reg = 0x0c, |
| 106 | .icr2_reg = 0x10, |
| 107 | .imr_reg = 0x14, |
| 108 | .isr_reg = 0x18, |
| 109 | .edge_sel_reg = 0x1c, |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 110 | .low_level = 0x00, |
| 111 | .high_level = 0x01, |
| 112 | .rise_edge = 0x02, |
| 113 | .fall_edge = 0x03, |
| 114 | }; |
| 115 | |
| 116 | static enum mxc_gpio_hwtype mxc_gpio_hwtype; |
| 117 | static struct mxc_gpio_hwdata *mxc_gpio_hwdata; |
| 118 | |
| 119 | #define GPIO_DR (mxc_gpio_hwdata->dr_reg) |
| 120 | #define GPIO_GDIR (mxc_gpio_hwdata->gdir_reg) |
| 121 | #define GPIO_PSR (mxc_gpio_hwdata->psr_reg) |
| 122 | #define GPIO_ICR1 (mxc_gpio_hwdata->icr1_reg) |
| 123 | #define GPIO_ICR2 (mxc_gpio_hwdata->icr2_reg) |
| 124 | #define GPIO_IMR (mxc_gpio_hwdata->imr_reg) |
| 125 | #define GPIO_ISR (mxc_gpio_hwdata->isr_reg) |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 126 | #define GPIO_EDGE_SEL (mxc_gpio_hwdata->edge_sel_reg) |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 127 | |
| 128 | #define GPIO_INT_LOW_LEV (mxc_gpio_hwdata->low_level) |
| 129 | #define GPIO_INT_HIGH_LEV (mxc_gpio_hwdata->high_level) |
| 130 | #define GPIO_INT_RISE_EDGE (mxc_gpio_hwdata->rise_edge) |
| 131 | #define GPIO_INT_FALL_EDGE (mxc_gpio_hwdata->fall_edge) |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 132 | #define GPIO_INT_BOTH_EDGES 0x4 |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 133 | |
| 134 | static struct platform_device_id mxc_gpio_devtype[] = { |
| 135 | { |
| 136 | .name = "imx1-gpio", |
| 137 | .driver_data = IMX1_GPIO, |
| 138 | }, { |
| 139 | .name = "imx21-gpio", |
| 140 | .driver_data = IMX21_GPIO, |
| 141 | }, { |
| 142 | .name = "imx31-gpio", |
| 143 | .driver_data = IMX31_GPIO, |
| 144 | }, { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 145 | .name = "imx35-gpio", |
| 146 | .driver_data = IMX35_GPIO, |
| 147 | }, { |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 148 | /* sentinel */ |
| 149 | } |
| 150 | }; |
| 151 | |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 152 | static const struct of_device_id mxc_gpio_dt_ids[] = { |
| 153 | { .compatible = "fsl,imx1-gpio", .data = &mxc_gpio_devtype[IMX1_GPIO], }, |
| 154 | { .compatible = "fsl,imx21-gpio", .data = &mxc_gpio_devtype[IMX21_GPIO], }, |
| 155 | { .compatible = "fsl,imx31-gpio", .data = &mxc_gpio_devtype[IMX31_GPIO], }, |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 156 | { .compatible = "fsl,imx35-gpio", .data = &mxc_gpio_devtype[IMX35_GPIO], }, |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 157 | { /* sentinel */ } |
| 158 | }; |
| 159 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 160 | /* |
| 161 | * MX2 has one interrupt *for all* gpio ports. The list is used |
| 162 | * to save the references to all ports, so that mx2_gpio_irq_handler |
| 163 | * can walk through all interrupt status registers. |
| 164 | */ |
| 165 | static LIST_HEAD(mxc_gpio_ports); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 166 | |
| 167 | /* Note: This driver assumes 32 GPIOs are handled in one register */ |
| 168 | |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 169 | static int gpio_set_irq_type(struct irq_data *d, u32 type) |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 170 | { |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 171 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 172 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 173 | struct mxc_gpio_port *port = gc->private; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 174 | u32 bit, val; |
| 175 | int edge; |
| 176 | void __iomem *reg = port->base; |
| 177 | |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 178 | port->both_edges &= ~(1 << (gpio & 31)); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 179 | switch (type) { |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 180 | case IRQ_TYPE_EDGE_RISING: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 181 | edge = GPIO_INT_RISE_EDGE; |
| 182 | break; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 183 | case IRQ_TYPE_EDGE_FALLING: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 184 | edge = GPIO_INT_FALL_EDGE; |
| 185 | break; |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 186 | case IRQ_TYPE_EDGE_BOTH: |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 187 | if (GPIO_EDGE_SEL >= 0) { |
| 188 | edge = GPIO_INT_BOTH_EDGES; |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 189 | } else { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 190 | val = gpio_get_value(gpio); |
| 191 | if (val) { |
| 192 | edge = GPIO_INT_LOW_LEV; |
| 193 | pr_debug("mxc: set GPIO %d to low trigger\n", gpio); |
| 194 | } else { |
| 195 | edge = GPIO_INT_HIGH_LEV; |
| 196 | pr_debug("mxc: set GPIO %d to high trigger\n", gpio); |
| 197 | } |
| 198 | port->both_edges |= 1 << (gpio & 31); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 199 | } |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 200 | break; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 201 | case IRQ_TYPE_LEVEL_LOW: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 202 | edge = GPIO_INT_LOW_LEV; |
| 203 | break; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 204 | case IRQ_TYPE_LEVEL_HIGH: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 205 | edge = GPIO_INT_HIGH_LEV; |
| 206 | break; |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 207 | default: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 208 | return -EINVAL; |
| 209 | } |
| 210 | |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 211 | if (GPIO_EDGE_SEL >= 0) { |
| 212 | val = readl(port->base + GPIO_EDGE_SEL); |
| 213 | if (edge == GPIO_INT_BOTH_EDGES) |
| 214 | writel(val | (1 << (gpio & 0x1f)), |
| 215 | port->base + GPIO_EDGE_SEL); |
| 216 | else |
| 217 | writel(val & ~(1 << (gpio & 0x1f)), |
| 218 | port->base + GPIO_EDGE_SEL); |
| 219 | } |
| 220 | |
| 221 | if (edge != GPIO_INT_BOTH_EDGES) { |
| 222 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ |
| 223 | bit = gpio & 0xf; |
| 224 | val = readl(reg) & ~(0x3 << (bit << 1)); |
| 225 | writel(val | (edge << (bit << 1)), reg); |
| 226 | } |
| 227 | |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 228 | writel(1 << (gpio & 0x1f), port->base + GPIO_ISR); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 229 | |
| 230 | return 0; |
| 231 | } |
| 232 | |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 233 | static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) |
| 234 | { |
| 235 | void __iomem *reg = port->base; |
| 236 | u32 bit, val; |
| 237 | int edge; |
| 238 | |
| 239 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ |
| 240 | bit = gpio & 0xf; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 241 | val = readl(reg); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 242 | edge = (val >> (bit << 1)) & 3; |
| 243 | val &= ~(0x3 << (bit << 1)); |
Uwe Kleine-König | 3d40f7f | 2010-02-05 22:14:37 +0100 | [diff] [blame] | 244 | if (edge == GPIO_INT_HIGH_LEV) { |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 245 | edge = GPIO_INT_LOW_LEV; |
| 246 | pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); |
Uwe Kleine-König | 3d40f7f | 2010-02-05 22:14:37 +0100 | [diff] [blame] | 247 | } else if (edge == GPIO_INT_LOW_LEV) { |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 248 | edge = GPIO_INT_HIGH_LEV; |
| 249 | pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); |
Uwe Kleine-König | 3d40f7f | 2010-02-05 22:14:37 +0100 | [diff] [blame] | 250 | } else { |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 251 | pr_err("mxc: invalid configuration for GPIO %d: %x\n", |
| 252 | gpio, edge); |
| 253 | return; |
| 254 | } |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 255 | writel(val | (edge << (bit << 1)), reg); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 256 | } |
| 257 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 258 | /* handle 32 interrupts in one status register */ |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 259 | static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) |
| 260 | { |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 261 | u32 gpio_irq_no_base = port->virtual_irq_start; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 262 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 263 | while (irq_stat != 0) { |
| 264 | int irqoffset = fls(irq_stat) - 1; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 265 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 266 | if (port->both_edges & (1 << irqoffset)) |
| 267 | mxc_flip_edge(port, irqoffset); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 268 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 269 | generic_handle_irq(gpio_irq_no_base + irqoffset); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 270 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 271 | irq_stat &= ~(1 << irqoffset); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 272 | } |
| 273 | } |
| 274 | |
Paulius Zaleckas | cfca8b5 | 2008-11-14 11:01:38 +0100 | [diff] [blame] | 275 | /* MX1 and MX3 has one interrupt *per* gpio port */ |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 276 | static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) |
| 277 | { |
| 278 | u32 irq_stat; |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 279 | struct mxc_gpio_port *port = irq_get_handler_data(irq); |
Shawn Guo | 0e44b6e | 2011-09-21 21:24:04 +0800 | [diff] [blame] | 280 | struct irq_chip *chip = irq_get_chip(irq); |
| 281 | |
| 282 | chained_irq_enter(chip, desc); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 283 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 284 | irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); |
Sascha Hauer | e2c97e7 | 2009-04-21 12:39:59 +0200 | [diff] [blame] | 285 | |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 286 | mxc_gpio_irq_handler(port, irq_stat); |
Shawn Guo | 0e44b6e | 2011-09-21 21:24:04 +0800 | [diff] [blame] | 287 | |
| 288 | chained_irq_exit(chip, desc); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 289 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 290 | |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 291 | /* MX2 has one interrupt *for all* gpio ports */ |
| 292 | static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) |
| 293 | { |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 294 | u32 irq_msk, irq_stat; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 295 | struct mxc_gpio_port *port; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 296 | |
| 297 | /* walk through all interrupt status registers */ |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 298 | list_for_each_entry(port, &mxc_gpio_ports, node) { |
| 299 | irq_msk = readl(port->base + GPIO_IMR); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 300 | if (!irq_msk) |
| 301 | continue; |
| 302 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 303 | irq_stat = readl(port->base + GPIO_ISR) & irq_msk; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 304 | if (irq_stat) |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 305 | mxc_gpio_irq_handler(port, irq_stat); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 306 | } |
| 307 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 308 | |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 309 | /* |
| 310 | * Set interrupt number "irq" in the GPIO as a wake-up source. |
| 311 | * While system is running, all registered GPIO interrupts need to have |
| 312 | * wake-up enabled. When system is suspended, only selected GPIO interrupts |
| 313 | * need to have wake-up enabled. |
| 314 | * @param irq interrupt source number |
| 315 | * @param enable enable as wake-up if equal to non-zero |
| 316 | * @return This function returns 0 on success. |
| 317 | */ |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 318 | static int gpio_set_wake_irq(struct irq_data *d, u32 enable) |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 319 | { |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 320 | u32 gpio = irq_to_gpio(d->irq); |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 321 | u32 gpio_idx = gpio & 0x1F; |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 322 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 323 | struct mxc_gpio_port *port = gc->private; |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 324 | |
| 325 | if (enable) { |
| 326 | if (port->irq_high && (gpio_idx >= 16)) |
| 327 | enable_irq_wake(port->irq_high); |
| 328 | else |
| 329 | enable_irq_wake(port->irq); |
| 330 | } else { |
| 331 | if (port->irq_high && (gpio_idx >= 16)) |
| 332 | disable_irq_wake(port->irq_high); |
| 333 | else |
| 334 | disable_irq_wake(port->irq); |
| 335 | } |
| 336 | |
| 337 | return 0; |
| 338 | } |
| 339 | |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 340 | static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port) |
| 341 | { |
| 342 | struct irq_chip_generic *gc; |
| 343 | struct irq_chip_type *ct; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 344 | |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 345 | gc = irq_alloc_generic_chip("gpio-mxc", 1, port->virtual_irq_start, |
| 346 | port->base, handle_level_irq); |
| 347 | gc->private = port; |
| 348 | |
| 349 | ct = gc->chip_types; |
Shawn Guo | 591567a | 2011-07-19 21:16:56 +0800 | [diff] [blame] | 350 | ct->chip.irq_ack = irq_gc_ack_set_bit; |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 351 | ct->chip.irq_mask = irq_gc_mask_clr_bit; |
| 352 | ct->chip.irq_unmask = irq_gc_mask_set_bit; |
| 353 | ct->chip.irq_set_type = gpio_set_irq_type; |
Shawn Guo | 591567a | 2011-07-19 21:16:56 +0800 | [diff] [blame] | 354 | ct->chip.irq_set_wake = gpio_set_wake_irq; |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 355 | ct->regs.ack = GPIO_ISR; |
| 356 | ct->regs.mask = GPIO_IMR; |
| 357 | |
| 358 | irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK, |
| 359 | IRQ_NOREQUEST, 0); |
| 360 | } |
Thomas Gleixner | b5eee2f | 2011-04-04 14:29:58 +0200 | [diff] [blame] | 361 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 362 | static void __devinit mxc_gpio_get_hw(struct platform_device *pdev) |
| 363 | { |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 364 | const struct of_device_id *of_id = |
| 365 | of_match_device(mxc_gpio_dt_ids, &pdev->dev); |
| 366 | enum mxc_gpio_hwtype hwtype; |
| 367 | |
| 368 | if (of_id) |
| 369 | pdev->id_entry = of_id->data; |
| 370 | hwtype = pdev->id_entry->driver_data; |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 371 | |
| 372 | if (mxc_gpio_hwtype) { |
| 373 | /* |
| 374 | * The driver works with a reasonable presupposition, |
| 375 | * that is all gpio ports must be the same type when |
| 376 | * running on one soc. |
| 377 | */ |
| 378 | BUG_ON(mxc_gpio_hwtype != hwtype); |
| 379 | return; |
| 380 | } |
| 381 | |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame^] | 382 | if (hwtype == IMX35_GPIO) |
| 383 | mxc_gpio_hwdata = &imx35_gpio_hwdata; |
| 384 | else if (hwtype == IMX31_GPIO) |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 385 | mxc_gpio_hwdata = &imx31_gpio_hwdata; |
| 386 | else |
| 387 | mxc_gpio_hwdata = &imx1_imx21_gpio_hwdata; |
| 388 | |
| 389 | mxc_gpio_hwtype = hwtype; |
| 390 | } |
| 391 | |
Shawn Guo | 09ad803 | 2011-08-14 00:14:02 +0800 | [diff] [blame] | 392 | static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
| 393 | { |
| 394 | struct bgpio_chip *bgc = to_bgpio_chip(gc); |
| 395 | struct mxc_gpio_port *port = |
| 396 | container_of(bgc, struct mxc_gpio_port, bgc); |
| 397 | |
| 398 | return port->virtual_irq_start + offset; |
| 399 | } |
| 400 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 401 | static int __devinit mxc_gpio_probe(struct platform_device *pdev) |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 402 | { |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 403 | struct device_node *np = pdev->dev.of_node; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 404 | struct mxc_gpio_port *port; |
| 405 | struct resource *iores; |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 406 | int err; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 407 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 408 | mxc_gpio_get_hw(pdev); |
| 409 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 410 | port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL); |
| 411 | if (!port) |
| 412 | return -ENOMEM; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 413 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 414 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 415 | if (!iores) { |
| 416 | err = -ENODEV; |
| 417 | goto out_kfree; |
| 418 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 419 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 420 | if (!request_mem_region(iores->start, resource_size(iores), |
| 421 | pdev->name)) { |
| 422 | err = -EBUSY; |
| 423 | goto out_kfree; |
| 424 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 425 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 426 | port->base = ioremap(iores->start, resource_size(iores)); |
| 427 | if (!port->base) { |
| 428 | err = -ENOMEM; |
| 429 | goto out_release_mem; |
| 430 | } |
Baruch Siach | 14cb0de | 2010-07-06 14:03:22 +0300 | [diff] [blame] | 431 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 432 | port->irq_high = platform_get_irq(pdev, 1); |
| 433 | port->irq = platform_get_irq(pdev, 0); |
| 434 | if (port->irq < 0) { |
| 435 | err = -EINVAL; |
| 436 | goto out_iounmap; |
| 437 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 438 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 439 | /* disable the interrupt and clear the status */ |
| 440 | writel(0, port->base + GPIO_IMR); |
| 441 | writel(~0, port->base + GPIO_ISR); |
| 442 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 443 | if (mxc_gpio_hwtype == IMX21_GPIO) { |
Sascha Hauer | 8afaada | 2009-06-15 12:36:25 +0200 | [diff] [blame] | 444 | /* setup one handler for all GPIO interrupts */ |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 445 | if (pdev->id == 0) |
| 446 | irq_set_chained_handler(port->irq, |
| 447 | mx2_gpio_irq_handler); |
| 448 | } else { |
| 449 | /* setup one handler for each entry */ |
| 450 | irq_set_chained_handler(port->irq, mx3_gpio_irq_handler); |
| 451 | irq_set_handler_data(port->irq, port); |
| 452 | if (port->irq_high > 0) { |
| 453 | /* setup handler for GPIO 16 to 31 */ |
| 454 | irq_set_chained_handler(port->irq_high, |
| 455 | mx3_gpio_irq_handler); |
| 456 | irq_set_handler_data(port->irq_high, port); |
| 457 | } |
Sascha Hauer | 8afaada | 2009-06-15 12:36:25 +0200 | [diff] [blame] | 458 | } |
| 459 | |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 460 | err = bgpio_init(&port->bgc, &pdev->dev, 4, |
| 461 | port->base + GPIO_PSR, |
| 462 | port->base + GPIO_DR, NULL, |
Shawn Guo | 3e11f7b | 2012-05-19 21:34:58 +0800 | [diff] [blame] | 463 | port->base + GPIO_GDIR, NULL, 0); |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 464 | if (err) |
| 465 | goto out_iounmap; |
| 466 | |
Shawn Guo | 09ad803 | 2011-08-14 00:14:02 +0800 | [diff] [blame] | 467 | port->bgc.gc.to_irq = mxc_gpio_to_irq; |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 468 | port->bgc.gc.base = pdev->id * 32; |
Lothar Waßmann | fb14921 | 2011-07-07 14:50:16 +0200 | [diff] [blame] | 469 | port->bgc.dir = port->bgc.read_reg(port->bgc.reg_dir); |
| 470 | port->bgc.data = port->bgc.read_reg(port->bgc.reg_set); |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 471 | |
| 472 | err = gpiochip_add(&port->bgc.gc); |
| 473 | if (err) |
| 474 | goto out_bgpio_remove; |
| 475 | |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 476 | /* |
| 477 | * In dt case, we use gpio number range dynamically |
| 478 | * allocated by gpio core. |
| 479 | */ |
| 480 | port->virtual_irq_start = MXC_GPIO_IRQ_START + (np ? port->bgc.gc.base : |
| 481 | pdev->id * 32); |
| 482 | |
| 483 | /* gpio-mxc can be a generic irq chip */ |
| 484 | mxc_gpio_init_gc(port); |
| 485 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 486 | list_add_tail(&port->node, &mxc_gpio_ports); |
| 487 | |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 488 | return 0; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 489 | |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 490 | out_bgpio_remove: |
| 491 | bgpio_remove(&port->bgc); |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 492 | out_iounmap: |
| 493 | iounmap(port->base); |
| 494 | out_release_mem: |
| 495 | release_mem_region(iores->start, resource_size(iores)); |
| 496 | out_kfree: |
| 497 | kfree(port); |
| 498 | dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); |
| 499 | return err; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 500 | } |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 501 | |
| 502 | static struct platform_driver mxc_gpio_driver = { |
| 503 | .driver = { |
| 504 | .name = "gpio-mxc", |
| 505 | .owner = THIS_MODULE, |
Shawn Guo | 8937cb6 | 2011-07-07 00:37:43 +0800 | [diff] [blame] | 506 | .of_match_table = mxc_gpio_dt_ids, |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 507 | }, |
| 508 | .probe = mxc_gpio_probe, |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame] | 509 | .id_table = mxc_gpio_devtype, |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 510 | }; |
| 511 | |
| 512 | static int __init gpio_mxc_init(void) |
| 513 | { |
| 514 | return platform_driver_register(&mxc_gpio_driver); |
| 515 | } |
| 516 | postcore_initcall(gpio_mxc_init); |
| 517 | |
| 518 | MODULE_AUTHOR("Freescale Semiconductor, " |
| 519 | "Daniel Mack <danielncaiaq.de>, " |
| 520 | "Juergen Beisert <kernel@pengutronix.de>"); |
| 521 | MODULE_DESCRIPTION("Freescale MXC GPIO"); |
| 522 | MODULE_LICENSE("GPL"); |