Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de> |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * |
| 5 | * Based on code from Freescale, |
Dinh Nguyen | e24798e | 2010-04-22 16:28:42 +0300 | [diff] [blame] | 6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * as published by the Free Software Foundation; either version 2 |
| 11 | * of the License, or (at your option) any later version. |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/init.h> |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 23 | #include <linux/interrupt.h> |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 24 | #include <linux/io.h> |
| 25 | #include <linux/irq.h> |
| 26 | #include <linux/gpio.h> |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/slab.h> |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 29 | #include <linux/basic_mmio_gpio.h> |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 30 | #include <asm-generic/bug.h> |
| 31 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame^] | 32 | enum mxc_gpio_hwtype { |
| 33 | IMX1_GPIO, /* runs on i.mx1 */ |
| 34 | IMX21_GPIO, /* runs on i.mx21 and i.mx27 */ |
| 35 | IMX31_GPIO, /* runs on all other i.mx */ |
| 36 | }; |
| 37 | |
| 38 | /* device type dependent stuff */ |
| 39 | struct mxc_gpio_hwdata { |
| 40 | unsigned dr_reg; |
| 41 | unsigned gdir_reg; |
| 42 | unsigned psr_reg; |
| 43 | unsigned icr1_reg; |
| 44 | unsigned icr2_reg; |
| 45 | unsigned imr_reg; |
| 46 | unsigned isr_reg; |
| 47 | unsigned low_level; |
| 48 | unsigned high_level; |
| 49 | unsigned rise_edge; |
| 50 | unsigned fall_edge; |
| 51 | }; |
| 52 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 53 | struct mxc_gpio_port { |
| 54 | struct list_head node; |
| 55 | void __iomem *base; |
| 56 | int irq; |
| 57 | int irq_high; |
| 58 | int virtual_irq_start; |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 59 | struct bgpio_chip bgc; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 60 | u32 both_edges; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 61 | }; |
| 62 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame^] | 63 | static struct mxc_gpio_hwdata imx1_imx21_gpio_hwdata = { |
| 64 | .dr_reg = 0x1c, |
| 65 | .gdir_reg = 0x00, |
| 66 | .psr_reg = 0x24, |
| 67 | .icr1_reg = 0x28, |
| 68 | .icr2_reg = 0x2c, |
| 69 | .imr_reg = 0x30, |
| 70 | .isr_reg = 0x34, |
| 71 | .low_level = 0x03, |
| 72 | .high_level = 0x02, |
| 73 | .rise_edge = 0x00, |
| 74 | .fall_edge = 0x01, |
| 75 | }; |
| 76 | |
| 77 | static struct mxc_gpio_hwdata imx31_gpio_hwdata = { |
| 78 | .dr_reg = 0x00, |
| 79 | .gdir_reg = 0x04, |
| 80 | .psr_reg = 0x08, |
| 81 | .icr1_reg = 0x0c, |
| 82 | .icr2_reg = 0x10, |
| 83 | .imr_reg = 0x14, |
| 84 | .isr_reg = 0x18, |
| 85 | .low_level = 0x00, |
| 86 | .high_level = 0x01, |
| 87 | .rise_edge = 0x02, |
| 88 | .fall_edge = 0x03, |
| 89 | }; |
| 90 | |
| 91 | static enum mxc_gpio_hwtype mxc_gpio_hwtype; |
| 92 | static struct mxc_gpio_hwdata *mxc_gpio_hwdata; |
| 93 | |
| 94 | #define GPIO_DR (mxc_gpio_hwdata->dr_reg) |
| 95 | #define GPIO_GDIR (mxc_gpio_hwdata->gdir_reg) |
| 96 | #define GPIO_PSR (mxc_gpio_hwdata->psr_reg) |
| 97 | #define GPIO_ICR1 (mxc_gpio_hwdata->icr1_reg) |
| 98 | #define GPIO_ICR2 (mxc_gpio_hwdata->icr2_reg) |
| 99 | #define GPIO_IMR (mxc_gpio_hwdata->imr_reg) |
| 100 | #define GPIO_ISR (mxc_gpio_hwdata->isr_reg) |
| 101 | |
| 102 | #define GPIO_INT_LOW_LEV (mxc_gpio_hwdata->low_level) |
| 103 | #define GPIO_INT_HIGH_LEV (mxc_gpio_hwdata->high_level) |
| 104 | #define GPIO_INT_RISE_EDGE (mxc_gpio_hwdata->rise_edge) |
| 105 | #define GPIO_INT_FALL_EDGE (mxc_gpio_hwdata->fall_edge) |
| 106 | #define GPIO_INT_NONE 0x4 |
| 107 | |
| 108 | static struct platform_device_id mxc_gpio_devtype[] = { |
| 109 | { |
| 110 | .name = "imx1-gpio", |
| 111 | .driver_data = IMX1_GPIO, |
| 112 | }, { |
| 113 | .name = "imx21-gpio", |
| 114 | .driver_data = IMX21_GPIO, |
| 115 | }, { |
| 116 | .name = "imx31-gpio", |
| 117 | .driver_data = IMX31_GPIO, |
| 118 | }, { |
| 119 | /* sentinel */ |
| 120 | } |
| 121 | }; |
| 122 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 123 | /* |
| 124 | * MX2 has one interrupt *for all* gpio ports. The list is used |
| 125 | * to save the references to all ports, so that mx2_gpio_irq_handler |
| 126 | * can walk through all interrupt status registers. |
| 127 | */ |
| 128 | static LIST_HEAD(mxc_gpio_ports); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 129 | |
| 130 | /* Note: This driver assumes 32 GPIOs are handled in one register */ |
| 131 | |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 132 | static int gpio_set_irq_type(struct irq_data *d, u32 type) |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 133 | { |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 134 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 135 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 136 | struct mxc_gpio_port *port = gc->private; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 137 | u32 bit, val; |
| 138 | int edge; |
| 139 | void __iomem *reg = port->base; |
| 140 | |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 141 | port->both_edges &= ~(1 << (gpio & 31)); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 142 | switch (type) { |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 143 | case IRQ_TYPE_EDGE_RISING: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 144 | edge = GPIO_INT_RISE_EDGE; |
| 145 | break; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 146 | case IRQ_TYPE_EDGE_FALLING: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 147 | edge = GPIO_INT_FALL_EDGE; |
| 148 | break; |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 149 | case IRQ_TYPE_EDGE_BOTH: |
Shawn Guo | 5523f86b | 2011-06-12 01:33:29 +0800 | [diff] [blame] | 150 | val = gpio_get_value(gpio); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 151 | if (val) { |
| 152 | edge = GPIO_INT_LOW_LEV; |
| 153 | pr_debug("mxc: set GPIO %d to low trigger\n", gpio); |
| 154 | } else { |
| 155 | edge = GPIO_INT_HIGH_LEV; |
| 156 | pr_debug("mxc: set GPIO %d to high trigger\n", gpio); |
| 157 | } |
| 158 | port->both_edges |= 1 << (gpio & 31); |
| 159 | break; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 160 | case IRQ_TYPE_LEVEL_LOW: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 161 | edge = GPIO_INT_LOW_LEV; |
| 162 | break; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 163 | case IRQ_TYPE_LEVEL_HIGH: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 164 | edge = GPIO_INT_HIGH_LEV; |
| 165 | break; |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 166 | default: |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 167 | return -EINVAL; |
| 168 | } |
| 169 | |
| 170 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ |
| 171 | bit = gpio & 0xf; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 172 | val = readl(reg) & ~(0x3 << (bit << 1)); |
| 173 | writel(val | (edge << (bit << 1)), reg); |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 174 | writel(1 << (gpio & 0x1f), port->base + GPIO_ISR); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 179 | static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) |
| 180 | { |
| 181 | void __iomem *reg = port->base; |
| 182 | u32 bit, val; |
| 183 | int edge; |
| 184 | |
| 185 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ |
| 186 | bit = gpio & 0xf; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 187 | val = readl(reg); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 188 | edge = (val >> (bit << 1)) & 3; |
| 189 | val &= ~(0x3 << (bit << 1)); |
Uwe Kleine-König | 3d40f7f | 2010-02-05 22:14:37 +0100 | [diff] [blame] | 190 | if (edge == GPIO_INT_HIGH_LEV) { |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 191 | edge = GPIO_INT_LOW_LEV; |
| 192 | pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); |
Uwe Kleine-König | 3d40f7f | 2010-02-05 22:14:37 +0100 | [diff] [blame] | 193 | } else if (edge == GPIO_INT_LOW_LEV) { |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 194 | edge = GPIO_INT_HIGH_LEV; |
| 195 | pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); |
Uwe Kleine-König | 3d40f7f | 2010-02-05 22:14:37 +0100 | [diff] [blame] | 196 | } else { |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 197 | pr_err("mxc: invalid configuration for GPIO %d: %x\n", |
| 198 | gpio, edge); |
| 199 | return; |
| 200 | } |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 201 | writel(val | (edge << (bit << 1)), reg); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 202 | } |
| 203 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 204 | /* handle 32 interrupts in one status register */ |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 205 | static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) |
| 206 | { |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 207 | u32 gpio_irq_no_base = port->virtual_irq_start; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 208 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 209 | while (irq_stat != 0) { |
| 210 | int irqoffset = fls(irq_stat) - 1; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 211 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 212 | if (port->both_edges & (1 << irqoffset)) |
| 213 | mxc_flip_edge(port, irqoffset); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 214 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 215 | generic_handle_irq(gpio_irq_no_base + irqoffset); |
Guennadi Liakhovetski | 910862e | 2009-03-12 12:46:41 +0100 | [diff] [blame] | 216 | |
Uwe Kleine-König | 3621f18 | 2010-02-08 21:02:30 +0100 | [diff] [blame] | 217 | irq_stat &= ~(1 << irqoffset); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 218 | } |
| 219 | } |
| 220 | |
Paulius Zaleckas | cfca8b5 | 2008-11-14 11:01:38 +0100 | [diff] [blame] | 221 | /* MX1 and MX3 has one interrupt *per* gpio port */ |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 222 | static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) |
| 223 | { |
| 224 | u32 irq_stat; |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 225 | struct mxc_gpio_port *port = irq_get_handler_data(irq); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 226 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 227 | irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); |
Sascha Hauer | e2c97e7 | 2009-04-21 12:39:59 +0200 | [diff] [blame] | 228 | |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 229 | mxc_gpio_irq_handler(port, irq_stat); |
| 230 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 231 | |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 232 | /* MX2 has one interrupt *for all* gpio ports */ |
| 233 | static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) |
| 234 | { |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 235 | u32 irq_msk, irq_stat; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 236 | struct mxc_gpio_port *port; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 237 | |
| 238 | /* walk through all interrupt status registers */ |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 239 | list_for_each_entry(port, &mxc_gpio_ports, node) { |
| 240 | irq_msk = readl(port->base + GPIO_IMR); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 241 | if (!irq_msk) |
| 242 | continue; |
| 243 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 244 | irq_stat = readl(port->base + GPIO_ISR) & irq_msk; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 245 | if (irq_stat) |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 246 | mxc_gpio_irq_handler(port, irq_stat); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 247 | } |
| 248 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 249 | |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 250 | /* |
| 251 | * Set interrupt number "irq" in the GPIO as a wake-up source. |
| 252 | * While system is running, all registered GPIO interrupts need to have |
| 253 | * wake-up enabled. When system is suspended, only selected GPIO interrupts |
| 254 | * need to have wake-up enabled. |
| 255 | * @param irq interrupt source number |
| 256 | * @param enable enable as wake-up if equal to non-zero |
| 257 | * @return This function returns 0 on success. |
| 258 | */ |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 259 | static int gpio_set_wake_irq(struct irq_data *d, u32 enable) |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 260 | { |
Lennert Buytenhek | 4d93579 | 2010-11-29 11:16:23 +0100 | [diff] [blame] | 261 | u32 gpio = irq_to_gpio(d->irq); |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 262 | u32 gpio_idx = gpio & 0x1F; |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 263 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 264 | struct mxc_gpio_port *port = gc->private; |
Dinh Nguyen | a3484ff | 2010-10-23 09:12:48 -0500 | [diff] [blame] | 265 | |
| 266 | if (enable) { |
| 267 | if (port->irq_high && (gpio_idx >= 16)) |
| 268 | enable_irq_wake(port->irq_high); |
| 269 | else |
| 270 | enable_irq_wake(port->irq); |
| 271 | } else { |
| 272 | if (port->irq_high && (gpio_idx >= 16)) |
| 273 | disable_irq_wake(port->irq_high); |
| 274 | else |
| 275 | disable_irq_wake(port->irq); |
| 276 | } |
| 277 | |
| 278 | return 0; |
| 279 | } |
| 280 | |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 281 | static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port) |
| 282 | { |
| 283 | struct irq_chip_generic *gc; |
| 284 | struct irq_chip_type *ct; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 285 | |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 286 | gc = irq_alloc_generic_chip("gpio-mxc", 1, port->virtual_irq_start, |
| 287 | port->base, handle_level_irq); |
| 288 | gc->private = port; |
| 289 | |
| 290 | ct = gc->chip_types; |
| 291 | ct->chip.irq_ack = irq_gc_ack, |
| 292 | ct->chip.irq_mask = irq_gc_mask_clr_bit; |
| 293 | ct->chip.irq_unmask = irq_gc_mask_set_bit; |
| 294 | ct->chip.irq_set_type = gpio_set_irq_type; |
| 295 | ct->chip.irq_set_wake = gpio_set_wake_irq, |
| 296 | ct->regs.ack = GPIO_ISR; |
| 297 | ct->regs.mask = GPIO_IMR; |
| 298 | |
| 299 | irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK, |
| 300 | IRQ_NOREQUEST, 0); |
| 301 | } |
Thomas Gleixner | b5eee2f | 2011-04-04 14:29:58 +0200 | [diff] [blame] | 302 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame^] | 303 | static void __devinit mxc_gpio_get_hw(struct platform_device *pdev) |
| 304 | { |
| 305 | enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data; |
| 306 | |
| 307 | if (mxc_gpio_hwtype) { |
| 308 | /* |
| 309 | * The driver works with a reasonable presupposition, |
| 310 | * that is all gpio ports must be the same type when |
| 311 | * running on one soc. |
| 312 | */ |
| 313 | BUG_ON(mxc_gpio_hwtype != hwtype); |
| 314 | return; |
| 315 | } |
| 316 | |
| 317 | if (hwtype == IMX31_GPIO) |
| 318 | mxc_gpio_hwdata = &imx31_gpio_hwdata; |
| 319 | else |
| 320 | mxc_gpio_hwdata = &imx1_imx21_gpio_hwdata; |
| 321 | |
| 322 | mxc_gpio_hwtype = hwtype; |
| 323 | } |
| 324 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 325 | static int __devinit mxc_gpio_probe(struct platform_device *pdev) |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 326 | { |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 327 | struct mxc_gpio_port *port; |
| 328 | struct resource *iores; |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 329 | int err; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 330 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame^] | 331 | mxc_gpio_get_hw(pdev); |
| 332 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 333 | port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL); |
| 334 | if (!port) |
| 335 | return -ENOMEM; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 336 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 337 | port->virtual_irq_start = MXC_GPIO_IRQ_START + pdev->id * 32; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 338 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 339 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 340 | if (!iores) { |
| 341 | err = -ENODEV; |
| 342 | goto out_kfree; |
| 343 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 344 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 345 | if (!request_mem_region(iores->start, resource_size(iores), |
| 346 | pdev->name)) { |
| 347 | err = -EBUSY; |
| 348 | goto out_kfree; |
| 349 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 350 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 351 | port->base = ioremap(iores->start, resource_size(iores)); |
| 352 | if (!port->base) { |
| 353 | err = -ENOMEM; |
| 354 | goto out_release_mem; |
| 355 | } |
Baruch Siach | 14cb0de | 2010-07-06 14:03:22 +0300 | [diff] [blame] | 356 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 357 | port->irq_high = platform_get_irq(pdev, 1); |
| 358 | port->irq = platform_get_irq(pdev, 0); |
| 359 | if (port->irq < 0) { |
| 360 | err = -EINVAL; |
| 361 | goto out_iounmap; |
| 362 | } |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 363 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 364 | /* disable the interrupt and clear the status */ |
| 365 | writel(0, port->base + GPIO_IMR); |
| 366 | writel(~0, port->base + GPIO_ISR); |
| 367 | |
Shawn Guo | e4ea933 | 2011-06-07 16:25:37 +0800 | [diff] [blame] | 368 | /* gpio-mxc can be a generic irq chip */ |
| 369 | mxc_gpio_init_gc(port); |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 370 | |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame^] | 371 | if (mxc_gpio_hwtype == IMX21_GPIO) { |
Sascha Hauer | 8afaada | 2009-06-15 12:36:25 +0200 | [diff] [blame] | 372 | /* setup one handler for all GPIO interrupts */ |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 373 | if (pdev->id == 0) |
| 374 | irq_set_chained_handler(port->irq, |
| 375 | mx2_gpio_irq_handler); |
| 376 | } else { |
| 377 | /* setup one handler for each entry */ |
| 378 | irq_set_chained_handler(port->irq, mx3_gpio_irq_handler); |
| 379 | irq_set_handler_data(port->irq, port); |
| 380 | if (port->irq_high > 0) { |
| 381 | /* setup handler for GPIO 16 to 31 */ |
| 382 | irq_set_chained_handler(port->irq_high, |
| 383 | mx3_gpio_irq_handler); |
| 384 | irq_set_handler_data(port->irq_high, port); |
| 385 | } |
Sascha Hauer | 8afaada | 2009-06-15 12:36:25 +0200 | [diff] [blame] | 386 | } |
| 387 | |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 388 | err = bgpio_init(&port->bgc, &pdev->dev, 4, |
| 389 | port->base + GPIO_PSR, |
| 390 | port->base + GPIO_DR, NULL, |
| 391 | port->base + GPIO_GDIR, NULL, false); |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 392 | if (err) |
| 393 | goto out_iounmap; |
| 394 | |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 395 | port->bgc.gc.base = pdev->id * 32; |
Lothar Waßmann | fb14921 | 2011-07-07 14:50:16 +0200 | [diff] [blame] | 396 | port->bgc.dir = port->bgc.read_reg(port->bgc.reg_dir); |
| 397 | port->bgc.data = port->bgc.read_reg(port->bgc.reg_set); |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 398 | |
| 399 | err = gpiochip_add(&port->bgc.gc); |
| 400 | if (err) |
| 401 | goto out_bgpio_remove; |
| 402 | |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 403 | list_add_tail(&port->node, &mxc_gpio_ports); |
| 404 | |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 405 | return 0; |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 406 | |
Shawn Guo | 2ce420d | 2011-06-06 13:22:41 +0800 | [diff] [blame] | 407 | out_bgpio_remove: |
| 408 | bgpio_remove(&port->bgc); |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 409 | out_iounmap: |
| 410 | iounmap(port->base); |
| 411 | out_release_mem: |
| 412 | release_mem_region(iores->start, resource_size(iores)); |
| 413 | out_kfree: |
| 414 | kfree(port); |
| 415 | dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); |
| 416 | return err; |
Juergen Beisert | 07bd1a6 | 2008-07-05 10:02:49 +0200 | [diff] [blame] | 417 | } |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 418 | |
| 419 | static struct platform_driver mxc_gpio_driver = { |
| 420 | .driver = { |
| 421 | .name = "gpio-mxc", |
| 422 | .owner = THIS_MODULE, |
| 423 | }, |
| 424 | .probe = mxc_gpio_probe, |
Shawn Guo | e7fc6ae | 2011-07-07 00:37:41 +0800 | [diff] [blame^] | 425 | .id_table = mxc_gpio_devtype, |
Shawn Guo | b78d8e5 | 2011-06-06 00:07:55 +0800 | [diff] [blame] | 426 | }; |
| 427 | |
| 428 | static int __init gpio_mxc_init(void) |
| 429 | { |
| 430 | return platform_driver_register(&mxc_gpio_driver); |
| 431 | } |
| 432 | postcore_initcall(gpio_mxc_init); |
| 433 | |
| 434 | MODULE_AUTHOR("Freescale Semiconductor, " |
| 435 | "Daniel Mack <danielncaiaq.de>, " |
| 436 | "Juergen Beisert <kernel@pengutronix.de>"); |
| 437 | MODULE_DESCRIPTION("Freescale MXC GPIO"); |
| 438 | MODULE_LICENSE("GPL"); |