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Wei WANG67d16a42012-11-09 20:53:33 +08001/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * Wei WANG <wei_wang@realsil.com.cn>
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/module.h>
24#include <linux/delay.h>
25#include <linux/mfd/rtsx_pci.h>
26
27#include "rtsx_pcr.h"
28
29static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr)
30{
31 u8 val;
32
33 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
34 return val & 0x0F;
35}
36
Wei WANG773ccdf2013-08-20 14:18:51 +080037static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
38{
39 u32 reg;
40
41 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
42 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
43
44 if (!rtsx_vendor_setting_valid(reg))
45 return;
46
47 pcr->aspm_en = rtsx_reg_to_aspm(reg);
48 pcr->sd30_drive_sel_1v8 =
49 map_sd_drive(rtsx_reg_to_sd30_drive_sel_1v8(reg));
50 pcr->card_drive_sel &= 0x3F;
51 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
52
53 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
54 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
55 pcr->sd30_drive_sel_3v3 =
56 map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
57}
58
Wei WANG5947c162013-08-20 14:18:52 +080059static void rts5229_force_power_down(struct rtsx_pcr *pcr)
60{
61 rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
62}
63
Wei WANG67d16a42012-11-09 20:53:33 +080064static int rts5229_extra_init_hw(struct rtsx_pcr *pcr)
65{
66 rtsx_pci_init_cmd(pcr);
67
68 /* Configure GPIO as output */
69 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
Wei WANG71408122013-08-20 14:18:53 +080070 /* Reset ASPM state to default value */
71 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
72 /* Force CLKREQ# PIN to drive 0 to request clock */
73 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
Wei WANG67d16a42012-11-09 20:53:33 +080074 /* Switch LDO3318 source from DV33 to card_3v3 */
75 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
76 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
77 /* LED shine disabled, set initial shine cycle period */
78 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
Wei WANG773ccdf2013-08-20 14:18:51 +080079 /* Configure driving */
80 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
81 0xFF, pcr->sd30_drive_sel_3v3);
Wei WANG67d16a42012-11-09 20:53:33 +080082
83 return rtsx_pci_send_cmd(pcr, 100);
84}
85
86static int rts5229_optimize_phy(struct rtsx_pcr *pcr)
87{
88 /* Optimize RX sensitivity */
89 return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);
90}
91
92static int rts5229_turn_on_led(struct rtsx_pcr *pcr)
93{
94 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
95}
96
97static int rts5229_turn_off_led(struct rtsx_pcr *pcr)
98{
99 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
100}
101
102static int rts5229_enable_auto_blink(struct rtsx_pcr *pcr)
103{
104 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
105}
106
107static int rts5229_disable_auto_blink(struct rtsx_pcr *pcr)
108{
109 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
110}
111
112static int rts5229_card_power_on(struct rtsx_pcr *pcr, int card)
113{
114 int err;
115
116 rtsx_pci_init_cmd(pcr);
117 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
118 SD_POWER_MASK, SD_PARTIAL_POWER_ON);
119 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
120 LDO3318_PWR_MASK, 0x02);
121 err = rtsx_pci_send_cmd(pcr, 100);
122 if (err < 0)
123 return err;
124
125 /* To avoid too large in-rush current */
126 udelay(150);
127
128 rtsx_pci_init_cmd(pcr);
129 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
130 SD_POWER_MASK, SD_POWER_ON);
131 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
132 LDO3318_PWR_MASK, 0x06);
133 err = rtsx_pci_send_cmd(pcr, 100);
134 if (err < 0)
135 return err;
136
137 return 0;
138}
139
140static int rts5229_card_power_off(struct rtsx_pcr *pcr, int card)
141{
142 rtsx_pci_init_cmd(pcr);
143 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
144 SD_POWER_MASK | PMOS_STRG_MASK,
145 SD_POWER_OFF | PMOS_STRG_400mA);
146 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
Wei WANG773ccdf2013-08-20 14:18:51 +0800147 LDO3318_PWR_MASK, 0x00);
Wei WANG67d16a42012-11-09 20:53:33 +0800148 return rtsx_pci_send_cmd(pcr, 100);
149}
150
Wei WANGd817ac42013-01-23 09:51:04 +0800151static int rts5229_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
152{
153 int err;
154
155 if (voltage == OUTPUT_3V3) {
Roger Tseng88a7ee32013-02-04 15:45:58 +0800156 err = rtsx_pci_write_register(pcr,
Wei WANG773ccdf2013-08-20 14:18:51 +0800157 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
Roger Tseng88a7ee32013-02-04 15:45:58 +0800158 if (err < 0)
159 return err;
Wei WANGd817ac42013-01-23 09:51:04 +0800160 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
161 if (err < 0)
162 return err;
163 } else if (voltage == OUTPUT_1V8) {
Roger Tseng88a7ee32013-02-04 15:45:58 +0800164 err = rtsx_pci_write_register(pcr,
Wei WANG773ccdf2013-08-20 14:18:51 +0800165 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
Roger Tseng88a7ee32013-02-04 15:45:58 +0800166 if (err < 0)
167 return err;
Wei WANGd817ac42013-01-23 09:51:04 +0800168 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
169 if (err < 0)
170 return err;
171 } else {
172 return -EINVAL;
173 }
174
175 return 0;
176}
177
Wei WANG67d16a42012-11-09 20:53:33 +0800178static const struct pcr_ops rts5229_pcr_ops = {
Wei WANG773ccdf2013-08-20 14:18:51 +0800179 .fetch_vendor_settings = rts5229_fetch_vendor_settings,
Wei WANG67d16a42012-11-09 20:53:33 +0800180 .extra_init_hw = rts5229_extra_init_hw,
181 .optimize_phy = rts5229_optimize_phy,
182 .turn_on_led = rts5229_turn_on_led,
183 .turn_off_led = rts5229_turn_off_led,
184 .enable_auto_blink = rts5229_enable_auto_blink,
185 .disable_auto_blink = rts5229_disable_auto_blink,
186 .card_power_on = rts5229_card_power_on,
187 .card_power_off = rts5229_card_power_off,
Wei WANGd817ac42013-01-23 09:51:04 +0800188 .switch_output_voltage = rts5229_switch_output_voltage,
Wei WANG67d16a42012-11-09 20:53:33 +0800189 .cd_deglitch = NULL,
Wei WANGab4e8f82013-01-23 09:51:06 +0800190 .conv_clk_and_div_n = NULL,
Wei WANG5947c162013-08-20 14:18:52 +0800191 .force_power_down = rts5229_force_power_down,
Wei WANG67d16a42012-11-09 20:53:33 +0800192};
193
194/* SD Pull Control Enable:
195 * SD_DAT[3:0] ==> pull up
196 * SD_CD ==> pull up
197 * SD_WP ==> pull up
198 * SD_CMD ==> pull up
199 * SD_CLK ==> pull down
200 */
201static const u32 rts5229_sd_pull_ctl_enable_tbl1[] = {
202 RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
203 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
204 0,
205};
206
207/* For RTS5229 version C */
208static const u32 rts5229_sd_pull_ctl_enable_tbl2[] = {
209 RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
210 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD9),
211 0,
212};
213
214/* SD Pull Control Disable:
215 * SD_DAT[3:0] ==> pull down
216 * SD_CD ==> pull up
217 * SD_WP ==> pull down
218 * SD_CMD ==> pull down
219 * SD_CLK ==> pull down
220 */
221static const u32 rts5229_sd_pull_ctl_disable_tbl1[] = {
222 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
223 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
224 0,
225};
226
227/* For RTS5229 version C */
228static const u32 rts5229_sd_pull_ctl_disable_tbl2[] = {
229 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
230 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE5),
231 0,
232};
233
234/* MS Pull Control Enable:
235 * MS CD ==> pull up
236 * others ==> pull down
237 */
238static const u32 rts5229_ms_pull_ctl_enable_tbl[] = {
239 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
240 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
241 0,
242};
243
244/* MS Pull Control Disable:
245 * MS CD ==> pull up
246 * others ==> pull down
247 */
248static const u32 rts5229_ms_pull_ctl_disable_tbl[] = {
249 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
250 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
251 0,
252};
253
254void rts5229_init_params(struct rtsx_pcr *pcr)
255{
256 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
257 pcr->num_slots = 2;
258 pcr->ops = &rts5229_pcr_ops;
259
Wei WANG773ccdf2013-08-20 14:18:51 +0800260 pcr->flags = 0;
261 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
262 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
263 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
264 pcr->aspm_en = ASPM_L1_EN;
265
Wei WANG67d16a42012-11-09 20:53:33 +0800266 pcr->ic_version = rts5229_get_ic_version(pcr);
267 if (pcr->ic_version == IC_VER_C) {
268 pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl2;
269 pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl2;
270 } else {
271 pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl1;
272 pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl1;
273 }
274 pcr->ms_pull_ctl_enable_tbl = rts5229_ms_pull_ctl_enable_tbl;
275 pcr->ms_pull_ctl_disable_tbl = rts5229_ms_pull_ctl_disable_tbl;
276}