| Dan Albert | 287553d | 2017-02-16 10:47:51 -0800 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _ASM_SN_SN0_ADDRS_H |
| 20 | #define _ASM_SN_SN0_ADDRS_H |
| 21 | #define NODE_SIZE_BITS 32 |
| 22 | #define BWIN_SIZE_BITS 29 |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | #define NASID_BITMASK (0xffLL) |
| 25 | #define NASID_BITS 8 |
| 26 | #define NASID_SHFT 32 |
| 27 | #define NASID_META_BITS 4 |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | #define NASID_LOCAL_BITS 4 |
| 30 | #define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) |
| 31 | #define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) |
| 32 | #define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | #define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) |
| 35 | #define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> NASID_SHFT) & NASID_BITMASK) |
| 36 | #ifndef __ASSEMBLY__ |
| 37 | #define NODE_SWIN_BASE(nasid, widget) ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) : RAW_NODE_SWIN_BASE(nasid, widget)) |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | #else |
| 40 | #define NODE_SWIN_BASE(nasid, widget) (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) |
| 41 | #endif |
| 42 | #define BWIN_INDEX_BITS 3 |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | #define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) |
| 45 | #define BWIN_SIZEMASK (BWIN_SIZE - 1) |
| 46 | #define BWIN_WIDGET_MASK 0x7 |
| 47 | #define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | #define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + (UINT64_CAST(bigwin) << BWIN_SIZE_BITS)) |
| 50 | #define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) |
| 51 | #define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) |
| 52 | #define NODE_BWIN_ADDR(nasid, addr) (((addr) >= NODE_BWIN_BASE0(nasid)) && ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + BWIN_SIZE))) |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | #define CALIAS_BASE CAC_BASE |
| 55 | #define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) ((__psunsigned_t)(_base) + (__psunsigned_t)(_off))) |
| 56 | #define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid))) |
| 57 | #define SABLE_LOG_TRIGGER(_map) |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | #ifndef __ASSEMBLY__ |
| 60 | #define KERN_NMI_ADDR(nasid, slice) TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + (IP27_NMI_KREGS_CPU_SIZE * (slice))) |
| 61 | #endif |
| 62 | #ifdef PROM |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | #define MISC_PROM_BASE PHYS_TO_K0(0x01300000) |
| 65 | #define MISC_PROM_SIZE 0x200000 |
| 66 | #define DIAG_BASE PHYS_TO_K0(0x01500000) |
| 67 | #define DIAG_SIZE 0x300000 |
| 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 69 | #define ROUTE_BASE PHYS_TO_K0(0x01800000) |
| 70 | #define ROUTE_SIZE 0x200000 |
| 71 | #define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000) |
| 72 | #define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000) |
| 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 74 | #define IP27PROM_CORP_MAX 32 |
| 75 | #define IP27PROM_CORP PHYS_TO_K0(0x01800000) |
| 76 | #define IP27PROM_CORP_SIZE 0x10000 |
| 77 | #define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000) |
| 78 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 79 | #define IP27PROM_CORP_STKSIZE 0x2000 |
| 80 | #define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000) |
| 81 | #define IP27PROM_DECOMP_SIZE 0xfff00 |
| 82 | #define IP27PROM_BASE PHYS_TO_K0(0x01a00000) |
| 83 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 84 | #define IP27PROM_BASE_MAPPED (UNCAC_BASE | 0x1fc00000) |
| 85 | #define IP27PROM_SIZE_MAX 0x100000 |
| 86 | #define IP27PROM_PCFG PHYS_TO_K0(0x01b00000) |
| 87 | #define IP27PROM_PCFG_SIZE 0xd0000 |
| 88 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 89 | #define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000) |
| 90 | #define IP27PROM_ERRDMP_SIZE 0xf000 |
| 91 | #define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000) |
| 92 | #define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000) |
| 93 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 94 | #define IP27PROM_CONSOLE_SIZE 0x200 |
| 95 | #define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200) |
| 96 | #define IP27PROM_NETUART_SIZE 0x100 |
| 97 | #define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300) |
| 98 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 99 | #define IP27PROM_UNUSED1_SIZE 0x500 |
| 100 | #define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800) |
| 101 | #define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00) |
| 102 | #define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000) |
| 103 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 104 | #define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000) |
| 105 | #define IP27PROM_STACK_SHFT 16 |
| 106 | #define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT) |
| 107 | #define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000) |
| 108 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 109 | #define SLAVESTACK_BASE PHYS_TO_K0(0x01580000) |
| 110 | #define SLAVESTACK_SIZE 0x40000 |
| 111 | #define ENETBUFS_BASE PHYS_TO_K0(0x01f80000) |
| 112 | #define ENETBUFS_SIZE 0x20000 |
| 113 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 114 | #define IO6PROM_BASE PHYS_TO_K0(0x01c00000) |
| 115 | #define IO6PROM_SIZE 0x400000 |
| 116 | #define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000) |
| 117 | #define IO6DPROM_BASE PHYS_TO_K0(0x01c00000) |
| 118 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 119 | #define IO6DPROM_SIZE 0x200000 |
| 120 | #define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000) |
| 121 | #define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000) |
| 122 | #define IP27PROM_INT_LAUNCH 10 |
| 123 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 124 | #define IP27PROM_INT_NETUART 12 |
| 125 | #endif |
| 126 | #define IP27PROM_ELSC_SHFT 10 |
| 127 | #define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT) |
| 128 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 129 | #define FREEMEM_BASE PHYS_TO_K0(0x2000000) |
| 130 | #define IO6PROM_STACK_SHFT 14 |
| 131 | #define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT) |
| 132 | #define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000) |
| 133 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 134 | #define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008) |
| 135 | #define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010) |
| 136 | #define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018) |
| 137 | #define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020) |
| 138 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 139 | #define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028) |
| 140 | #define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030) |
| 141 | #define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038) |
| 142 | #define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040) |
| 143 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 144 | #define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048) |
| 145 | #define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) |
| 146 | #define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) |
| 147 | #define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) |
| 148 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 149 | #define KL_I2C_REG MD_UREG0_0 |
| 150 | #ifndef __ASSEMBLY__ |
| 151 | #ifdef HUB_ERR_STS_WAR |
| 152 | #define CACHE_ERR_EFRAME 0x480 |
| 153 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 154 | #else |
| 155 | #define CACHE_ERR_EFRAME 0x400 |
| 156 | #endif |
| 157 | #define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE) |
| 158 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 159 | #define CACHE_ERR_SP_PTR (0x1000 - 32) |
| 160 | #define CACHE_ERR_IBASE_PTR (0x1000 - 40) |
| 161 | #define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16) |
| 162 | #define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME) |
| 163 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 164 | #endif |
| 165 | #define _ARCSPROM |
| 166 | #ifdef HUB_ERR_STS_WAR |
| 167 | #define ERR_STS_WAR_REGISTER IIO_IIBUSERR |
| 168 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 169 | #define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) |
| 170 | #define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR) |
| 171 | #define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100) |
| 172 | #endif |
| 173 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 174 | #endif |