Andrea Falcone | 1c4977f | 2020-07-23 10:58:25 -0400 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _LINUX__HFI1_USER_H |
| 20 | #define _LINUX__HFI1_USER_H |
| 21 | #include <linux/types.h> |
| 22 | #include <rdma/rdma_user_ioctl.h> |
| 23 | #define HFI1_USER_SWMAJOR 6 |
| 24 | #define HFI1_USER_SWMINOR 3 |
| 25 | #define HFI1_SWMAJOR_SHIFT 16 |
| 26 | #define HFI1_CAP_DMA_RTAIL (1UL << 0) |
| 27 | #define HFI1_CAP_SDMA (1UL << 1) |
| 28 | #define HFI1_CAP_SDMA_AHG (1UL << 2) |
| 29 | #define HFI1_CAP_EXTENDED_PSN (1UL << 3) |
| 30 | #define HFI1_CAP_HDRSUPP (1UL << 4) |
| 31 | #define HFI1_CAP_TID_RDMA (1UL << 5) |
| 32 | #define HFI1_CAP_USE_SDMA_HEAD (1UL << 6) |
| 33 | #define HFI1_CAP_MULTI_PKT_EGR (1UL << 7) |
| 34 | #define HFI1_CAP_NODROP_RHQ_FULL (1UL << 8) |
| 35 | #define HFI1_CAP_NODROP_EGR_FULL (1UL << 9) |
| 36 | #define HFI1_CAP_TID_UNMAP (1UL << 10) |
| 37 | #define HFI1_CAP_PRINT_UNIMPL (1UL << 11) |
| 38 | #define HFI1_CAP_ALLOW_PERM_JKEY (1UL << 12) |
| 39 | #define HFI1_CAP_NO_INTEGRITY (1UL << 13) |
| 40 | #define HFI1_CAP_PKEY_CHECK (1UL << 14) |
| 41 | #define HFI1_CAP_STATIC_RATE_CTRL (1UL << 15) |
| 42 | #define HFI1_CAP_OPFN (1UL << 16) |
| 43 | #define HFI1_CAP_SDMA_HEAD_CHECK (1UL << 17) |
| 44 | #define HFI1_CAP_EARLY_CREDIT_RETURN (1UL << 18) |
| 45 | #define HFI1_RCVHDR_ENTSIZE_2 (1UL << 0) |
| 46 | #define HFI1_RCVHDR_ENTSIZE_16 (1UL << 1) |
| 47 | #define HFI1_RCVDHR_ENTSIZE_32 (1UL << 2) |
| 48 | #define _HFI1_EVENT_FROZEN_BIT 0 |
| 49 | #define _HFI1_EVENT_LINKDOWN_BIT 1 |
| 50 | #define _HFI1_EVENT_LID_CHANGE_BIT 2 |
| 51 | #define _HFI1_EVENT_LMC_CHANGE_BIT 3 |
| 52 | #define _HFI1_EVENT_SL2VL_CHANGE_BIT 4 |
| 53 | #define _HFI1_EVENT_TID_MMU_NOTIFY_BIT 5 |
| 54 | #define _HFI1_MAX_EVENT_BIT _HFI1_EVENT_TID_MMU_NOTIFY_BIT |
| 55 | #define HFI1_EVENT_FROZEN (1UL << _HFI1_EVENT_FROZEN_BIT) |
| 56 | #define HFI1_EVENT_LINKDOWN (1UL << _HFI1_EVENT_LINKDOWN_BIT) |
| 57 | #define HFI1_EVENT_LID_CHANGE (1UL << _HFI1_EVENT_LID_CHANGE_BIT) |
| 58 | #define HFI1_EVENT_LMC_CHANGE (1UL << _HFI1_EVENT_LMC_CHANGE_BIT) |
| 59 | #define HFI1_EVENT_SL2VL_CHANGE (1UL << _HFI1_EVENT_SL2VL_CHANGE_BIT) |
| 60 | #define HFI1_EVENT_TID_MMU_NOTIFY (1UL << _HFI1_EVENT_TID_MMU_NOTIFY_BIT) |
| 61 | #define HFI1_STATUS_INITTED 0x1 |
| 62 | #define HFI1_STATUS_CHIP_PRESENT 0x20 |
| 63 | #define HFI1_STATUS_IB_READY 0x40 |
| 64 | #define HFI1_STATUS_IB_CONF 0x80 |
| 65 | #define HFI1_STATUS_HWERROR 0x200 |
| 66 | #define HFI1_MAX_SHARED_CTXTS 8 |
| 67 | #define HFI1_POLL_TYPE_ANYRCV 0x0 |
| 68 | #define HFI1_POLL_TYPE_URGENT 0x1 |
| 69 | enum hfi1_sdma_comp_state { |
| 70 | FREE = 0, |
| 71 | QUEUED, |
| 72 | COMPLETE, |
| 73 | ERROR |
| 74 | }; |
| 75 | struct hfi1_sdma_comp_entry { |
| 76 | __u32 status; |
| 77 | __u32 errcode; |
| 78 | }; |
| 79 | struct hfi1_status { |
| 80 | __aligned_u64 dev; |
| 81 | __aligned_u64 port; |
| 82 | char freezemsg[0]; |
| 83 | }; |
| 84 | enum sdma_req_opcode { |
| 85 | EXPECTED = 0, |
| 86 | EAGER |
| 87 | }; |
| 88 | #define HFI1_SDMA_REQ_VERSION_MASK 0xF |
| 89 | #define HFI1_SDMA_REQ_VERSION_SHIFT 0x0 |
| 90 | #define HFI1_SDMA_REQ_OPCODE_MASK 0xF |
| 91 | #define HFI1_SDMA_REQ_OPCODE_SHIFT 0x4 |
| 92 | #define HFI1_SDMA_REQ_IOVCNT_MASK 0xFF |
| 93 | #define HFI1_SDMA_REQ_IOVCNT_SHIFT 0x8 |
| 94 | struct sdma_req_info { |
| 95 | __u16 ctrl; |
| 96 | __u16 npkts; |
| 97 | __u16 fragsize; |
| 98 | __u16 comp_idx; |
| 99 | } __attribute__((__packed__)); |
| 100 | struct hfi1_kdeth_header { |
| 101 | __le32 ver_tid_offset; |
| 102 | __le16 jkey; |
| 103 | __le16 hcrc; |
| 104 | __le32 swdata[7]; |
| 105 | } __attribute__((__packed__)); |
| 106 | struct hfi1_pkt_header { |
| 107 | __le16 pbc[4]; |
| 108 | __be16 lrh[4]; |
| 109 | __be32 bth[3]; |
| 110 | struct hfi1_kdeth_header kdeth; |
| 111 | } __attribute__((__packed__)); |
| 112 | enum hfi1_ureg { |
| 113 | ur_rcvhdrtail = 0, |
| 114 | ur_rcvhdrhead = 1, |
| 115 | ur_rcvegrindextail = 2, |
| 116 | ur_rcvegrindexhead = 3, |
| 117 | ur_rcvegroffsettail = 4, |
| 118 | ur_maxreg, |
| 119 | ur_rcvtidflowtable = 256 |
| 120 | }; |
| 121 | #endif |