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Yi Kong878f9942023-12-13 12:55:04 +09001//===-- llvm/CodeGen/TargetFrameLowering.h ----------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Interface to describe the layout of a stack frame on the target machine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CODEGEN_TARGETFRAMELOWERING_H
14#define LLVM_CODEGEN_TARGETFRAMELOWERING_H
15
16#include "llvm/CodeGen/MachineBasicBlock.h"
17#include "llvm/Support/TypeSize.h"
18#include <vector>
19
20namespace llvm {
21 class BitVector;
22 class CalleeSavedInfo;
23 class MachineFunction;
24 class RegScavenger;
25
26namespace TargetStackID {
27enum Value {
28 Default = 0,
29 SGPRSpill = 1,
30 ScalableVector = 2,
31 WasmLocal = 3,
32 NoAlloc = 255
33};
34}
35
36/// Information about stack frame layout on the target. It holds the direction
37/// of stack growth, the known stack alignment on entry to each function, and
38/// the offset to the locals area.
39///
40/// The offset to the local area is the offset from the stack pointer on
41/// function entry to the first location where function data (local variables,
42/// spill locations) can be stored.
43class TargetFrameLowering {
44public:
45 enum StackDirection {
46 StackGrowsUp, // Adding to the stack increases the stack address
47 StackGrowsDown // Adding to the stack decreases the stack address
48 };
49
50 // Maps a callee saved register to a stack slot with a fixed offset.
51 struct SpillSlot {
52 unsigned Reg;
53 int Offset; // Offset relative to stack pointer on function entry.
54 };
55
56 struct DwarfFrameBase {
57 // The frame base may be either a register (the default), the CFA with an
58 // offset, or a WebAssembly-specific location description.
59 enum FrameBaseKind { Register, CFA, WasmFrameBase } Kind;
60 struct WasmFrameBase {
61 unsigned Kind; // Wasm local, global, or value stack
62 unsigned Index;
63 };
64 union {
65 // Used with FrameBaseKind::Register.
66 unsigned Reg;
67 // Used with FrameBaseKind::CFA.
68 int Offset;
69 struct WasmFrameBase WasmLoc;
70 } Location;
71 };
72
73private:
74 StackDirection StackDir;
75 Align StackAlignment;
76 Align TransientStackAlignment;
77 int LocalAreaOffset;
78 bool StackRealignable;
79public:
80 TargetFrameLowering(StackDirection D, Align StackAl, int LAO,
81 Align TransAl = Align(1), bool StackReal = true)
82 : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
83 LocalAreaOffset(LAO), StackRealignable(StackReal) {}
84
85 virtual ~TargetFrameLowering();
86
87 // These methods return information that describes the abstract stack layout
88 // of the target machine.
89
90 /// getStackGrowthDirection - Return the direction the stack grows
91 ///
92 StackDirection getStackGrowthDirection() const { return StackDir; }
93
94 /// getStackAlignment - This method returns the number of bytes to which the
95 /// stack pointer must be aligned on entry to a function. Typically, this
96 /// is the largest alignment for any data object in the target.
97 ///
98 unsigned getStackAlignment() const { return StackAlignment.value(); }
99 /// getStackAlignment - This method returns the number of bytes to which the
100 /// stack pointer must be aligned on entry to a function. Typically, this
101 /// is the largest alignment for any data object in the target.
102 ///
103 Align getStackAlign() const { return StackAlignment; }
104
105 /// alignSPAdjust - This method aligns the stack adjustment to the correct
106 /// alignment.
107 ///
108 int alignSPAdjust(int SPAdj) const {
109 if (SPAdj < 0) {
110 SPAdj = -alignTo(-SPAdj, StackAlignment);
111 } else {
112 SPAdj = alignTo(SPAdj, StackAlignment);
113 }
114 return SPAdj;
115 }
116
117 /// getTransientStackAlignment - This method returns the number of bytes to
118 /// which the stack pointer must be aligned at all times, even between
119 /// calls.
120 ///
121 Align getTransientStackAlign() const { return TransientStackAlignment; }
122
123 /// isStackRealignable - This method returns whether the stack can be
124 /// realigned.
125 bool isStackRealignable() const {
126 return StackRealignable;
127 }
128
129 /// This method returns whether or not it is safe for an object with the
130 /// given stack id to be bundled into the local area.
131 virtual bool isStackIdSafeForLocalArea(unsigned StackId) const {
132 return true;
133 }
134
135 /// getOffsetOfLocalArea - This method returns the offset of the local area
136 /// from the stack pointer on entrance to a function.
137 ///
138 int getOffsetOfLocalArea() const { return LocalAreaOffset; }
139
140 /// Control the placement of special register scavenging spill slots when
141 /// allocating a stack frame.
142 ///
143 /// If this returns true, the frame indexes used by the RegScavenger will be
144 /// allocated closest to the incoming stack pointer.
145 virtual bool allocateScavengingFrameIndexesNearIncomingSP(
146 const MachineFunction &MF) const;
147
148 /// assignCalleeSavedSpillSlots - Allows target to override spill slot
149 /// assignment logic. If implemented, assignCalleeSavedSpillSlots() should
150 /// assign frame slots to all CSI entries and return true. If this method
151 /// returns false, spill slots will be assigned using generic implementation.
152 /// assignCalleeSavedSpillSlots() may add, delete or rearrange elements of
153 /// CSI.
154 virtual bool assignCalleeSavedSpillSlots(MachineFunction &MF,
155 const TargetRegisterInfo *TRI,
156 std::vector<CalleeSavedInfo> &CSI,
157 unsigned &MinCSFrameIndex,
158 unsigned &MaxCSFrameIndex) const {
159 return assignCalleeSavedSpillSlots(MF, TRI, CSI);
160 }
161
162 virtual bool
163 assignCalleeSavedSpillSlots(MachineFunction &MF,
164 const TargetRegisterInfo *TRI,
165 std::vector<CalleeSavedInfo> &CSI) const {
166 return false;
167 }
168
169 /// getCalleeSavedSpillSlots - This method returns a pointer to an array of
170 /// pairs, that contains an entry for each callee saved register that must be
171 /// spilled to a particular stack location if it is spilled.
172 ///
173 /// Each entry in this array contains a <register,offset> pair, indicating the
174 /// fixed offset from the incoming stack pointer that each register should be
175 /// spilled at. If a register is not listed here, the code generator is
176 /// allowed to spill it anywhere it chooses.
177 ///
178 virtual const SpillSlot *
179 getCalleeSavedSpillSlots(unsigned &NumEntries) const {
180 NumEntries = 0;
181 return nullptr;
182 }
183
184 /// targetHandlesStackFrameRounding - Returns true if the target is
185 /// responsible for rounding up the stack frame (probably at emitPrologue
186 /// time).
187 virtual bool targetHandlesStackFrameRounding() const {
188 return false;
189 }
190
191 /// Returns true if the target will correctly handle shrink wrapping.
192 virtual bool enableShrinkWrapping(const MachineFunction &MF) const {
193 return false;
194 }
195
196 /// Returns true if the stack slot holes in the fixed and callee-save stack
197 /// area should be used when allocating other stack locations to reduce stack
198 /// size.
199 virtual bool enableStackSlotScavenging(const MachineFunction &MF) const {
200 return false;
201 }
202
203 /// Returns true if the target can safely skip saving callee-saved registers
204 /// for noreturn nounwind functions.
205 virtual bool enableCalleeSaveSkip(const MachineFunction &MF) const;
206
207 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
208 /// the function.
209 virtual void emitPrologue(MachineFunction &MF,
210 MachineBasicBlock &MBB) const = 0;
211 virtual void emitEpilogue(MachineFunction &MF,
212 MachineBasicBlock &MBB) const = 0;
213
214 /// emitZeroCallUsedRegs - Zeros out call used registers.
215 virtual void emitZeroCallUsedRegs(BitVector RegsToZero,
216 MachineBasicBlock &MBB) const {}
217
218 /// With basic block sections, emit callee saved frame moves for basic blocks
219 /// that are in a different section.
220 virtual void
221 emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB,
222 MachineBasicBlock::iterator MBBI) const {}
223
224 /// Returns true if we may need to fix the unwind information for the
225 /// function.
226 virtual bool enableCFIFixup(MachineFunction &MF) const;
227
228 /// Emit CFI instructions that recreate the state of the unwind information
229 /// upon fucntion entry.
230 virtual void resetCFIToInitialState(MachineBasicBlock &MBB) const {}
231
232 /// Replace a StackProbe stub (if any) with the actual probe code inline
233 virtual void inlineStackProbe(MachineFunction &MF,
234 MachineBasicBlock &PrologueMBB) const {}
235
236 /// Does the stack probe function call return with a modified stack pointer?
237 virtual bool stackProbeFunctionModifiesSP() const { return false; }
238
239 /// Adjust the prologue to have the function use segmented stacks. This works
240 /// by adding a check even before the "normal" function prologue.
241 virtual void adjustForSegmentedStacks(MachineFunction &MF,
242 MachineBasicBlock &PrologueMBB) const {}
243
244 /// Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in
245 /// the assembly prologue to explicitly handle the stack.
246 virtual void adjustForHiPEPrologue(MachineFunction &MF,
247 MachineBasicBlock &PrologueMBB) const {}
248
249 /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
250 /// saved registers and returns true if it isn't possible / profitable to do
251 /// so by issuing a series of store instructions via
252 /// storeRegToStackSlot(). Returns false otherwise.
253 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
254 MachineBasicBlock::iterator MI,
255 ArrayRef<CalleeSavedInfo> CSI,
256 const TargetRegisterInfo *TRI) const {
257 return false;
258 }
259
260 /// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee
261 /// saved registers and returns true if it isn't possible / profitable to do
262 /// so by issuing a series of load instructions via loadRegToStackSlot().
263 /// If it returns true, and any of the registers in CSI is not restored,
264 /// it sets the corresponding Restored flag in CSI to false.
265 /// Returns false otherwise.
266 virtual bool
267 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
268 MachineBasicBlock::iterator MI,
269 MutableArrayRef<CalleeSavedInfo> CSI,
270 const TargetRegisterInfo *TRI) const {
271 return false;
272 }
273
274 /// Return true if the target wants to keep the frame pointer regardless of
275 /// the function attribute "frame-pointer".
276 virtual bool keepFramePointer(const MachineFunction &MF) const {
277 return false;
278 }
279
280 /// hasFP - Return true if the specified function should have a dedicated
281 /// frame pointer register. For most targets this is true only if the function
282 /// has variable sized allocas or if frame pointer elimination is disabled.
283 virtual bool hasFP(const MachineFunction &MF) const = 0;
284
285 /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
286 /// not required, we reserve argument space for call sites in the function
287 /// immediately on entry to the current function. This eliminates the need for
288 /// add/sub sp brackets around call sites. Returns true if the call frame is
289 /// included as part of the stack frame.
290 virtual bool hasReservedCallFrame(const MachineFunction &MF) const {
291 return !hasFP(MF);
292 }
293
294 /// canSimplifyCallFramePseudos - When possible, it's best to simplify the
295 /// call frame pseudo ops before doing frame index elimination. This is
296 /// possible only when frame index references between the pseudos won't
297 /// need adjusting for the call frame adjustments. Normally, that's true
298 /// if the function has a reserved call frame or a frame pointer. Some
299 /// targets (Thumb2, for example) may have more complicated criteria,
300 /// however, and can override this behavior.
301 virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const {
302 return hasReservedCallFrame(MF) || hasFP(MF);
303 }
304
305 // needsFrameIndexResolution - Do we need to perform FI resolution for
306 // this function. Normally, this is required only when the function
307 // has any stack objects. However, targets may want to override this.
308 virtual bool needsFrameIndexResolution(const MachineFunction &MF) const;
309
310 /// getFrameIndexReference - This method should return the base register
311 /// and offset used to reference a frame index location. The offset is
312 /// returned directly, and the base register is returned via FrameReg.
313 virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
314 Register &FrameReg) const;
315
316 /// Same as \c getFrameIndexReference, except that the stack pointer (as
317 /// opposed to the frame pointer) will be the preferred value for \p
318 /// FrameReg. This is generally used for emitting statepoint or EH tables that
319 /// use offsets from RSP. If \p IgnoreSPUpdates is true, the returned
320 /// offset is only guaranteed to be valid with respect to the value of SP at
321 /// the end of the prologue.
322 virtual StackOffset
323 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
324 Register &FrameReg,
325 bool IgnoreSPUpdates) const {
326 // Always safe to dispatch to getFrameIndexReference.
327 return getFrameIndexReference(MF, FI, FrameReg);
328 }
329
330 /// getNonLocalFrameIndexReference - This method returns the offset used to
331 /// reference a frame index location. The offset can be from either FP/BP/SP
332 /// based on which base register is returned by llvm.localaddress.
333 virtual StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
334 int FI) const {
335 // By default, dispatch to getFrameIndexReference. Interested targets can
336 // override this.
337 Register FrameReg;
338 return getFrameIndexReference(MF, FI, FrameReg);
339 }
340
341 /// Returns the callee-saved registers as computed by determineCalleeSaves
342 /// in the BitVector \p SavedRegs.
343 virtual void getCalleeSaves(const MachineFunction &MF,
344 BitVector &SavedRegs) const;
345
346 /// This method determines which of the registers reported by
347 /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved.
348 /// The default implementation checks populates the \p SavedRegs bitset with
349 /// all registers which are modified in the function, targets may override
350 /// this function to save additional registers.
351 /// This method also sets up the register scavenger ensuring there is a free
352 /// register or a frameindex available.
353 /// This method should not be called by any passes outside of PEI, because
354 /// it may change state passed in by \p MF and \p RS. The preferred
355 /// interface outside PEI is getCalleeSaves.
356 virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
357 RegScavenger *RS = nullptr) const;
358
359 /// processFunctionBeforeFrameFinalized - This method is called immediately
360 /// before the specified function's frame layout (MF.getFrameInfo()) is
361 /// finalized. Once the frame is finalized, MO_FrameIndex operands are
362 /// replaced with direct constants. This method is optional.
363 ///
364 virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF,
365 RegScavenger *RS = nullptr) const {
366 }
367
368 /// processFunctionBeforeFrameIndicesReplaced - This method is called
369 /// immediately before MO_FrameIndex operands are eliminated, but after the
370 /// frame is finalized. This method is optional.
371 virtual void
372 processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
373 RegScavenger *RS = nullptr) const {}
374
375 virtual unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const {
376 report_fatal_error("WinEH not implemented for this target");
377 }
378
379 /// This method is called during prolog/epilog code insertion to eliminate
380 /// call frame setup and destroy pseudo instructions (but only if the Target
381 /// is using them). It is responsible for eliminating these instructions,
382 /// replacing them with concrete instructions. This method need only be
383 /// implemented if using call frame setup/destroy pseudo instructions.
384 /// Returns an iterator pointing to the instruction after the replaced one.
385 virtual MachineBasicBlock::iterator
386 eliminateCallFramePseudoInstr(MachineFunction &MF,
387 MachineBasicBlock &MBB,
388 MachineBasicBlock::iterator MI) const {
389 llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
390 "target!");
391 }
392
393
394 /// Order the symbols in the local stack frame.
395 /// The list of objects that we want to order is in \p objectsToAllocate as
396 /// indices into the MachineFrameInfo. The array can be reordered in any way
397 /// upon return. The contents of the array, however, may not be modified (i.e.
398 /// only their order may be changed).
399 /// By default, just maintain the original order.
400 virtual void
401 orderFrameObjects(const MachineFunction &MF,
402 SmallVectorImpl<int> &objectsToAllocate) const {
403 }
404
405 /// Check whether or not the given \p MBB can be used as a prologue
406 /// for the target.
407 /// The prologue will be inserted first in this basic block.
408 /// This method is used by the shrink-wrapping pass to decide if
409 /// \p MBB will be correctly handled by the target.
410 /// As soon as the target enable shrink-wrapping without overriding
411 /// this method, we assume that each basic block is a valid
412 /// prologue.
413 virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const {
414 return true;
415 }
416
417 /// Check whether or not the given \p MBB can be used as a epilogue
418 /// for the target.
419 /// The epilogue will be inserted before the first terminator of that block.
420 /// This method is used by the shrink-wrapping pass to decide if
421 /// \p MBB will be correctly handled by the target.
422 /// As soon as the target enable shrink-wrapping without overriding
423 /// this method, we assume that each basic block is a valid
424 /// epilogue.
425 virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const {
426 return true;
427 }
428
429 /// Returns the StackID that scalable vectors should be associated with.
430 virtual TargetStackID::Value getStackIDForScalableVectors() const {
431 return TargetStackID::Default;
432 }
433
434 virtual bool isSupportedStackID(TargetStackID::Value ID) const {
435 switch (ID) {
436 default:
437 return false;
438 case TargetStackID::Default:
439 case TargetStackID::NoAlloc:
440 return true;
441 }
442 }
443
444 /// Check if given function is safe for not having callee saved registers.
445 /// This is used when interprocedural register allocation is enabled.
446 static bool isSafeForNoCSROpt(const Function &F);
447
448 /// Check if the no-CSR optimisation is profitable for the given function.
449 virtual bool isProfitableForNoCSROpt(const Function &F) const {
450 return true;
451 }
452
453 /// Return initial CFA offset value i.e. the one valid at the beginning of the
454 /// function (before any stack operations).
455 virtual int getInitialCFAOffset(const MachineFunction &MF) const;
456
457 /// Return initial CFA register value i.e. the one valid at the beginning of
458 /// the function (before any stack operations).
459 virtual Register getInitialCFARegister(const MachineFunction &MF) const;
460
461 /// Return the frame base information to be encoded in the DWARF subprogram
462 /// debug info.
463 virtual DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const;
464};
465
466} // End llvm namespace
467
468#endif