Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 1 | /* include/linux/msm_mdp.h |
| 2 | * |
| 3 | * Copyright (C) 2007 Google Incorporated |
| 4 | * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved. |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | #ifndef _MSM_MDP_H_ |
| 16 | #define _MSM_MDP_H_ |
| 17 | |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/fb.h> |
| 20 | |
| 21 | #define MSMFB_IOCTL_MAGIC 'm' |
| 22 | #define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) |
| 23 | #define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) |
| 24 | #define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) |
| 25 | #define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) |
| 26 | #define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) |
| 27 | #define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) |
| 28 | #define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) |
| 29 | /* new ioctls's for set/get ccs matrix */ |
| 30 | #define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) |
| 31 | #define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) |
| 32 | #define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ |
| 33 | struct mdp_overlay) |
| 34 | #define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) |
| 35 | |
| 36 | #define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ |
| 37 | struct msmfb_overlay_data) |
| 38 | #define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY |
| 39 | |
| 40 | #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ |
| 41 | struct mdp_page_protection) |
| 42 | #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ |
| 43 | struct mdp_page_protection) |
| 44 | #define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ |
| 45 | struct mdp_overlay) |
| 46 | #define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) |
| 47 | #define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \ |
| 48 | struct msmfb_overlay_blt) |
| 49 | #define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) |
| 50 | #define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \ |
| 51 | struct mdp_histogram_start_req) |
| 52 | #define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 53 | #define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 54 | |
| 55 | #define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \ |
| 56 | struct msmfb_overlay_3d) |
| 57 | |
| 58 | #define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \ |
| 59 | struct msmfb_mixer_info_req) |
| 60 | #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \ |
| 61 | struct msmfb_overlay_data) |
| 62 | #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) |
| 63 | #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) |
| 64 | #define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) |
| 65 | #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \ |
| 66 | struct msmfb_data) |
| 67 | #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \ |
| 68 | struct msmfb_data) |
| 69 | #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) |
| 70 | #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) |
| 71 | #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) |
| 72 | #define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) |
| 73 | #define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) |
| 74 | #define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) |
| 75 | #define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, \ |
| 76 | struct mdp_display_commit) |
| 77 | #define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) |
| 78 | #define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 79 | #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \ |
| 80 | unsigned int) |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 81 | #define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 82 | |
| 83 | #define FB_TYPE_3D_PANEL 0x10101010 |
| 84 | #define MDP_IMGTYPE2_START 0x10000 |
| 85 | #define MSMFB_DRIVER_VERSION 0xF9E8D701 |
| 86 | |
| 87 | enum { |
| 88 | NOTIFY_UPDATE_START, |
| 89 | NOTIFY_UPDATE_STOP, |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 90 | NOTIFY_UPDATE_POWER_OFF, |
| 91 | }; |
| 92 | |
| 93 | enum { |
| 94 | NOTIFY_TYPE_NO_UPDATE, |
| 95 | NOTIFY_TYPE_SUSPEND, |
| 96 | NOTIFY_TYPE_UPDATE, |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 97 | }; |
| 98 | |
| 99 | enum { |
| 100 | MDP_RGB_565, /* RGB 565 planer */ |
| 101 | MDP_XRGB_8888, /* RGB 888 padded */ |
| 102 | MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ |
| 103 | MDP_Y_CBCR_H2V2_ADRENO, |
| 104 | MDP_ARGB_8888, /* ARGB 888 */ |
| 105 | MDP_RGB_888, /* RGB 888 planer */ |
| 106 | MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ |
| 107 | MDP_YCRYCB_H2V1, /* YCrYCb interleave */ |
Dima Zavin | 8cac999 | 2013-04-09 16:02:21 -0700 | [diff] [blame] | 108 | MDP_CBYCRY_H2V1, /* CbYCrY interleave */ |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 109 | MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ |
| 110 | MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ |
| 111 | MDP_Y_CRCB_H1V2, |
| 112 | MDP_Y_CBCR_H1V2, |
| 113 | MDP_RGBA_8888, /* ARGB 888 */ |
| 114 | MDP_BGRA_8888, /* ABGR 888 */ |
| 115 | MDP_RGBX_8888, /* RGBX 888 */ |
| 116 | MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ |
| 117 | MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ |
| 118 | MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */ |
| 119 | MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */ |
| 120 | MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */ |
| 121 | MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ |
| 122 | MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */ |
| 123 | MDP_YCRCB_H1V1, /* YCrCb interleave */ |
| 124 | MDP_YCBCR_H1V1, /* YCbCr interleave */ |
| 125 | MDP_BGR_565, /* BGR 565 planer */ |
| 126 | MDP_BGR_888, /* BGR 888 */ |
| 127 | MDP_Y_CBCR_H2V2_VENUS, |
| 128 | MDP_BGRX_8888, /* BGRX 8888 */ |
| 129 | MDP_IMGTYPE_LIMIT, |
| 130 | MDP_RGB_BORDERFILL, /* border fill pipe */ |
| 131 | MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ |
| 132 | MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ |
| 133 | }; |
| 134 | |
| 135 | enum { |
| 136 | PMEM_IMG, |
| 137 | FB_IMG, |
| 138 | }; |
| 139 | |
| 140 | enum { |
| 141 | HSIC_HUE = 0, |
| 142 | HSIC_SAT, |
| 143 | HSIC_INT, |
| 144 | HSIC_CON, |
| 145 | NUM_HSIC_PARAM, |
| 146 | }; |
| 147 | |
| 148 | #define MDSS_MDP_ROT_ONLY 0x80 |
| 149 | #define MDSS_MDP_RIGHT_MIXER 0x100 |
| 150 | |
| 151 | /* mdp_blit_req flag values */ |
| 152 | #define MDP_ROT_NOP 0 |
| 153 | #define MDP_FLIP_LR 0x1 |
| 154 | #define MDP_FLIP_UD 0x2 |
| 155 | #define MDP_ROT_90 0x4 |
| 156 | #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) |
| 157 | #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) |
| 158 | #define MDP_DITHER 0x8 |
| 159 | #define MDP_BLUR 0x10 |
| 160 | #define MDP_BLEND_FG_PREMULT 0x20000 |
| 161 | #define MDP_IS_FG 0x40000 |
| 162 | #define MDP_DEINTERLACE 0x80000000 |
| 163 | #define MDP_SHARPENING 0x40000000 |
| 164 | #define MDP_NO_DMA_BARRIER_START 0x20000000 |
| 165 | #define MDP_NO_DMA_BARRIER_END 0x10000000 |
| 166 | #define MDP_NO_BLIT 0x08000000 |
| 167 | #define MDP_BLIT_WITH_DMA_BARRIERS 0x000 |
| 168 | #define MDP_BLIT_WITH_NO_DMA_BARRIERS \ |
| 169 | (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) |
| 170 | #define MDP_BLIT_SRC_GEM 0x04000000 |
| 171 | #define MDP_BLIT_DST_GEM 0x02000000 |
| 172 | #define MDP_BLIT_NON_CACHED 0x01000000 |
| 173 | #define MDP_OV_PIPE_SHARE 0x00800000 |
| 174 | #define MDP_DEINTERLACE_ODD 0x00400000 |
| 175 | #define MDP_OV_PLAY_NOWAIT 0x00200000 |
| 176 | #define MDP_SOURCE_ROTATED_90 0x00100000 |
| 177 | #define MDP_OVERLAY_PP_CFG_EN 0x00080000 |
| 178 | #define MDP_BACKEND_COMPOSITION 0x00040000 |
| 179 | #define MDP_BORDERFILL_SUPPORTED 0x00010000 |
| 180 | #define MDP_SECURE_OVERLAY_SESSION 0x00008000 |
| 181 | #define MDP_OV_PIPE_FORCE_DMA 0x00004000 |
| 182 | #define MDP_MEMORY_ID_TYPE_FB 0x00001000 |
Simon Wilson | d502d83 | 2013-05-20 16:32:55 -0700 | [diff] [blame] | 183 | #define MDP_BWC_EN 0x00000400 |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 184 | #define MDP_DECIMATION_EN 0x00000800 |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 185 | #define MDP_TRANSP_NOP 0xffffffff |
| 186 | #define MDP_ALPHA_NOP 0xff |
| 187 | |
| 188 | #define MDP_FB_PAGE_PROTECTION_NONCACHED (0) |
| 189 | #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) |
| 190 | #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) |
| 191 | #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) |
| 192 | #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) |
| 193 | /* Sentinel: Don't use! */ |
| 194 | #define MDP_FB_PAGE_PROTECTION_INVALID (5) |
| 195 | /* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ |
| 196 | #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) |
| 197 | |
| 198 | struct mdp_rect { |
| 199 | uint32_t x; |
| 200 | uint32_t y; |
| 201 | uint32_t w; |
| 202 | uint32_t h; |
| 203 | }; |
| 204 | |
| 205 | struct mdp_img { |
| 206 | uint32_t width; |
| 207 | uint32_t height; |
| 208 | uint32_t format; |
| 209 | uint32_t offset; |
| 210 | int memory_id; /* the file descriptor */ |
| 211 | uint32_t priv; |
| 212 | }; |
| 213 | |
| 214 | /* |
| 215 | * {3x3} + {3} ccs matrix |
| 216 | */ |
| 217 | |
| 218 | #define MDP_CCS_RGB2YUV 0 |
| 219 | #define MDP_CCS_YUV2RGB 1 |
| 220 | |
| 221 | #define MDP_CCS_SIZE 9 |
| 222 | #define MDP_BV_SIZE 3 |
| 223 | |
| 224 | struct mdp_ccs { |
| 225 | int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ |
| 226 | uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ |
| 227 | uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ |
| 228 | }; |
| 229 | |
| 230 | struct mdp_csc { |
| 231 | int id; |
| 232 | uint32_t csc_mv[9]; |
| 233 | uint32_t csc_pre_bv[3]; |
| 234 | uint32_t csc_post_bv[3]; |
| 235 | uint32_t csc_pre_lv[6]; |
| 236 | uint32_t csc_post_lv[6]; |
| 237 | }; |
| 238 | |
| 239 | /* The version of the mdp_blit_req structure so that |
| 240 | * user applications can selectively decide which functionality |
| 241 | * to include |
| 242 | */ |
| 243 | |
| 244 | #define MDP_BLIT_REQ_VERSION 2 |
| 245 | |
| 246 | struct mdp_blit_req { |
| 247 | struct mdp_img src; |
| 248 | struct mdp_img dst; |
| 249 | struct mdp_rect src_rect; |
| 250 | struct mdp_rect dst_rect; |
| 251 | uint32_t alpha; |
| 252 | uint32_t transp_mask; |
| 253 | uint32_t flags; |
| 254 | int sharpening_strength; /* -127 <--> 127, default 64 */ |
| 255 | }; |
| 256 | |
| 257 | struct mdp_blit_req_list { |
| 258 | uint32_t count; |
| 259 | struct mdp_blit_req req[]; |
| 260 | }; |
| 261 | |
| 262 | #define MSMFB_DATA_VERSION 2 |
| 263 | |
| 264 | struct msmfb_data { |
| 265 | uint32_t offset; |
| 266 | int memory_id; |
| 267 | int id; |
| 268 | uint32_t flags; |
| 269 | uint32_t priv; |
| 270 | uint32_t iova; |
| 271 | }; |
| 272 | |
| 273 | #define MSMFB_NEW_REQUEST -1 |
| 274 | |
| 275 | struct msmfb_overlay_data { |
| 276 | uint32_t id; |
| 277 | struct msmfb_data data; |
| 278 | uint32_t version_key; |
| 279 | struct msmfb_data plane1_data; |
| 280 | struct msmfb_data plane2_data; |
| 281 | struct msmfb_data dst_data; |
| 282 | }; |
| 283 | |
| 284 | struct msmfb_img { |
| 285 | uint32_t width; |
| 286 | uint32_t height; |
| 287 | uint32_t format; |
| 288 | }; |
| 289 | |
| 290 | #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 |
| 291 | struct msmfb_writeback_data { |
| 292 | struct msmfb_data buf_info; |
| 293 | struct msmfb_img img; |
| 294 | }; |
| 295 | |
| 296 | #define MDP_PP_OPS_ENABLE 0x1 |
| 297 | #define MDP_PP_OPS_READ 0x2 |
| 298 | #define MDP_PP_OPS_WRITE 0x4 |
| 299 | #define MDP_PP_OPS_DISABLE 0x8 |
| 300 | #define MDP_PP_IGC_FLAG_ROM0 0x10 |
| 301 | #define MDP_PP_IGC_FLAG_ROM1 0x20 |
| 302 | |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 303 | #define MDSS_PP_DSPP_CFG 0x000 |
| 304 | #define MDSS_PP_SSPP_CFG 0x100 |
| 305 | #define MDSS_PP_LM_CFG 0x200 |
| 306 | #define MDSS_PP_WB_CFG 0x300 |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 307 | |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 308 | #define MDSS_PP_ARG_MASK 0x3C00 |
| 309 | #define MDSS_PP_ARG_NUM 4 |
| 310 | #define MDSS_PP_ARG_SHIFT 10 |
| 311 | #define MDSS_PP_LOCATION_MASK 0x0300 |
| 312 | #define MDSS_PP_LOGICAL_MASK 0x00FF |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 313 | |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 314 | #define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) |
| 315 | #define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 316 | #define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) |
| 317 | #define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) |
| 318 | |
| 319 | |
| 320 | struct mdp_qseed_cfg { |
| 321 | uint32_t table_num; |
| 322 | uint32_t ops; |
| 323 | uint32_t len; |
| 324 | uint32_t *data; |
| 325 | }; |
| 326 | |
| 327 | struct mdp_sharp_cfg { |
| 328 | uint32_t flags; |
| 329 | uint32_t strength; |
| 330 | uint32_t edge_thr; |
| 331 | uint32_t smooth_thr; |
| 332 | uint32_t noise_thr; |
| 333 | }; |
| 334 | |
| 335 | struct mdp_qseed_cfg_data { |
| 336 | uint32_t block; |
| 337 | struct mdp_qseed_cfg qseed_data; |
| 338 | }; |
| 339 | |
| 340 | #define MDP_OVERLAY_PP_CSC_CFG 0x1 |
| 341 | #define MDP_OVERLAY_PP_QSEED_CFG 0x2 |
| 342 | #define MDP_OVERLAY_PP_PA_CFG 0x4 |
| 343 | #define MDP_OVERLAY_PP_IGC_CFG 0x8 |
| 344 | #define MDP_OVERLAY_PP_SHARP_CFG 0x10 |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 345 | #define MDP_OVERLAY_PP_HIST_CFG 0x20 |
| 346 | #define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 347 | |
| 348 | #define MDP_CSC_FLAG_ENABLE 0x1 |
| 349 | #define MDP_CSC_FLAG_YUV_IN 0x2 |
| 350 | #define MDP_CSC_FLAG_YUV_OUT 0x4 |
| 351 | |
| 352 | struct mdp_csc_cfg { |
| 353 | /* flags for enable CSC, toggling RGB,YUV input/output */ |
| 354 | uint32_t flags; |
| 355 | uint32_t csc_mv[9]; |
| 356 | uint32_t csc_pre_bv[3]; |
| 357 | uint32_t csc_post_bv[3]; |
| 358 | uint32_t csc_pre_lv[6]; |
| 359 | uint32_t csc_post_lv[6]; |
| 360 | }; |
| 361 | |
| 362 | struct mdp_csc_cfg_data { |
| 363 | uint32_t block; |
| 364 | struct mdp_csc_cfg csc_data; |
| 365 | }; |
| 366 | |
| 367 | struct mdp_pa_cfg { |
| 368 | uint32_t flags; |
| 369 | uint32_t hue_adj; |
| 370 | uint32_t sat_adj; |
| 371 | uint32_t val_adj; |
| 372 | uint32_t cont_adj; |
| 373 | }; |
| 374 | |
| 375 | struct mdp_igc_lut_data { |
| 376 | uint32_t block; |
| 377 | uint32_t len, ops; |
| 378 | uint32_t *c0_c1_data; |
| 379 | uint32_t *c2_data; |
| 380 | }; |
| 381 | |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 382 | struct mdp_histogram_cfg { |
| 383 | uint32_t ops; |
| 384 | uint32_t block; |
| 385 | uint8_t frame_cnt; |
| 386 | uint8_t bit_mask; |
| 387 | uint16_t num_bins; |
| 388 | }; |
| 389 | |
| 390 | struct mdp_hist_lut_data { |
| 391 | uint32_t block; |
| 392 | uint32_t ops; |
| 393 | uint32_t len; |
| 394 | uint32_t *data; |
| 395 | }; |
| 396 | |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 397 | struct mdp_overlay_pp_params { |
| 398 | uint32_t config_ops; |
| 399 | struct mdp_csc_cfg csc_cfg; |
| 400 | struct mdp_qseed_cfg qseed_cfg[2]; |
| 401 | struct mdp_pa_cfg pa_cfg; |
| 402 | struct mdp_igc_lut_data igc_cfg; |
| 403 | struct mdp_sharp_cfg sharp_cfg; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 404 | struct mdp_histogram_cfg hist_cfg; |
| 405 | struct mdp_hist_lut_data hist_lut_cfg; |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 406 | }; |
| 407 | |
| 408 | struct mdp_overlay { |
| 409 | struct msmfb_img src; |
| 410 | struct mdp_rect src_rect; |
| 411 | struct mdp_rect dst_rect; |
| 412 | uint32_t z_order; /* stage number */ |
| 413 | uint32_t is_fg; /* control alpha & transp */ |
| 414 | uint32_t alpha; |
| 415 | uint32_t transp_mask; |
| 416 | uint32_t flags; |
| 417 | uint32_t id; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 418 | uint32_t user_data[7]; |
| 419 | uint8_t horz_deci; |
| 420 | uint8_t vert_deci; |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 421 | struct mdp_overlay_pp_params overlay_pp_cfg; |
| 422 | }; |
| 423 | |
| 424 | struct msmfb_overlay_3d { |
| 425 | uint32_t is_3d; |
| 426 | uint32_t width; |
| 427 | uint32_t height; |
| 428 | }; |
| 429 | |
| 430 | |
| 431 | struct msmfb_overlay_blt { |
| 432 | uint32_t enable; |
| 433 | uint32_t offset; |
| 434 | uint32_t width; |
| 435 | uint32_t height; |
| 436 | uint32_t bpp; |
| 437 | }; |
| 438 | |
| 439 | struct mdp_histogram { |
| 440 | uint32_t frame_cnt; |
| 441 | uint32_t bin_cnt; |
| 442 | uint32_t *r; |
| 443 | uint32_t *g; |
| 444 | uint32_t *b; |
| 445 | }; |
| 446 | |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 447 | enum { |
| 448 | DISPLAY_MISR_EDP, |
| 449 | DISPLAY_MISR_DSI0, |
| 450 | DISPLAY_MISR_DSI1, |
| 451 | DISPLAY_MISR_HDMI, |
| 452 | DISPLAY_MISR_LCDC, |
| 453 | DISPLAY_MISR_ATV, |
| 454 | DISPLAY_MISR_DSI_CMD, |
| 455 | DISPLAY_MISR_MAX |
| 456 | }; |
| 457 | |
| 458 | enum { |
| 459 | MISR_OP_NONE, |
| 460 | MISR_OP_SFM, |
| 461 | MISR_OP_MFM, |
| 462 | MISR_OP_BM, |
| 463 | MISR_OP_MAX |
| 464 | }; |
| 465 | |
| 466 | struct mdp_misr { |
| 467 | uint32_t block_id; |
| 468 | uint32_t frame_count; |
| 469 | uint32_t crc_op_mode; |
| 470 | uint32_t crc_value[32]; |
| 471 | }; |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 472 | |
| 473 | /* |
| 474 | |
| 475 | mdp_block_type defines the identifiers for pipes in MDP 4.3 and up |
| 476 | |
| 477 | MDP_BLOCK_RESERVED is provided for backward compatibility and is |
| 478 | deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used |
| 479 | instead. |
| 480 | |
| 481 | MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses, |
| 482 | same for others. |
| 483 | |
| 484 | */ |
| 485 | |
| 486 | enum { |
| 487 | MDP_BLOCK_RESERVED = 0, |
| 488 | MDP_BLOCK_OVERLAY_0, |
| 489 | MDP_BLOCK_OVERLAY_1, |
| 490 | MDP_BLOCK_VG_1, |
| 491 | MDP_BLOCK_VG_2, |
| 492 | MDP_BLOCK_RGB_1, |
| 493 | MDP_BLOCK_RGB_2, |
| 494 | MDP_BLOCK_DMA_P, |
| 495 | MDP_BLOCK_DMA_S, |
| 496 | MDP_BLOCK_DMA_E, |
| 497 | MDP_BLOCK_OVERLAY_2, |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 498 | MDP_LOGICAL_BLOCK_DISP_0 = 0x10, |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 499 | MDP_LOGICAL_BLOCK_DISP_1, |
| 500 | MDP_LOGICAL_BLOCK_DISP_2, |
| 501 | MDP_BLOCK_MAX, |
| 502 | }; |
| 503 | |
| 504 | /* |
| 505 | * mdp_histogram_start_req is used to provide the parameters for |
| 506 | * histogram start request |
| 507 | */ |
| 508 | |
| 509 | struct mdp_histogram_start_req { |
| 510 | uint32_t block; |
| 511 | uint8_t frame_cnt; |
| 512 | uint8_t bit_mask; |
| 513 | uint16_t num_bins; |
| 514 | }; |
| 515 | |
| 516 | /* |
| 517 | * mdp_histogram_data is used to return the histogram data, once |
| 518 | * the histogram is done/stopped/cance |
| 519 | */ |
| 520 | |
| 521 | struct mdp_histogram_data { |
| 522 | uint32_t block; |
| 523 | uint32_t bin_cnt; |
| 524 | uint32_t *c0; |
| 525 | uint32_t *c1; |
| 526 | uint32_t *c2; |
| 527 | uint32_t *extra_info; |
| 528 | }; |
| 529 | |
| 530 | struct mdp_pcc_coeff { |
| 531 | uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; |
| 532 | }; |
| 533 | |
| 534 | struct mdp_pcc_cfg_data { |
| 535 | uint32_t block; |
| 536 | uint32_t ops; |
| 537 | struct mdp_pcc_coeff r, g, b; |
| 538 | }; |
| 539 | |
| 540 | #define MDP_GAMUT_TABLE_NUM 8 |
| 541 | |
| 542 | enum { |
| 543 | mdp_lut_igc, |
| 544 | mdp_lut_pgc, |
| 545 | mdp_lut_hist, |
| 546 | mdp_lut_max, |
| 547 | }; |
| 548 | |
| 549 | struct mdp_ar_gc_lut_data { |
| 550 | uint32_t x_start; |
| 551 | uint32_t slope; |
| 552 | uint32_t offset; |
| 553 | }; |
| 554 | |
| 555 | struct mdp_pgc_lut_data { |
| 556 | uint32_t block; |
| 557 | uint32_t flags; |
| 558 | uint8_t num_r_stages; |
| 559 | uint8_t num_g_stages; |
| 560 | uint8_t num_b_stages; |
| 561 | struct mdp_ar_gc_lut_data *r_data; |
| 562 | struct mdp_ar_gc_lut_data *g_data; |
| 563 | struct mdp_ar_gc_lut_data *b_data; |
| 564 | }; |
| 565 | |
| 566 | |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 567 | struct mdp_lut_cfg_data { |
| 568 | uint32_t lut_type; |
| 569 | union { |
| 570 | struct mdp_igc_lut_data igc_lut_data; |
| 571 | struct mdp_pgc_lut_data pgc_lut_data; |
| 572 | struct mdp_hist_lut_data hist_lut_data; |
| 573 | } data; |
| 574 | }; |
| 575 | |
| 576 | struct mdp_bl_scale_data { |
| 577 | uint32_t min_lvl; |
| 578 | uint32_t scale; |
| 579 | }; |
| 580 | |
| 581 | struct mdp_pa_cfg_data { |
| 582 | uint32_t block; |
| 583 | struct mdp_pa_cfg pa_data; |
| 584 | }; |
| 585 | |
| 586 | struct mdp_dither_cfg_data { |
| 587 | uint32_t block; |
| 588 | uint32_t flags; |
| 589 | uint32_t g_y_depth; |
| 590 | uint32_t r_cr_depth; |
| 591 | uint32_t b_cb_depth; |
| 592 | }; |
| 593 | |
| 594 | struct mdp_gamut_cfg_data { |
| 595 | uint32_t block; |
| 596 | uint32_t flags; |
| 597 | uint32_t gamut_first; |
| 598 | uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; |
| 599 | uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; |
| 600 | uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; |
| 601 | uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; |
| 602 | }; |
| 603 | |
| 604 | struct mdp_calib_config_data { |
| 605 | uint32_t ops; |
| 606 | uint32_t addr; |
| 607 | uint32_t data; |
| 608 | }; |
| 609 | |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 610 | struct mdp_calib_config_buffer { |
| 611 | uint32_t ops; |
| 612 | uint32_t size; |
| 613 | uint32_t *buffer; |
| 614 | }; |
| 615 | |
| 616 | struct mdp_calib_dcm_state { |
| 617 | uint32_t ops; |
| 618 | uint32_t dcm_state; |
| 619 | }; |
| 620 | |
| 621 | enum { |
| 622 | DCM_UNINIT, |
| 623 | DCM_UNBLANK, |
| 624 | DCM_ENTER, |
| 625 | DCM_EXIT, |
| 626 | DCM_BLANK, |
| 627 | }; |
| 628 | |
| 629 | #define MDSS_MAX_BL_BRIGHTNESS 255 |
| 630 | #define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1) |
| 631 | |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 632 | #define MDSS_AD_MODE_AUTO_BL 0x0 |
| 633 | #define MDSS_AD_MODE_AUTO_STR 0x1 |
| 634 | #define MDSS_AD_MODE_TARG_STR 0x3 |
| 635 | #define MDSS_AD_MODE_MAN_STR 0x7 |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 636 | #define MDSS_AD_MODE_CALIB 0xF |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 637 | |
| 638 | #define MDP_PP_AD_INIT 0x10 |
| 639 | #define MDP_PP_AD_CFG 0x20 |
| 640 | |
| 641 | struct mdss_ad_init { |
| 642 | uint32_t asym_lut[33]; |
| 643 | uint32_t color_corr_lut[33]; |
| 644 | uint8_t i_control[2]; |
| 645 | uint16_t black_lvl; |
| 646 | uint16_t white_lvl; |
| 647 | uint8_t var; |
| 648 | uint8_t limit_ampl; |
| 649 | uint8_t i_dither; |
| 650 | uint8_t slope_max; |
| 651 | uint8_t slope_min; |
| 652 | uint8_t dither_ctl; |
| 653 | uint8_t format; |
| 654 | uint8_t auto_size; |
| 655 | uint16_t frame_w; |
| 656 | uint16_t frame_h; |
| 657 | uint8_t logo_v; |
| 658 | uint8_t logo_h; |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 659 | uint32_t bl_lin_len; |
| 660 | uint32_t *bl_lin; |
| 661 | uint32_t *bl_lin_inv; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 662 | }; |
| 663 | |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 664 | #define MDSS_AD_BL_CTRL_MODE_EN 1 |
| 665 | #define MDSS_AD_BL_CTRL_MODE_DIS 0 |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 666 | struct mdss_ad_cfg { |
| 667 | uint32_t mode; |
| 668 | uint32_t al_calib_lut[33]; |
| 669 | uint16_t backlight_min; |
| 670 | uint16_t backlight_max; |
| 671 | uint16_t backlight_scale; |
| 672 | uint16_t amb_light_min; |
| 673 | uint16_t filter[2]; |
| 674 | uint16_t calib[4]; |
| 675 | uint8_t strength_limit; |
| 676 | uint8_t t_filter_recursion; |
| 677 | uint16_t stab_itr; |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 678 | uint32_t bl_ctrl_mode; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 679 | }; |
| 680 | |
| 681 | /* ops uses standard MDP_PP_* flags */ |
| 682 | struct mdss_ad_init_cfg { |
| 683 | uint32_t ops; |
| 684 | union { |
| 685 | struct mdss_ad_init init; |
| 686 | struct mdss_ad_cfg cfg; |
| 687 | } params; |
| 688 | }; |
| 689 | |
| 690 | /* mode uses MDSS_AD_MODE_* flags */ |
| 691 | struct mdss_ad_input { |
| 692 | uint32_t mode; |
| 693 | union { |
| 694 | uint32_t amb_light; |
| 695 | uint32_t strength; |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 696 | uint32_t calib_bl; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 697 | } in; |
| 698 | uint32_t output; |
| 699 | }; |
| 700 | |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 701 | #define MDSS_CALIB_MODE_BL 0x1 |
| 702 | struct mdss_calib_cfg { |
| 703 | uint32_t ops; |
| 704 | uint32_t calib_mask; |
| 705 | }; |
| 706 | |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 707 | enum { |
| 708 | mdp_op_pcc_cfg, |
| 709 | mdp_op_csc_cfg, |
| 710 | mdp_op_lut_cfg, |
| 711 | mdp_op_qseed_cfg, |
| 712 | mdp_bl_scale_cfg, |
| 713 | mdp_op_pa_cfg, |
| 714 | mdp_op_dither_cfg, |
| 715 | mdp_op_gamut_cfg, |
| 716 | mdp_op_calib_cfg, |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 717 | mdp_op_ad_cfg, |
| 718 | mdp_op_ad_input, |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 719 | mdp_op_calib_mode, |
| 720 | mdp_op_calib_buffer, |
| 721 | mdp_op_calib_dcm_state, |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 722 | mdp_op_max, |
| 723 | }; |
| 724 | |
| 725 | enum { |
| 726 | WB_FORMAT_NV12, |
| 727 | WB_FORMAT_RGB_565, |
| 728 | WB_FORMAT_RGB_888, |
| 729 | WB_FORMAT_xRGB_8888, |
| 730 | WB_FORMAT_ARGB_8888, |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 731 | WB_FORMAT_BGRA_8888, |
| 732 | WB_FORMAT_BGRX_8888, |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 733 | WB_FORMAT_ARGB_8888_INPUT_ALPHA /* Need to support */ |
| 734 | }; |
| 735 | |
| 736 | struct msmfb_mdp_pp { |
| 737 | uint32_t op; |
| 738 | union { |
| 739 | struct mdp_pcc_cfg_data pcc_cfg_data; |
| 740 | struct mdp_csc_cfg_data csc_cfg_data; |
| 741 | struct mdp_lut_cfg_data lut_cfg_data; |
| 742 | struct mdp_qseed_cfg_data qseed_cfg_data; |
| 743 | struct mdp_bl_scale_data bl_scale_data; |
| 744 | struct mdp_pa_cfg_data pa_cfg_data; |
| 745 | struct mdp_dither_cfg_data dither_cfg_data; |
| 746 | struct mdp_gamut_cfg_data gamut_cfg_data; |
| 747 | struct mdp_calib_config_data calib_cfg; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 748 | struct mdss_ad_init_cfg ad_init_cfg; |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 749 | struct mdss_calib_cfg mdss_calib_cfg; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 750 | struct mdss_ad_input ad_input; |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 751 | struct mdp_calib_config_buffer calib_buffer; |
| 752 | struct mdp_calib_dcm_state calib_dcm; |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 753 | } data; |
| 754 | }; |
| 755 | |
| 756 | #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 |
| 757 | enum { |
| 758 | metadata_op_none, |
| 759 | metadata_op_base_blend, |
| 760 | metadata_op_frame_rate, |
| 761 | metadata_op_vic, |
| 762 | metadata_op_wb_format, |
| 763 | metadata_op_get_caps, |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 764 | metadata_op_crc, |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 765 | metadata_op_max |
| 766 | }; |
| 767 | |
| 768 | struct mdp_blend_cfg { |
| 769 | uint32_t is_premultiplied; |
| 770 | }; |
| 771 | |
| 772 | struct mdp_mixer_cfg { |
| 773 | uint32_t writeback_format; |
| 774 | uint32_t alpha; |
| 775 | }; |
| 776 | |
| 777 | struct mdss_hw_caps { |
| 778 | uint32_t mdp_rev; |
| 779 | uint8_t rgb_pipes; |
| 780 | uint8_t vig_pipes; |
| 781 | uint8_t dma_pipes; |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 782 | uint32_t features; |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 783 | }; |
| 784 | |
| 785 | struct msmfb_metadata { |
| 786 | uint32_t op; |
| 787 | uint32_t flags; |
| 788 | union { |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 789 | struct mdp_misr misr_request; |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 790 | struct mdp_blend_cfg blend_cfg; |
| 791 | struct mdp_mixer_cfg mixer_cfg; |
| 792 | uint32_t panel_frame_rate; |
| 793 | uint32_t video_info_code; |
| 794 | struct mdss_hw_caps caps; |
| 795 | } data; |
| 796 | }; |
| 797 | |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 798 | #define MDP_MAX_FENCE_FD 32 |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 799 | #define MDP_BUF_SYNC_FLAG_WAIT 1 |
| 800 | |
| 801 | struct mdp_buf_sync { |
| 802 | uint32_t flags; |
| 803 | uint32_t acq_fen_fd_cnt; |
| 804 | int *acq_fen_fd; |
| 805 | int *rel_fen_fd; |
| 806 | }; |
| 807 | |
Benoit Goby | 59381aa | 2013-08-21 18:05:51 -0700 | [diff] [blame^] | 808 | struct mdp_async_blit_req_list { |
| 809 | struct mdp_buf_sync sync; |
| 810 | uint32_t count; |
| 811 | struct mdp_blit_req req[]; |
| 812 | }; |
| 813 | |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 814 | #define MDP_DISPLAY_COMMIT_OVERLAY 1 |
| 815 | struct mdp_buf_fence { |
| 816 | uint32_t flags; |
| 817 | uint32_t acq_fen_fd_cnt; |
| 818 | int acq_fen_fd[MDP_MAX_FENCE_FD]; |
| 819 | int rel_fen_fd[MDP_MAX_FENCE_FD]; |
| 820 | }; |
| 821 | |
| 822 | |
| 823 | struct mdp_display_commit { |
| 824 | uint32_t flags; |
| 825 | uint32_t wait_for_finish; |
| 826 | struct fb_var_screeninfo var; |
| 827 | struct mdp_buf_fence buf_fence; |
| 828 | }; |
| 829 | |
| 830 | struct mdp_page_protection { |
| 831 | uint32_t page_protection; |
| 832 | }; |
| 833 | |
| 834 | |
| 835 | struct mdp_mixer_info { |
| 836 | int pndx; |
| 837 | int pnum; |
| 838 | int ptype; |
| 839 | int mixer_num; |
| 840 | int z_order; |
| 841 | }; |
| 842 | |
| 843 | #define MAX_PIPE_PER_MIXER 4 |
| 844 | |
| 845 | struct msmfb_mixer_info_req { |
| 846 | int mixer_num; |
| 847 | int cnt; |
| 848 | struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; |
| 849 | }; |
| 850 | |
| 851 | enum { |
| 852 | DISPLAY_SUBSYSTEM_ID, |
| 853 | ROTATOR_SUBSYSTEM_ID, |
| 854 | }; |
| 855 | |
| 856 | enum { |
| 857 | MDP_IOMMU_DOMAIN_CP, |
| 858 | MDP_IOMMU_DOMAIN_NS, |
| 859 | }; |
| 860 | |
Benoit Goby | 7a24ad5 | 2013-06-05 17:10:57 -0700 | [diff] [blame] | 861 | enum { |
| 862 | MDP_WRITEBACK_MIRROR_OFF, |
| 863 | MDP_WRITEBACK_MIRROR_ON, |
| 864 | MDP_WRITEBACK_MIRROR_PAUSE, |
| 865 | MDP_WRITEBACK_MIRROR_RESUME, |
| 866 | }; |
| 867 | |
Erik Gilling | 555d7db | 2013-03-26 17:27:51 -0700 | [diff] [blame] | 868 | #ifdef __KERNEL__ |
| 869 | int msm_fb_get_iommu_domain(struct fb_info *info, int domain); |
| 870 | /* get the framebuffer physical address information */ |
| 871 | int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num, |
| 872 | int subsys_id); |
| 873 | struct fb_info *msm_fb_get_writeback_fb(void); |
| 874 | int msm_fb_writeback_init(struct fb_info *info); |
| 875 | int msm_fb_writeback_start(struct fb_info *info); |
| 876 | int msm_fb_writeback_queue_buffer(struct fb_info *info, |
| 877 | struct msmfb_data *data); |
| 878 | int msm_fb_writeback_dequeue_buffer(struct fb_info *info, |
| 879 | struct msmfb_data *data); |
| 880 | int msm_fb_writeback_stop(struct fb_info *info); |
| 881 | int msm_fb_writeback_terminate(struct fb_info *info); |
| 882 | int msm_fb_writeback_set_secure(struct fb_info *info, int enable); |
| 883 | #endif |
| 884 | |
| 885 | #endif /*_MSM_MDP_H_*/ |