bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 2 | * Virtual page mapping |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
Peter Maydell | 7b31bbc | 2016-01-26 18:16:56 +0000 | [diff] [blame] | 19 | #include "qemu/osdep.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 20 | #include "qapi/error.h" |
Stefan Weil | 777872e | 2014-02-23 18:02:08 +0100 | [diff] [blame] | 21 | #ifndef _WIN32 |
bellard | d5a8f07 | 2004-09-29 21:15:28 +0000 | [diff] [blame] | 22 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 23 | |
Veronia Bahaa | f348b6d | 2016-03-20 19:16:19 +0200 | [diff] [blame] | 24 | #include "qemu/cutils.h" |
bellard | 6180a18 | 2003-09-30 21:04:53 +0000 | [diff] [blame] | 25 | #include "cpu.h" |
Paolo Bonzini | 63c9155 | 2016-03-15 13:18:37 +0100 | [diff] [blame] | 26 | #include "exec/exec-all.h" |
Juan Quintela | 5118042 | 2017-04-24 20:50:19 +0200 | [diff] [blame] | 27 | #include "exec/target_page.h" |
bellard | b67d9a5 | 2008-05-23 09:57:34 +0000 | [diff] [blame] | 28 | #include "tcg.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 29 | #include "hw/qdev-core.h" |
Michael S. Tsirkin | 4485bd2 | 2015-03-11 07:56:34 +0100 | [diff] [blame] | 30 | #if !defined(CONFIG_USER_ONLY) |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 31 | #include "hw/boards.h" |
Paolo Bonzini | 33c1187 | 2016-03-15 16:58:45 +0100 | [diff] [blame] | 32 | #include "hw/xen/xen.h" |
Michael S. Tsirkin | 4485bd2 | 2015-03-11 07:56:34 +0100 | [diff] [blame] | 33 | #endif |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 34 | #include "sysemu/kvm.h" |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 35 | #include "sysemu/sysemu.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 36 | #include "qemu/timer.h" |
| 37 | #include "qemu/config-file.h" |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 38 | #include "qemu/error-report.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 39 | #if defined(CONFIG_USER_ONLY) |
Markus Armbruster | a9c9427 | 2016-06-22 19:11:19 +0200 | [diff] [blame] | 40 | #include "qemu.h" |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 41 | #else /* !CONFIG_USER_ONLY */ |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 42 | #include "hw/hw.h" |
| 43 | #include "exec/memory.h" |
Paolo Bonzini | df43d49 | 2016-03-16 10:24:54 +0100 | [diff] [blame] | 44 | #include "exec/ioport.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 45 | #include "sysemu/dma.h" |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 46 | #include "sysemu/numa.h" |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 47 | #include "sysemu/hw_accel.h" |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 48 | #include "exec/address-spaces.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 49 | #include "sysemu/xen-mapcache.h" |
Daniel P. Berrange | 0ab8ed1 | 2017-01-25 16:14:15 +0000 | [diff] [blame] | 50 | #include "trace-root.h" |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 51 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 52 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
| 53 | #include <fcntl.h> |
| 54 | #include <linux/falloc.h> |
| 55 | #endif |
| 56 | |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 57 | #endif |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 58 | #include "exec/cpu-all.h" |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 59 | #include "qemu/rcu_queue.h" |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 60 | #include "qemu/main-loop.h" |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 61 | #include "translate-all.h" |
Pavel Dovgalyuk | 7615936 | 2015-09-17 19:25:07 +0300 | [diff] [blame] | 62 | #include "sysemu/replay.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 63 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 64 | #include "exec/memory-internal.h" |
Juan Quintela | 220c3eb | 2013-10-14 17:13:59 +0200 | [diff] [blame] | 65 | #include "exec/ram_addr.h" |
Paolo Bonzini | 508127e | 2016-01-07 16:55:28 +0300 | [diff] [blame] | 66 | #include "exec/log.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 67 | |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 68 | #include "migration/vmstate.h" |
| 69 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 70 | #include "qemu/range.h" |
Michael S. Tsirkin | 794e8f3 | 2015-09-24 14:41:17 +0300 | [diff] [blame] | 71 | #ifndef _WIN32 |
| 72 | #include "qemu/mmap-alloc.h" |
| 73 | #endif |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 74 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 75 | #include "monitor/monitor.h" |
| 76 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 77 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 78 | |
pbrook | 99773bd | 2006-04-16 15:14:59 +0000 | [diff] [blame] | 79 | #if !defined(CONFIG_USER_ONLY) |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 80 | /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes |
| 81 | * are protected by the ramlist lock. |
| 82 | */ |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 83 | RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 84 | |
| 85 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 86 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 87 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 88 | AddressSpace address_space_io; |
| 89 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 90 | |
Paolo Bonzini | 0844e00 | 2013-05-24 14:37:28 +0200 | [diff] [blame] | 91 | MemoryRegion io_mem_rom, io_mem_notdirty; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 92 | static MemoryRegion io_mem_unassigned; |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 93 | |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 94 | /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */ |
| 95 | #define RAM_PREALLOC (1 << 0) |
| 96 | |
Paolo Bonzini | dbcb898 | 2014-06-10 19:15:24 +0800 | [diff] [blame] | 97 | /* RAM is mmap-ed with MAP_SHARED */ |
| 98 | #define RAM_SHARED (1 << 1) |
| 99 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 100 | /* Only a portion of RAM (used_length) is actually used, and migrated. |
| 101 | * This used_length size can change across reboots. |
| 102 | */ |
| 103 | #define RAM_RESIZEABLE (1 << 2) |
| 104 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 105 | #endif |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 106 | |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 107 | #ifdef TARGET_PAGE_BITS_VARY |
| 108 | int target_page_bits; |
| 109 | bool target_page_bits_decided; |
| 110 | #endif |
| 111 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 112 | struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 113 | /* current CPU in the current thread. It is only valid inside |
| 114 | cpu_exec() */ |
Paolo Bonzini | f240eb6 | 2015-08-26 00:17:58 +0200 | [diff] [blame] | 115 | __thread CPUState *current_cpu; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 116 | /* 0 = Do not count executed instructions. |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 117 | 1 = Precise instruction counting. |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 118 | 2 = Adaptive rate instruction counting. */ |
Paolo Bonzini | 5708fc6 | 2012-11-26 15:36:40 +0100 | [diff] [blame] | 119 | int use_icount; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 120 | |
Yang Zhong | a0be0c5 | 2017-07-03 18:12:13 +0800 | [diff] [blame] | 121 | uintptr_t qemu_host_page_size; |
| 122 | intptr_t qemu_host_page_mask; |
| 123 | uintptr_t qemu_real_host_page_size; |
| 124 | intptr_t qemu_real_host_page_mask; |
| 125 | |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 126 | bool set_preferred_target_page_bits(int bits) |
| 127 | { |
| 128 | /* The target page size is the lowest common denominator for all |
| 129 | * the CPUs in the system, so we can only make it smaller, never |
| 130 | * larger. And we can't make it smaller once we've committed to |
| 131 | * a particular size. |
| 132 | */ |
| 133 | #ifdef TARGET_PAGE_BITS_VARY |
| 134 | assert(bits >= TARGET_PAGE_BITS_MIN); |
| 135 | if (target_page_bits == 0 || target_page_bits > bits) { |
| 136 | if (target_page_bits_decided) { |
| 137 | return false; |
| 138 | } |
| 139 | target_page_bits = bits; |
| 140 | } |
| 141 | #endif |
| 142 | return true; |
| 143 | } |
| 144 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 145 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 146 | |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 147 | static void finalize_target_page_bits(void) |
| 148 | { |
| 149 | #ifdef TARGET_PAGE_BITS_VARY |
| 150 | if (target_page_bits == 0) { |
| 151 | target_page_bits = TARGET_PAGE_BITS_MIN; |
| 152 | } |
| 153 | target_page_bits_decided = true; |
| 154 | #endif |
| 155 | } |
| 156 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 157 | typedef struct PhysPageEntry PhysPageEntry; |
| 158 | |
| 159 | struct PhysPageEntry { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 160 | /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 161 | uint32_t skip : 6; |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 162 | /* index into phys_sections (!skip) or phys_map_nodes (skip) */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 163 | uint32_t ptr : 26; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 164 | }; |
| 165 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 166 | #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6) |
| 167 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 168 | /* Size of the L2 (and L3, etc) page tables. */ |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 169 | #define ADDR_SPACE_BITS 64 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 170 | |
Michael S. Tsirkin | 026736c | 2013-11-13 20:13:03 +0200 | [diff] [blame] | 171 | #define P_L2_BITS 9 |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 172 | #define P_L2_SIZE (1 << P_L2_BITS) |
| 173 | |
| 174 | #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1) |
| 175 | |
| 176 | typedef PhysPageEntry Node[P_L2_SIZE]; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 177 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 178 | typedef struct PhysPageMap { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 179 | struct rcu_head rcu; |
| 180 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 181 | unsigned sections_nb; |
| 182 | unsigned sections_nb_alloc; |
| 183 | unsigned nodes_nb; |
| 184 | unsigned nodes_nb_alloc; |
| 185 | Node *nodes; |
| 186 | MemoryRegionSection *sections; |
| 187 | } PhysPageMap; |
| 188 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 189 | struct AddressSpaceDispatch { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 190 | struct rcu_head rcu; |
| 191 | |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 192 | MemoryRegionSection *mru_section; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 193 | /* This is a multi-level map on the physical address space. |
| 194 | * The bottom level has pointers to MemoryRegionSections. |
| 195 | */ |
| 196 | PhysPageEntry phys_map; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 197 | PhysPageMap map; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 198 | AddressSpace *as; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 199 | }; |
| 200 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 201 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 202 | typedef struct subpage_t { |
| 203 | MemoryRegion iomem; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 204 | AddressSpace *as; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 205 | hwaddr base; |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 206 | uint16_t sub_section[]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 207 | } subpage_t; |
| 208 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 209 | #define PHYS_SECTION_UNASSIGNED 0 |
| 210 | #define PHYS_SECTION_NOTDIRTY 1 |
| 211 | #define PHYS_SECTION_ROM 2 |
| 212 | #define PHYS_SECTION_WATCH 3 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 213 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 214 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 215 | static void memory_map_init(void); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 216 | static void tcg_commit(MemoryListener *listener); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 217 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 218 | static MemoryRegion io_mem_watch; |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 219 | |
| 220 | /** |
| 221 | * CPUAddressSpace: all the information a CPU needs about an AddressSpace |
| 222 | * @cpu: the CPU whose AddressSpace this is |
| 223 | * @as: the AddressSpace itself |
| 224 | * @memory_dispatch: its dispatch pointer (cached, RCU protected) |
| 225 | * @tcg_as_listener: listener for tracking changes to the AddressSpace |
| 226 | */ |
| 227 | struct CPUAddressSpace { |
| 228 | CPUState *cpu; |
| 229 | AddressSpace *as; |
| 230 | struct AddressSpaceDispatch *memory_dispatch; |
| 231 | MemoryListener tcg_as_listener; |
| 232 | }; |
| 233 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 234 | struct DirtyBitmapSnapshot { |
| 235 | ram_addr_t start; |
| 236 | ram_addr_t end; |
| 237 | unsigned long dirty[]; |
| 238 | }; |
| 239 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 240 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 241 | |
Paul Brook | 6d9a130 | 2010-02-28 23:55:53 +0000 | [diff] [blame] | 242 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 243 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 244 | static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 245 | { |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 246 | static unsigned alloc_hint = 16; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 247 | if (map->nodes_nb + nodes > map->nodes_nb_alloc) { |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 248 | map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 249 | map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes); |
| 250 | map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc); |
Peter Lieven | 101420b | 2016-07-15 12:03:50 +0200 | [diff] [blame] | 251 | alloc_hint = map->nodes_nb_alloc; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 252 | } |
| 253 | } |
| 254 | |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 255 | static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 256 | { |
| 257 | unsigned i; |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame] | 258 | uint32_t ret; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 259 | PhysPageEntry e; |
| 260 | PhysPageEntry *p; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 261 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 262 | ret = map->nodes_nb++; |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 263 | p = map->nodes[ret]; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 264 | assert(ret != PHYS_MAP_NODE_NIL); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 265 | assert(ret != map->nodes_nb_alloc); |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 266 | |
| 267 | e.skip = leaf ? 0 : 1; |
| 268 | e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 269 | for (i = 0; i < P_L2_SIZE; ++i) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 270 | memcpy(&p[i], &e, sizeof(e)); |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 271 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 272 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 273 | } |
| 274 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 275 | static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp, |
| 276 | hwaddr *index, hwaddr *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 277 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 278 | { |
| 279 | PhysPageEntry *p; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 280 | hwaddr step = (hwaddr)1 << (level * P_L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 281 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 282 | if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 283 | lp->ptr = phys_map_node_alloc(map, level == 0); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 284 | } |
Paolo Bonzini | db94604 | 2015-05-21 15:12:29 +0200 | [diff] [blame] | 285 | p = map->nodes[lp->ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 286 | lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 287 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 288 | while (*nb && lp < &p[P_L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 289 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 290 | lp->skip = 0; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 291 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 292 | *index += step; |
| 293 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 294 | } else { |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 295 | phys_page_set_level(map, lp, index, nb, leaf, level - 1); |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 296 | } |
| 297 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 298 | } |
| 299 | } |
| 300 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 301 | static void phys_page_set(AddressSpaceDispatch *d, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 302 | hwaddr index, hwaddr nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 303 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 304 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 305 | /* Wildly overreserve - it doesn't matter much. */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 306 | phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 307 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 308 | phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 309 | } |
| 310 | |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 311 | /* Compact a non leaf page entry. Simply detect that the entry has a single child, |
| 312 | * and update our entry so we can skip it and go directly to the destination. |
| 313 | */ |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 314 | static void phys_page_compact(PhysPageEntry *lp, Node *nodes) |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 315 | { |
| 316 | unsigned valid_ptr = P_L2_SIZE; |
| 317 | int valid = 0; |
| 318 | PhysPageEntry *p; |
| 319 | int i; |
| 320 | |
| 321 | if (lp->ptr == PHYS_MAP_NODE_NIL) { |
| 322 | return; |
| 323 | } |
| 324 | |
| 325 | p = nodes[lp->ptr]; |
| 326 | for (i = 0; i < P_L2_SIZE; i++) { |
| 327 | if (p[i].ptr == PHYS_MAP_NODE_NIL) { |
| 328 | continue; |
| 329 | } |
| 330 | |
| 331 | valid_ptr = i; |
| 332 | valid++; |
| 333 | if (p[i].skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 334 | phys_page_compact(&p[i], nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 335 | } |
| 336 | } |
| 337 | |
| 338 | /* We can only compress if there's only one child. */ |
| 339 | if (valid != 1) { |
| 340 | return; |
| 341 | } |
| 342 | |
| 343 | assert(valid_ptr < P_L2_SIZE); |
| 344 | |
| 345 | /* Don't compress if it won't fit in the # of bits we have. */ |
| 346 | if (lp->skip + p[valid_ptr].skip >= (1 << 3)) { |
| 347 | return; |
| 348 | } |
| 349 | |
| 350 | lp->ptr = p[valid_ptr].ptr; |
| 351 | if (!p[valid_ptr].skip) { |
| 352 | /* If our only child is a leaf, make this a leaf. */ |
| 353 | /* By design, we should have made this node a leaf to begin with so we |
| 354 | * should never reach here. |
| 355 | * But since it's so simple to handle this, let's do it just in case we |
| 356 | * change this rule. |
| 357 | */ |
| 358 | lp->skip = 0; |
| 359 | } else { |
| 360 | lp->skip += p[valid_ptr].skip; |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | static void phys_page_compact_all(AddressSpaceDispatch *d, int nodes_nb) |
| 365 | { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 366 | if (d->phys_map.skip) { |
Marc-André Lureau | efee678 | 2016-09-28 16:37:20 +0400 | [diff] [blame] | 367 | phys_page_compact(&d->phys_map, d->map.nodes); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 368 | } |
| 369 | } |
| 370 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 371 | static inline bool section_covers_addr(const MemoryRegionSection *section, |
| 372 | hwaddr addr) |
| 373 | { |
| 374 | /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means |
| 375 | * the section must cover the entire address space. |
| 376 | */ |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 377 | return int128_gethi(section->size) || |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 378 | range_covers_byte(section->offset_within_address_space, |
Richard Henderson | 258dfaa | 2016-06-29 15:48:03 -0700 | [diff] [blame] | 379 | int128_getlo(section->size), addr); |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 380 | } |
| 381 | |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 382 | static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 383 | { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 384 | PhysPageEntry lp = d->phys_map, *p; |
| 385 | Node *nodes = d->map.nodes; |
| 386 | MemoryRegionSection *sections = d->map.sections; |
Michael S. Tsirkin | 97115a8 | 2013-11-13 20:08:19 +0200 | [diff] [blame] | 387 | hwaddr index = addr >> TARGET_PAGE_BITS; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 388 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 389 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 390 | for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 391 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 392 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 393 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 394 | p = nodes[lp.ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 395 | lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 396 | } |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 397 | |
Fam Zheng | 29cb533 | 2016-03-01 14:18:23 +0800 | [diff] [blame] | 398 | if (section_covers_addr(§ions[lp.ptr], addr)) { |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 399 | return §ions[lp.ptr]; |
| 400 | } else { |
| 401 | return §ions[PHYS_SECTION_UNASSIGNED]; |
| 402 | } |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 403 | } |
| 404 | |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 405 | bool memory_region_is_unassigned(MemoryRegion *mr) |
| 406 | { |
Paolo Bonzini | 2a8e749 | 2013-05-24 14:34:08 +0200 | [diff] [blame] | 407 | return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 408 | && mr != &io_mem_watch; |
| 409 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 410 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 411 | /* Called from RCU critical section */ |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 412 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 413 | hwaddr addr, |
| 414 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 415 | { |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 416 | MemoryRegionSection *section = atomic_read(&d->mru_section); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 417 | subpage_t *subpage; |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 418 | bool update; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 419 | |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 420 | if (section && section != &d->map.sections[PHYS_SECTION_UNASSIGNED] && |
| 421 | section_covers_addr(section, addr)) { |
| 422 | update = false; |
| 423 | } else { |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 424 | section = phys_page_find(d, addr); |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 425 | update = true; |
| 426 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 427 | if (resolve_subpage && section->mr->subpage) { |
| 428 | subpage = container_of(section->mr, subpage_t, iomem); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 429 | section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 430 | } |
Fam Zheng | 729633c | 2016-03-01 14:18:24 +0800 | [diff] [blame] | 431 | if (update) { |
| 432 | atomic_set(&d->mru_section, section); |
| 433 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 434 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 435 | } |
| 436 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 437 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 438 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 439 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 440 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 441 | { |
| 442 | MemoryRegionSection *section; |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 443 | MemoryRegion *mr; |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 444 | Int128 diff; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 445 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 446 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 447 | /* Compute offset within MemoryRegionSection */ |
| 448 | addr -= section->offset_within_address_space; |
| 449 | |
| 450 | /* Compute offset within MemoryRegion */ |
| 451 | *xlat = addr + section->offset_within_region; |
| 452 | |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 453 | mr = section->mr; |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 454 | |
| 455 | /* MMIO registers can be expected to perform full-width accesses based only |
| 456 | * on their address, without considering adjacent registers that could |
| 457 | * decode to completely different MemoryRegions. When such registers |
| 458 | * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO |
| 459 | * regions overlap wildly. For this reason we cannot clamp the accesses |
| 460 | * here. |
| 461 | * |
| 462 | * If the length is small (as is the case for address_space_ldl/stl), |
| 463 | * everything works fine. If the incoming length is large, however, |
| 464 | * the caller really has to do the clamping through memory_access_size. |
| 465 | */ |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 466 | if (memory_region_is_ram(mr)) { |
Paolo Bonzini | e4a511f | 2015-06-17 10:36:54 +0200 | [diff] [blame] | 467 | diff = int128_sub(section->size, int128_make64(addr)); |
Paolo Bonzini | 965eb2f | 2015-06-17 10:40:27 +0200 | [diff] [blame] | 468 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
| 469 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 470 | return section; |
| 471 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 472 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 473 | /* Called from RCU critical section */ |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 474 | static MemoryRegionSection address_space_do_translate(AddressSpace *as, |
| 475 | hwaddr addr, |
| 476 | hwaddr *xlat, |
| 477 | hwaddr *plen, |
| 478 | bool is_write, |
| 479 | bool is_mmio) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 480 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 481 | IOMMUTLBEntry iotlb; |
| 482 | MemoryRegionSection *section; |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame^] | 483 | IOMMUMemoryRegion *iommu_mr; |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 484 | |
| 485 | for (;;) { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 486 | AddressSpaceDispatch *d = atomic_rcu_read(&as->dispatch); |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 487 | section = address_space_translate_internal(d, addr, &addr, plen, is_mmio); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 488 | |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame^] | 489 | iommu_mr = memory_region_get_iommu(section->mr); |
| 490 | if (!iommu_mr) { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 491 | break; |
| 492 | } |
| 493 | |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame^] | 494 | iotlb = iommu_mr->iommu_ops->translate(iommu_mr, addr, is_write ? |
| 495 | IOMMU_WO : IOMMU_RO); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 496 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 497 | | (addr & iotlb.addr_mask)); |
Peter Crosthwaite | 23820db | 2015-03-16 22:35:54 -0700 | [diff] [blame] | 498 | *plen = MIN(*plen, (addr | iotlb.addr_mask) - addr + 1); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 499 | if (!(iotlb.perm & (1 << is_write))) { |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 500 | goto translate_fail; |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 501 | } |
| 502 | |
| 503 | as = iotlb.target_as; |
| 504 | } |
| 505 | |
Peter Xu | a764040 | 2017-05-17 16:57:42 +0800 | [diff] [blame] | 506 | *xlat = addr; |
| 507 | |
| 508 | return *section; |
| 509 | |
| 510 | translate_fail: |
| 511 | return (MemoryRegionSection) { .mr = &io_mem_unassigned }; |
| 512 | } |
| 513 | |
| 514 | /* Called from RCU critical section */ |
| 515 | IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, |
| 516 | bool is_write) |
| 517 | { |
| 518 | MemoryRegionSection section; |
| 519 | hwaddr xlat, plen; |
| 520 | |
| 521 | /* Try to get maximum page mask during translation. */ |
| 522 | plen = (hwaddr)-1; |
| 523 | |
| 524 | /* This can never be MMIO. */ |
| 525 | section = address_space_do_translate(as, addr, &xlat, &plen, |
| 526 | is_write, false); |
| 527 | |
| 528 | /* Illegal translation */ |
| 529 | if (section.mr == &io_mem_unassigned) { |
| 530 | goto iotlb_fail; |
| 531 | } |
| 532 | |
| 533 | /* Convert memory region offset into address space offset */ |
| 534 | xlat += section.offset_within_address_space - |
| 535 | section.offset_within_region; |
| 536 | |
| 537 | if (plen == (hwaddr)-1) { |
| 538 | /* |
| 539 | * We use default page size here. Logically it only happens |
| 540 | * for identity mappings. |
| 541 | */ |
| 542 | plen = TARGET_PAGE_SIZE; |
| 543 | } |
| 544 | |
| 545 | /* Convert to address mask */ |
| 546 | plen -= 1; |
| 547 | |
| 548 | return (IOMMUTLBEntry) { |
| 549 | .target_as = section.address_space, |
| 550 | .iova = addr & ~plen, |
| 551 | .translated_addr = xlat & ~plen, |
| 552 | .addr_mask = plen, |
| 553 | /* IOTLBs are for DMAs, and DMA only allows on RAMs. */ |
| 554 | .perm = IOMMU_RW, |
| 555 | }; |
| 556 | |
| 557 | iotlb_fail: |
| 558 | return (IOMMUTLBEntry) {0}; |
| 559 | } |
| 560 | |
| 561 | /* Called from RCU critical section */ |
| 562 | MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, |
| 563 | hwaddr *xlat, hwaddr *plen, |
| 564 | bool is_write) |
| 565 | { |
| 566 | MemoryRegion *mr; |
| 567 | MemoryRegionSection section; |
| 568 | |
| 569 | /* This can be MMIO, so setup MMIO bit. */ |
| 570 | section = address_space_do_translate(as, addr, xlat, plen, is_write, true); |
| 571 | mr = section.mr; |
| 572 | |
Alexey Kardashevskiy | fe680d0 | 2014-05-07 13:40:39 +0000 | [diff] [blame] | 573 | if (xen_enabled() && memory_access_is_direct(mr, is_write)) { |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 574 | hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr; |
Peter Crosthwaite | 23820db | 2015-03-16 22:35:54 -0700 | [diff] [blame] | 575 | *plen = MIN(page, *plen); |
Paolo Bonzini | a87f395 | 2014-02-07 15:47:46 +0100 | [diff] [blame] | 576 | } |
| 577 | |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 578 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 579 | } |
| 580 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 581 | /* Called from RCU critical section */ |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 582 | MemoryRegionSection * |
Peter Maydell | d7898cd | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 583 | address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 584 | hwaddr *xlat, hwaddr *plen) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 585 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 586 | MemoryRegionSection *section; |
Alex Bennée | f35e44e | 2016-10-21 16:34:18 +0100 | [diff] [blame] | 587 | AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch); |
Peter Maydell | d7898cd | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 588 | |
| 589 | section = address_space_translate_internal(d, addr, xlat, plen, false); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 590 | |
Alexey Kardashevskiy | 3df9d74 | 2017-07-11 13:56:19 +1000 | [diff] [blame^] | 591 | assert(!memory_region_is_iommu(section->mr)); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 592 | return section; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 593 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 594 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 595 | |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 596 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 597 | |
Juan Quintela | e59fb37 | 2009-09-29 22:48:21 +0200 | [diff] [blame] | 598 | static int cpu_common_post_load(void *opaque, int version_id) |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 599 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 600 | CPUState *cpu = opaque; |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 601 | |
aurel32 | 3098dba | 2009-03-07 21:28:24 +0000 | [diff] [blame] | 602 | /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the |
| 603 | version_id is increased. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 604 | cpu->interrupt_request &= ~0x01; |
Alex Bennée | d10eb08 | 2016-11-14 14:17:28 +0000 | [diff] [blame] | 605 | tlb_flush(cpu); |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 606 | |
| 607 | return 0; |
| 608 | } |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 609 | |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 610 | static int cpu_common_pre_load(void *opaque) |
| 611 | { |
| 612 | CPUState *cpu = opaque; |
| 613 | |
Paolo Bonzini | adee642 | 2014-12-19 12:53:14 +0100 | [diff] [blame] | 614 | cpu->exception_index = -1; |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 615 | |
| 616 | return 0; |
| 617 | } |
| 618 | |
| 619 | static bool cpu_common_exception_index_needed(void *opaque) |
| 620 | { |
| 621 | CPUState *cpu = opaque; |
| 622 | |
Paolo Bonzini | adee642 | 2014-12-19 12:53:14 +0100 | [diff] [blame] | 623 | return tcg_enabled() && cpu->exception_index != -1; |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 624 | } |
| 625 | |
| 626 | static const VMStateDescription vmstate_cpu_common_exception_index = { |
| 627 | .name = "cpu_common/exception_index", |
| 628 | .version_id = 1, |
| 629 | .minimum_version_id = 1, |
Juan Quintela | 5cd8cad | 2014-09-23 14:09:54 +0200 | [diff] [blame] | 630 | .needed = cpu_common_exception_index_needed, |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 631 | .fields = (VMStateField[]) { |
| 632 | VMSTATE_INT32(exception_index, CPUState), |
| 633 | VMSTATE_END_OF_LIST() |
| 634 | } |
| 635 | }; |
| 636 | |
Andrey Smetanin | bac05aa | 2015-07-03 15:01:44 +0300 | [diff] [blame] | 637 | static bool cpu_common_crash_occurred_needed(void *opaque) |
| 638 | { |
| 639 | CPUState *cpu = opaque; |
| 640 | |
| 641 | return cpu->crash_occurred; |
| 642 | } |
| 643 | |
| 644 | static const VMStateDescription vmstate_cpu_common_crash_occurred = { |
| 645 | .name = "cpu_common/crash_occurred", |
| 646 | .version_id = 1, |
| 647 | .minimum_version_id = 1, |
| 648 | .needed = cpu_common_crash_occurred_needed, |
| 649 | .fields = (VMStateField[]) { |
| 650 | VMSTATE_BOOL(crash_occurred, CPUState), |
| 651 | VMSTATE_END_OF_LIST() |
| 652 | } |
| 653 | }; |
| 654 | |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 655 | const VMStateDescription vmstate_cpu_common = { |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 656 | .name = "cpu_common", |
| 657 | .version_id = 1, |
| 658 | .minimum_version_id = 1, |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 659 | .pre_load = cpu_common_pre_load, |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 660 | .post_load = cpu_common_post_load, |
Juan Quintela | 35d0845 | 2014-04-16 16:01:33 +0200 | [diff] [blame] | 661 | .fields = (VMStateField[]) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 662 | VMSTATE_UINT32(halted, CPUState), |
| 663 | VMSTATE_UINT32(interrupt_request, CPUState), |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 664 | VMSTATE_END_OF_LIST() |
Pavel Dovgaluk | 6c3bff0 | 2014-07-31 09:41:17 +0400 | [diff] [blame] | 665 | }, |
Juan Quintela | 5cd8cad | 2014-09-23 14:09:54 +0200 | [diff] [blame] | 666 | .subsections = (const VMStateDescription*[]) { |
| 667 | &vmstate_cpu_common_exception_index, |
Andrey Smetanin | bac05aa | 2015-07-03 15:01:44 +0300 | [diff] [blame] | 668 | &vmstate_cpu_common_crash_occurred, |
Juan Quintela | 5cd8cad | 2014-09-23 14:09:54 +0200 | [diff] [blame] | 669 | NULL |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 670 | } |
| 671 | }; |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 672 | |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 673 | #endif |
| 674 | |
Andreas Färber | 38d8f5c | 2012-12-17 19:47:15 +0100 | [diff] [blame] | 675 | CPUState *qemu_get_cpu(int index) |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 676 | { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 677 | CPUState *cpu; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 678 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 679 | CPU_FOREACH(cpu) { |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 680 | if (cpu->cpu_index == index) { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 681 | return cpu; |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 682 | } |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 683 | } |
| 684 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 685 | return NULL; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 686 | } |
| 687 | |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 688 | #if !defined(CONFIG_USER_ONLY) |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 689 | void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx) |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 690 | { |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 691 | CPUAddressSpace *newas; |
| 692 | |
| 693 | /* Target code should have set num_ases before calling us */ |
| 694 | assert(asidx < cpu->num_ases); |
| 695 | |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 696 | if (asidx == 0) { |
| 697 | /* address space 0 gets the convenience alias */ |
| 698 | cpu->as = as; |
| 699 | } |
| 700 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 701 | /* KVM cannot currently support multiple address spaces. */ |
| 702 | assert(asidx == 0 || !kvm_enabled()); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 703 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 704 | if (!cpu->cpu_ases) { |
| 705 | cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 706 | } |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 707 | |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 708 | newas = &cpu->cpu_ases[asidx]; |
| 709 | newas->cpu = cpu; |
| 710 | newas->as = as; |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 711 | if (tcg_enabled()) { |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 712 | newas->tcg_as_listener.commit = tcg_commit; |
| 713 | memory_listener_register(&newas->tcg_as_listener, as); |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 714 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 715 | } |
Peter Maydell | 651a5bc | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 716 | |
| 717 | AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) |
| 718 | { |
| 719 | /* Return the AddressSpace corresponding to the specified index */ |
| 720 | return cpu->cpu_ases[asidx].as; |
| 721 | } |
Edgar E. Iglesias | 09daed8 | 2013-12-17 13:06:51 +1000 | [diff] [blame] | 722 | #endif |
| 723 | |
Laurent Vivier | 7bbc124 | 2016-10-20 13:26:04 +0200 | [diff] [blame] | 724 | void cpu_exec_unrealizefn(CPUState *cpu) |
Bharata B Rao | 1c59eb3 | 2016-05-12 09:18:11 +0530 | [diff] [blame] | 725 | { |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 726 | CPUClass *cc = CPU_GET_CLASS(cpu); |
| 727 | |
Paolo Bonzini | 267f685 | 2016-08-28 03:45:14 +0200 | [diff] [blame] | 728 | cpu_list_remove(cpu); |
Bharata B Rao | 9dfeca7 | 2016-05-12 09:18:12 +0530 | [diff] [blame] | 729 | |
| 730 | if (cc->vmsd != NULL) { |
| 731 | vmstate_unregister(NULL, cc->vmsd, cpu); |
| 732 | } |
| 733 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
| 734 | vmstate_unregister(NULL, &vmstate_cpu_common, cpu); |
| 735 | } |
Bharata B Rao | 1c59eb3 | 2016-05-12 09:18:11 +0530 | [diff] [blame] | 736 | } |
| 737 | |
Laurent Vivier | 39e329e | 2016-10-20 13:26:02 +0200 | [diff] [blame] | 738 | void cpu_exec_initfn(CPUState *cpu) |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 739 | { |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 740 | cpu->as = NULL; |
Peter Maydell | 12ebc9a | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 741 | cpu->num_ases = 0; |
Peter Maydell | 56943e8 | 2016-01-21 14:15:04 +0000 | [diff] [blame] | 742 | |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 743 | #ifndef CONFIG_USER_ONLY |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 744 | cpu->thread_id = qemu_get_thread_id(); |
Peter Crosthwaite | 6731d86 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 745 | |
| 746 | /* This is a softmmu CPU object, so create a property for it |
| 747 | * so users can wire up its memory. (This can't go in qom/cpu.c |
| 748 | * because that file is compiled only once for both user-mode |
| 749 | * and system builds.) The default if no link is set up is to use |
| 750 | * the system address space. |
| 751 | */ |
| 752 | object_property_add_link(OBJECT(cpu), "memory", TYPE_MEMORY_REGION, |
| 753 | (Object **)&cpu->memory, |
| 754 | qdev_prop_allow_set_link_before_realize, |
| 755 | OBJ_PROP_LINK_UNREF_ON_RELEASE, |
| 756 | &error_abort); |
| 757 | cpu->memory = system_memory; |
| 758 | object_ref(OBJECT(cpu->memory)); |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 759 | #endif |
Laurent Vivier | 39e329e | 2016-10-20 13:26:02 +0200 | [diff] [blame] | 760 | } |
| 761 | |
Laurent Vivier | ce5b1bb | 2016-10-20 13:26:03 +0200 | [diff] [blame] | 762 | void cpu_exec_realizefn(CPUState *cpu, Error **errp) |
Laurent Vivier | 39e329e | 2016-10-20 13:26:02 +0200 | [diff] [blame] | 763 | { |
| 764 | CPUClass *cc ATTRIBUTE_UNUSED = CPU_GET_CLASS(cpu); |
Eduardo Habkost | 291135b | 2015-04-27 17:00:33 -0300 | [diff] [blame] | 765 | |
Paolo Bonzini | 267f685 | 2016-08-28 03:45:14 +0200 | [diff] [blame] | 766 | cpu_list_add(cpu); |
Igor Mammedov | 1bc7e52 | 2016-07-25 11:59:19 +0200 | [diff] [blame] | 767 | |
| 768 | #ifndef CONFIG_USER_ONLY |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 769 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 770 | vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 771 | } |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 772 | if (cc->vmsd != NULL) { |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 773 | vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 774 | } |
Paolo Bonzini | 741da0d | 2014-06-27 08:40:04 +0200 | [diff] [blame] | 775 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 776 | } |
| 777 | |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 778 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 779 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 780 | { |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 781 | mmap_lock(); |
| 782 | tb_lock(); |
| 783 | tb_invalidate_phys_page_range(pc, pc + 1, 0); |
| 784 | tb_unlock(); |
| 785 | mmap_unlock(); |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 786 | } |
Pranith Kumar | 406bc33 | 2017-07-12 17:51:42 -0400 | [diff] [blame] | 787 | #else |
| 788 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
| 789 | { |
| 790 | MemTxAttrs attrs; |
| 791 | hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs); |
| 792 | int asidx = cpu_asidx_from_attrs(cpu, attrs); |
| 793 | if (phys != -1) { |
| 794 | /* Locks grabbed by tb_invalidate_phys_addr */ |
| 795 | tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as, |
| 796 | phys | (pc & ~TARGET_PAGE_MASK)); |
| 797 | } |
| 798 | } |
| 799 | #endif |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 800 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 801 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 802 | void cpu_watchpoint_remove_all(CPUState *cpu, int mask) |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 803 | |
| 804 | { |
| 805 | } |
| 806 | |
Peter Maydell | 3ee887e | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 807 | int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, |
| 808 | int flags) |
| 809 | { |
| 810 | return -ENOSYS; |
| 811 | } |
| 812 | |
| 813 | void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) |
| 814 | { |
| 815 | } |
| 816 | |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 817 | int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 818 | int flags, CPUWatchpoint **watchpoint) |
| 819 | { |
| 820 | return -ENOSYS; |
| 821 | } |
| 822 | #else |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 823 | /* Add a watchpoint. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 824 | int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 825 | int flags, CPUWatchpoint **watchpoint) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 826 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 827 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 828 | |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 829 | /* forbid ranges which are empty or run off the end of the address space */ |
Max Filippov | 07e2863 | 2014-09-17 22:03:36 -0700 | [diff] [blame] | 830 | if (len == 0 || (addr + len - 1) < addr) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 831 | error_report("tried to set invalid watchpoint at %" |
| 832 | VADDR_PRIx ", len=%" VADDR_PRIu, addr, len); |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 833 | return -EINVAL; |
| 834 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 835 | wp = g_malloc(sizeof(*wp)); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 836 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 837 | wp->vaddr = addr; |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 838 | wp->len = len; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 839 | wp->flags = flags; |
| 840 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 841 | /* keep all GDB-injected watchpoints in front */ |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 842 | if (flags & BP_GDB) { |
| 843 | QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); |
| 844 | } else { |
| 845 | QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); |
| 846 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 847 | |
Andreas Färber | 31b030d | 2013-09-04 01:29:02 +0200 | [diff] [blame] | 848 | tlb_flush_page(cpu, addr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 849 | |
| 850 | if (watchpoint) |
| 851 | *watchpoint = wp; |
| 852 | return 0; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 853 | } |
| 854 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 855 | /* Remove a specific watchpoint. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 856 | int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 857 | int flags) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 858 | { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 859 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 860 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 861 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 862 | if (addr == wp->vaddr && len == wp->len |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 863 | && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 864 | cpu_watchpoint_remove_by_ref(cpu, wp); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 865 | return 0; |
| 866 | } |
| 867 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 868 | return -ENOENT; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 869 | } |
| 870 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 871 | /* Remove a specific watchpoint by reference. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 872 | void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 873 | { |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 874 | QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 875 | |
Andreas Färber | 31b030d | 2013-09-04 01:29:02 +0200 | [diff] [blame] | 876 | tlb_flush_page(cpu, watchpoint->vaddr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 877 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 878 | g_free(watchpoint); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 879 | } |
| 880 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 881 | /* Remove all matching watchpoints. */ |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 882 | void cpu_watchpoint_remove_all(CPUState *cpu, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 883 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 884 | CPUWatchpoint *wp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 885 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 886 | QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { |
Andreas Färber | 75a3403 | 2013-09-02 16:57:02 +0200 | [diff] [blame] | 887 | if (wp->flags & mask) { |
| 888 | cpu_watchpoint_remove_by_ref(cpu, wp); |
| 889 | } |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 890 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 891 | } |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 892 | |
| 893 | /* Return true if this watchpoint address matches the specified |
| 894 | * access (ie the address range covered by the watchpoint overlaps |
| 895 | * partially or completely with the address range covered by the |
| 896 | * access). |
| 897 | */ |
| 898 | static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp, |
| 899 | vaddr addr, |
| 900 | vaddr len) |
| 901 | { |
| 902 | /* We know the lengths are non-zero, but a little caution is |
| 903 | * required to avoid errors in the case where the range ends |
| 904 | * exactly at the top of the address space and so addr + len |
| 905 | * wraps round to zero. |
| 906 | */ |
| 907 | vaddr wpend = wp->vaddr + wp->len - 1; |
| 908 | vaddr addrend = addr + len - 1; |
| 909 | |
| 910 | return !(addr > wpend || wp->vaddr > addrend); |
| 911 | } |
| 912 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 913 | #endif |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 914 | |
| 915 | /* Add a breakpoint. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 916 | int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 917 | CPUBreakpoint **breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 918 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 919 | CPUBreakpoint *bp; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 920 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 921 | bp = g_malloc(sizeof(*bp)); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 922 | |
| 923 | bp->pc = pc; |
| 924 | bp->flags = flags; |
| 925 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 926 | /* keep all GDB-injected breakpoints in front */ |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 927 | if (flags & BP_GDB) { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 928 | QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 929 | } else { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 930 | QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 931 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 932 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 933 | breakpoint_invalidate(cpu, pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 934 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 935 | if (breakpoint) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 936 | *breakpoint = bp; |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 937 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 938 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 939 | } |
| 940 | |
| 941 | /* Remove a specific breakpoint. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 942 | int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 943 | { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 944 | CPUBreakpoint *bp; |
| 945 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 946 | QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 947 | if (bp->pc == pc && bp->flags == flags) { |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 948 | cpu_breakpoint_remove_by_ref(cpu, bp); |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 949 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 950 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 951 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 952 | return -ENOENT; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 953 | } |
| 954 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 955 | /* Remove a specific breakpoint by reference. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 956 | void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 957 | { |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 958 | QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry); |
| 959 | |
| 960 | breakpoint_invalidate(cpu, breakpoint->pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 961 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 962 | g_free(breakpoint); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 963 | } |
| 964 | |
| 965 | /* Remove all matching breakpoints. */ |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 966 | void cpu_breakpoint_remove_all(CPUState *cpu, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 967 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 968 | CPUBreakpoint *bp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 969 | |
Andreas Färber | f0c3c50 | 2013-08-26 21:22:53 +0200 | [diff] [blame] | 970 | QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) { |
Andreas Färber | b3310ab | 2013-09-02 17:26:20 +0200 | [diff] [blame] | 971 | if (bp->flags & mask) { |
| 972 | cpu_breakpoint_remove_by_ref(cpu, bp); |
| 973 | } |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 974 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 975 | } |
| 976 | |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 977 | /* enable or disable single step mode. EXCP_DEBUG is returned by the |
| 978 | CPU loop after each instruction */ |
Andreas Färber | 3825b28 | 2013-06-24 18:41:06 +0200 | [diff] [blame] | 979 | void cpu_single_step(CPUState *cpu, int enabled) |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 980 | { |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 981 | if (cpu->singlestep_enabled != enabled) { |
| 982 | cpu->singlestep_enabled = enabled; |
| 983 | if (kvm_enabled()) { |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 984 | kvm_update_guest_debug(cpu, 0); |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 985 | } else { |
Stuart Brady | ccbb4d4 | 2009-05-03 12:15:06 +0100 | [diff] [blame] | 986 | /* must flush all the translated code to avoid inconsistencies */ |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 987 | /* XXX: only flush what is necessary */ |
Peter Crosthwaite | bbd77c1 | 2015-06-23 19:31:15 -0700 | [diff] [blame] | 988 | tb_flush(cpu); |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 989 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 990 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 991 | } |
| 992 | |
Andreas Färber | a47dddd | 2013-09-03 17:38:47 +0200 | [diff] [blame] | 993 | void cpu_abort(CPUState *cpu, const char *fmt, ...) |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 994 | { |
| 995 | va_list ap; |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 996 | va_list ap2; |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 997 | |
| 998 | va_start(ap, fmt); |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 999 | va_copy(ap2, ap); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 1000 | fprintf(stderr, "qemu: fatal: "); |
| 1001 | vfprintf(stderr, fmt, ap); |
| 1002 | fprintf(stderr, "\n"); |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 1003 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
Paolo Bonzini | 013a294 | 2015-11-13 13:16:27 +0100 | [diff] [blame] | 1004 | if (qemu_log_separate()) { |
Richard Henderson | 1ee7321 | 2016-09-22 15:17:10 -0700 | [diff] [blame] | 1005 | qemu_log_lock(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 1006 | qemu_log("qemu: fatal: "); |
| 1007 | qemu_log_vprintf(fmt, ap2); |
| 1008 | qemu_log("\n"); |
Andreas Färber | a076285 | 2013-06-16 07:28:50 +0200 | [diff] [blame] | 1009 | log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 31b1a7b | 2009-01-15 22:35:09 +0000 | [diff] [blame] | 1010 | qemu_log_flush(); |
Richard Henderson | 1ee7321 | 2016-09-22 15:17:10 -0700 | [diff] [blame] | 1011 | qemu_log_unlock(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 1012 | qemu_log_close(); |
balrog | 924edca | 2007-06-10 14:07:13 +0000 | [diff] [blame] | 1013 | } |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 1014 | va_end(ap2); |
j_mayer | f937329 | 2007-09-29 12:18:20 +0000 | [diff] [blame] | 1015 | va_end(ap); |
Pavel Dovgalyuk | 7615936 | 2015-09-17 19:25:07 +0300 | [diff] [blame] | 1016 | replay_finish(); |
Riku Voipio | fd052bf | 2010-01-25 14:30:49 +0200 | [diff] [blame] | 1017 | #if defined(CONFIG_USER_ONLY) |
| 1018 | { |
| 1019 | struct sigaction act; |
| 1020 | sigfillset(&act.sa_mask); |
| 1021 | act.sa_handler = SIG_DFL; |
| 1022 | sigaction(SIGABRT, &act, NULL); |
| 1023 | } |
| 1024 | #endif |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 1025 | abort(); |
| 1026 | } |
| 1027 | |
bellard | 0124311 | 2004-01-04 15:48:17 +0000 | [diff] [blame] | 1028 | #if !defined(CONFIG_USER_ONLY) |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1029 | /* Called from RCU critical section */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1030 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
| 1031 | { |
| 1032 | RAMBlock *block; |
| 1033 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 1034 | block = atomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1035 | if (block && addr - block->offset < block->max_length) { |
Paolo Bonzini | 68851b9 | 2015-10-22 13:51:30 +0200 | [diff] [blame] | 1036 | return block; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1037 | } |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1038 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1039 | if (addr - block->offset < block->max_length) { |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1040 | goto found; |
| 1041 | } |
| 1042 | } |
| 1043 | |
| 1044 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1045 | abort(); |
| 1046 | |
| 1047 | found: |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 1048 | /* It is safe to write mru_block outside the iothread lock. This |
| 1049 | * is what happens: |
| 1050 | * |
| 1051 | * mru_block = xxx |
| 1052 | * rcu_read_unlock() |
| 1053 | * xxx removed from list |
| 1054 | * rcu_read_lock() |
| 1055 | * read mru_block |
| 1056 | * mru_block = NULL; |
| 1057 | * call_rcu(reclaim_ramblock, xxx); |
| 1058 | * rcu_read_unlock() |
| 1059 | * |
| 1060 | * atomic_rcu_set is not needed here. The block was already published |
| 1061 | * when it was placed into the list. Here we're just making an extra |
| 1062 | * copy of the pointer. |
| 1063 | */ |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1064 | ram_list.mru_block = block; |
| 1065 | return block; |
| 1066 | } |
| 1067 | |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1068 | static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1069 | { |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 1070 | CPUState *cpu; |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1071 | ram_addr_t start1; |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1072 | RAMBlock *block; |
| 1073 | ram_addr_t end; |
| 1074 | |
| 1075 | end = TARGET_PAGE_ALIGN(start + length); |
| 1076 | start &= TARGET_PAGE_MASK; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1077 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1078 | rcu_read_lock(); |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 1079 | block = qemu_get_ram_block(start); |
| 1080 | assert(block == qemu_get_ram_block(end - 1)); |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 1081 | start1 = (uintptr_t)ramblock_ptr(block, start - block->offset); |
Peter Crosthwaite | 9a13565 | 2015-09-10 22:39:41 -0700 | [diff] [blame] | 1082 | CPU_FOREACH(cpu) { |
| 1083 | tlb_reset_dirty(cpu, start1, length); |
| 1084 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1085 | rcu_read_unlock(); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1086 | } |
| 1087 | |
| 1088 | /* Note: start and end must be within the same ram block. */ |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1089 | bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start, |
| 1090 | ram_addr_t length, |
| 1091 | unsigned client) |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1092 | { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1093 | DirtyMemoryBlocks *blocks; |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1094 | unsigned long end, page; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1095 | bool dirty = false; |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1096 | |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1097 | if (length == 0) { |
| 1098 | return false; |
| 1099 | } |
| 1100 | |
| 1101 | end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; |
| 1102 | page = start >> TARGET_PAGE_BITS; |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1103 | |
| 1104 | rcu_read_lock(); |
| 1105 | |
| 1106 | blocks = atomic_rcu_read(&ram_list.dirty_memory[client]); |
| 1107 | |
| 1108 | while (page < end) { |
| 1109 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
| 1110 | unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE; |
| 1111 | unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset); |
| 1112 | |
| 1113 | dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx], |
| 1114 | offset, num); |
| 1115 | page += num; |
| 1116 | } |
| 1117 | |
| 1118 | rcu_read_unlock(); |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1119 | |
| 1120 | if (dirty && tcg_enabled()) { |
Juan Quintela | a2f4d5b | 2013-10-10 11:49:53 +0200 | [diff] [blame] | 1121 | tlb_reset_dirty_range_all(start, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 1122 | } |
Stefan Hajnoczi | 03eebc9 | 2014-12-02 11:23:18 +0000 | [diff] [blame] | 1123 | |
| 1124 | return dirty; |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1125 | } |
| 1126 | |
Gerd Hoffmann | 8deaf12 | 2017-04-21 11:16:25 +0200 | [diff] [blame] | 1127 | DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty |
| 1128 | (ram_addr_t start, ram_addr_t length, unsigned client) |
| 1129 | { |
| 1130 | DirtyMemoryBlocks *blocks; |
| 1131 | unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL); |
| 1132 | ram_addr_t first = QEMU_ALIGN_DOWN(start, align); |
| 1133 | ram_addr_t last = QEMU_ALIGN_UP(start + length, align); |
| 1134 | DirtyBitmapSnapshot *snap; |
| 1135 | unsigned long page, end, dest; |
| 1136 | |
| 1137 | snap = g_malloc0(sizeof(*snap) + |
| 1138 | ((last - first) >> (TARGET_PAGE_BITS + 3))); |
| 1139 | snap->start = first; |
| 1140 | snap->end = last; |
| 1141 | |
| 1142 | page = first >> TARGET_PAGE_BITS; |
| 1143 | end = last >> TARGET_PAGE_BITS; |
| 1144 | dest = 0; |
| 1145 | |
| 1146 | rcu_read_lock(); |
| 1147 | |
| 1148 | blocks = atomic_rcu_read(&ram_list.dirty_memory[client]); |
| 1149 | |
| 1150 | while (page < end) { |
| 1151 | unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE; |
| 1152 | unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE; |
| 1153 | unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset); |
| 1154 | |
| 1155 | assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL))); |
| 1156 | assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL))); |
| 1157 | offset >>= BITS_PER_LEVEL; |
| 1158 | |
| 1159 | bitmap_copy_and_clear_atomic(snap->dirty + dest, |
| 1160 | blocks->blocks[idx] + offset, |
| 1161 | num); |
| 1162 | page += num; |
| 1163 | dest += num >> BITS_PER_LEVEL; |
| 1164 | } |
| 1165 | |
| 1166 | rcu_read_unlock(); |
| 1167 | |
| 1168 | if (tcg_enabled()) { |
| 1169 | tlb_reset_dirty_range_all(start, length); |
| 1170 | } |
| 1171 | |
| 1172 | return snap; |
| 1173 | } |
| 1174 | |
| 1175 | bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap, |
| 1176 | ram_addr_t start, |
| 1177 | ram_addr_t length) |
| 1178 | { |
| 1179 | unsigned long page, end; |
| 1180 | |
| 1181 | assert(start >= snap->start); |
| 1182 | assert(start + length <= snap->end); |
| 1183 | |
| 1184 | end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS; |
| 1185 | page = (start - snap->start) >> TARGET_PAGE_BITS; |
| 1186 | |
| 1187 | while (page < end) { |
| 1188 | if (test_bit(page, snap->dirty)) { |
| 1189 | return true; |
| 1190 | } |
| 1191 | page++; |
| 1192 | } |
| 1193 | return false; |
| 1194 | } |
| 1195 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 1196 | /* Called from RCU critical section */ |
Andreas Färber | bb0e627 | 2013-09-03 13:32:01 +0200 | [diff] [blame] | 1197 | hwaddr memory_region_section_get_iotlb(CPUState *cpu, |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1198 | MemoryRegionSection *section, |
| 1199 | target_ulong vaddr, |
| 1200 | hwaddr paddr, hwaddr xlat, |
| 1201 | int prot, |
| 1202 | target_ulong *address) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1203 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1204 | hwaddr iotlb; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1205 | CPUWatchpoint *wp; |
| 1206 | |
Blue Swirl | cc5bea6 | 2012-04-14 14:56:48 +0000 | [diff] [blame] | 1207 | if (memory_region_is_ram(section->mr)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1208 | /* Normal RAM. */ |
Paolo Bonzini | e4e6979 | 2016-03-01 10:44:50 +0100 | [diff] [blame] | 1209 | iotlb = memory_region_get_ram_addr(section->mr) + xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1210 | if (!section->readonly) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1211 | iotlb |= PHYS_SECTION_NOTDIRTY; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1212 | } else { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1213 | iotlb |= PHYS_SECTION_ROM; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1214 | } |
| 1215 | } else { |
Peter Maydell | 0b8e2c1 | 2015-07-20 12:27:16 +0100 | [diff] [blame] | 1216 | AddressSpaceDispatch *d; |
| 1217 | |
| 1218 | d = atomic_rcu_read(§ion->address_space->dispatch); |
| 1219 | iotlb = section - d->map.sections; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1220 | iotlb += xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1221 | } |
| 1222 | |
| 1223 | /* Make accesses to pages with watchpoints go via the |
| 1224 | watchpoint trap routines. */ |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 1225 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 1226 | if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1227 | /* Avoid trapping reads of pages with a write breakpoint. */ |
| 1228 | if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1229 | iotlb = PHYS_SECTION_WATCH + paddr; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 1230 | *address |= TLB_MMIO; |
| 1231 | break; |
| 1232 | } |
| 1233 | } |
| 1234 | } |
| 1235 | |
| 1236 | return iotlb; |
| 1237 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 1238 | #endif /* defined(CONFIG_USER_ONLY) */ |
| 1239 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 1240 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 1241 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1242 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1243 | uint16_t section); |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1244 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 1245 | |
Igor Mammedov | a2b257d | 2014-10-31 16:38:37 +0000 | [diff] [blame] | 1246 | static void *(*phys_mem_alloc)(size_t size, uint64_t *align) = |
| 1247 | qemu_anon_ram_alloc; |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 1248 | |
| 1249 | /* |
| 1250 | * Set a custom physical guest memory alloator. |
| 1251 | * Accelerators with unusual needs may need this. Hopefully, we can |
| 1252 | * get rid of it eventually. |
| 1253 | */ |
Igor Mammedov | a2b257d | 2014-10-31 16:38:37 +0000 | [diff] [blame] | 1254 | void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align)) |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 1255 | { |
| 1256 | phys_mem_alloc = alloc; |
| 1257 | } |
| 1258 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1259 | static uint16_t phys_section_add(PhysPageMap *map, |
| 1260 | MemoryRegionSection *section) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1261 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 1262 | /* The physical section number is ORed with a page-aligned |
| 1263 | * pointer to produce the iotlb entries. Thus it should |
| 1264 | * never overflow into the page-aligned value. |
| 1265 | */ |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1266 | assert(map->sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 1267 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1268 | if (map->sections_nb == map->sections_nb_alloc) { |
| 1269 | map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16); |
| 1270 | map->sections = g_renew(MemoryRegionSection, map->sections, |
| 1271 | map->sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1272 | } |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1273 | map->sections[map->sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 1274 | memory_region_ref(section->mr); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1275 | return map->sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1276 | } |
| 1277 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1278 | static void phys_section_destroy(MemoryRegion *mr) |
| 1279 | { |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 1280 | bool have_sub_page = mr->subpage; |
| 1281 | |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 1282 | memory_region_unref(mr); |
| 1283 | |
Don Slutz | 55b4e80 | 2015-11-30 17:11:04 -0500 | [diff] [blame] | 1284 | if (have_sub_page) { |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1285 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 1286 | object_unref(OBJECT(&subpage->iomem)); |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1287 | g_free(subpage); |
| 1288 | } |
| 1289 | } |
| 1290 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1291 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1292 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1293 | while (map->sections_nb > 0) { |
| 1294 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 1295 | phys_section_destroy(section->mr); |
| 1296 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1297 | g_free(map->sections); |
| 1298 | g_free(map->nodes); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1299 | } |
| 1300 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1301 | static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1302 | { |
| 1303 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1304 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1305 | & TARGET_PAGE_MASK; |
Peter Xu | 003a0cf | 2017-05-15 16:50:57 +0800 | [diff] [blame] | 1306 | MemoryRegionSection *existing = phys_page_find(d, base); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1307 | MemoryRegionSection subsection = { |
| 1308 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1309 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1310 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1311 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1312 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1313 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1314 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1315 | if (!(existing->mr->subpage)) { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1316 | subpage = subpage_init(d->as, base); |
Edgar E. Iglesias | 3be91e8 | 2013-11-07 18:42:51 +0100 | [diff] [blame] | 1317 | subsection.address_space = d->as; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1318 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1319 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1320 | phys_section_add(&d->map, &subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1321 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1322 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1323 | } |
| 1324 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1325 | end = start + int128_get64(section->size) - 1; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1326 | subpage_register(subpage, start, end, |
| 1327 | phys_section_add(&d->map, section)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1328 | } |
| 1329 | |
| 1330 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1331 | static void register_multipage(AddressSpaceDispatch *d, |
| 1332 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1333 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1334 | hwaddr start_addr = section->offset_within_address_space; |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 1335 | uint16_t section_index = phys_section_add(&d->map, section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1336 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 1337 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 1338 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1339 | assert(num_pages); |
| 1340 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 1341 | } |
| 1342 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1343 | static void mem_add(MemoryListener *listener, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1344 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1345 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1346 | AddressSpaceDispatch *d = as->next_dispatch; |
Paolo Bonzini | 99b9cc0 | 2013-05-27 13:18:01 +0200 | [diff] [blame] | 1347 | MemoryRegionSection now = *section, remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1348 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1349 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1350 | if (now.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 1351 | uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space) |
| 1352 | - now.offset_within_address_space; |
| 1353 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1354 | now.size = int128_min(int128_make64(left), now.size); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1355 | register_subpage(d, &now); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1356 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1357 | now.size = int128_zero(); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1358 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1359 | while (int128_ne(remain.size, now.size)) { |
| 1360 | remain.size = int128_sub(remain.size, now.size); |
| 1361 | remain.offset_within_address_space += int128_get64(now.size); |
| 1362 | remain.offset_within_region += int128_get64(now.size); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 1363 | now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1364 | if (int128_lt(remain.size, page_size)) { |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 1365 | register_subpage(d, &now); |
Hu Tao | 8826624 | 2013-08-29 18:21:16 +0800 | [diff] [blame] | 1366 | } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1367 | now.size = page_size; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1368 | register_subpage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 1369 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1370 | now.size = int128_and(now.size, int128_neg(page_size)); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1371 | register_multipage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 1372 | } |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 1373 | } |
| 1374 | } |
| 1375 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 1376 | void qemu_flush_coalesced_mmio_buffer(void) |
| 1377 | { |
| 1378 | if (kvm_enabled()) |
| 1379 | kvm_flush_coalesced_mmio_buffer(); |
| 1380 | } |
| 1381 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1382 | void qemu_mutex_lock_ramlist(void) |
| 1383 | { |
| 1384 | qemu_mutex_lock(&ram_list.mutex); |
| 1385 | } |
| 1386 | |
| 1387 | void qemu_mutex_unlock_ramlist(void) |
| 1388 | { |
| 1389 | qemu_mutex_unlock(&ram_list.mutex); |
| 1390 | } |
| 1391 | |
Peter Xu | be9b23c | 2017-05-12 12:17:41 +0800 | [diff] [blame] | 1392 | void ram_block_dump(Monitor *mon) |
| 1393 | { |
| 1394 | RAMBlock *block; |
| 1395 | char *psize; |
| 1396 | |
| 1397 | rcu_read_lock(); |
| 1398 | monitor_printf(mon, "%24s %8s %18s %18s %18s\n", |
| 1399 | "Block Name", "PSize", "Offset", "Used", "Total"); |
| 1400 | RAMBLOCK_FOREACH(block) { |
| 1401 | psize = size_to_str(block->page_size); |
| 1402 | monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64 |
| 1403 | " 0x%016" PRIx64 "\n", block->idstr, psize, |
| 1404 | (uint64_t)block->offset, |
| 1405 | (uint64_t)block->used_length, |
| 1406 | (uint64_t)block->max_length); |
| 1407 | g_free(psize); |
| 1408 | } |
| 1409 | rcu_read_unlock(); |
| 1410 | } |
| 1411 | |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 1412 | #ifdef __linux__ |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 1413 | /* |
| 1414 | * FIXME TOCTTOU: this iterates over memory backends' mem-path, which |
| 1415 | * may or may not name the same files / on the same filesystem now as |
| 1416 | * when we actually open and map them. Iterate over the file |
| 1417 | * descriptors instead, and use qemu_fd_getpagesize(). |
| 1418 | */ |
| 1419 | static int find_max_supported_pagesize(Object *obj, void *opaque) |
| 1420 | { |
| 1421 | char *mem_path; |
| 1422 | long *hpsize_min = opaque; |
| 1423 | |
| 1424 | if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { |
| 1425 | mem_path = object_property_get_str(obj, "mem-path", NULL); |
| 1426 | if (mem_path) { |
| 1427 | long hpsize = qemu_mempath_getpagesize(mem_path); |
| 1428 | if (hpsize < *hpsize_min) { |
| 1429 | *hpsize_min = hpsize; |
| 1430 | } |
| 1431 | } else { |
| 1432 | *hpsize_min = getpagesize(); |
| 1433 | } |
| 1434 | } |
| 1435 | |
| 1436 | return 0; |
| 1437 | } |
| 1438 | |
| 1439 | long qemu_getrampagesize(void) |
| 1440 | { |
| 1441 | long hpsize = LONG_MAX; |
| 1442 | long mainrampagesize; |
| 1443 | Object *memdev_root; |
| 1444 | |
| 1445 | if (mem_path) { |
| 1446 | mainrampagesize = qemu_mempath_getpagesize(mem_path); |
| 1447 | } else { |
| 1448 | mainrampagesize = getpagesize(); |
| 1449 | } |
| 1450 | |
| 1451 | /* it's possible we have memory-backend objects with |
| 1452 | * hugepage-backed RAM. these may get mapped into system |
| 1453 | * address space via -numa parameters or memory hotplug |
| 1454 | * hooks. we want to take these into account, but we |
| 1455 | * also want to make sure these supported hugepage |
| 1456 | * sizes are applicable across the entire range of memory |
| 1457 | * we may boot from, so we take the min across all |
| 1458 | * backends, and assume normal pages in cases where a |
| 1459 | * backend isn't backed by hugepages. |
| 1460 | */ |
| 1461 | memdev_root = object_resolve_path("/objects", NULL); |
| 1462 | if (memdev_root) { |
| 1463 | object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize); |
| 1464 | } |
| 1465 | if (hpsize == LONG_MAX) { |
| 1466 | /* No additional memory regions found ==> Report main RAM page size */ |
| 1467 | return mainrampagesize; |
| 1468 | } |
| 1469 | |
| 1470 | /* If NUMA is disabled or the NUMA nodes are not backed with a |
| 1471 | * memory-backend, then there is at least one node using "normal" RAM, |
| 1472 | * so if its page size is smaller we have got to report that size instead. |
| 1473 | */ |
| 1474 | if (hpsize > mainrampagesize && |
| 1475 | (nb_numa_nodes == 0 || numa_info[0].node_memdev == NULL)) { |
| 1476 | static bool warned; |
| 1477 | if (!warned) { |
| 1478 | error_report("Huge page support disabled (n/a for main memory)."); |
| 1479 | warned = true; |
| 1480 | } |
| 1481 | return mainrampagesize; |
| 1482 | } |
| 1483 | |
| 1484 | return hpsize; |
| 1485 | } |
| 1486 | #else |
| 1487 | long qemu_getrampagesize(void) |
| 1488 | { |
| 1489 | return getpagesize(); |
| 1490 | } |
| 1491 | #endif |
| 1492 | |
| 1493 | #ifdef __linux__ |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1494 | static int64_t get_file_size(int fd) |
| 1495 | { |
| 1496 | int64_t size = lseek(fd, 0, SEEK_END); |
| 1497 | if (size < 0) { |
| 1498 | return -errno; |
| 1499 | } |
| 1500 | return size; |
| 1501 | } |
| 1502 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1503 | static int file_ram_open(const char *path, |
| 1504 | const char *region_name, |
| 1505 | bool *created, |
| 1506 | Error **errp) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1507 | { |
| 1508 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 1509 | char *sanitized_name; |
| 1510 | char *c; |
Paolo Bonzini | 5c3ece7 | 2016-03-17 15:53:13 +0100 | [diff] [blame] | 1511 | int fd = -1; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1512 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1513 | *created = false; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1514 | for (;;) { |
| 1515 | fd = open(path, O_RDWR); |
| 1516 | if (fd >= 0) { |
| 1517 | /* @path names an existing file, use it */ |
| 1518 | break; |
| 1519 | } |
| 1520 | if (errno == ENOENT) { |
| 1521 | /* @path names a file that doesn't exist, create it */ |
| 1522 | fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644); |
| 1523 | if (fd >= 0) { |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1524 | *created = true; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1525 | break; |
| 1526 | } |
| 1527 | } else if (errno == EISDIR) { |
| 1528 | /* @path names a directory, create a file there */ |
| 1529 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1530 | sanitized_name = g_strdup(region_name); |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1531 | for (c = sanitized_name; *c != '\0'; c++) { |
| 1532 | if (*c == '/') { |
| 1533 | *c = '_'; |
| 1534 | } |
| 1535 | } |
| 1536 | |
| 1537 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 1538 | sanitized_name); |
| 1539 | g_free(sanitized_name); |
| 1540 | |
| 1541 | fd = mkstemp(filename); |
| 1542 | if (fd >= 0) { |
| 1543 | unlink(filename); |
| 1544 | g_free(filename); |
| 1545 | break; |
| 1546 | } |
| 1547 | g_free(filename); |
| 1548 | } |
| 1549 | if (errno != EEXIST && errno != EINTR) { |
| 1550 | error_setg_errno(errp, errno, |
| 1551 | "can't open backing store %s for guest RAM", |
| 1552 | path); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1553 | return -1; |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1554 | } |
| 1555 | /* |
| 1556 | * Try again on EINTR and EEXIST. The latter happens when |
| 1557 | * something else creates the file between our two open(). |
| 1558 | */ |
| 1559 | } |
| 1560 | |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1561 | return fd; |
| 1562 | } |
| 1563 | |
| 1564 | static void *file_ram_alloc(RAMBlock *block, |
| 1565 | ram_addr_t memory, |
| 1566 | int fd, |
| 1567 | bool truncate, |
| 1568 | Error **errp) |
| 1569 | { |
| 1570 | void *area; |
| 1571 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1572 | block->page_size = qemu_fd_getpagesize(fd); |
Haozhong Zhang | 8360668 | 2016-10-24 20:49:37 +0800 | [diff] [blame] | 1573 | block->mr->align = block->page_size; |
| 1574 | #if defined(__s390x__) |
| 1575 | if (kvm_enabled()) { |
| 1576 | block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN); |
| 1577 | } |
| 1578 | #endif |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1579 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1580 | if (memory < block->page_size) { |
Hu Tao | 557529d | 2014-09-09 13:28:00 +0800 | [diff] [blame] | 1581 | error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to " |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1582 | "or larger than page size 0x%zx", |
| 1583 | memory, block->page_size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1584 | return NULL; |
Haozhong Zhang | 1775f11 | 2016-11-02 09:05:51 +0800 | [diff] [blame] | 1585 | } |
| 1586 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1587 | memory = ROUND_UP(memory, block->page_size); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1588 | |
| 1589 | /* |
| 1590 | * ftruncate is not supported by hugetlbfs in older |
| 1591 | * hosts, so don't bother bailing out on errors. |
| 1592 | * If anything goes wrong with it under other filesystems, |
| 1593 | * mmap will fail. |
Haozhong Zhang | d6af99c | 2016-10-27 12:22:58 +0800 | [diff] [blame] | 1594 | * |
| 1595 | * Do not truncate the non-empty backend file to avoid corrupting |
| 1596 | * the existing data in the file. Disabling shrinking is not |
| 1597 | * enough. For example, the current vNVDIMM implementation stores |
| 1598 | * the guest NVDIMM labels at the end of the backend file. If the |
| 1599 | * backend file is later extended, QEMU will not be able to find |
| 1600 | * those labels. Therefore, extending the non-empty backend file |
| 1601 | * is disabled as well. |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1602 | */ |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1603 | if (truncate && ftruncate(fd, memory)) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 1604 | perror("ftruncate"); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1605 | } |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1606 | |
Dominik Dingel | d2f39ad | 2016-04-25 13:55:38 +0200 | [diff] [blame] | 1607 | area = qemu_ram_mmap(fd, memory, block->mr->align, |
| 1608 | block->flags & RAM_SHARED); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1609 | if (area == MAP_FAILED) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1610 | error_setg_errno(errp, errno, |
Markus Armbruster | fd97fd4 | 2016-03-07 20:25:13 +0100 | [diff] [blame] | 1611 | "unable to map backing store for guest RAM"); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1612 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1613 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1614 | |
| 1615 | if (mem_prealloc) { |
Jitendra Kolhe | 1e356fc | 2017-02-24 09:01:43 +0530 | [diff] [blame] | 1616 | os_mem_prealloc(fd, area, memory, smp_cpus, errp); |
Igor Mammedov | 056b68a | 2016-07-20 11:54:03 +0200 | [diff] [blame] | 1617 | if (errp && *errp) { |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1618 | qemu_ram_munmap(area, memory); |
| 1619 | return NULL; |
Igor Mammedov | 056b68a | 2016-07-20 11:54:03 +0200 | [diff] [blame] | 1620 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 1621 | } |
| 1622 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1623 | block->fd = fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1624 | return area; |
| 1625 | } |
| 1626 | #endif |
| 1627 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1628 | /* Called with the ramlist lock held. */ |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1629 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 1630 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1631 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1632 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1633 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 1634 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 1635 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1636 | if (QLIST_EMPTY_RCU(&ram_list.blocks)) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1637 | return 0; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1638 | } |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1639 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1640 | RAMBLOCK_FOREACH(block) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 1641 | ram_addr_t end, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1642 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1643 | end = block->offset + block->max_length; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1644 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1645 | RAMBLOCK_FOREACH(next_block) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1646 | if (next_block->offset >= end) { |
| 1647 | next = MIN(next, next_block->offset); |
| 1648 | } |
| 1649 | } |
| 1650 | if (next - end >= size && next - end < mingap) { |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1651 | offset = end; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1652 | mingap = next - end; |
| 1653 | } |
| 1654 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1655 | |
| 1656 | if (offset == RAM_ADDR_MAX) { |
| 1657 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1658 | (uint64_t)size); |
| 1659 | abort(); |
| 1660 | } |
| 1661 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1662 | return offset; |
| 1663 | } |
| 1664 | |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 1665 | unsigned long last_ram_page(void) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1666 | { |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1667 | RAMBlock *block; |
| 1668 | ram_addr_t last = 0; |
| 1669 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1670 | rcu_read_lock(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1671 | RAMBLOCK_FOREACH(block) { |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1672 | last = MAX(last, block->offset + block->max_length); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1673 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1674 | rcu_read_unlock(); |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 1675 | return last >> TARGET_PAGE_BITS; |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1676 | } |
| 1677 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1678 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1679 | { |
| 1680 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1681 | |
| 1682 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Marcel Apfelbaum | 47c8ca5 | 2015-02-04 17:43:54 +0200 | [diff] [blame] | 1683 | if (!machine_dump_guest_core(current_machine)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1684 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1685 | if (ret) { |
| 1686 | perror("qemu_madvise"); |
| 1687 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
| 1688 | "but dump_guest_core=off specified\n"); |
| 1689 | } |
| 1690 | } |
| 1691 | } |
| 1692 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 1693 | const char *qemu_ram_get_idstr(RAMBlock *rb) |
| 1694 | { |
| 1695 | return rb->idstr; |
| 1696 | } |
| 1697 | |
Dr. David Alan Gilbert | 463a4ac | 2017-03-07 18:36:36 +0000 | [diff] [blame] | 1698 | bool qemu_ram_is_shared(RAMBlock *rb) |
| 1699 | { |
| 1700 | return rb->flags & RAM_SHARED; |
| 1701 | } |
| 1702 | |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1703 | /* Called with iothread lock held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1704 | void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1705 | { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1706 | RAMBlock *block; |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1707 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1708 | assert(new_block); |
| 1709 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1710 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 1711 | if (dev) { |
| 1712 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1713 | if (id) { |
| 1714 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1715 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1716 | } |
| 1717 | } |
| 1718 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 1719 | |
Gonglei | ab0a995 | 2016-05-10 10:05:00 +0800 | [diff] [blame] | 1720 | rcu_read_lock(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1721 | RAMBLOCK_FOREACH(block) { |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1722 | if (block != new_block && |
| 1723 | !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1724 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 1725 | new_block->idstr); |
| 1726 | abort(); |
| 1727 | } |
| 1728 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1729 | rcu_read_unlock(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1730 | } |
| 1731 | |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1732 | /* Called with iothread lock held. */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1733 | void qemu_ram_unset_idstr(RAMBlock *block) |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1734 | { |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1735 | /* FIXME: arch_init.c assumes that this is not called throughout |
| 1736 | * migration. Ignore the problem since hot-unplug during migration |
| 1737 | * does not work anyway. |
| 1738 | */ |
Hu Tao | 20cfe88 | 2014-04-02 15:13:26 +0800 | [diff] [blame] | 1739 | if (block) { |
| 1740 | memset(block->idstr, 0, sizeof(block->idstr)); |
| 1741 | } |
| 1742 | } |
| 1743 | |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 1744 | size_t qemu_ram_pagesize(RAMBlock *rb) |
| 1745 | { |
| 1746 | return rb->page_size; |
| 1747 | } |
| 1748 | |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 1749 | /* Returns the largest size of page in use */ |
| 1750 | size_t qemu_ram_pagesize_largest(void) |
| 1751 | { |
| 1752 | RAMBlock *block; |
| 1753 | size_t largest = 0; |
| 1754 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1755 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | 67f11b5 | 2017-02-24 18:28:34 +0000 | [diff] [blame] | 1756 | largest = MAX(largest, qemu_ram_pagesize(block)); |
| 1757 | } |
| 1758 | |
| 1759 | return largest; |
| 1760 | } |
| 1761 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1762 | static int memory_try_enable_merging(void *addr, size_t len) |
| 1763 | { |
Marcel Apfelbaum | 75cc7f0 | 2015-02-04 17:43:55 +0200 | [diff] [blame] | 1764 | if (!machine_mem_merge(current_machine)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1765 | /* disabled by the user */ |
| 1766 | return 0; |
| 1767 | } |
| 1768 | |
| 1769 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 1770 | } |
| 1771 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1772 | /* Only legal before guest might have detected the memory size: e.g. on |
| 1773 | * incoming migration, or right after reset. |
| 1774 | * |
| 1775 | * As memory core doesn't know how is memory accessed, it is up to |
| 1776 | * resize callback to update device state and/or add assertions to detect |
| 1777 | * misuse, if necessary. |
| 1778 | */ |
Gonglei | fa53a0e | 2016-05-10 10:04:59 +0800 | [diff] [blame] | 1779 | int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp) |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1780 | { |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1781 | assert(block); |
| 1782 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 1783 | newsize = HOST_PAGE_ALIGN(newsize); |
Michael S. Tsirkin | 129ddaf | 2015-02-17 10:15:30 +0100 | [diff] [blame] | 1784 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1785 | if (block->used_length == newsize) { |
| 1786 | return 0; |
| 1787 | } |
| 1788 | |
| 1789 | if (!(block->flags & RAM_RESIZEABLE)) { |
| 1790 | error_setg_errno(errp, EINVAL, |
| 1791 | "Length mismatch: %s: 0x" RAM_ADDR_FMT |
| 1792 | " in != 0x" RAM_ADDR_FMT, block->idstr, |
| 1793 | newsize, block->used_length); |
| 1794 | return -EINVAL; |
| 1795 | } |
| 1796 | |
| 1797 | if (block->max_length < newsize) { |
| 1798 | error_setg_errno(errp, EINVAL, |
| 1799 | "Length too large: %s: 0x" RAM_ADDR_FMT |
| 1800 | " > 0x" RAM_ADDR_FMT, block->idstr, |
| 1801 | newsize, block->max_length); |
| 1802 | return -EINVAL; |
| 1803 | } |
| 1804 | |
| 1805 | cpu_physical_memory_clear_dirty_range(block->offset, block->used_length); |
| 1806 | block->used_length = newsize; |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 1807 | cpu_physical_memory_set_dirty_range(block->offset, block->used_length, |
| 1808 | DIRTY_CLIENTS_ALL); |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 1809 | memory_region_set_size(block->mr, newsize); |
| 1810 | if (block->resized) { |
| 1811 | block->resized(block->idstr, newsize, block->host); |
| 1812 | } |
| 1813 | return 0; |
| 1814 | } |
| 1815 | |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1816 | /* Called with ram_list.mutex held */ |
| 1817 | static void dirty_memory_extend(ram_addr_t old_ram_size, |
| 1818 | ram_addr_t new_ram_size) |
| 1819 | { |
| 1820 | ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size, |
| 1821 | DIRTY_MEMORY_BLOCK_SIZE); |
| 1822 | ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size, |
| 1823 | DIRTY_MEMORY_BLOCK_SIZE); |
| 1824 | int i; |
| 1825 | |
| 1826 | /* Only need to extend if block count increased */ |
| 1827 | if (new_num_blocks <= old_num_blocks) { |
| 1828 | return; |
| 1829 | } |
| 1830 | |
| 1831 | for (i = 0; i < DIRTY_MEMORY_NUM; i++) { |
| 1832 | DirtyMemoryBlocks *old_blocks; |
| 1833 | DirtyMemoryBlocks *new_blocks; |
| 1834 | int j; |
| 1835 | |
| 1836 | old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]); |
| 1837 | new_blocks = g_malloc(sizeof(*new_blocks) + |
| 1838 | sizeof(new_blocks->blocks[0]) * new_num_blocks); |
| 1839 | |
| 1840 | if (old_num_blocks) { |
| 1841 | memcpy(new_blocks->blocks, old_blocks->blocks, |
| 1842 | old_num_blocks * sizeof(old_blocks->blocks[0])); |
| 1843 | } |
| 1844 | |
| 1845 | for (j = old_num_blocks; j < new_num_blocks; j++) { |
| 1846 | new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE); |
| 1847 | } |
| 1848 | |
| 1849 | atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks); |
| 1850 | |
| 1851 | if (old_blocks) { |
| 1852 | g_free_rcu(old_blocks, rcu); |
| 1853 | } |
| 1854 | } |
| 1855 | } |
| 1856 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1857 | static void ram_block_add(RAMBlock *new_block, Error **errp) |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1858 | { |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1859 | RAMBlock *block; |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1860 | RAMBlock *last_block = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1861 | ram_addr_t old_ram_size, new_ram_size; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1862 | Error *err = NULL; |
Juan Quintela | 2152f5c | 2013-10-08 13:52:02 +0200 | [diff] [blame] | 1863 | |
Juan Quintela | b8c4899 | 2017-03-21 17:44:30 +0100 | [diff] [blame] | 1864 | old_ram_size = last_ram_page(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1865 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1866 | qemu_mutex_lock_ramlist(); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1867 | new_block->offset = find_ram_offset(new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1868 | |
| 1869 | if (!new_block->host) { |
| 1870 | if (xen_enabled()) { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1871 | xen_ram_alloc(new_block->offset, new_block->max_length, |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1872 | new_block->mr, &err); |
| 1873 | if (err) { |
| 1874 | error_propagate(errp, err); |
| 1875 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 1876 | return; |
Markus Armbruster | 37aa7a0 | 2016-01-14 16:09:39 +0100 | [diff] [blame] | 1877 | } |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1878 | } else { |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1879 | new_block->host = phys_mem_alloc(new_block->max_length, |
Igor Mammedov | a2b257d | 2014-10-31 16:38:37 +0000 | [diff] [blame] | 1880 | &new_block->mr->align); |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1881 | if (!new_block->host) { |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1882 | error_setg_errno(errp, errno, |
| 1883 | "cannot set up guest memory '%s'", |
| 1884 | memory_region_name(new_block->mr)); |
| 1885 | qemu_mutex_unlock_ramlist(); |
Paolo Bonzini | 39c350e | 2016-03-09 18:14:01 +0100 | [diff] [blame] | 1886 | return; |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1887 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1888 | memory_try_enable_merging(new_block->host, new_block->max_length); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1889 | } |
| 1890 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1891 | |
Li Zhijian | dd63169 | 2015-07-02 20:18:06 +0800 | [diff] [blame] | 1892 | new_ram_size = MAX(old_ram_size, |
| 1893 | (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS); |
| 1894 | if (new_ram_size > old_ram_size) { |
Stefan Hajnoczi | 5b82b70 | 2016-01-25 13:33:20 +0000 | [diff] [blame] | 1895 | dirty_memory_extend(old_ram_size, new_ram_size); |
Li Zhijian | dd63169 | 2015-07-02 20:18:06 +0800 | [diff] [blame] | 1896 | } |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1897 | /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ, |
| 1898 | * QLIST (which has an RCU-friendly variant) does not have insertion at |
| 1899 | * tail, so save the last element in last_block. |
| 1900 | */ |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 1901 | RAMBLOCK_FOREACH(block) { |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1902 | last_block = block; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1903 | if (block->max_length < new_block->max_length) { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1904 | break; |
| 1905 | } |
| 1906 | } |
| 1907 | if (block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1908 | QLIST_INSERT_BEFORE_RCU(block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1909 | } else if (last_block) { |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1910 | QLIST_INSERT_AFTER_RCU(last_block, new_block, next); |
Mike Day | 0d53d9f | 2015-01-21 13:45:24 +0100 | [diff] [blame] | 1911 | } else { /* list is empty */ |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1912 | QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next); |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1913 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1914 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1915 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 1916 | /* Write list before version */ |
| 1917 | smp_wmb(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1918 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1919 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1920 | |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1921 | cpu_physical_memory_set_dirty_range(new_block->offset, |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 1922 | new_block->used_length, |
| 1923 | DIRTY_CLIENTS_ALL); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1924 | |
Paolo Bonzini | a904c91 | 2015-01-21 16:18:35 +0100 | [diff] [blame] | 1925 | if (new_block->host) { |
| 1926 | qemu_ram_setup_dump(new_block->host, new_block->max_length); |
| 1927 | qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE); |
Cao jin | c2cd627 | 2016-09-12 14:34:56 +0800 | [diff] [blame] | 1928 | /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */ |
Paolo Bonzini | a904c91 | 2015-01-21 16:18:35 +0100 | [diff] [blame] | 1929 | qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK); |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 1930 | ram_block_notify_add(new_block->host, new_block->max_length); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1931 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1932 | } |
| 1933 | |
Paolo Bonzini | 0b183fc | 2014-05-14 17:43:19 +0800 | [diff] [blame] | 1934 | #ifdef __linux__ |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1935 | RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, |
| 1936 | bool share, int fd, |
| 1937 | Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1938 | { |
| 1939 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1940 | Error *local_err = NULL; |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1941 | int64_t file_size; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1942 | |
| 1943 | if (xen_enabled()) { |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1944 | error_setg(errp, "-mem-path not supported with Xen"); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1945 | return NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1946 | } |
| 1947 | |
Marc-André Lureau | e45e7ae | 2017-06-02 18:12:21 +0400 | [diff] [blame] | 1948 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 1949 | error_setg(errp, |
| 1950 | "host lacks kvm mmu notifiers, -mem-path unsupported"); |
| 1951 | return NULL; |
| 1952 | } |
| 1953 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1954 | if (phys_mem_alloc != qemu_anon_ram_alloc) { |
| 1955 | /* |
| 1956 | * file_ram_alloc() needs to allocate just like |
| 1957 | * phys_mem_alloc, but we haven't bothered to provide |
| 1958 | * a hook there. |
| 1959 | */ |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1960 | error_setg(errp, |
| 1961 | "-mem-path not supported with this accelerator"); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1962 | return NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1963 | } |
| 1964 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 1965 | size = HOST_PAGE_ALIGN(size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1966 | file_size = get_file_size(fd); |
| 1967 | if (file_size > 0 && file_size < size) { |
| 1968 | error_setg(errp, "backing store %s size 0x%" PRIx64 |
| 1969 | " does not match 'size' option 0x" RAM_ADDR_FMT, |
| 1970 | mem_path, file_size, size); |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1971 | return NULL; |
| 1972 | } |
| 1973 | |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 1974 | new_block = g_malloc0(sizeof(*new_block)); |
| 1975 | new_block->mr = mr; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 1976 | new_block->used_length = size; |
| 1977 | new_block->max_length = size; |
Paolo Bonzini | dbcb898 | 2014-06-10 19:15:24 +0800 | [diff] [blame] | 1978 | new_block->flags = share ? RAM_SHARED : 0; |
Marc-André Lureau | 8d37b03 | 2017-06-02 18:12:22 +0400 | [diff] [blame] | 1979 | new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp); |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1980 | if (!new_block->host) { |
| 1981 | g_free(new_block); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1982 | return NULL; |
Paolo Bonzini | 7f56e74 | 2014-05-14 17:43:20 +0800 | [diff] [blame] | 1983 | } |
| 1984 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1985 | ram_block_add(new_block, &local_err); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1986 | if (local_err) { |
| 1987 | g_free(new_block); |
| 1988 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1989 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 1990 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 1991 | return new_block; |
Marc-André Lureau | 38b3362 | 2017-06-02 18:12:23 +0400 | [diff] [blame] | 1992 | |
| 1993 | } |
| 1994 | |
| 1995 | |
| 1996 | RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, |
| 1997 | bool share, const char *mem_path, |
| 1998 | Error **errp) |
| 1999 | { |
| 2000 | int fd; |
| 2001 | bool created; |
| 2002 | RAMBlock *block; |
| 2003 | |
| 2004 | fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp); |
| 2005 | if (fd < 0) { |
| 2006 | return NULL; |
| 2007 | } |
| 2008 | |
| 2009 | block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp); |
| 2010 | if (!block) { |
| 2011 | if (created) { |
| 2012 | unlink(mem_path); |
| 2013 | } |
| 2014 | close(fd); |
| 2015 | return NULL; |
| 2016 | } |
| 2017 | |
| 2018 | return block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2019 | } |
Paolo Bonzini | 0b183fc | 2014-05-14 17:43:19 +0800 | [diff] [blame] | 2020 | #endif |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2021 | |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2022 | static |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2023 | RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size, |
| 2024 | void (*resized)(const char*, |
| 2025 | uint64_t length, |
| 2026 | void *host), |
| 2027 | void *host, bool resizeable, |
| 2028 | MemoryRegion *mr, Error **errp) |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2029 | { |
| 2030 | RAMBlock *new_block; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2031 | Error *local_err = NULL; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2032 | |
Dr. David Alan Gilbert | 4ed023c | 2015-11-05 18:11:16 +0000 | [diff] [blame] | 2033 | size = HOST_PAGE_ALIGN(size); |
| 2034 | max_size = HOST_PAGE_ALIGN(max_size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2035 | new_block = g_malloc0(sizeof(*new_block)); |
| 2036 | new_block->mr = mr; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2037 | new_block->resized = resized; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2038 | new_block->used_length = size; |
| 2039 | new_block->max_length = max_size; |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2040 | assert(max_size >= size); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2041 | new_block->fd = -1; |
Dr. David Alan Gilbert | 863e962 | 2016-09-29 20:09:37 +0100 | [diff] [blame] | 2042 | new_block->page_size = getpagesize(); |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2043 | new_block->host = host; |
| 2044 | if (host) { |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 2045 | new_block->flags |= RAM_PREALLOC; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2046 | } |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2047 | if (resizeable) { |
| 2048 | new_block->flags |= RAM_RESIZEABLE; |
| 2049 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2050 | ram_block_add(new_block, &local_err); |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2051 | if (local_err) { |
| 2052 | g_free(new_block); |
| 2053 | error_propagate(errp, local_err); |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2054 | return NULL; |
Hu Tao | ef701d7 | 2014-09-09 13:27:54 +0800 | [diff] [blame] | 2055 | } |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2056 | return new_block; |
Paolo Bonzini | e1c57ab | 2014-05-14 17:43:18 +0800 | [diff] [blame] | 2057 | } |
| 2058 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2059 | RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2060 | MemoryRegion *mr, Error **errp) |
| 2061 | { |
| 2062 | return qemu_ram_alloc_internal(size, size, NULL, host, false, mr, errp); |
| 2063 | } |
| 2064 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2065 | RAMBlock *qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr, Error **errp) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2066 | { |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2067 | return qemu_ram_alloc_internal(size, size, NULL, NULL, false, mr, errp); |
| 2068 | } |
| 2069 | |
Fam Zheng | 528f46a | 2016-03-01 14:18:18 +0800 | [diff] [blame] | 2070 | RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz, |
Michael S. Tsirkin | 62be4e3 | 2014-11-12 14:27:41 +0200 | [diff] [blame] | 2071 | void (*resized)(const char*, |
| 2072 | uint64_t length, |
| 2073 | void *host), |
| 2074 | MemoryRegion *mr, Error **errp) |
| 2075 | { |
| 2076 | return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true, mr, errp); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2077 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2078 | |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2079 | static void reclaim_ramblock(RAMBlock *block) |
| 2080 | { |
| 2081 | if (block->flags & RAM_PREALLOC) { |
| 2082 | ; |
| 2083 | } else if (xen_enabled()) { |
| 2084 | xen_invalidate_map_cache_entry(block->host); |
| 2085 | #ifndef _WIN32 |
| 2086 | } else if (block->fd >= 0) { |
Eduardo Habkost | 2f3a2bb | 2015-11-06 20:11:21 -0200 | [diff] [blame] | 2087 | qemu_ram_munmap(block->host, block->max_length); |
Paolo Bonzini | 4377153 | 2013-09-09 17:58:40 +0200 | [diff] [blame] | 2088 | close(block->fd); |
| 2089 | #endif |
| 2090 | } else { |
| 2091 | qemu_anon_ram_free(block->host, block->max_length); |
| 2092 | } |
| 2093 | g_free(block); |
| 2094 | } |
| 2095 | |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2096 | void qemu_ram_free(RAMBlock *block) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2097 | { |
Marc-André Lureau | 85bc2a1 | 2016-03-29 13:20:51 +0200 | [diff] [blame] | 2098 | if (!block) { |
| 2099 | return; |
| 2100 | } |
| 2101 | |
Paolo Bonzini | 0987d73 | 2016-12-21 00:31:36 +0800 | [diff] [blame] | 2102 | if (block->host) { |
| 2103 | ram_block_notify_remove(block->host, block->max_length); |
| 2104 | } |
| 2105 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2106 | qemu_mutex_lock_ramlist(); |
Fam Zheng | f1060c5 | 2016-03-01 14:18:22 +0800 | [diff] [blame] | 2107 | QLIST_REMOVE_RCU(block, next); |
| 2108 | ram_list.mru_block = NULL; |
| 2109 | /* Write list before version */ |
| 2110 | smp_wmb(); |
| 2111 | ram_list.version++; |
| 2112 | call_rcu(block, reclaim_ramblock, rcu); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 2113 | qemu_mutex_unlock_ramlist(); |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 2114 | } |
| 2115 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2116 | #ifndef _WIN32 |
| 2117 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 2118 | { |
| 2119 | RAMBlock *block; |
| 2120 | ram_addr_t offset; |
| 2121 | int flags; |
| 2122 | void *area, *vaddr; |
| 2123 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2124 | RAMBLOCK_FOREACH(block) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2125 | offset = addr - block->offset; |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2126 | if (offset < block->max_length) { |
Michael S. Tsirkin | 1240be2 | 2014-11-12 11:44:41 +0200 | [diff] [blame] | 2127 | vaddr = ramblock_ptr(block, offset); |
Paolo Bonzini | 7bd4f43 | 2014-05-14 17:43:22 +0800 | [diff] [blame] | 2128 | if (block->flags & RAM_PREALLOC) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2129 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 2130 | } else if (xen_enabled()) { |
| 2131 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2132 | } else { |
| 2133 | flags = MAP_FIXED; |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 2134 | if (block->fd >= 0) { |
Paolo Bonzini | dbcb898 | 2014-06-10 19:15:24 +0800 | [diff] [blame] | 2135 | flags |= (block->flags & RAM_SHARED ? |
| 2136 | MAP_SHARED : MAP_PRIVATE); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 2137 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 2138 | flags, block->fd, offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2139 | } else { |
Markus Armbruster | 2eb9fba | 2013-07-31 15:11:09 +0200 | [diff] [blame] | 2140 | /* |
| 2141 | * Remap needs to match alloc. Accelerators that |
| 2142 | * set phys_mem_alloc never remap. If they did, |
| 2143 | * we'd need a remap hook here. |
| 2144 | */ |
| 2145 | assert(phys_mem_alloc == qemu_anon_ram_alloc); |
| 2146 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2147 | flags |= MAP_PRIVATE | MAP_ANONYMOUS; |
| 2148 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 2149 | flags, -1, 0); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2150 | } |
| 2151 | if (area != vaddr) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 2152 | fprintf(stderr, "Could not remap addr: " |
| 2153 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n", |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2154 | length, addr); |
| 2155 | exit(1); |
| 2156 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 2157 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 2158 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2159 | } |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 2160 | } |
| 2161 | } |
| 2162 | } |
| 2163 | #endif /* !_WIN32 */ |
| 2164 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2165 | /* Return a host pointer to ram allocated with qemu_ram_alloc. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2166 | * This should not be used for general purpose DMA. Use address_space_map |
| 2167 | * or address_space_rw instead. For local memory (e.g. video ram) that the |
| 2168 | * device owns, use memory_region_get_ram_ptr. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2169 | * |
Paolo Bonzini | 49b24af | 2015-12-16 10:30:47 +0100 | [diff] [blame] | 2170 | * Called within RCU critical section. |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2171 | */ |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2172 | void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr) |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2173 | { |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2174 | RAMBlock *block = ram_block; |
| 2175 | |
| 2176 | if (block == NULL) { |
| 2177 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2178 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2179 | } |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2180 | |
| 2181 | if (xen_enabled() && block->host == NULL) { |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2182 | /* We need to check if the requested address is in the RAM |
| 2183 | * because we don't want to map the entire memory in QEMU. |
| 2184 | * In that case just map until the end of the page. |
| 2185 | */ |
| 2186 | if (block->offset == 0) { |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2187 | return xen_map_cache(addr, 0, 0, false); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2188 | } |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2189 | |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2190 | block->host = xen_map_cache(block->offset, block->max_length, 1, false); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 2191 | } |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2192 | return ramblock_ptr(block, addr); |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 2193 | } |
| 2194 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2195 | /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2196 | * but takes a size argument. |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2197 | * |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2198 | * Called within RCU critical section. |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2199 | */ |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2200 | static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr, |
| 2201 | hwaddr *size) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2202 | { |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2203 | RAMBlock *block = ram_block; |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2204 | if (*size == 0) { |
| 2205 | return NULL; |
| 2206 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2207 | |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2208 | if (block == NULL) { |
| 2209 | block = qemu_get_ram_block(addr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2210 | addr -= block->offset; |
Gonglei | 3655cb9 | 2016-02-20 10:35:20 +0800 | [diff] [blame] | 2211 | } |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2212 | *size = MIN(*size, block->max_length - addr); |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2213 | |
| 2214 | if (xen_enabled() && block->host == NULL) { |
| 2215 | /* We need to check if the requested address is in the RAM |
| 2216 | * because we don't want to map the entire memory in QEMU. |
| 2217 | * In that case just map the requested area. |
| 2218 | */ |
| 2219 | if (block->offset == 0) { |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2220 | return xen_map_cache(addr, *size, 1, true); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2221 | } |
| 2222 | |
Stefano Stabellini | 1ff7c59 | 2017-05-03 14:00:35 -0700 | [diff] [blame] | 2223 | block->host = xen_map_cache(block->offset, block->max_length, 1, true); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2224 | } |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 2225 | |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2226 | return ramblock_ptr(block, addr); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 2227 | } |
| 2228 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2229 | /* |
| 2230 | * Translates a host ptr back to a RAMBlock, a ram_addr and an offset |
| 2231 | * in that RAMBlock. |
| 2232 | * |
| 2233 | * ptr: Host pointer to look up |
| 2234 | * round_offset: If true round the result offset down to a page boundary |
| 2235 | * *ram_addr: set to result ram_addr |
| 2236 | * *offset: set to result offset within the RAMBlock |
| 2237 | * |
| 2238 | * Returns: RAMBlock (or NULL if not found) |
Mike Day | ae3a704 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2239 | * |
| 2240 | * By the time this function returns, the returned pointer is not protected |
| 2241 | * by RCU anymore. If the caller is not within an RCU critical section and |
| 2242 | * does not hold the iothread lock, it must have other means of protecting the |
| 2243 | * pointer, such as a reference to the region that includes the incoming |
| 2244 | * ram_addr_t. |
| 2245 | */ |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2246 | RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset, |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2247 | ram_addr_t *offset) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2248 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2249 | RAMBlock *block; |
| 2250 | uint8_t *host = ptr; |
| 2251 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2252 | if (xen_enabled()) { |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2253 | ram_addr_t ram_addr; |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2254 | rcu_read_lock(); |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2255 | ram_addr = xen_ram_addr_from_mapcache(ptr); |
| 2256 | block = qemu_get_ram_block(ram_addr); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2257 | if (block) { |
Anthony PERARD | d6b6aec | 2016-06-09 16:56:17 +0100 | [diff] [blame] | 2258 | *offset = ram_addr - block->offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2259 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2260 | rcu_read_unlock(); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2261 | return block; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 2262 | } |
| 2263 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2264 | rcu_read_lock(); |
| 2265 | block = atomic_rcu_read(&ram_list.mru_block); |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2266 | if (block && block->host && host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2267 | goto found; |
| 2268 | } |
| 2269 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2270 | RAMBLOCK_FOREACH(block) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2271 | /* This case append when the block is not mapped. */ |
| 2272 | if (block->host == NULL) { |
| 2273 | continue; |
| 2274 | } |
Michael S. Tsirkin | 9b8424d | 2014-12-15 22:55:32 +0200 | [diff] [blame] | 2275 | if (host - block->host < block->max_length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2276 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2277 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 2278 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 2279 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2280 | rcu_read_unlock(); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 2281 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 2282 | |
| 2283 | found: |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2284 | *offset = (host - block->host); |
| 2285 | if (round_offset) { |
| 2286 | *offset &= TARGET_PAGE_MASK; |
| 2287 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 2288 | rcu_read_unlock(); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2289 | return block; |
| 2290 | } |
| 2291 | |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2292 | /* |
| 2293 | * Finds the named RAMBlock |
| 2294 | * |
| 2295 | * name: The name of RAMBlock to find |
| 2296 | * |
| 2297 | * Returns: RAMBlock (or NULL if not found) |
| 2298 | */ |
| 2299 | RAMBlock *qemu_ram_block_by_name(const char *name) |
| 2300 | { |
| 2301 | RAMBlock *block; |
| 2302 | |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 2303 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | e3dd749 | 2015-11-05 18:10:33 +0000 | [diff] [blame] | 2304 | if (!strcmp(name, block->idstr)) { |
| 2305 | return block; |
| 2306 | } |
| 2307 | } |
| 2308 | |
| 2309 | return NULL; |
| 2310 | } |
| 2311 | |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2312 | /* Some of the softmmu routines need to translate from a host pointer |
| 2313 | (typically a TLB entry) back to a ram offset. */ |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2314 | ram_addr_t qemu_ram_addr_from_host(void *ptr) |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2315 | { |
| 2316 | RAMBlock *block; |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2317 | ram_addr_t offset; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2318 | |
Paolo Bonzini | f615f39 | 2016-05-26 10:07:50 +0200 | [diff] [blame] | 2319 | block = qemu_ram_block_from_host(ptr, false, &offset); |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2320 | if (!block) { |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2321 | return RAM_ADDR_INVALID; |
Dr. David Alan Gilbert | 422148d | 2015-11-05 18:10:32 +0000 | [diff] [blame] | 2322 | } |
| 2323 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 2324 | return block->offset + offset; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 2325 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 2326 | |
Paolo Bonzini | 49b24af | 2015-12-16 10:30:47 +0100 | [diff] [blame] | 2327 | /* Called within RCU critical section. */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2328 | static void notdirty_mem_write(void *opaque, hwaddr ram_addr, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2329 | uint64_t val, unsigned size) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 2330 | { |
Alex Bennée | ba051fb | 2016-10-27 16:10:16 +0100 | [diff] [blame] | 2331 | bool locked = false; |
| 2332 | |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 2333 | assert(tcg_enabled()); |
Juan Quintela | 5215919 | 2013-10-08 12:44:04 +0200 | [diff] [blame] | 2334 | if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { |
Alex Bennée | ba051fb | 2016-10-27 16:10:16 +0100 | [diff] [blame] | 2335 | locked = true; |
| 2336 | tb_lock(); |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2337 | tb_invalidate_phys_page_fast(ram_addr, size); |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 2338 | } |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2339 | switch (size) { |
| 2340 | case 1: |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2341 | stb_p(qemu_map_ram_ptr(NULL, ram_addr), val); |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2342 | break; |
| 2343 | case 2: |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2344 | stw_p(qemu_map_ram_ptr(NULL, ram_addr), val); |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2345 | break; |
| 2346 | case 4: |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2347 | stl_p(qemu_map_ram_ptr(NULL, ram_addr), val); |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2348 | break; |
| 2349 | default: |
| 2350 | abort(); |
| 2351 | } |
Alex Bennée | ba051fb | 2016-10-27 16:10:16 +0100 | [diff] [blame] | 2352 | |
| 2353 | if (locked) { |
| 2354 | tb_unlock(); |
| 2355 | } |
| 2356 | |
Paolo Bonzini | 58d2707 | 2015-03-23 11:56:01 +0100 | [diff] [blame] | 2357 | /* Set both VGA and migration bits for simplicity and to remove |
| 2358 | * the notdirty callback faster. |
| 2359 | */ |
| 2360 | cpu_physical_memory_set_dirty_range(ram_addr, size, |
| 2361 | DIRTY_CLIENTS_NOCODE); |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 2362 | /* we remove the notdirty callback only if the code has been |
| 2363 | flushed */ |
Juan Quintela | a2cd8c8 | 2013-10-10 11:20:22 +0200 | [diff] [blame] | 2364 | if (!cpu_physical_memory_is_clean(ram_addr)) { |
Peter Crosthwaite | bcae01e | 2015-09-10 22:39:42 -0700 | [diff] [blame] | 2365 | tlb_set_dirty(current_cpu, current_cpu->mem_io_vaddr); |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 2366 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 2367 | } |
| 2368 | |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 2369 | static bool notdirty_mem_accepts(void *opaque, hwaddr addr, |
| 2370 | unsigned size, bool is_write) |
| 2371 | { |
| 2372 | return is_write; |
| 2373 | } |
| 2374 | |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2375 | static const MemoryRegionOps notdirty_mem_ops = { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2376 | .write = notdirty_mem_write, |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 2377 | .valid.accepts = notdirty_mem_accepts, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 2378 | .endianness = DEVICE_NATIVE_ENDIAN, |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 2379 | }; |
| 2380 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2381 | /* Generate a debug exception if a watchpoint has been hit. */ |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2382 | static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags) |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2383 | { |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2384 | CPUState *cpu = current_cpu; |
Sergey Fedorov | 568496c | 2016-02-11 11:17:32 +0000 | [diff] [blame] | 2385 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2386 | CPUArchState *env = cpu->env_ptr; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2387 | target_ulong pc, cs_base; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2388 | target_ulong vaddr; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 2389 | CPUWatchpoint *wp; |
Emilio G. Cota | 89fee74 | 2016-04-07 13:19:22 -0400 | [diff] [blame] | 2390 | uint32_t cpu_flags; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2391 | |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 2392 | assert(tcg_enabled()); |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2393 | if (cpu->watchpoint_hit) { |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2394 | /* We re-entered the check after replacing the TB. Now raise |
| 2395 | * the debug interrupt so that is will trigger after the |
| 2396 | * current instruction. */ |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2397 | cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG); |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2398 | return; |
| 2399 | } |
Andreas Färber | 93afead | 2013-08-26 03:41:01 +0200 | [diff] [blame] | 2400 | vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset; |
Julian Brown | 4061200 | 2017-02-07 18:29:59 +0000 | [diff] [blame] | 2401 | vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len); |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2402 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Peter Maydell | 05068c0 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 2403 | if (cpu_watchpoint_address_matches(wp, vaddr, len) |
| 2404 | && (wp->flags & flags)) { |
Peter Maydell | 0822567 | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 2405 | if (flags == BP_MEM_READ) { |
| 2406 | wp->flags |= BP_WATCHPOINT_HIT_READ; |
| 2407 | } else { |
| 2408 | wp->flags |= BP_WATCHPOINT_HIT_WRITE; |
| 2409 | } |
| 2410 | wp->hitaddr = vaddr; |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2411 | wp->hitattrs = attrs; |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2412 | if (!cpu->watchpoint_hit) { |
Sergey Fedorov | 568496c | 2016-02-11 11:17:32 +0000 | [diff] [blame] | 2413 | if (wp->flags & BP_CPU && |
| 2414 | !cc->debug_check_watchpoint(cpu, wp)) { |
| 2415 | wp->flags &= ~BP_WATCHPOINT_HIT; |
| 2416 | continue; |
| 2417 | } |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 2418 | cpu->watchpoint_hit = wp; |
KONRAD Frederic | a5e9982 | 2016-10-27 16:10:06 +0100 | [diff] [blame] | 2419 | |
Jan Kiszka | 8d04fb5 | 2017-02-23 18:29:11 +0000 | [diff] [blame] | 2420 | /* Both tb_lock and iothread_mutex will be reset when |
| 2421 | * cpu_loop_exit or cpu_loop_exit_noexc longjmp |
| 2422 | * back into the cpu_exec main loop. |
KONRAD Frederic | a5e9982 | 2016-10-27 16:10:06 +0100 | [diff] [blame] | 2423 | */ |
| 2424 | tb_lock(); |
Andreas Färber | 239c51a | 2013-09-01 17:12:23 +0200 | [diff] [blame] | 2425 | tb_check_watchpoint(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2426 | if (wp->flags & BP_STOP_BEFORE_ACCESS) { |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 2427 | cpu->exception_index = EXCP_DEBUG; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 2428 | cpu_loop_exit(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2429 | } else { |
| 2430 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); |
Andreas Färber | 648f034 | 2013-09-01 17:43:17 +0200 | [diff] [blame] | 2431 | tb_gen_code(cpu, pc, cs_base, cpu_flags, 1); |
Peter Maydell | 6886b98 | 2016-05-17 15:18:04 +0100 | [diff] [blame] | 2432 | cpu_loop_exit_noexc(cpu); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2433 | } |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 2434 | } |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 2435 | } else { |
| 2436 | wp->flags &= ~BP_WATCHPOINT_HIT; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 2437 | } |
| 2438 | } |
| 2439 | } |
| 2440 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2441 | /* Watchpoint access routines. Watchpoints are inserted using TLB tricks, |
| 2442 | so these check for a hit then pass through to the normal out-of-line |
| 2443 | phys routines. */ |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2444 | static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata, |
| 2445 | unsigned size, MemTxAttrs attrs) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2446 | { |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2447 | MemTxResult res; |
| 2448 | uint64_t data; |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2449 | int asidx = cpu_asidx_from_attrs(current_cpu, attrs); |
| 2450 | AddressSpace *as = current_cpu->cpu_ases[asidx].as; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2451 | |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2452 | check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ); |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2453 | switch (size) { |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2454 | case 1: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2455 | data = address_space_ldub(as, addr, attrs, &res); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2456 | break; |
| 2457 | case 2: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2458 | data = address_space_lduw(as, addr, attrs, &res); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2459 | break; |
| 2460 | case 4: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2461 | data = address_space_ldl(as, addr, attrs, &res); |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 2462 | break; |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2463 | default: abort(); |
| 2464 | } |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2465 | *pdata = data; |
| 2466 | return res; |
| 2467 | } |
| 2468 | |
| 2469 | static MemTxResult watch_mem_write(void *opaque, hwaddr addr, |
| 2470 | uint64_t val, unsigned size, |
| 2471 | MemTxAttrs attrs) |
| 2472 | { |
| 2473 | MemTxResult res; |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2474 | int asidx = cpu_asidx_from_attrs(current_cpu, attrs); |
| 2475 | AddressSpace *as = current_cpu->cpu_ases[asidx].as; |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2476 | |
| 2477 | check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE); |
| 2478 | switch (size) { |
| 2479 | case 1: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2480 | address_space_stb(as, addr, val, attrs, &res); |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2481 | break; |
| 2482 | case 2: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2483 | address_space_stw(as, addr, val, attrs, &res); |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2484 | break; |
| 2485 | case 4: |
Peter Maydell | 79ed041 | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 2486 | address_space_stl(as, addr, val, attrs, &res); |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2487 | break; |
| 2488 | default: abort(); |
| 2489 | } |
| 2490 | return res; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2491 | } |
| 2492 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2493 | static const MemoryRegionOps watch_mem_ops = { |
Peter Maydell | 66b9b43 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2494 | .read_with_attrs = watch_mem_read, |
| 2495 | .write_with_attrs = watch_mem_write, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 2496 | .endianness = DEVICE_NATIVE_ENDIAN, |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2497 | }; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 2498 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2499 | static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, |
| 2500 | unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2501 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2502 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2503 | uint8_t buf[8]; |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2504 | MemTxResult res; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2505 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2506 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2507 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__, |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2508 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2509 | #endif |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2510 | res = address_space_read(subpage->as, addr + subpage->base, |
| 2511 | attrs, buf, len); |
| 2512 | if (res) { |
| 2513 | return res; |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2514 | } |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2515 | switch (len) { |
| 2516 | case 1: |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2517 | *data = ldub_p(buf); |
| 2518 | return MEMTX_OK; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2519 | case 2: |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2520 | *data = lduw_p(buf); |
| 2521 | return MEMTX_OK; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2522 | case 4: |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2523 | *data = ldl_p(buf); |
| 2524 | return MEMTX_OK; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2525 | case 8: |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2526 | *data = ldq_p(buf); |
| 2527 | return MEMTX_OK; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2528 | default: |
| 2529 | abort(); |
| 2530 | } |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2531 | } |
| 2532 | |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2533 | static MemTxResult subpage_write(void *opaque, hwaddr addr, |
| 2534 | uint64_t value, unsigned len, MemTxAttrs attrs) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2535 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2536 | subpage_t *subpage = opaque; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2537 | uint8_t buf[8]; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2538 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2539 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2540 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2541 | " value %"PRIx64"\n", |
| 2542 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2543 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2544 | switch (len) { |
| 2545 | case 1: |
| 2546 | stb_p(buf, value); |
| 2547 | break; |
| 2548 | case 2: |
| 2549 | stw_p(buf, value); |
| 2550 | break; |
| 2551 | case 4: |
| 2552 | stl_p(buf, value); |
| 2553 | break; |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2554 | case 8: |
| 2555 | stq_p(buf, value); |
| 2556 | break; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2557 | default: |
| 2558 | abort(); |
| 2559 | } |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2560 | return address_space_write(subpage->as, addr + subpage->base, |
| 2561 | attrs, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2562 | } |
| 2563 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2564 | static bool subpage_accepts(void *opaque, hwaddr addr, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2565 | unsigned len, bool is_write) |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2566 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2567 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2568 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2569 | printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n", |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2570 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2571 | #endif |
| 2572 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2573 | return address_space_access_valid(subpage->as, addr + subpage->base, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2574 | len, is_write); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2575 | } |
| 2576 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2577 | static const MemoryRegionOps subpage_ops = { |
Peter Maydell | f25a49e | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 2578 | .read_with_attrs = subpage_read, |
| 2579 | .write_with_attrs = subpage_write, |
Paolo Bonzini | ff6cff7 | 2014-12-22 13:11:39 +0100 | [diff] [blame] | 2580 | .impl.min_access_size = 1, |
| 2581 | .impl.max_access_size = 8, |
| 2582 | .valid.min_access_size = 1, |
| 2583 | .valid.max_access_size = 8, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 2584 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 2585 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2586 | }; |
| 2587 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2588 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2589 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2590 | { |
| 2591 | int idx, eidx; |
| 2592 | |
| 2593 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 2594 | return -1; |
| 2595 | idx = SUBPAGE_IDX(start); |
| 2596 | eidx = SUBPAGE_IDX(end); |
| 2597 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2598 | printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n", |
| 2599 | __func__, mmio, start, end, idx, eidx, section); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2600 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2601 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2602 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2603 | } |
| 2604 | |
| 2605 | return 0; |
| 2606 | } |
| 2607 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2608 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2609 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2610 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2611 | |
Vijaya Kumar K | 2615fab | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 2612 | mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t)); |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 2613 | mmio->as = as; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 2614 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2615 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Peter Crosthwaite | b4fefef | 2014-06-05 23:15:52 -0700 | [diff] [blame] | 2616 | NULL, TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 2617 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2618 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 2619 | printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__, |
| 2620 | mmio, base, TARGET_PAGE_SIZE); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2621 | #endif |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 2622 | subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 2623 | |
| 2624 | return mmio; |
| 2625 | } |
| 2626 | |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2627 | static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as, |
| 2628 | MemoryRegion *mr) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2629 | { |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2630 | assert(as); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2631 | MemoryRegionSection section = { |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2632 | .address_space = as, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2633 | .mr = mr, |
| 2634 | .offset_within_address_space = 0, |
| 2635 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 2636 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2637 | }; |
| 2638 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2639 | return phys_section_add(map, §ion); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 2640 | } |
| 2641 | |
Peter Maydell | a54c87b | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 2642 | MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 2643 | { |
Peter Maydell | a54c87b | 2016-01-21 14:15:05 +0000 | [diff] [blame] | 2644 | int asidx = cpu_asidx_from_attrs(cpu, attrs); |
| 2645 | CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2646 | AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch); |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2647 | MemoryRegionSection *sections = d->map.sections; |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 2648 | |
| 2649 | return sections[index & ~TARGET_PAGE_MASK].mr; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 2650 | } |
| 2651 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 2652 | static void io_mem_init(void) |
| 2653 | { |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 2654 | memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, NULL, UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2655 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 2656 | NULL, UINT64_MAX); |
Jan Kiszka | 8d04fb5 | 2017-02-23 18:29:11 +0000 | [diff] [blame] | 2657 | |
| 2658 | /* io_mem_notdirty calls tb_invalidate_phys_page_fast, |
| 2659 | * which can be called without the iothread mutex. |
| 2660 | */ |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2661 | memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 2662 | NULL, UINT64_MAX); |
Jan Kiszka | 8d04fb5 | 2017-02-23 18:29:11 +0000 | [diff] [blame] | 2663 | memory_region_clear_global_locking(&io_mem_notdirty); |
| 2664 | |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 2665 | memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL, |
Paolo Bonzini | 1f6245e | 2014-06-13 10:48:06 +0200 | [diff] [blame] | 2666 | NULL, UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 2667 | } |
| 2668 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2669 | static void mem_begin(MemoryListener *listener) |
| 2670 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 2671 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2672 | AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1); |
| 2673 | uint16_t n; |
| 2674 | |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2675 | n = dummy_section(&d->map, as, &io_mem_unassigned); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2676 | assert(n == PHYS_SECTION_UNASSIGNED); |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2677 | n = dummy_section(&d->map, as, &io_mem_notdirty); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2678 | assert(n == PHYS_SECTION_NOTDIRTY); |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2679 | n = dummy_section(&d->map, as, &io_mem_rom); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2680 | assert(n == PHYS_SECTION_ROM); |
Peter Crosthwaite | a656e22 | 2014-06-02 19:08:44 -0700 | [diff] [blame] | 2681 | n = dummy_section(&d->map, as, &io_mem_watch); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2682 | assert(n == PHYS_SECTION_WATCH); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2683 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 2684 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 }; |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2685 | d->as = as; |
| 2686 | as->next_dispatch = d; |
| 2687 | } |
| 2688 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2689 | static void address_space_dispatch_free(AddressSpaceDispatch *d) |
| 2690 | { |
| 2691 | phys_sections_free(&d->map); |
| 2692 | g_free(d); |
| 2693 | } |
| 2694 | |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2695 | static void mem_commit(MemoryListener *listener) |
| 2696 | { |
| 2697 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 2698 | AddressSpaceDispatch *cur = as->dispatch; |
| 2699 | AddressSpaceDispatch *next = as->next_dispatch; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2700 | |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2701 | phys_page_compact_all(next, next->map.nodes_nb); |
Michael S. Tsirkin | b35ba30 | 2013-11-11 17:52:07 +0200 | [diff] [blame] | 2702 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2703 | atomic_rcu_set(&as->dispatch, next); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2704 | if (cur) { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2705 | call_rcu(cur, address_space_dispatch_free, rcu); |
Marcel Apfelbaum | 53cb28c | 2013-12-01 14:02:23 +0200 | [diff] [blame] | 2706 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 2707 | } |
| 2708 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 2709 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 2710 | { |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2711 | CPUAddressSpace *cpuas; |
| 2712 | AddressSpaceDispatch *d; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 2713 | |
| 2714 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 2715 | reset the modified entries */ |
Peter Maydell | 32857f4 | 2015-10-01 15:29:50 +0100 | [diff] [blame] | 2716 | cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); |
| 2717 | cpu_reloading_memory_map(); |
| 2718 | /* The CPU and TLB are protected by the iothread lock. |
| 2719 | * We reload the dispatch pointer now because cpu_reloading_memory_map() |
| 2720 | * may have split the RCU critical section. |
| 2721 | */ |
| 2722 | d = atomic_rcu_read(&cpuas->as->dispatch); |
Alex Bennée | f35e44e | 2016-10-21 16:34:18 +0100 | [diff] [blame] | 2723 | atomic_rcu_set(&cpuas->memory_dispatch, d); |
Alex Bennée | d10eb08 | 2016-11-14 14:17:28 +0000 | [diff] [blame] | 2724 | tlb_flush(cpuas->cpu); |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 2725 | } |
| 2726 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2727 | void address_space_init_dispatch(AddressSpace *as) |
| 2728 | { |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2729 | as->dispatch = NULL; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 2730 | as->dispatch_listener = (MemoryListener) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2731 | .begin = mem_begin, |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 2732 | .commit = mem_commit, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2733 | .region_add = mem_add, |
| 2734 | .region_nop = mem_add, |
| 2735 | .priority = 0, |
| 2736 | }; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 2737 | memory_listener_register(&as->dispatch_listener, as); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2738 | } |
| 2739 | |
Paolo Bonzini | 6e48e8f | 2015-02-10 10:25:44 -0700 | [diff] [blame] | 2740 | void address_space_unregister(AddressSpace *as) |
| 2741 | { |
| 2742 | memory_listener_unregister(&as->dispatch_listener); |
| 2743 | } |
| 2744 | |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 2745 | void address_space_destroy_dispatch(AddressSpace *as) |
| 2746 | { |
| 2747 | AddressSpaceDispatch *d = as->dispatch; |
| 2748 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 2749 | atomic_rcu_set(&as->dispatch, NULL); |
| 2750 | if (d) { |
| 2751 | call_rcu(d, address_space_dispatch_free, rcu); |
| 2752 | } |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 2753 | } |
| 2754 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 2755 | static void memory_map_init(void) |
| 2756 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2757 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 2758 | |
Paolo Bonzini | 57271d6 | 2013-11-07 17:14:37 +0100 | [diff] [blame] | 2759 | memory_region_init(system_memory, NULL, "system", UINT64_MAX); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 2760 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 2761 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2762 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b72 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 2763 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 2764 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 2765 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 2766 | } |
| 2767 | |
| 2768 | MemoryRegion *get_system_memory(void) |
| 2769 | { |
| 2770 | return system_memory; |
| 2771 | } |
| 2772 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 2773 | MemoryRegion *get_system_io(void) |
| 2774 | { |
| 2775 | return system_io; |
| 2776 | } |
| 2777 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 2778 | #endif /* !defined(CONFIG_USER_ONLY) */ |
| 2779 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2780 | /* physical memory access (slow version, mainly for debug) */ |
| 2781 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2782 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2783 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2784 | { |
| 2785 | int l, flags; |
| 2786 | target_ulong page; |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 2787 | void * p; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2788 | |
| 2789 | while (len > 0) { |
| 2790 | page = addr & TARGET_PAGE_MASK; |
| 2791 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 2792 | if (l > len) |
| 2793 | l = len; |
| 2794 | flags = page_get_flags(page); |
| 2795 | if (!(flags & PAGE_VALID)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2796 | return -1; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2797 | if (is_write) { |
| 2798 | if (!(flags & PAGE_WRITE)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2799 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 2800 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 2801 | if (!(p = lock_user(VERIFY_WRITE, addr, l, 0))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2802 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 2803 | memcpy(p, buf, l); |
| 2804 | unlock_user(p, addr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2805 | } else { |
| 2806 | if (!(flags & PAGE_READ)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2807 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 2808 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 2809 | if (!(p = lock_user(VERIFY_READ, addr, l, 1))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2810 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 2811 | memcpy(buf, p, l); |
aurel32 | 5b25757 | 2008-04-28 08:54:59 +0000 | [diff] [blame] | 2812 | unlock_user(p, addr, 0); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2813 | } |
| 2814 | len -= l; |
| 2815 | buf += l; |
| 2816 | addr += l; |
| 2817 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2818 | return 0; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2819 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2820 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2821 | #else |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2822 | |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 2823 | static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2824 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2825 | { |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2826 | uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 2827 | addr += memory_region_get_ram_addr(mr); |
| 2828 | |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2829 | /* No early return if dirty_log_mask is or becomes 0, because |
| 2830 | * cpu_physical_memory_set_dirty_range will still call |
| 2831 | * xen_modified_memory. |
| 2832 | */ |
| 2833 | if (dirty_log_mask) { |
| 2834 | dirty_log_mask = |
| 2835 | cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2836 | } |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2837 | if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) { |
Paolo Bonzini | 5aa1ef7 | 2017-07-03 17:50:40 +0200 | [diff] [blame] | 2838 | assert(tcg_enabled()); |
Alex Bennée | ba051fb | 2016-10-27 16:10:16 +0100 | [diff] [blame] | 2839 | tb_lock(); |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2840 | tb_invalidate_phys_range(addr, addr + length); |
Alex Bennée | ba051fb | 2016-10-27 16:10:16 +0100 | [diff] [blame] | 2841 | tb_unlock(); |
Paolo Bonzini | e87f777 | 2015-03-25 15:21:39 +0100 | [diff] [blame] | 2842 | dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE); |
| 2843 | } |
| 2844 | cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2845 | } |
| 2846 | |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2847 | static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2848 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 2849 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2850 | |
| 2851 | /* Regions are assumed to support 1-4 byte accesses unless |
| 2852 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2853 | if (access_size_max == 0) { |
| 2854 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2855 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2856 | |
| 2857 | /* Bound the maximum access by the alignment of the address. */ |
| 2858 | if (!mr->ops->impl.unaligned) { |
| 2859 | unsigned align_size_max = addr & -addr; |
| 2860 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 2861 | access_size_max = align_size_max; |
| 2862 | } |
| 2863 | } |
| 2864 | |
| 2865 | /* Don't attempt accesses larger than the maximum. */ |
| 2866 | if (l > access_size_max) { |
| 2867 | l = access_size_max; |
| 2868 | } |
Peter Maydell | 6554f5c | 2015-07-24 13:33:10 +0100 | [diff] [blame] | 2869 | l = pow2floor(l); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 2870 | |
| 2871 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 2872 | } |
| 2873 | |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2874 | static bool prepare_mmio_access(MemoryRegion *mr) |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2875 | { |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2876 | bool unlocked = !qemu_mutex_iothread_locked(); |
| 2877 | bool release_lock = false; |
| 2878 | |
| 2879 | if (unlocked && mr->global_locking) { |
| 2880 | qemu_mutex_lock_iothread(); |
| 2881 | unlocked = false; |
| 2882 | release_lock = true; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2883 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2884 | if (mr->flush_coalesced_mmio) { |
| 2885 | if (unlocked) { |
| 2886 | qemu_mutex_lock_iothread(); |
| 2887 | } |
| 2888 | qemu_flush_coalesced_mmio_buffer(); |
| 2889 | if (unlocked) { |
| 2890 | qemu_mutex_unlock_iothread(); |
| 2891 | } |
| 2892 | } |
| 2893 | |
| 2894 | return release_lock; |
Paolo Bonzini | 125b380 | 2015-06-18 18:47:21 +0200 | [diff] [blame] | 2895 | } |
| 2896 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2897 | /* Called within RCU critical section. */ |
| 2898 | static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr, |
| 2899 | MemTxAttrs attrs, |
| 2900 | const uint8_t *buf, |
| 2901 | int len, hwaddr addr1, |
| 2902 | hwaddr l, MemoryRegion *mr) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2903 | { |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2904 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2905 | uint64_t val; |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 2906 | MemTxResult result = MEMTX_OK; |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2907 | bool release_lock = false; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2908 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2909 | for (;;) { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2910 | if (!memory_access_is_direct(mr, true)) { |
| 2911 | release_lock |= prepare_mmio_access(mr); |
| 2912 | l = memory_access_size(mr, l, addr1); |
| 2913 | /* XXX: could force current_cpu to NULL to avoid |
| 2914 | potential bugs */ |
| 2915 | switch (l) { |
| 2916 | case 8: |
| 2917 | /* 64 bit write access */ |
| 2918 | val = ldq_p(buf); |
| 2919 | result |= memory_region_dispatch_write(mr, addr1, val, 8, |
| 2920 | attrs); |
| 2921 | break; |
| 2922 | case 4: |
| 2923 | /* 32 bit write access */ |
Ladi Prosek | 6da67de | 2017-01-26 15:22:37 +0100 | [diff] [blame] | 2924 | val = (uint32_t)ldl_p(buf); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2925 | result |= memory_region_dispatch_write(mr, addr1, val, 4, |
| 2926 | attrs); |
| 2927 | break; |
| 2928 | case 2: |
| 2929 | /* 16 bit write access */ |
| 2930 | val = lduw_p(buf); |
| 2931 | result |= memory_region_dispatch_write(mr, addr1, val, 2, |
| 2932 | attrs); |
| 2933 | break; |
| 2934 | case 1: |
| 2935 | /* 8 bit write access */ |
| 2936 | val = ldub_p(buf); |
| 2937 | result |= memory_region_dispatch_write(mr, addr1, val, 1, |
| 2938 | attrs); |
| 2939 | break; |
| 2940 | default: |
| 2941 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2942 | } |
| 2943 | } else { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2944 | /* RAM case */ |
Prasad J Pandit | 04bf252 | 2017-07-12 18:08:40 +0530 | [diff] [blame] | 2945 | ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2946 | memcpy(ptr, buf, l); |
| 2947 | invalidate_and_set_dirty(mr, addr1, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2948 | } |
Jan Kiszka | 4840f10 | 2015-06-18 18:47:22 +0200 | [diff] [blame] | 2949 | |
| 2950 | if (release_lock) { |
| 2951 | qemu_mutex_unlock_iothread(); |
| 2952 | release_lock = false; |
| 2953 | } |
| 2954 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2955 | len -= l; |
| 2956 | buf += l; |
| 2957 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2958 | |
| 2959 | if (!len) { |
| 2960 | break; |
| 2961 | } |
| 2962 | |
| 2963 | l = len; |
| 2964 | mr = address_space_translate(as, addr, &addr1, &l, true); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2965 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2966 | |
Peter Maydell | 3b64349 | 2015-04-26 16:49:23 +0100 | [diff] [blame] | 2967 | return result; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2968 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2969 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2970 | MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, |
| 2971 | const uint8_t *buf, int len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2972 | { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2973 | hwaddr l; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2974 | hwaddr addr1; |
| 2975 | MemoryRegion *mr; |
| 2976 | MemTxResult result = MEMTX_OK; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 2977 | |
| 2978 | if (len > 0) { |
| 2979 | rcu_read_lock(); |
| 2980 | l = len; |
| 2981 | mr = address_space_translate(as, addr, &addr1, &l, true); |
| 2982 | result = address_space_write_continue(as, addr, attrs, buf, len, |
| 2983 | addr1, l, mr); |
| 2984 | rcu_read_unlock(); |
| 2985 | } |
| 2986 | |
| 2987 | return result; |
| 2988 | } |
| 2989 | |
| 2990 | /* Called within RCU critical section. */ |
| 2991 | MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr, |
| 2992 | MemTxAttrs attrs, uint8_t *buf, |
| 2993 | int len, hwaddr addr1, hwaddr l, |
| 2994 | MemoryRegion *mr) |
| 2995 | { |
| 2996 | uint8_t *ptr; |
| 2997 | uint64_t val; |
| 2998 | MemTxResult result = MEMTX_OK; |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 2999 | bool release_lock = false; |
| 3000 | |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3001 | for (;;) { |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3002 | if (!memory_access_is_direct(mr, false)) { |
| 3003 | /* I/O case */ |
| 3004 | release_lock |= prepare_mmio_access(mr); |
| 3005 | l = memory_access_size(mr, l, addr1); |
| 3006 | switch (l) { |
| 3007 | case 8: |
| 3008 | /* 64 bit read access */ |
| 3009 | result |= memory_region_dispatch_read(mr, addr1, &val, 8, |
| 3010 | attrs); |
| 3011 | stq_p(buf, val); |
| 3012 | break; |
| 3013 | case 4: |
| 3014 | /* 32 bit read access */ |
| 3015 | result |= memory_region_dispatch_read(mr, addr1, &val, 4, |
| 3016 | attrs); |
| 3017 | stl_p(buf, val); |
| 3018 | break; |
| 3019 | case 2: |
| 3020 | /* 16 bit read access */ |
| 3021 | result |= memory_region_dispatch_read(mr, addr1, &val, 2, |
| 3022 | attrs); |
| 3023 | stw_p(buf, val); |
| 3024 | break; |
| 3025 | case 1: |
| 3026 | /* 8 bit read access */ |
| 3027 | result |= memory_region_dispatch_read(mr, addr1, &val, 1, |
| 3028 | attrs); |
| 3029 | stb_p(buf, val); |
| 3030 | break; |
| 3031 | default: |
| 3032 | abort(); |
| 3033 | } |
| 3034 | } else { |
| 3035 | /* RAM case */ |
Prasad J Pandit | 04bf252 | 2017-07-12 18:08:40 +0530 | [diff] [blame] | 3036 | ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3037 | memcpy(buf, ptr, l); |
| 3038 | } |
| 3039 | |
| 3040 | if (release_lock) { |
| 3041 | qemu_mutex_unlock_iothread(); |
| 3042 | release_lock = false; |
| 3043 | } |
| 3044 | |
| 3045 | len -= l; |
| 3046 | buf += l; |
| 3047 | addr += l; |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3048 | |
| 3049 | if (!len) { |
| 3050 | break; |
| 3051 | } |
| 3052 | |
| 3053 | l = len; |
| 3054 | mr = address_space_translate(as, addr, &addr1, &l, false); |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3055 | } |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3056 | |
| 3057 | return result; |
| 3058 | } |
| 3059 | |
Paolo Bonzini | 3cc8f88 | 2015-12-09 10:34:13 +0100 | [diff] [blame] | 3060 | MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, |
| 3061 | MemTxAttrs attrs, uint8_t *buf, int len) |
Paolo Bonzini | a203ac7 | 2015-12-09 10:18:57 +0100 | [diff] [blame] | 3062 | { |
| 3063 | hwaddr l; |
| 3064 | hwaddr addr1; |
| 3065 | MemoryRegion *mr; |
| 3066 | MemTxResult result = MEMTX_OK; |
| 3067 | |
| 3068 | if (len > 0) { |
| 3069 | rcu_read_lock(); |
| 3070 | l = len; |
| 3071 | mr = address_space_translate(as, addr, &addr1, &l, false); |
| 3072 | result = address_space_read_continue(as, addr, attrs, buf, len, |
| 3073 | addr1, l, mr); |
| 3074 | rcu_read_unlock(); |
| 3075 | } |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3076 | |
| 3077 | return result; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3078 | } |
| 3079 | |
Paolo Bonzini | eb7eeb8 | 2015-12-09 10:06:31 +0100 | [diff] [blame] | 3080 | MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, |
| 3081 | uint8_t *buf, int len, bool is_write) |
| 3082 | { |
| 3083 | if (is_write) { |
| 3084 | return address_space_write(as, addr, attrs, (uint8_t *)buf, len); |
| 3085 | } else { |
| 3086 | return address_space_read(as, addr, attrs, (uint8_t *)buf, len); |
| 3087 | } |
| 3088 | } |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3089 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3090 | void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3091 | int len, int is_write) |
| 3092 | { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3093 | address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, |
| 3094 | buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3095 | } |
| 3096 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3097 | enum write_rom_type { |
| 3098 | WRITE_DATA, |
| 3099 | FLUSH_CACHE, |
| 3100 | }; |
| 3101 | |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 3102 | static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as, |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3103 | hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3104 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3105 | hwaddr l; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3106 | uint8_t *ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3107 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3108 | MemoryRegion *mr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3109 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3110 | rcu_read_lock(); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3111 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3112 | l = len; |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 3113 | mr = address_space_translate(as, addr, &addr1, &l, true); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 3114 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3115 | if (!(memory_region_is_ram(mr) || |
| 3116 | memory_region_is_romd(mr))) { |
Paolo Bonzini | b242e0e | 2015-07-04 00:24:51 +0200 | [diff] [blame] | 3117 | l = memory_access_size(mr, l, addr1); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3118 | } else { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3119 | /* ROM/RAM case */ |
Paolo Bonzini | 0878d0e | 2016-02-22 11:02:12 +0100 | [diff] [blame] | 3120 | ptr = qemu_map_ram_ptr(mr->ram_block, addr1); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3121 | switch (type) { |
| 3122 | case WRITE_DATA: |
| 3123 | memcpy(ptr, buf, l); |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3124 | invalidate_and_set_dirty(mr, addr1, l); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3125 | break; |
| 3126 | case FLUSH_CACHE: |
| 3127 | flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l); |
| 3128 | break; |
| 3129 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3130 | } |
| 3131 | len -= l; |
| 3132 | buf += l; |
| 3133 | addr += l; |
| 3134 | } |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3135 | rcu_read_unlock(); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3136 | } |
| 3137 | |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3138 | /* used for ROM loading : can write in RAM and ROM */ |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 3139 | void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr, |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3140 | const uint8_t *buf, int len) |
| 3141 | { |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 3142 | cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3143 | } |
| 3144 | |
| 3145 | void cpu_flush_icache_range(hwaddr start, int len) |
| 3146 | { |
| 3147 | /* |
| 3148 | * This function should do the same thing as an icache flush that was |
| 3149 | * triggered from within the guest. For TCG we are always cache coherent, |
| 3150 | * so there is no need to flush anything. For KVM / Xen we need to flush |
| 3151 | * the host's instruction cache at least. |
| 3152 | */ |
| 3153 | if (tcg_enabled()) { |
| 3154 | return; |
| 3155 | } |
| 3156 | |
Edgar E. Iglesias | 2a22165 | 2013-12-13 16:28:52 +1000 | [diff] [blame] | 3157 | cpu_physical_memory_write_rom_internal(&address_space_memory, |
| 3158 | start, NULL, len, FLUSH_CACHE); |
Alexander Graf | 582b55a | 2013-12-11 14:17:44 +0100 | [diff] [blame] | 3159 | } |
| 3160 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3161 | typedef struct { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3162 | MemoryRegion *mr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3163 | void *buffer; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3164 | hwaddr addr; |
| 3165 | hwaddr len; |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 3166 | bool in_use; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3167 | } BounceBuffer; |
| 3168 | |
| 3169 | static BounceBuffer bounce; |
| 3170 | |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3171 | typedef struct MapClient { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3172 | QEMUBH *bh; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3173 | QLIST_ENTRY(MapClient) link; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3174 | } MapClient; |
| 3175 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3176 | QemuMutex map_client_list_lock; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3177 | static QLIST_HEAD(map_client_list, MapClient) map_client_list |
| 3178 | = QLIST_HEAD_INITIALIZER(map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3179 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3180 | static void cpu_unregister_map_client_do(MapClient *client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3181 | { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3182 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 3183 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3184 | } |
| 3185 | |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3186 | static void cpu_notify_map_clients_locked(void) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3187 | { |
| 3188 | MapClient *client; |
| 3189 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 3190 | while (!QLIST_EMPTY(&map_client_list)) { |
| 3191 | client = QLIST_FIRST(&map_client_list); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3192 | qemu_bh_schedule(client->bh); |
| 3193 | cpu_unregister_map_client_do(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3194 | } |
| 3195 | } |
| 3196 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3197 | void cpu_register_map_client(QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3198 | { |
| 3199 | MapClient *client = g_malloc(sizeof(*client)); |
| 3200 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3201 | qemu_mutex_lock(&map_client_list_lock); |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3202 | client->bh = bh; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3203 | QLIST_INSERT_HEAD(&map_client_list, client, link); |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3204 | if (!atomic_read(&bounce.in_use)) { |
| 3205 | cpu_notify_map_clients_locked(); |
| 3206 | } |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3207 | qemu_mutex_unlock(&map_client_list_lock); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3208 | } |
| 3209 | |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3210 | void cpu_exec_init_all(void) |
| 3211 | { |
| 3212 | qemu_mutex_init(&ram_list.mutex); |
Peter Maydell | 20bccb8 | 2016-10-24 16:26:49 +0100 | [diff] [blame] | 3213 | /* The data structures we set up here depend on knowing the page size, |
| 3214 | * so no more changes can be made after this point. |
| 3215 | * In an ideal world, nothing we did before we had finished the |
| 3216 | * machine setup would care about the target page size, and we could |
| 3217 | * do this much later, rather than requiring board models to state |
| 3218 | * up front what their requirements are. |
| 3219 | */ |
| 3220 | finalize_target_page_bits(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3221 | io_mem_init(); |
Paolo Bonzini | 680a478 | 2015-11-02 09:23:52 +0100 | [diff] [blame] | 3222 | memory_map_init(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3223 | qemu_mutex_init(&map_client_list_lock); |
| 3224 | } |
| 3225 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3226 | void cpu_unregister_map_client(QEMUBH *bh) |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3227 | { |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3228 | MapClient *client; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3229 | |
Fam Zheng | e95205e | 2015-03-16 17:03:37 +0800 | [diff] [blame] | 3230 | qemu_mutex_lock(&map_client_list_lock); |
| 3231 | QLIST_FOREACH(client, &map_client_list, link) { |
| 3232 | if (client->bh == bh) { |
| 3233 | cpu_unregister_map_client_do(client); |
| 3234 | break; |
| 3235 | } |
| 3236 | } |
| 3237 | qemu_mutex_unlock(&map_client_list_lock); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3238 | } |
| 3239 | |
| 3240 | static void cpu_notify_map_clients(void) |
| 3241 | { |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3242 | qemu_mutex_lock(&map_client_list_lock); |
Fam Zheng | 33b6c2e | 2015-03-16 17:03:36 +0800 | [diff] [blame] | 3243 | cpu_notify_map_clients_locked(); |
Fam Zheng | 38e047b | 2015-03-16 17:03:35 +0800 | [diff] [blame] | 3244 | qemu_mutex_unlock(&map_client_list_lock); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3245 | } |
| 3246 | |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3247 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write) |
| 3248 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3249 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3250 | hwaddr l, xlat; |
| 3251 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3252 | rcu_read_lock(); |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3253 | while (len > 0) { |
| 3254 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3255 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 3256 | if (!memory_access_is_direct(mr, is_write)) { |
| 3257 | l = memory_access_size(mr, l, addr); |
| 3258 | if (!memory_region_access_valid(mr, xlat, l, is_write)) { |
Roman Kapl | 5ad4a2b | 2017-01-09 12:09:21 +0100 | [diff] [blame] | 3259 | rcu_read_unlock(); |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3260 | return false; |
| 3261 | } |
| 3262 | } |
| 3263 | |
| 3264 | len -= l; |
| 3265 | addr += l; |
| 3266 | } |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3267 | rcu_read_unlock(); |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 3268 | return true; |
| 3269 | } |
| 3270 | |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3271 | static hwaddr |
| 3272 | address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_len, |
| 3273 | MemoryRegion *mr, hwaddr base, hwaddr len, |
| 3274 | bool is_write) |
| 3275 | { |
| 3276 | hwaddr done = 0; |
| 3277 | hwaddr xlat; |
| 3278 | MemoryRegion *this_mr; |
| 3279 | |
| 3280 | for (;;) { |
| 3281 | target_len -= len; |
| 3282 | addr += len; |
| 3283 | done += len; |
| 3284 | if (target_len == 0) { |
| 3285 | return done; |
| 3286 | } |
| 3287 | |
| 3288 | len = target_len; |
| 3289 | this_mr = address_space_translate(as, addr, &xlat, &len, is_write); |
| 3290 | if (this_mr != mr || xlat != base + done) { |
| 3291 | return done; |
| 3292 | } |
| 3293 | } |
| 3294 | } |
| 3295 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3296 | /* Map a physical memory region into a host virtual address. |
| 3297 | * May map a subset of the requested range, given by and returned in *plen. |
| 3298 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 3299 | * Use only for reads OR writes - not for read-modify-write operations. |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3300 | * Use cpu_register_map_client() to know when retrying the map operation is |
| 3301 | * likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3302 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3303 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3304 | hwaddr addr, |
| 3305 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3306 | bool is_write) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3307 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3308 | hwaddr len = *plen; |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3309 | hwaddr l, xlat; |
| 3310 | MemoryRegion *mr; |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 3311 | void *ptr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3312 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3313 | if (len == 0) { |
| 3314 | return NULL; |
| 3315 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3316 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3317 | l = len; |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3318 | rcu_read_lock(); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3319 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3320 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3321 | if (!memory_access_is_direct(mr, is_write)) { |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 3322 | if (atomic_xchg(&bounce.in_use, true)) { |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3323 | rcu_read_unlock(); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3324 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3325 | } |
Kevin Wolf | e85d9db | 2013-07-22 14:30:23 +0200 | [diff] [blame] | 3326 | /* Avoid unbounded allocations */ |
| 3327 | l = MIN(l, TARGET_PAGE_SIZE); |
| 3328 | bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3329 | bounce.addr = addr; |
| 3330 | bounce.len = l; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3331 | |
| 3332 | memory_region_ref(mr); |
| 3333 | bounce.mr = mr; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3334 | if (!is_write) { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3335 | address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED, |
| 3336 | bounce.buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 3337 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3338 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3339 | rcu_read_unlock(); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3340 | *plen = l; |
| 3341 | return bounce.buffer; |
| 3342 | } |
| 3343 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 3344 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3345 | memory_region_ref(mr); |
Paolo Bonzini | 715c31e | 2016-11-22 12:04:31 +0100 | [diff] [blame] | 3346 | *plen = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write); |
| 3347 | ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen); |
Paolo Bonzini | e81bcda | 2015-12-16 10:31:26 +0100 | [diff] [blame] | 3348 | rcu_read_unlock(); |
| 3349 | |
| 3350 | return ptr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3351 | } |
| 3352 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3353 | /* Unmaps a memory region previously mapped by address_space_map(). |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3354 | * Will also mark the memory as dirty if is_write == 1. access_len gives |
| 3355 | * the amount of memory that was actually read or written by the caller. |
| 3356 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3357 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
| 3358 | int is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3359 | { |
| 3360 | if (buffer != bounce.buffer) { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3361 | MemoryRegion *mr; |
| 3362 | ram_addr_t addr1; |
| 3363 | |
Paolo Bonzini | 07bdaa4 | 2016-03-25 12:55:08 +0100 | [diff] [blame] | 3364 | mr = memory_region_from_host(buffer, &addr1); |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3365 | assert(mr != NULL); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3366 | if (is_write) { |
Paolo Bonzini | 845b621 | 2015-03-23 11:45:53 +0100 | [diff] [blame] | 3367 | invalidate_and_set_dirty(mr, addr1, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3368 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 3369 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 3370 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 3371 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3372 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3373 | return; |
| 3374 | } |
| 3375 | if (is_write) { |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3376 | address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED, |
| 3377 | bounce.buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3378 | } |
Herve Poussineau | f8a8324 | 2010-01-24 21:23:56 +0000 | [diff] [blame] | 3379 | qemu_vfree(bounce.buffer); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3380 | bounce.buffer = NULL; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 3381 | memory_region_unref(bounce.mr); |
Fam Zheng | c2cba0f | 2015-03-16 17:03:33 +0800 | [diff] [blame] | 3382 | atomic_mb_set(&bounce.in_use, false); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 3383 | cpu_notify_map_clients(); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 3384 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 3385 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3386 | void *cpu_physical_memory_map(hwaddr addr, |
| 3387 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3388 | int is_write) |
| 3389 | { |
| 3390 | return address_space_map(&address_space_memory, addr, plen, is_write); |
| 3391 | } |
| 3392 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3393 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
| 3394 | int is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 3395 | { |
| 3396 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 3397 | } |
| 3398 | |
Paolo Bonzini | 0ce265f | 2016-11-22 11:34:02 +0100 | [diff] [blame] | 3399 | #define ARG1_DECL AddressSpace *as |
| 3400 | #define ARG1 as |
| 3401 | #define SUFFIX |
| 3402 | #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__) |
| 3403 | #define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write) |
| 3404 | #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs) |
| 3405 | #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len) |
| 3406 | #define RCU_READ_LOCK(...) rcu_read_lock() |
| 3407 | #define RCU_READ_UNLOCK(...) rcu_read_unlock() |
| 3408 | #include "memory_ldst.inc.c" |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 3409 | |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3410 | int64_t address_space_cache_init(MemoryRegionCache *cache, |
| 3411 | AddressSpace *as, |
| 3412 | hwaddr addr, |
| 3413 | hwaddr len, |
| 3414 | bool is_write) |
| 3415 | { |
Paolo Bonzini | 90c4fe5 | 2017-04-03 13:41:28 +0200 | [diff] [blame] | 3416 | cache->len = len; |
| 3417 | cache->as = as; |
| 3418 | cache->xlat = addr; |
| 3419 | return len; |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3420 | } |
| 3421 | |
| 3422 | void address_space_cache_invalidate(MemoryRegionCache *cache, |
| 3423 | hwaddr addr, |
| 3424 | hwaddr access_len) |
| 3425 | { |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3426 | } |
| 3427 | |
| 3428 | void address_space_cache_destroy(MemoryRegionCache *cache) |
| 3429 | { |
Paolo Bonzini | 90c4fe5 | 2017-04-03 13:41:28 +0200 | [diff] [blame] | 3430 | cache->as = NULL; |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3431 | } |
| 3432 | |
| 3433 | #define ARG1_DECL MemoryRegionCache *cache |
| 3434 | #define ARG1 cache |
| 3435 | #define SUFFIX _cached |
Paolo Bonzini | 90c4fe5 | 2017-04-03 13:41:28 +0200 | [diff] [blame] | 3436 | #define TRANSLATE(addr, ...) \ |
| 3437 | address_space_translate(cache->as, cache->xlat + (addr), __VA_ARGS__) |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3438 | #define IS_DIRECT(mr, is_write) true |
Paolo Bonzini | 90c4fe5 | 2017-04-03 13:41:28 +0200 | [diff] [blame] | 3439 | #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs) |
| 3440 | #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len) |
| 3441 | #define RCU_READ_LOCK() rcu_read_lock() |
| 3442 | #define RCU_READ_UNLOCK() rcu_read_unlock() |
Paolo Bonzini | 1f4e496 | 2016-11-22 12:04:52 +0100 | [diff] [blame] | 3443 | #include "memory_ldst.inc.c" |
| 3444 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3445 | /* virtual memory access for debug (includes writing to ROM) */ |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 3446 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
bellard | b448f2f | 2004-02-25 23:24:04 +0000 | [diff] [blame] | 3447 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3448 | { |
| 3449 | int l; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3450 | hwaddr phys_addr; |
j_mayer | 9b3c35e | 2007-04-07 11:21:28 +0000 | [diff] [blame] | 3451 | target_ulong page; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3452 | |
Christian Borntraeger | 79ca7a1 | 2017-03-07 15:19:08 +0100 | [diff] [blame] | 3453 | cpu_synchronize_state(cpu); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3454 | while (len > 0) { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3455 | int asidx; |
| 3456 | MemTxAttrs attrs; |
| 3457 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3458 | page = addr & TARGET_PAGE_MASK; |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3459 | phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs); |
| 3460 | asidx = cpu_asidx_from_attrs(cpu, attrs); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3461 | /* if no physical page mapped, return an error */ |
| 3462 | if (phys_addr == -1) |
| 3463 | return -1; |
| 3464 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 3465 | if (l > len) |
| 3466 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 3467 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3468 | if (is_write) { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3469 | cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as, |
| 3470 | phys_addr, buf, l); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3471 | } else { |
Peter Maydell | 5232e4c | 2016-01-21 14:15:06 +0000 | [diff] [blame] | 3472 | address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, |
| 3473 | MEMTXATTRS_UNSPECIFIED, |
Peter Maydell | 5c9eb02 | 2015-04-26 16:49:24 +0100 | [diff] [blame] | 3474 | buf, l, 0); |
Edgar E. Iglesias | 2e38847 | 2013-12-13 16:31:02 +1000 | [diff] [blame] | 3475 | } |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3476 | len -= l; |
| 3477 | buf += l; |
| 3478 | addr += l; |
| 3479 | } |
| 3480 | return 0; |
| 3481 | } |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3482 | |
| 3483 | /* |
| 3484 | * Allows code that needs to deal with migration bitmaps etc to still be built |
| 3485 | * target independent. |
| 3486 | */ |
Juan Quintela | 20afaed | 2017-03-21 09:09:14 +0100 | [diff] [blame] | 3487 | size_t qemu_target_page_size(void) |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3488 | { |
Juan Quintela | 20afaed | 2017-03-21 09:09:14 +0100 | [diff] [blame] | 3489 | return TARGET_PAGE_SIZE; |
Dr. David Alan Gilbert | 038629a | 2015-11-05 18:10:29 +0000 | [diff] [blame] | 3490 | } |
| 3491 | |
Juan Quintela | 46d702b | 2017-04-24 21:03:48 +0200 | [diff] [blame] | 3492 | int qemu_target_page_bits(void) |
| 3493 | { |
| 3494 | return TARGET_PAGE_BITS; |
| 3495 | } |
| 3496 | |
| 3497 | int qemu_target_page_bits_min(void) |
| 3498 | { |
| 3499 | return TARGET_PAGE_BITS_MIN; |
| 3500 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 3501 | #endif |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 3502 | |
Blue Swirl | 8e4a424 | 2013-01-06 18:30:17 +0000 | [diff] [blame] | 3503 | /* |
| 3504 | * A helper function for the _utterly broken_ virtio device model to find out if |
| 3505 | * it's running on a big endian machine. Don't do this at home kids! |
| 3506 | */ |
Greg Kurz | 98ed8ec | 2014-06-24 19:26:29 +0200 | [diff] [blame] | 3507 | bool target_words_bigendian(void); |
| 3508 | bool target_words_bigendian(void) |
Blue Swirl | 8e4a424 | 2013-01-06 18:30:17 +0000 | [diff] [blame] | 3509 | { |
| 3510 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 3511 | return true; |
| 3512 | #else |
| 3513 | return false; |
| 3514 | #endif |
| 3515 | } |
| 3516 | |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3517 | #ifndef CONFIG_USER_ONLY |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 3518 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3519 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3520 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 3521 | hwaddr l = 1; |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3522 | bool res; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3523 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3524 | rcu_read_lock(); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 3525 | mr = address_space_translate(&address_space_memory, |
| 3526 | phys_addr, &phys_addr, &l, false); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3527 | |
Paolo Bonzini | 41063e1 | 2015-03-18 14:21:43 +0100 | [diff] [blame] | 3528 | res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); |
| 3529 | rcu_read_unlock(); |
| 3530 | return res; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 3531 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3532 | |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3533 | int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3534 | { |
| 3535 | RAMBlock *block; |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3536 | int ret = 0; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3537 | |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 3538 | rcu_read_lock(); |
Peter Xu | 99e1558 | 2017-05-12 12:17:39 +0800 | [diff] [blame] | 3539 | RAMBLOCK_FOREACH(block) { |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3540 | ret = func(block->idstr, block->host, block->offset, |
| 3541 | block->used_length, opaque); |
| 3542 | if (ret) { |
| 3543 | break; |
| 3544 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3545 | } |
Mike Day | 0dc3f44 | 2013-09-05 14:41:35 -0400 | [diff] [blame] | 3546 | rcu_read_unlock(); |
Dr. David Alan Gilbert | e380705 | 2015-05-21 13:24:13 +0100 | [diff] [blame] | 3547 | return ret; |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 3548 | } |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3549 | |
| 3550 | /* |
| 3551 | * Unmap pages of memory from start to start+length such that |
| 3552 | * they a) read as 0, b) Trigger whatever fault mechanism |
| 3553 | * the OS provides for postcopy. |
| 3554 | * The pages must be unmapped by the end of the function. |
| 3555 | * Returns: 0 on success, none-0 on failure |
| 3556 | * |
| 3557 | */ |
| 3558 | int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length) |
| 3559 | { |
| 3560 | int ret = -1; |
| 3561 | |
| 3562 | uint8_t *host_startaddr = rb->host + start; |
| 3563 | |
| 3564 | if ((uintptr_t)host_startaddr & (rb->page_size - 1)) { |
| 3565 | error_report("ram_block_discard_range: Unaligned start address: %p", |
| 3566 | host_startaddr); |
| 3567 | goto err; |
| 3568 | } |
| 3569 | |
| 3570 | if ((start + length) <= rb->used_length) { |
| 3571 | uint8_t *host_endaddr = host_startaddr + length; |
| 3572 | if ((uintptr_t)host_endaddr & (rb->page_size - 1)) { |
| 3573 | error_report("ram_block_discard_range: Unaligned end address: %p", |
| 3574 | host_endaddr); |
| 3575 | goto err; |
| 3576 | } |
| 3577 | |
| 3578 | errno = ENOTSUP; /* If we are missing MADVISE etc */ |
| 3579 | |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3580 | if (rb->page_size == qemu_host_page_size) { |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3581 | #if defined(CONFIG_MADVISE) |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3582 | /* Note: We need the madvise MADV_DONTNEED behaviour of definitely |
| 3583 | * freeing the page. |
| 3584 | */ |
| 3585 | ret = madvise(host_startaddr, length, MADV_DONTNEED); |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3586 | #endif |
Dr. David Alan Gilbert | e2fa71f | 2017-02-24 18:28:33 +0000 | [diff] [blame] | 3587 | } else { |
| 3588 | /* Huge page case - unfortunately it can't do DONTNEED, but |
| 3589 | * it can do the equivalent by FALLOC_FL_PUNCH_HOLE in the |
| 3590 | * huge page file. |
| 3591 | */ |
| 3592 | #ifdef CONFIG_FALLOCATE_PUNCH_HOLE |
| 3593 | ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, |
| 3594 | start, length); |
| 3595 | #endif |
| 3596 | } |
Dr. David Alan Gilbert | d3a5038 | 2017-02-24 18:28:32 +0000 | [diff] [blame] | 3597 | if (ret) { |
| 3598 | ret = -errno; |
| 3599 | error_report("ram_block_discard_range: Failed to discard range " |
| 3600 | "%s:%" PRIx64 " +%zx (%d)", |
| 3601 | rb->idstr, start, length, ret); |
| 3602 | } |
| 3603 | } else { |
| 3604 | error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64 |
| 3605 | "/%zx/" RAM_ADDR_FMT")", |
| 3606 | rb->idstr, start, length, rb->used_length); |
| 3607 | } |
| 3608 | |
| 3609 | err: |
| 3610 | return ret; |
| 3611 | } |
| 3612 | |
Peter Maydell | ec3f8c9 | 2013-06-27 20:53:38 +0100 | [diff] [blame] | 3613 | #endif |
Yang Zhong | a0be0c5 | 2017-07-03 18:12:13 +0800 | [diff] [blame] | 3614 | |
| 3615 | void page_size_init(void) |
| 3616 | { |
| 3617 | /* NOTE: we can always suppose that qemu_host_page_size >= |
| 3618 | TARGET_PAGE_SIZE */ |
| 3619 | qemu_real_host_page_size = getpagesize(); |
| 3620 | qemu_real_host_page_mask = -(intptr_t)qemu_real_host_page_size; |
| 3621 | if (qemu_host_page_size == 0) { |
| 3622 | qemu_host_page_size = qemu_real_host_page_size; |
| 3623 | } |
| 3624 | if (qemu_host_page_size < TARGET_PAGE_SIZE) { |
| 3625 | qemu_host_page_size = TARGET_PAGE_SIZE; |
| 3626 | } |
| 3627 | qemu_host_page_mask = -(intptr_t)qemu_host_page_size; |
| 3628 | } |