Gitiles
Code Review Sign In
android-review.linaro.org / platform / external / qemu-android / c76eaf13975130768070ecd2d4f3107eb69ab757 / . / trace-events
blob: 7f9cec4071da6016b28b2ef21239699fa536c9fa [file] [log] [blame]
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +0100[diff] [blame]1# Trace events for debugging and performance instrumentation
2#
3# This file is processed by the tracetool script during the build.
4#
5# To add a new trace event:
6#
7# 1. Choose a name for the trace event. Declare its arguments and format
8# string.
9#
10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11# trace_multiwrite_cb(). The source file must #include "trace.h".
12#
13# Format of a trace event:
14#
Stefan Hajnoczi1e2cf2b2010-05-24 11:32:09 +0100[diff] [blame]15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +0100[diff] [blame]16#
Frediano Ziglioa74cd8c2011-08-31 09:25:35 +0200[diff] [blame]17# Example: g_malloc(size_t size) "size %zu"
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +0100[diff] [blame]18#
Stefan Hajnoczi1e2cf2b2010-05-24 11:32:09 +0100[diff] [blame]19# The "disable" keyword will build without the trace event.
Stefan Hajnoczi1e2cf2b2010-05-24 11:32:09 +0100[diff] [blame]20#
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +0100[diff] [blame]21# The <name> must be a valid as a C function name.
22#
23# Types should be standard C types. Use void * for pointers because the trace
24# system may not have the necessary headers included.
25#
26# The <format-string> should be a sprintf()-compatible format string.
Stefan Hajnoczicd245a12010-05-22 18:09:25 +0100[diff] [blame]27
28# qemu-malloc.c
Frediano Ziglioa74cd8c2011-08-31 09:25:35 +0200[diff] [blame]29g_malloc(size_t size, void *ptr) "size %zu ptr %p"
30g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
31g_free(void *ptr) "ptr %p"
Stefan Hajnoczicd245a12010-05-22 18:09:25 +0100[diff] [blame]32
33# osdep.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]34qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
35qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
36qemu_vfree(void *ptr) "ptr %p"
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +0100[diff] [blame]37
Stefan Hajnoczi64979a42010-05-24 13:19:21 +0100[diff] [blame]38# hw/virtio.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]39virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
40virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
41virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
42virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
43virtio_irq(void *vq) "vq %p"
44virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
Stefan Hajnoczi4e1837f2011-09-13 13:34:37 +0100[diff] [blame]45virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
Stefan Hajnoczi64979a42010-05-24 13:19:21 +0100[diff] [blame]46
Amit Shah49e3fdd2011-07-05 16:36:39 +0530[diff] [blame]47# hw/virtio-serial-bus.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]48virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
49virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
50virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
51virtio_serial_handle_control_message_port(unsigned int port) "port %u"
Amit Shah49e3fdd2011-07-05 16:36:39 +0530[diff] [blame]52
Amit Shahd02e4fa2011-07-05 16:37:49 +0530[diff] [blame]53# hw/virtio-console.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]54virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
55virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
56virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
Amit Shahd02e4fa2011-07-05 16:37:49 +0530[diff] [blame]57
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +0100[diff] [blame]58# block.c
Stefan Hajnoczi28dcee12011-09-22 20:14:12 +0100[diff] [blame]59bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\""
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]60multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
61bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
62bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
63bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
64bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
65bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
66bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
Markus Armbruster025e8492011-09-06 18:58:47 +0200[diff] [blame]67bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d"
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]68bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
69bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
Stefan Hajnoczi59370aa2011-09-30 17:34:58 +0100[diff] [blame]70bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p"
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +0100[diff] [blame]71
72# hw/virtio-blk.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]73virtio_blk_req_complete(void *req, int status) "req %p status %d"
74virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
75virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +0100[diff] [blame]76
77# posix-aio-compat.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]78paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
79paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
80paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
Prerna Saxenabd3c9aa2010-08-11 17:15:11 +0530[diff] [blame]81
82# ioport.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]83cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
84cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
Prerna Saxena62dd89d2010-08-11 17:16:03 +0530[diff] [blame]85
86# balloon.c
87# Since requests are raised via monitor, not many tracepoints are needed.
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]88balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
Blue Swirld8023f32010-10-20 16:41:28 +0000[diff] [blame]89
90# hw/apic.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]91apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
92apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]93cpu_set_apic_base(uint64_t val) "%016"PRIx64
94cpu_get_apic_base(uint64_t val) "%016"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]95apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
96apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
Blue Swirld8023f32010-10-20 16:41:28 +0000[diff] [blame]97# coalescing
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]98apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
99apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
100apic_set_irq(int apic_irq_delivered) "coalescing %d"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]101
102# hw/cs4231.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]103cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
104cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
105cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
106cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]107
Hervé Poussineaud43ed9e2011-07-18 23:34:21 +0200[diff] [blame]108# hw/ds1225y.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]109nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
110nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
Hervé Poussineaud43ed9e2011-07-18 23:34:21 +0200[diff] [blame]111
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]112# hw/eccmemctl.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]113ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
114ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
115ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
116ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
117ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
118ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
119ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
120ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
121ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
122ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
123ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
124ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
125ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
126ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
127ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
128ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
129ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
130ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]131
132# hw/lance.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]133lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
134lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]135
136# hw/slavio_intctl.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]137slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
138slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
139slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
140slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
141slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
142slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
143slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
144slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
145slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
146slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
147slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
148slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]149
150# hw/slavio_misc.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]151slavio_misc_update_irq_raise(void) "Raise IRQ"
152slavio_misc_update_irq_lower(void) "Lower IRQ"
153slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
154slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
155slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
156slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
157slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
158slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
159slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
160slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
161slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
162slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
163slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
164apc_mem_writeb(uint32_t val) "Write power management %02x"
165apc_mem_readb(uint32_t ret) "Read power management %02x"
166slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
167slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
168slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
169slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]170
171# hw/slavio_timer.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]172slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
173slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]174slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]175slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
176slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]177slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]178slavio_timer_mem_writel_counter_invalid(void) "not user timer"
179slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
180slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
181slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
182slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
183slavio_timer_mem_writel_mode_invalid(void) "not system timer"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]184slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]185
186# hw/sparc32_dma.c
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]187ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
188ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]189sparc32_dma_set_irq_raise(void) "Raise IRQ"
190sparc32_dma_set_irq_lower(void) "Lower IRQ"
191espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
192espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
193sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
194sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
195sparc32_dma_enable_raise(void) "Raise DMA enable"
196sparc32_dma_enable_lower(void) "Lower DMA enable"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]197
198# hw/sun4m.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]199sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
200sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
201sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
202sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
Blue Swirl97bf4852010-10-31 09:24:14 +0000[diff] [blame]203
204# hw/sun4m_iommu.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]205sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
206sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]207sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]208sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
209sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
210sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
211sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]212sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
Stefan Hajnoczi94b0b5f2010-11-16 12:20:25 +0000[diff] [blame]213
Gerd Hoffmann891fb2c2011-09-01 13:56:37 +0200[diff] [blame]214# hw/usb-bus.c
215usb_port_claim(int bus, const char *port) "bus %d, port %s"
216usb_port_attach(int bus, const char *port) "bus %d, port %s"
217usb_port_detach(int bus, const char *port) "bus %d, port %s"
218usb_port_release(int bus, const char *port) "bus %d, port %s"
219
Gerd Hoffmann439a97c2011-05-18 10:12:58 +0200[diff] [blame]220# hw/usb-ehci.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]221usb_ehci_reset(void) "=== RESET ==="
222usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
223usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
224usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
225usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
226usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
227usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
228usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
229usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
230usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
231usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
232usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
233usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
Gerd Hoffmann2fe80192011-08-26 14:13:48 +0200[diff] [blame]234usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]235usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
236usb_ehci_port_detach(uint32_t port) "detach port #%d"
237usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
238usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
239usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
Gerd Hoffmann439a97c2011-05-18 10:12:58 +0200[diff] [blame]240
Gerd Hoffmann37fb59d2010-11-17 11:03:53 +0100[diff] [blame]241# hw/usb-desc.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]242usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
243usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
244usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
245usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
246usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
247usb_set_addr(int addr) "dev %d"
248usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
249usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
250usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
Gerd Hoffmann37fb59d2010-11-17 11:03:53 +0100[diff] [blame]251
Gerd Hoffmanne6a2f502011-08-22 14:13:20 +0200[diff] [blame]252# usb-linux.c
253usb_host_open_started(int bus, int addr) "dev %d:%d"
254usb_host_open_success(int bus, int addr) "dev %d:%d"
255usb_host_open_failure(int bus, int addr) "dev %d:%d"
256usb_host_disconnect(int bus, int addr) "dev %d:%d"
257usb_host_close(int bus, int addr) "dev %d:%d"
258usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
259usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
260usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
261usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d"
262usb_host_release_interfaces(int bus, int addr) "dev %d:%d"
263usb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d"
264usb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d"
265usb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d"
266usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d"
267usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d"
268usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
269usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
270usb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d"
271usb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d"
272usb_host_reset(int bus, int addr) "dev %d:%d"
273usb_host_auto_scan_enabled(void)
274usb_host_auto_scan_disabled(void)
Gerd Hoffmann9516bb42011-08-24 13:34:17 +0200[diff] [blame]275usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d"
Gerd Hoffmanne6a2f502011-08-22 14:13:20 +0200[diff] [blame]276
Paolo Bonzini5138efe2011-04-15 11:51:13 +0200[diff] [blame]277# hw/scsi-bus.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]278scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
279scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
280scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
281scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
282scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]283scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]284scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
285scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
286scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
287scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
288scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
289scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
Paolo Bonzini5138efe2011-04-15 11:51:13 +0200[diff] [blame]290
Stefan Hajnoczi94b0b5f2010-11-16 12:20:25 +0000[diff] [blame]291# vl.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]292vm_state_notify(int running, int reason) "running %d reason %d"
Stefan Hajnoczi298800c2010-12-06 16:08:01 +0000[diff] [blame]293
294# block/qed-l2-cache.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]295qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
296qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
297qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
Stefan Hajnoczi298800c2010-12-06 16:08:01 +0000[diff] [blame]298
299# block/qed-table.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]300qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
301qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
302qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
303qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
Stefan Hajnoczieabba582010-12-06 16:08:02 +0000[diff] [blame]304
305# block/qed.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]306qed_need_check_timer_cb(void *s) "s %p"
307qed_start_need_check_timer(void *s) "s %p"
308qed_cancel_need_check_timer(void *s) "s %p"
309qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
310qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]311qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]312qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
313qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]314qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
315qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]316qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
Fabien Chouteau0f3a4a02011-01-24 12:56:52 +0100[diff] [blame]317
Hervé Poussineaub213b372011-08-26 21:20:11 +0200[diff] [blame]318# hw/g364fb.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]319g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
320g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
Hervé Poussineaub213b372011-08-26 21:20:11 +0200[diff] [blame]321
Fabien Chouteau0f3a4a02011-01-24 12:56:52 +0100[diff] [blame]322# hw/grlib_gptimer.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]323grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
324grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
325grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
326grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
327grlib_gptimer_hit(int id) "timer:%d HIT"
328grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
329grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
Fabien Chouteau3f10bcb2011-01-24 12:56:53 +0100[diff] [blame]330
331# hw/grlib_irqmp.c
Stefan Hajnoczi2f4a7252011-09-13 13:34:34 +0100[diff] [blame]332grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]333grlib_irqmp_ack(int intno) "interrupt:%d"
334grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]335grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]336grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
Fabien Chouteau8b1e1322011-01-24 12:56:54 +0100[diff] [blame]337
338# hw/grlib_apbuart.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]339grlib_apbuart_event(int event) "event:%d"
340grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
Fabien Chouteaub04d9892011-01-24 12:56:55 +0100[diff] [blame]341
342# hw/leon3.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]343leon3_set_irq(int intno) "Set CPU IRQ %d"
344leon3_reset_irq(int intno) "Reset CPU IRQ %d"
Anthony Liguori9363ee32011-02-01 15:22:48 -0600[diff] [blame]345
Alon Levycbcc6332011-01-19 10:49:50 +0200[diff] [blame]346# spice-qemu-char.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]347spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
348spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
349spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
350spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
Michael Walle4ef66fa2011-02-17 23:45:07 +0100[diff] [blame]351
352# hw/lm32_pic.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]353lm32_pic_raise_irq(void) "Raise CPU interrupt"
354lm32_pic_lower_irq(void) "Lower CPU interrupt"
355lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
356lm32_pic_set_im(uint32_t im) "im 0x%08x"
357lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
358lm32_pic_get_im(uint32_t im) "im 0x%08x"
359lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
Michael Walle15d7dc42011-02-17 23:45:08 +0100[diff] [blame]360
361# hw/lm32_juart.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]362lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
363lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
364lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
365lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
Michael Walleea7924d2011-02-17 23:45:10 +0100[diff] [blame]366
367# hw/lm32_timer.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]368lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
369lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
370lm32_timer_hit(void) "timer hit"
371lm32_timer_irq_state(int level) "irq state %d"
Michael Walle770ae572011-02-17 23:45:11 +0100[diff] [blame]372
373# hw/lm32_uart.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]374lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
375lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
376lm32_uart_irq_state(int level) "irq state %d"
Michael Wallef19410c2011-02-17 23:45:12 +0100[diff] [blame]377
378# hw/lm32_sys.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]379lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
Michael Walle25a8bb92011-03-07 23:32:32 +0100[diff] [blame]380
381# hw/milkymist-ac97.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]382milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
383milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
384milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
385milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
386milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
387milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
388milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
389milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
390milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
391milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
Michael Wallee4dc6d22011-03-07 23:32:33 +0100[diff] [blame]392
393# hw/milkymist-hpdmc.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]394milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
395milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
Michael Walleb4e37d92011-03-07 23:32:34 +0100[diff] [blame]396
397# hw/milkymist-memcard.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]398milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
399milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
Michael Walle07424542011-03-07 23:32:35 +0100[diff] [blame]400
Michael Walle57aa2652011-04-13 00:29:36 +0200[diff] [blame]401# hw/milkymist-minimac2.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]402milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
403milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
404milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
405milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
406milkymist_minimac2_tx_frame(uint32_t length) "length %u"
407milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
408milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
409milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
410milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
411milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
412milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
Michael Walle5ee18b92011-03-07 23:32:36 +0100[diff] [blame]413
414# hw/milkymist-pfpu.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]415milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
416milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
417milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
418milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
Michael Walle87a381e2011-03-07 23:32:37 +0100[diff] [blame]419
420# hw/milkymist-softusb.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]421milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
422milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
423milkymist_softusb_mevt(uint8_t m) "m %d"
424milkymist_softusb_kevt(uint8_t m) "m %d"
425milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
426milkymist_softusb_pulse_irq(void) "Pulse IRQ"
Michael Walle96832422011-03-07 23:32:38 +0100[diff] [blame]427
428# hw/milkymist-sysctl.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]429milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
430milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
431milkymist_sysctl_icap_write(uint32_t value) "value %08x"
432milkymist_sysctl_start_timer0(void) "Start timer0"
433milkymist_sysctl_stop_timer0(void) "Stop timer0"
434milkymist_sysctl_start_timer1(void) "Start timer1"
435milkymist_sysctl_stop_timer1(void) "Stop timer1"
436milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
437milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
Michael Walle0670dad2011-03-07 23:32:40 +0100[diff] [blame]438
439# hw/milkymist-tmu2.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]440milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
441milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
442milkymist_tmu2_start(void) "Start TMU"
443milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
Michael Walle883de162011-03-07 23:32:41 +0100[diff] [blame]444
445# hw/milkymist-uart.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]446milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
447milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
Michael Wallefcfa3392011-08-11 00:13:23 +0200[diff] [blame]448milkymist_uart_raise_irq(void) "Raise IRQ"
449milkymist_uart_lower_irq(void) "Lower IRQ"
Michael Walled23948b2011-03-07 23:32:42 +0100[diff] [blame]450
451# hw/milkymist-vgafb.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]452milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
453milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
Jun Nakajima432d2682010-08-31 16:41:25 +0100[diff] [blame]454
Hervé Poussineau83818f72011-09-04 22:29:27 +0200[diff] [blame]455# hw/mipsnet.c
456mipsnet_send(uint32_t size) "sending len=%u"
457mipsnet_receive(uint32_t size) "receiving len=%u"
458mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
Paolo Bonzini903ec8e2011-09-13 17:47:52 +0200[diff] [blame]459mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
Hervé Poussineau83818f72011-09-04 22:29:27 +0200[diff] [blame]460mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
461
Jun Nakajima432d2682010-08-31 16:41:25 +0100[diff] [blame]462# xen-all.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]463xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
464xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
Jun Nakajima432d2682010-08-31 16:41:25 +0100[diff] [blame]465
466# xen-mapcache.c
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]467xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
468xen_remap_bucket(uint64_t index) "index %#"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]469xen_map_cache_return(void* ptr) "%p"
Stefan Hajnoczi689d7e22011-09-13 13:34:36 +0100[diff] [blame]470xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]471xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
Anthony PERARD050a0dd2010-09-16 13:57:49 +0100[diff] [blame]472
473# exec.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]474qemu_put_ram_ptr(void* addr) "%p"
Steven Smith01195b72011-06-16 17:05:17 +0100[diff] [blame]475
476# hw/xen_platform.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]477xen_platform_log(char *s) "xen platform: %s"
Kevin Wolf00dccaf2011-01-17 16:08:14 +0000[diff] [blame]478
479# qemu-coroutine.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]480qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
481qemu_coroutine_yield(void *from, void *to) "from %p to %p"
482qemu_coroutine_terminate(void *co) "self %p"
Kevin Wolfb96e9242011-06-30 17:56:46 +0200[diff] [blame]483
484# qemu-coroutine-lock.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]485qemu_co_queue_next_bh(void) ""
486qemu_co_queue_next(void *next) "next %p"
487qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
488qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
489qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
490qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
Blue Swirl30c2f232011-08-07 11:01:05 +0000[diff] [blame]491
492# hw/escc.c
Lluís47f08d72011-08-31 20:31:58 +0200[diff] [blame]493escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
494escc_get_queue(char channel, int val) "channel %c get 0x%02x"
495escc_update_irq(int irq) "IRQ = %d"
496escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
497escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
498escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
499escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
500escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
501escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
502escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
503escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
504escc_kbd_command(int val) "Command %d"
505escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
Blue Swirlbf4b9882011-09-11 15:54:18 +0000[diff] [blame]506
507# hw/esp.c
508esp_raise_irq(void) "Raise IRQ"
509esp_lower_irq(void) "Lower IRQ"
510esp_dma_enable(void) "Raise enable"
511esp_dma_disable(void) "Lower enable"
512esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
513esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
514esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
515esp_write_response(uint32_t status) "Transfer status (status=%d)"
516esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
517esp_command_complete(void) "SCSI Command complete"
518esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
519esp_command_complete_fail(void) "Command failed"
520esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
521esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
522esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
523esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
524esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
525esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
526esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
527esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
528esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
529esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
530esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
531esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
532esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
533esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
534esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
535esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
536esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
Stefan Hajnoczi89bd8202011-09-23 08:23:06 +0100[diff] [blame]537
538# monitor.c
539handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
540monitor_protocol_emitter(void *mon) "mon %p"
Max Filippov342407f2011-10-16 02:56:45 +0400[diff] [blame]541
542# hw/opencores_eth.c
543open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
544open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
545open_eth_update_irq(uint32_t v) "IRQ <- %x"
546open_eth_receive(unsigned len) "RX: len: %u"
547open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
548open_eth_receive_reject(void) "RX: rejected"
549open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
550open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
551open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
552open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
553open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
554open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
Anthony Liguori1f99b942011-10-20 08:42:08 -0500[diff] [blame]555
Harsh Prateek Borac572f232011-10-12 19:11:25 +0530[diff] [blame]556# hw/9pfs/virtio-9p.c
557complete_pdu(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
558v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
559v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
Stefan Weilc76eaf12011-10-20 21:55:58 +0200[diff] [blame^]560v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
Harsh Prateek Borac572f232011-10-12 19:11:25 +0530[diff] [blame]561v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64""
562v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
563v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
564v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64""
565v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
566v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
567v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
568v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
569v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
570v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
571v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
572v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
573v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
574v9fs_read(uint16_t tag, uint8_t id, int32_t fid, int64_t off, int32_t max_count) "tag %d id %d fid %d off %"PRId64" max_count %d"
575v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
576v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, int64_t offset, int32_t max_count) "tag %d id %d fid %d offset %"PRId64" max_count %d"
577v9fs_readdir_return(uint16_t tag, uint8_t id, int32_t count, ssize_t retval) "tag %d id %d count %d retval %zd"
578v9fs_write(uint16_t tag, uint8_t id, int32_t fid, int64_t off, int32_t count, int cnt) "tag %d id %d fid %d off %"PRId64" count %d cnt %d"
579v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
580v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
581v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
582v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
583v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
584v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
585v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
586v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
Stefan Weilc76eaf12011-10-20 21:55:58 +0200[diff] [blame^]587v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
Harsh Prateek Borac572f232011-10-12 19:11:25 +0530[diff] [blame]588v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
589v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
590v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
591v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
592v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
593v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
Stefan Weilc76eaf12011-10-20 21:55:58 +0200[diff] [blame^]594v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
595v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
Harsh Prateek Borac572f232011-10-12 19:11:25 +0530[diff] [blame]596v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
597v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64""
598v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
599v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
600v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"