Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 1 | /* |
Guan Xuetao | 4f23a1e | 2012-08-10 14:42:21 +0800 | [diff] [blame] | 2 | * Copyright (C) 2010-2012 Guan Xuetao |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
Andreas Färber | c3a8baa | 2012-03-15 15:02:14 +0100 | [diff] [blame] | 7 | * |
| 8 | * Contributions from 2012-04-01 on are considered under GPL version 2, |
| 9 | * or (at your option) any later version. |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 10 | */ |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 11 | |
| 12 | #include "cpu.h" |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 13 | #include "gdbstub.h" |
| 14 | #include "helper.h" |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 15 | #include "host-utils.h" |
| 16 | |
Guan Xuetao | 527d997 | 2012-08-10 14:42:22 +0800 | [diff] [blame^] | 17 | #undef DEBUG_UC32 |
| 18 | |
| 19 | #ifdef DEBUG_UC32 |
| 20 | #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__) |
| 21 | #else |
| 22 | #define DPRINTF(fmt, ...) do {} while (0) |
| 23 | #endif |
| 24 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 25 | CPUUniCore32State *uc32_cpu_init(const char *cpu_model) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 26 | { |
Andreas Färber | ae0f5e9 | 2012-02-14 01:16:17 +0100 | [diff] [blame] | 27 | UniCore32CPU *cpu; |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 28 | CPUUniCore32State *env; |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 29 | static int inited = 1; |
| 30 | |
Andreas Färber | ae0f5e9 | 2012-02-14 01:16:17 +0100 | [diff] [blame] | 31 | if (object_class_by_name(cpu_model) == NULL) { |
| 32 | return NULL; |
| 33 | } |
| 34 | cpu = UNICORE32_CPU(object_new(cpu_model)); |
| 35 | env = &cpu->env; |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 36 | |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 37 | if (inited) { |
| 38 | inited = 0; |
| 39 | uc32_translate_init(); |
| 40 | } |
| 41 | |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 42 | qemu_init_vcpu(env); |
| 43 | return env; |
| 44 | } |
| 45 | |
| 46 | uint32_t HELPER(clo)(uint32_t x) |
| 47 | { |
| 48 | return clo32(x); |
| 49 | } |
| 50 | |
| 51 | uint32_t HELPER(clz)(uint32_t x) |
| 52 | { |
| 53 | return clz32(x); |
| 54 | } |
| 55 | |
Guan Xuetao | 527d997 | 2012-08-10 14:42:22 +0800 | [diff] [blame^] | 56 | #ifndef CONFIG_USER_ONLY |
| 57 | void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg, |
| 58 | uint32_t cop) |
| 59 | { |
| 60 | /* |
| 61 | * movc pp.nn, rn, #imm9 |
| 62 | * rn: UCOP_REG_D |
| 63 | * nn: UCOP_REG_N |
| 64 | * 1: sys control reg. |
| 65 | * 2: page table base reg. |
| 66 | * 3: data fault status reg. |
| 67 | * 4: insn fault status reg. |
| 68 | * 5: cache op. reg. |
| 69 | * 6: tlb op. reg. |
| 70 | * imm9: split UCOP_IMM10 with bit5 is 0 |
| 71 | */ |
| 72 | switch (creg) { |
| 73 | case 1: |
| 74 | if (cop != 0) { |
| 75 | goto unrecognized; |
| 76 | } |
| 77 | env->cp0.c1_sys = val; |
| 78 | break; |
| 79 | case 2: |
| 80 | if (cop != 0) { |
| 81 | goto unrecognized; |
| 82 | } |
| 83 | env->cp0.c2_base = val; |
| 84 | break; |
| 85 | case 3: |
| 86 | if (cop != 0) { |
| 87 | goto unrecognized; |
| 88 | } |
| 89 | env->cp0.c3_faultstatus = val; |
| 90 | break; |
| 91 | case 4: |
| 92 | if (cop != 0) { |
| 93 | goto unrecognized; |
| 94 | } |
| 95 | env->cp0.c4_faultaddr = val; |
| 96 | break; |
| 97 | case 5: |
| 98 | switch (cop) { |
| 99 | case 28: |
| 100 | DPRINTF("Invalidate Entire I&D cache\n"); |
| 101 | return; |
| 102 | case 20: |
| 103 | DPRINTF("Invalidate Entire Icache\n"); |
| 104 | return; |
| 105 | case 12: |
| 106 | DPRINTF("Invalidate Entire Dcache\n"); |
| 107 | return; |
| 108 | case 10: |
| 109 | DPRINTF("Clean Entire Dcache\n"); |
| 110 | return; |
| 111 | case 14: |
| 112 | DPRINTF("Flush Entire Dcache\n"); |
| 113 | return; |
| 114 | case 13: |
| 115 | DPRINTF("Invalidate Dcache line\n"); |
| 116 | return; |
| 117 | case 11: |
| 118 | DPRINTF("Clean Dcache line\n"); |
| 119 | return; |
| 120 | case 15: |
| 121 | DPRINTF("Flush Dcache line\n"); |
| 122 | return; |
| 123 | } |
| 124 | break; |
| 125 | case 6: |
| 126 | if ((cop <= 6) && (cop >= 2)) { |
| 127 | /* invalid all tlb */ |
| 128 | tlb_flush(env, 1); |
| 129 | return; |
| 130 | } |
| 131 | break; |
| 132 | default: |
| 133 | goto unrecognized; |
| 134 | } |
| 135 | return; |
| 136 | unrecognized: |
| 137 | DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n", |
| 138 | creg, cop); |
| 139 | } |
| 140 | |
| 141 | uint32_t helper_cp0_get(CPUUniCore32State *env, uint32_t creg, uint32_t cop) |
| 142 | { |
| 143 | /* |
| 144 | * movc rd, pp.nn, #imm9 |
| 145 | * rd: UCOP_REG_D |
| 146 | * nn: UCOP_REG_N |
| 147 | * 0: cpuid and cachetype |
| 148 | * 1: sys control reg. |
| 149 | * 2: page table base reg. |
| 150 | * 3: data fault status reg. |
| 151 | * 4: insn fault status reg. |
| 152 | * imm9: split UCOP_IMM10 with bit5 is 0 |
| 153 | */ |
| 154 | switch (creg) { |
| 155 | case 0: |
| 156 | switch (cop) { |
| 157 | case 0: |
| 158 | return env->cp0.c0_cpuid; |
| 159 | case 1: |
| 160 | return env->cp0.c0_cachetype; |
| 161 | } |
| 162 | break; |
| 163 | case 1: |
| 164 | if (cop == 0) { |
| 165 | return env->cp0.c1_sys; |
| 166 | } |
| 167 | break; |
| 168 | case 2: |
| 169 | if (cop == 0) { |
| 170 | return env->cp0.c2_base; |
| 171 | } |
| 172 | break; |
| 173 | case 3: |
| 174 | if (cop == 0) { |
| 175 | return env->cp0.c3_faultstatus; |
| 176 | } |
| 177 | break; |
| 178 | case 4: |
| 179 | if (cop == 0) { |
| 180 | return env->cp0.c4_faultaddr; |
| 181 | } |
| 182 | break; |
| 183 | } |
| 184 | DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n", |
| 185 | creg, cop); |
| 186 | return 0; |
| 187 | } |
| 188 | |
| 189 | void helper_cp1_putc(target_ulong x) |
| 190 | { |
| 191 | /* TODO: curses display should be added here for screen output. */ |
| 192 | DPRINTF("%c", x); |
| 193 | } |
| 194 | #endif |
| 195 | |
Guan Xuetao | 4f23a1e | 2012-08-10 14:42:21 +0800 | [diff] [blame] | 196 | #ifdef CONFIG_USER_ONLY |
| 197 | void switch_mode(CPUUniCore32State *env, int mode) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 198 | { |
Guan Xuetao | 4f23a1e | 2012-08-10 14:42:21 +0800 | [diff] [blame] | 199 | if (mode != ASR_MODE_USER) { |
| 200 | cpu_abort(env, "Tried to switch out of user mode\n"); |
| 201 | } |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 202 | } |
| 203 | |
Guan Xuetao | 4f23a1e | 2012-08-10 14:42:21 +0800 | [diff] [blame] | 204 | void do_interrupt(CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 205 | { |
Guan Xuetao | 4f23a1e | 2012-08-10 14:42:21 +0800 | [diff] [blame] | 206 | cpu_abort(env, "NO interrupt in user mode\n"); |
| 207 | } |
| 208 | |
| 209 | int uc32_cpu_handle_mmu_fault(CPUUniCore32State *env, target_ulong address, |
| 210 | int access_type, int mmu_idx) |
| 211 | { |
| 212 | cpu_abort(env, "NO mmu fault in user mode\n"); |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 213 | return 1; |
| 214 | } |
Guan Xuetao | 4f23a1e | 2012-08-10 14:42:21 +0800 | [diff] [blame] | 215 | #endif |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 216 | |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 217 | /* UniCore-F64 support. We follow the convention used for F64 instrunctions: |
| 218 | Single precition routines have a "s" suffix, double precision a |
| 219 | "d" suffix. */ |
| 220 | |
| 221 | /* Convert host exception flags to f64 form. */ |
| 222 | static inline int ucf64_exceptbits_from_host(int host_bits) |
| 223 | { |
| 224 | int target_bits = 0; |
| 225 | |
| 226 | if (host_bits & float_flag_invalid) { |
| 227 | target_bits |= UCF64_FPSCR_FLAG_INVALID; |
| 228 | } |
| 229 | if (host_bits & float_flag_divbyzero) { |
| 230 | target_bits |= UCF64_FPSCR_FLAG_DIVZERO; |
| 231 | } |
| 232 | if (host_bits & float_flag_overflow) { |
| 233 | target_bits |= UCF64_FPSCR_FLAG_OVERFLOW; |
| 234 | } |
| 235 | if (host_bits & float_flag_underflow) { |
| 236 | target_bits |= UCF64_FPSCR_FLAG_UNDERFLOW; |
| 237 | } |
| 238 | if (host_bits & float_flag_inexact) { |
| 239 | target_bits |= UCF64_FPSCR_FLAG_INEXACT; |
| 240 | } |
| 241 | return target_bits; |
| 242 | } |
| 243 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 244 | uint32_t HELPER(ucf64_get_fpscr)(CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 245 | { |
| 246 | int i; |
| 247 | uint32_t fpscr; |
| 248 | |
| 249 | fpscr = (env->ucf64.xregs[UC32_UCF64_FPSCR] & UCF64_FPSCR_MASK); |
| 250 | i = get_float_exception_flags(&env->ucf64.fp_status); |
| 251 | fpscr |= ucf64_exceptbits_from_host(i); |
| 252 | return fpscr; |
| 253 | } |
| 254 | |
| 255 | /* Convert ucf64 exception flags to target form. */ |
| 256 | static inline int ucf64_exceptbits_to_host(int target_bits) |
| 257 | { |
| 258 | int host_bits = 0; |
| 259 | |
| 260 | if (target_bits & UCF64_FPSCR_FLAG_INVALID) { |
| 261 | host_bits |= float_flag_invalid; |
| 262 | } |
| 263 | if (target_bits & UCF64_FPSCR_FLAG_DIVZERO) { |
| 264 | host_bits |= float_flag_divbyzero; |
| 265 | } |
| 266 | if (target_bits & UCF64_FPSCR_FLAG_OVERFLOW) { |
| 267 | host_bits |= float_flag_overflow; |
| 268 | } |
| 269 | if (target_bits & UCF64_FPSCR_FLAG_UNDERFLOW) { |
| 270 | host_bits |= float_flag_underflow; |
| 271 | } |
| 272 | if (target_bits & UCF64_FPSCR_FLAG_INEXACT) { |
| 273 | host_bits |= float_flag_inexact; |
| 274 | } |
| 275 | return host_bits; |
| 276 | } |
| 277 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 278 | void HELPER(ucf64_set_fpscr)(CPUUniCore32State *env, uint32_t val) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 279 | { |
| 280 | int i; |
| 281 | uint32_t changed; |
| 282 | |
| 283 | changed = env->ucf64.xregs[UC32_UCF64_FPSCR]; |
| 284 | env->ucf64.xregs[UC32_UCF64_FPSCR] = (val & UCF64_FPSCR_MASK); |
| 285 | |
| 286 | changed ^= val; |
| 287 | if (changed & (UCF64_FPSCR_RND_MASK)) { |
| 288 | i = UCF64_FPSCR_RND(val); |
| 289 | switch (i) { |
| 290 | case 0: |
| 291 | i = float_round_nearest_even; |
| 292 | break; |
| 293 | case 1: |
| 294 | i = float_round_to_zero; |
| 295 | break; |
| 296 | case 2: |
| 297 | i = float_round_up; |
| 298 | break; |
| 299 | case 3: |
| 300 | i = float_round_down; |
| 301 | break; |
| 302 | default: /* 100 and 101 not implement */ |
| 303 | cpu_abort(env, "Unsupported UniCore-F64 round mode"); |
| 304 | } |
| 305 | set_float_rounding_mode(i, &env->ucf64.fp_status); |
| 306 | } |
| 307 | |
| 308 | i = ucf64_exceptbits_to_host(UCF64_FPSCR_TRAPEN(val)); |
| 309 | set_float_exception_flags(i, &env->ucf64.fp_status); |
| 310 | } |
| 311 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 312 | float32 HELPER(ucf64_adds)(float32 a, float32 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 313 | { |
| 314 | return float32_add(a, b, &env->ucf64.fp_status); |
| 315 | } |
| 316 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 317 | float64 HELPER(ucf64_addd)(float64 a, float64 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 318 | { |
| 319 | return float64_add(a, b, &env->ucf64.fp_status); |
| 320 | } |
| 321 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 322 | float32 HELPER(ucf64_subs)(float32 a, float32 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 323 | { |
| 324 | return float32_sub(a, b, &env->ucf64.fp_status); |
| 325 | } |
| 326 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 327 | float64 HELPER(ucf64_subd)(float64 a, float64 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 328 | { |
| 329 | return float64_sub(a, b, &env->ucf64.fp_status); |
| 330 | } |
| 331 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 332 | float32 HELPER(ucf64_muls)(float32 a, float32 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 333 | { |
| 334 | return float32_mul(a, b, &env->ucf64.fp_status); |
| 335 | } |
| 336 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 337 | float64 HELPER(ucf64_muld)(float64 a, float64 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 338 | { |
| 339 | return float64_mul(a, b, &env->ucf64.fp_status); |
| 340 | } |
| 341 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 342 | float32 HELPER(ucf64_divs)(float32 a, float32 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 343 | { |
| 344 | return float32_div(a, b, &env->ucf64.fp_status); |
| 345 | } |
| 346 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 347 | float64 HELPER(ucf64_divd)(float64 a, float64 b, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 348 | { |
| 349 | return float64_div(a, b, &env->ucf64.fp_status); |
| 350 | } |
| 351 | |
| 352 | float32 HELPER(ucf64_negs)(float32 a) |
| 353 | { |
| 354 | return float32_chs(a); |
| 355 | } |
| 356 | |
| 357 | float64 HELPER(ucf64_negd)(float64 a) |
| 358 | { |
| 359 | return float64_chs(a); |
| 360 | } |
| 361 | |
| 362 | float32 HELPER(ucf64_abss)(float32 a) |
| 363 | { |
| 364 | return float32_abs(a); |
| 365 | } |
| 366 | |
| 367 | float64 HELPER(ucf64_absd)(float64 a) |
| 368 | { |
| 369 | return float64_abs(a); |
| 370 | } |
| 371 | |
| 372 | /* XXX: check quiet/signaling case */ |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 373 | void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t c, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 374 | { |
| 375 | int flag; |
| 376 | flag = float32_compare_quiet(a, b, &env->ucf64.fp_status); |
| 377 | env->CF = 0; |
| 378 | switch (c & 0x7) { |
| 379 | case 0: /* F */ |
| 380 | break; |
| 381 | case 1: /* UN */ |
| 382 | if (flag == 2) { |
| 383 | env->CF = 1; |
| 384 | } |
| 385 | break; |
| 386 | case 2: /* EQ */ |
| 387 | if (flag == 0) { |
| 388 | env->CF = 1; |
| 389 | } |
| 390 | break; |
| 391 | case 3: /* UEQ */ |
| 392 | if ((flag == 0) || (flag == 2)) { |
| 393 | env->CF = 1; |
| 394 | } |
| 395 | break; |
| 396 | case 4: /* OLT */ |
| 397 | if (flag == -1) { |
| 398 | env->CF = 1; |
| 399 | } |
| 400 | break; |
| 401 | case 5: /* ULT */ |
| 402 | if ((flag == -1) || (flag == 2)) { |
| 403 | env->CF = 1; |
| 404 | } |
| 405 | break; |
| 406 | case 6: /* OLE */ |
| 407 | if ((flag == -1) || (flag == 0)) { |
| 408 | env->CF = 1; |
| 409 | } |
| 410 | break; |
| 411 | case 7: /* ULE */ |
| 412 | if (flag != 1) { |
| 413 | env->CF = 1; |
| 414 | } |
| 415 | break; |
| 416 | } |
| 417 | env->ucf64.xregs[UC32_UCF64_FPSCR] = (env->CF << 29) |
| 418 | | (env->ucf64.xregs[UC32_UCF64_FPSCR] & 0x0fffffff); |
| 419 | } |
| 420 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 421 | void HELPER(ucf64_cmpd)(float64 a, float64 b, uint32_t c, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 422 | { |
| 423 | int flag; |
| 424 | flag = float64_compare_quiet(a, b, &env->ucf64.fp_status); |
| 425 | env->CF = 0; |
| 426 | switch (c & 0x7) { |
| 427 | case 0: /* F */ |
| 428 | break; |
| 429 | case 1: /* UN */ |
| 430 | if (flag == 2) { |
| 431 | env->CF = 1; |
| 432 | } |
| 433 | break; |
| 434 | case 2: /* EQ */ |
| 435 | if (flag == 0) { |
| 436 | env->CF = 1; |
| 437 | } |
| 438 | break; |
| 439 | case 3: /* UEQ */ |
| 440 | if ((flag == 0) || (flag == 2)) { |
| 441 | env->CF = 1; |
| 442 | } |
| 443 | break; |
| 444 | case 4: /* OLT */ |
| 445 | if (flag == -1) { |
| 446 | env->CF = 1; |
| 447 | } |
| 448 | break; |
| 449 | case 5: /* ULT */ |
| 450 | if ((flag == -1) || (flag == 2)) { |
| 451 | env->CF = 1; |
| 452 | } |
| 453 | break; |
| 454 | case 6: /* OLE */ |
| 455 | if ((flag == -1) || (flag == 0)) { |
| 456 | env->CF = 1; |
| 457 | } |
| 458 | break; |
| 459 | case 7: /* ULE */ |
| 460 | if (flag != 1) { |
| 461 | env->CF = 1; |
| 462 | } |
| 463 | break; |
| 464 | } |
| 465 | env->ucf64.xregs[UC32_UCF64_FPSCR] = (env->CF << 29) |
| 466 | | (env->ucf64.xregs[UC32_UCF64_FPSCR] & 0x0fffffff); |
| 467 | } |
| 468 | |
| 469 | /* Helper routines to perform bitwise copies between float and int. */ |
| 470 | static inline float32 ucf64_itos(uint32_t i) |
| 471 | { |
| 472 | union { |
| 473 | uint32_t i; |
| 474 | float32 s; |
| 475 | } v; |
| 476 | |
| 477 | v.i = i; |
| 478 | return v.s; |
| 479 | } |
| 480 | |
| 481 | static inline uint32_t ucf64_stoi(float32 s) |
| 482 | { |
| 483 | union { |
| 484 | uint32_t i; |
| 485 | float32 s; |
| 486 | } v; |
| 487 | |
| 488 | v.s = s; |
| 489 | return v.i; |
| 490 | } |
| 491 | |
| 492 | static inline float64 ucf64_itod(uint64_t i) |
| 493 | { |
| 494 | union { |
| 495 | uint64_t i; |
| 496 | float64 d; |
| 497 | } v; |
| 498 | |
| 499 | v.i = i; |
| 500 | return v.d; |
| 501 | } |
| 502 | |
| 503 | static inline uint64_t ucf64_dtoi(float64 d) |
| 504 | { |
| 505 | union { |
| 506 | uint64_t i; |
| 507 | float64 d; |
| 508 | } v; |
| 509 | |
| 510 | v.d = d; |
| 511 | return v.i; |
| 512 | } |
| 513 | |
| 514 | /* Integer to float conversion. */ |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 515 | float32 HELPER(ucf64_si2sf)(float32 x, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 516 | { |
| 517 | return int32_to_float32(ucf64_stoi(x), &env->ucf64.fp_status); |
| 518 | } |
| 519 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 520 | float64 HELPER(ucf64_si2df)(float32 x, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 521 | { |
| 522 | return int32_to_float64(ucf64_stoi(x), &env->ucf64.fp_status); |
| 523 | } |
| 524 | |
| 525 | /* Float to integer conversion. */ |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 526 | float32 HELPER(ucf64_sf2si)(float32 x, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 527 | { |
| 528 | return ucf64_itos(float32_to_int32(x, &env->ucf64.fp_status)); |
| 529 | } |
| 530 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 531 | float32 HELPER(ucf64_df2si)(float64 x, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 532 | { |
| 533 | return ucf64_itos(float64_to_int32(x, &env->ucf64.fp_status)); |
| 534 | } |
| 535 | |
| 536 | /* floating point conversion */ |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 537 | float64 HELPER(ucf64_sf2df)(float32 x, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 538 | { |
| 539 | return float32_to_float64(x, &env->ucf64.fp_status); |
| 540 | } |
| 541 | |
Andreas Färber | eb23b55 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 542 | float32 HELPER(ucf64_df2sf)(float64 x, CPUUniCore32State *env) |
Guan Xuetao | 6e64da3 | 2011-04-12 16:25:59 +0800 | [diff] [blame] | 543 | { |
| 544 | return float64_to_float32(x, &env->ucf64.fp_status); |
| 545 | } |