bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
aurel32 | fad6cb1 | 2009-01-04 22:05:52 +0000 | [diff] [blame] | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 19 | */ |
| 20 | #if DATA_SIZE == 8 |
| 21 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 22 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 23 | #define DATA_TYPE uint64_t |
| 24 | #elif DATA_SIZE == 4 |
| 25 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 26 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 27 | #define DATA_TYPE uint32_t |
| 28 | #elif DATA_SIZE == 2 |
| 29 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 30 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 31 | #define DATA_TYPE uint16_t |
| 32 | #define DATA_STYPE int16_t |
| 33 | #elif DATA_SIZE == 1 |
| 34 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 35 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 36 | #define DATA_TYPE uint8_t |
| 37 | #define DATA_STYPE int8_t |
| 38 | #else |
| 39 | #error unsupported data size |
| 40 | #endif |
| 41 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 42 | #if ACCESS_TYPE < (NB_MMU_MODES) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 43 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 44 | #define CPU_MMU_INDEX ACCESS_TYPE |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 45 | #define MMUSUFFIX _mmu |
| 46 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 47 | #elif ACCESS_TYPE == (NB_MMU_MODES) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 48 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 49 | #define CPU_MMU_INDEX (cpu_mmu_index(env)) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 50 | #define MMUSUFFIX _mmu |
| 51 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 52 | #elif ACCESS_TYPE == (NB_MMU_MODES + 1) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 53 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 54 | #define CPU_MMU_INDEX (cpu_mmu_index(env)) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 55 | #define MMUSUFFIX _cmmu |
| 56 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 57 | #else |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 58 | #error invalid ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 59 | #endif |
| 60 | |
| 61 | #if DATA_SIZE == 8 |
| 62 | #define RES_TYPE uint64_t |
| 63 | #else |
| 64 | #define RES_TYPE int |
| 65 | #endif |
| 66 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 67 | #if ACCESS_TYPE == (NB_MMU_MODES + 1) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 68 | #define ADDR_READ addr_code |
| 69 | #else |
| 70 | #define ADDR_READ addr_read |
| 71 | #endif |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 72 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 73 | #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 74 | (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 75 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 76 | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 77 | { |
| 78 | int res; |
| 79 | |
| 80 | asm volatile ("movl %1, %%edx\n" |
| 81 | "movl %1, %%eax\n" |
| 82 | "shrl %3, %%edx\n" |
| 83 | "andl %4, %%eax\n" |
| 84 | "andl %2, %%edx\n" |
| 85 | "leal %5(%%edx, %%ebp), %%edx\n" |
| 86 | "cmpl (%%edx), %%eax\n" |
| 87 | "movl %1, %%eax\n" |
| 88 | "je 1f\n" |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 89 | "movl %6, %%edx\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 90 | "call %7\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 91 | "movl %%eax, %0\n" |
| 92 | "jmp 2f\n" |
| 93 | "1:\n" |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 94 | "addl 12(%%edx), %%eax\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 95 | #if DATA_SIZE == 1 |
| 96 | "movzbl (%%eax), %0\n" |
| 97 | #elif DATA_SIZE == 2 |
| 98 | "movzwl (%%eax), %0\n" |
| 99 | #elif DATA_SIZE == 4 |
| 100 | "movl (%%eax), %0\n" |
| 101 | #else |
| 102 | #error unsupported size |
| 103 | #endif |
| 104 | "2:\n" |
| 105 | : "=r" (res) |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 106 | : "r" (ptr), |
| 107 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
| 108 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 109 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 110 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)), |
| 111 | "i" (CPU_MMU_INDEX), |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 112 | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX)) |
| 113 | : "%eax", "%ecx", "%edx", "memory", "cc"); |
| 114 | return res; |
| 115 | } |
| 116 | |
| 117 | #if DATA_SIZE <= 2 |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 118 | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 119 | { |
| 120 | int res; |
| 121 | |
| 122 | asm volatile ("movl %1, %%edx\n" |
| 123 | "movl %1, %%eax\n" |
| 124 | "shrl %3, %%edx\n" |
| 125 | "andl %4, %%eax\n" |
| 126 | "andl %2, %%edx\n" |
| 127 | "leal %5(%%edx, %%ebp), %%edx\n" |
| 128 | "cmpl (%%edx), %%eax\n" |
| 129 | "movl %1, %%eax\n" |
| 130 | "je 1f\n" |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 131 | "movl %6, %%edx\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 132 | "call %7\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 133 | #if DATA_SIZE == 1 |
| 134 | "movsbl %%al, %0\n" |
| 135 | #elif DATA_SIZE == 2 |
| 136 | "movswl %%ax, %0\n" |
| 137 | #else |
| 138 | #error unsupported size |
| 139 | #endif |
| 140 | "jmp 2f\n" |
| 141 | "1:\n" |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 142 | "addl 12(%%edx), %%eax\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 143 | #if DATA_SIZE == 1 |
| 144 | "movsbl (%%eax), %0\n" |
| 145 | #elif DATA_SIZE == 2 |
| 146 | "movswl (%%eax), %0\n" |
| 147 | #else |
| 148 | #error unsupported size |
| 149 | #endif |
| 150 | "2:\n" |
| 151 | : "=r" (res) |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 152 | : "r" (ptr), |
| 153 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
| 154 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 155 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 156 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)), |
| 157 | "i" (CPU_MMU_INDEX), |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 158 | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX)) |
| 159 | : "%eax", "%ecx", "%edx", "memory", "cc"); |
| 160 | return res; |
| 161 | } |
| 162 | #endif |
| 163 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 164 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 165 | { |
| 166 | asm volatile ("movl %0, %%edx\n" |
| 167 | "movl %0, %%eax\n" |
| 168 | "shrl %3, %%edx\n" |
| 169 | "andl %4, %%eax\n" |
| 170 | "andl %2, %%edx\n" |
| 171 | "leal %5(%%edx, %%ebp), %%edx\n" |
| 172 | "cmpl (%%edx), %%eax\n" |
| 173 | "movl %0, %%eax\n" |
| 174 | "je 1f\n" |
| 175 | #if DATA_SIZE == 1 |
| 176 | "movzbl %b1, %%edx\n" |
| 177 | #elif DATA_SIZE == 2 |
| 178 | "movzwl %w1, %%edx\n" |
| 179 | #elif DATA_SIZE == 4 |
| 180 | "movl %1, %%edx\n" |
| 181 | #else |
| 182 | #error unsupported size |
| 183 | #endif |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 184 | "movl %6, %%ecx\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 185 | "call %7\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 186 | "jmp 2f\n" |
| 187 | "1:\n" |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 188 | "addl 8(%%edx), %%eax\n" |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 189 | #if DATA_SIZE == 1 |
| 190 | "movb %b1, (%%eax)\n" |
| 191 | #elif DATA_SIZE == 2 |
| 192 | "movw %w1, (%%eax)\n" |
| 193 | #elif DATA_SIZE == 4 |
| 194 | "movl %1, (%%eax)\n" |
| 195 | #else |
| 196 | #error unsupported size |
| 197 | #endif |
| 198 | "2:\n" |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 199 | : |
| 200 | : "r" (ptr), |
bellard | f220f4e | 2008-01-21 15:07:18 +0000 | [diff] [blame] | 201 | #if DATA_SIZE == 1 |
| 202 | "q" (v), |
| 203 | #else |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 204 | "r" (v), |
bellard | f220f4e | 2008-01-21 15:07:18 +0000 | [diff] [blame] | 205 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 206 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
| 207 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 208 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 209 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)), |
| 210 | "i" (CPU_MMU_INDEX), |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 211 | "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX)) |
| 212 | : "%eax", "%ecx", "%edx", "memory", "cc"); |
| 213 | } |
| 214 | |
| 215 | #else |
| 216 | |
| 217 | /* generic load/store macros */ |
| 218 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 219 | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 220 | { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 221 | int page_index; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 222 | RES_TYPE res; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 223 | target_ulong addr; |
| 224 | unsigned long physaddr; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 225 | int mmu_idx; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 226 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 227 | addr = ptr; |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 228 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 229 | mmu_idx = CPU_MMU_INDEX; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 230 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != |
| 231 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 232 | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 233 | } else { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 234 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 235 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 236 | } |
| 237 | return res; |
| 238 | } |
| 239 | |
| 240 | #if DATA_SIZE <= 2 |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 241 | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 242 | { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 243 | int res, page_index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 244 | target_ulong addr; |
| 245 | unsigned long physaddr; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 246 | int mmu_idx; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 247 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 248 | addr = ptr; |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 249 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 250 | mmu_idx = CPU_MMU_INDEX; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 251 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != |
| 252 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 253 | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 254 | } else { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 255 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 256 | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); |
| 257 | } |
| 258 | return res; |
| 259 | } |
| 260 | #endif |
| 261 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 262 | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 263 | |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 264 | /* generic store macro */ |
| 265 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 266 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 267 | { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 268 | int page_index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 269 | target_ulong addr; |
| 270 | unsigned long physaddr; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 271 | int mmu_idx; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 272 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 273 | addr = ptr; |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 274 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 275 | mmu_idx = CPU_MMU_INDEX; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 276 | if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != |
| 277 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 278 | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 279 | } else { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 280 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 281 | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); |
| 282 | } |
| 283 | } |
| 284 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 285 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 286 | |
| 287 | #endif /* !asm */ |
| 288 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 289 | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 290 | |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 291 | #if DATA_SIZE == 8 |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 292 | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 293 | { |
| 294 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 295 | float64 d; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 296 | uint64_t i; |
| 297 | } u; |
| 298 | u.i = glue(ldq, MEMSUFFIX)(ptr); |
| 299 | return u.d; |
| 300 | } |
| 301 | |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 302 | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 303 | { |
| 304 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 305 | float64 d; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 306 | uint64_t i; |
| 307 | } u; |
| 308 | u.d = v; |
| 309 | glue(stq, MEMSUFFIX)(ptr, u.i); |
| 310 | } |
| 311 | #endif /* DATA_SIZE == 8 */ |
| 312 | |
| 313 | #if DATA_SIZE == 4 |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 314 | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 315 | { |
| 316 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 317 | float32 f; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 318 | uint32_t i; |
| 319 | } u; |
| 320 | u.i = glue(ldl, MEMSUFFIX)(ptr); |
| 321 | return u.f; |
| 322 | } |
| 323 | |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 324 | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 325 | { |
| 326 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 327 | float32 f; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 328 | uint32_t i; |
| 329 | } u; |
| 330 | u.f = v; |
| 331 | glue(stl, MEMSUFFIX)(ptr, u.i); |
| 332 | } |
| 333 | #endif /* DATA_SIZE == 4 */ |
| 334 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 335 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 336 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 337 | #undef RES_TYPE |
| 338 | #undef DATA_TYPE |
| 339 | #undef DATA_STYPE |
| 340 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 341 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 342 | #undef DATA_SIZE |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 343 | #undef CPU_MMU_INDEX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 344 | #undef MMUSUFFIX |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 345 | #undef ADDR_READ |