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Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public
4 * License v2 as published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
9 * General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public
12 * License along with this program; if not, write to the
13 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
14 * Boston, MA 021110-1307, USA.
15 */
16
17#include <asm-generic/int-ll64.h>
18#include <linux/mmc/ioctl.h>
19#include <linux/major.h>
20#include <stdio.h>
21
22#define CHECK(expr, msg, err_stmt) { if (expr) { fprintf(stderr, msg); err_stmt; } }
23
24/* From kernel linux/mmc/mmc.h */
25#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
26#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
27#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
28
29/*
30 * EXT_CSD fields
31 */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010032#define EXT_CSD_S_CMD_SET 504
33#define EXT_CSD_HPI_FEATURE 503
34#define EXT_CSD_BOOT_INFO 228 /* R/W */
35#define EXT_CSD_PART_SWITCH_TIME 199
36#define EXT_CSD_BOOT_CFG 179
37#define EXT_CSD_BOOT_WP 173
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +020038#define EXT_CSD_PART_CONFIG 179
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050039
40/*
41 * EXT_CSD field definitions
42 */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010043#define EXT_CSD_HPI_SUPP (1<<0)
44#define EXT_CSD_HPI_IMPL (1<<1)
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050045#define EXT_CSD_CMD_SET_NORMAL (1<<0)
46#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
47#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
48#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
49#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010050#define EXT_CSD_BOOT_INFO_HS_MODE (1<<2)
51#define EXT_CSD_BOOT_INFO_DDR_DDR (1<<1)
52#define EXT_CSD_BOOT_INFO_ALT (1<<0)
53#define EXT_CSD_BOOT_CFG_ACK (1<<6)
54#define EXT_CSD_BOOT_CFG_EN (0x38)
55#define EXT_CSD_BOOT_CFG_ACC (0x03)
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +020056#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
57#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
58#define EXT_CSD_PART_CONFIG_ACC_BOOT1 (0x2)
59#define EXT_CSD_PART_CONFIG_ACC_USER_AREA (0x7)
60#define EXT_CSD_PART_CONFIG_ACC_ACK (0x40)
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050061
62/* From kernel linux/mmc/core.h */
63#define MMC_RSP_PRESENT (1 << 0)
64#define MMC_RSP_136 (1 << 1) /* 136 bit response */
65#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
66#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
67#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
68
69#define MMC_CMD_AC (0 << 5)
70#define MMC_CMD_ADTC (1 << 5)
71
72#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
73#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
74
75#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
76#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
77
78#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
79#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)