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Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * memory fill offload engine support
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/async_tx.h>
31
32/**
33 * async_memset - attempt to fill memory with a dma engine.
34 * @dest: destination page
35 * @val: fill value
36 * @offset: offset in pages to start transaction
37 * @len: length in bytes
Dan Williamsa08abd82009-06-03 11:43:59 -070038 *
39 * honored flags: ASYNC_TX_ACK
Dan Williams9bc89cd2007-01-02 11:10:44 -070040 */
41struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -070042async_memset(struct page *dest, int val, unsigned int offset, size_t len,
43 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -070044{
Dan Williamsa08abd82009-06-03 11:43:59 -070045 struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMSET,
Dan Williams47437b22008-02-02 19:49:59 -070046 &dest, 1, NULL, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -070047 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams00367312008-02-02 19:49:57 -070048 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -070049
Dan Williams83544ae2009-09-08 17:42:53 -070050 if (device && is_dma_fill_aligned(device, offset, 0, len)) {
Dan Williams00367312008-02-02 19:49:57 -070051 dma_addr_t dma_dest;
Dan Williams0403e382009-09-08 17:42:50 -070052 unsigned long dma_prep_flags = 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070053
Dan Williams0403e382009-09-08 17:42:50 -070054 if (submit->cb_fn)
55 dma_prep_flags |= DMA_PREP_INTERRUPT;
56 if (submit->flags & ASYNC_TX_FENCE)
57 dma_prep_flags |= DMA_PREP_FENCE;
Dan Williams00367312008-02-02 19:49:57 -070058 dma_dest = dma_map_page(device->dev, dest, offset, len,
Dan Williamsd909b342008-02-02 19:30:14 -070059 DMA_FROM_DEVICE);
Dan Williams9bc89cd2007-01-02 11:10:44 -070060
Dan Williams00367312008-02-02 19:49:57 -070061 tx = device->device_prep_dma_memset(chan, dma_dest, val, len,
Dan Williamsd4c56f92008-02-02 19:49:58 -070062 dma_prep_flags);
Dan Williams00367312008-02-02 19:49:57 -070063 }
64
65 if (tx) {
Dan Williams3280ab3e2008-03-13 17:45:28 -070066 pr_debug("%s: (async) len: %zu\n", __func__, len);
Dan Williamsa08abd82009-06-03 11:43:59 -070067 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -070068 } else { /* run the memset synchronously */
69 void *dest_buf;
Dan Williams3280ab3e2008-03-13 17:45:28 -070070 pr_debug("%s: (sync) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -070071
Dan Williamsa08abd82009-06-03 11:43:59 -070072 dest_buf = page_address(dest) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -070073
74 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -070075 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -070076
77 memset(dest_buf, val, len);
78
Dan Williamsa08abd82009-06-03 11:43:59 -070079 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -070080 }
81
82 return tx;
83}
84EXPORT_SYMBOL_GPL(async_memset);
85
Dan Williams9bc89cd2007-01-02 11:10:44 -070086MODULE_AUTHOR("Intel Corporation");
87MODULE_DESCRIPTION("asynchronous memset api");
88MODULE_LICENSE("GPL");