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Andy Shevchenko4b45efe2015-07-27 18:04:03 +03001/*
2 * Intel LPSS PCI support.
3 *
4 * Copyright (C) 2015, Intel Corporation
5 *
6 * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 * Mika Westerberg <mika.westerberg@linux.intel.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/ioport.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/pm.h>
19#include <linux/pm_runtime.h>
20
21#include "intel-lpss.h"
22
23static int intel_lpss_pci_probe(struct pci_dev *pdev,
24 const struct pci_device_id *id)
25{
26 struct intel_lpss_platform_info *info;
27 int ret;
28
29 ret = pcim_enable_device(pdev);
30 if (ret)
31 return ret;
32
33 info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
34 GFP_KERNEL);
35 if (!info)
36 return -ENOMEM;
37
38 info->mem = &pdev->resource[0];
39 info->irq = pdev->irq;
40
41 /* Probably it is enough to set this for iDMA capable devices only */
42 pci_set_master(pdev);
43
44 ret = intel_lpss_probe(&pdev->dev, info);
45 if (ret)
46 return ret;
47
48 pm_runtime_put(&pdev->dev);
49 pm_runtime_allow(&pdev->dev);
50
51 return 0;
52}
53
54static void intel_lpss_pci_remove(struct pci_dev *pdev)
55{
56 pm_runtime_forbid(&pdev->dev);
57 pm_runtime_get_sync(&pdev->dev);
58
59 intel_lpss_remove(&pdev->dev);
60}
61
62static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
63
64static const struct intel_lpss_platform_info spt_info = {
65 .clk_rate = 120000000,
66};
67
68static const struct intel_lpss_platform_info spt_uart_info = {
69 .clk_rate = 120000000,
70 .clk_con_id = "baudclk",
71};
72
Andy Shevchenkoff0a04a2015-10-21 12:41:48 +030073static const struct intel_lpss_platform_info bxt_info = {
74 .clk_rate = 100000000,
75};
76
77static const struct intel_lpss_platform_info bxt_uart_info = {
78 .clk_rate = 100000000,
79 .clk_con_id = "baudclk",
80};
81
82static const struct intel_lpss_platform_info bxt_i2c_info = {
83 .clk_rate = 133000000,
84};
85
Andy Shevchenko4b45efe2015-07-27 18:04:03 +030086static const struct pci_device_id intel_lpss_pci_ids[] = {
Andy Shevchenkoff0a04a2015-10-21 12:41:48 +030087 /* BXT */
88 { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
89 { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
90 { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
91 { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
92 { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
93 { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
94 { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
95 { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
96 { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
97 { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
98 { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
99 { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
100 { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
101 { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
102 { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
103 /* APL */
104 { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info },
105 { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info },
106 { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&bxt_i2c_info },
107 { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&bxt_i2c_info },
108 { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&bxt_i2c_info },
109 { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&bxt_i2c_info },
110 { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&bxt_i2c_info },
111 { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&bxt_i2c_info },
112 { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
113 { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
114 { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
115 { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
116 { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
117 { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
118 { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
Andy Shevchenko4b45efe2015-07-27 18:04:03 +0300119 /* SPT-LP */
120 { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
121 { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
122 { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
123 { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
124 { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_info },
125 { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_info },
126 { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_info },
127 { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_info },
128 { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_info },
129 { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_info },
130 { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
131 /* SPT-H */
132 { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
133 { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
134 { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
135 { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
136 { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_info },
137 { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_info },
138 { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
139 { }
140};
141MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
142
143static struct pci_driver intel_lpss_pci_driver = {
144 .name = "intel-lpss",
145 .id_table = intel_lpss_pci_ids,
146 .probe = intel_lpss_pci_probe,
147 .remove = intel_lpss_pci_remove,
148 .driver = {
149 .pm = &intel_lpss_pci_pm_ops,
150 },
151};
152
153module_pci_driver(intel_lpss_pci_driver);
154
155MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
156MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
157MODULE_DESCRIPTION("Intel LPSS PCI driver");
158MODULE_LICENSE("GPL v2");