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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
Will Deaconfdb1d7b2014-11-14 17:16:49 +000016menu "Generic IOMMU Pagetable Support"
17
18# Selected by the actual pagetable implementations
19config IOMMU_IO_PGTABLE
20 bool
21
22endmenu
23
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030024config OF_IOMMU
25 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010026 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030027
Varun Sethi695093e2013-07-15 10:20:57 +053028config FSL_PAMU
29 bool "Freescale IOMMU support"
30 depends on PPC_E500MC
31 select IOMMU_API
32 select GENERIC_ALLOCATOR
33 help
34 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
35 PAMU can authorize memory access, remap the memory address, and remap I/O
36 transaction types.
37
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030038# MSM IOMMU support
39config MSM_IOMMU
40 bool "MSM IOMMU Support"
41 depends on ARCH_MSM8X60 || ARCH_MSM8960
42 select IOMMU_API
43 help
44 Support for the IOMMUs found on certain Qualcomm SOCs.
45 These IOMMUs allow virtualization of the address space used by most
46 cores within the multimedia subsystem.
47
48 If unsure, say N here.
49
50config IOMMU_PGTABLES_L2
51 def_bool y
52 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030053
54# AMD IOMMU support
55config AMD_IOMMU
56 bool "AMD IOMMU support"
57 select SWIOTLB
58 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010059 select PCI_ATS
60 select PCI_PRI
61 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030062 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020063 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030064 ---help---
65 With this option you can enable support for AMD IOMMU hardware in
66 your system. An IOMMU is a hardware component which provides
67 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090068 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030069 system from misbehaving device drivers or hardware.
70
71 You can find out if your system has an AMD IOMMU if you look into
72 your BIOS for an option to enable it or if you have an IVRS ACPI
73 table.
74
75config AMD_IOMMU_STATS
76 bool "Export AMD IOMMU statistics to debugfs"
77 depends on AMD_IOMMU
78 select DEBUG_FS
79 ---help---
80 This option enables code in the AMD IOMMU driver to collect various
81 statistics about whats happening in the driver and exports that
82 information to userspace via debugfs.
83 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030084
Joerg Roedele3c495c2011-11-09 12:31:15 +010085config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -080086 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +020087 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +010088 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +010089 ---help---
90 This option enables support for the AMD IOMMUv2 features of the IOMMU
91 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +090092 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +010093
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030094# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -070095config DMAR_TABLE
96 bool
97
98config INTEL_IOMMU
99 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300100 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
101 select IOMMU_API
Suresh Siddhad3f13812011-08-23 17:05:25 -0700102 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300103 help
104 DMA remapping (DMAR) devices support enables independent address
105 translations for Direct Memory Access (DMA) from devices.
106 These DMA remapping devices are reported via ACPI tables
107 and include PCI device scope covered by these DMA
108 remapping devices.
109
Suresh Siddhad3f13812011-08-23 17:05:25 -0700110config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300111 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700112 prompt "Enable Intel DMA Remapping Devices by default"
113 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300114 help
115 Selecting this option will enable a DMAR device at boot time if
116 one is found. If this option is not selected, DMAR support can
117 be enabled by passing intel_iommu=on to the kernel.
118
Suresh Siddhad3f13812011-08-23 17:05:25 -0700119config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300120 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700121 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300122 ---help---
123 Current Graphics drivers tend to use physical address
124 for DMA and avoid using DMA APIs. Setting this config
125 option permits the IOMMU driver to set a unity map for
126 all the OS-visible memory. Hence the driver can continue
127 to use physical addresses for DMA, at least until this
128 option is removed in the 2.6.32 kernel.
129
Suresh Siddhad3f13812011-08-23 17:05:25 -0700130config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300131 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700132 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300133 ---help---
134 Floppy disk drivers are known to bypass DMA API calls
135 thereby failing to work when IOMMU is enabled. This
136 workaround will setup a 1:1 mapping for the first
137 16MiB to make floppy (an ISA device) work.
138
Suresh Siddhad3f13812011-08-23 17:05:25 -0700139config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800140 bool "Support for Interrupt Remapping"
141 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700142 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300143 ---help---
144 Supports Interrupt remapping for IO-APIC and MSI devices.
145 To use x2apic mode in the CPU's which support x2APIC enhancements or
146 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200147
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300148# OMAP IOMMU support
149config OMAP_IOMMU
150 bool "OMAP IOMMU Support"
Arnd Bergmannae191582013-03-05 23:16:48 +0100151 depends on ARCH_OMAP2PLUS
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300152 select IOMMU_API
153
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300154config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500155 bool "Export OMAP IOMMU internals in DebugFS"
156 depends on OMAP_IOMMU && DEBUG_FS
157 ---help---
158 Select this to see extensive information about
159 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300160
Suman Anna61c75352014-10-22 17:22:30 -0500161 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300162
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800163config ROCKCHIP_IOMMU
164 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100165 depends on ARM
166 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800167 select IOMMU_API
168 select ARM_DMA_USE_IOMMU
169 help
170 Support for IOMMUs found on Rockchip rk32xx SOCs.
171 These IOMMUs allow virtualization of the address space used by most
172 cores within the multimedia subsystem.
173 Say Y here if you are using a Rockchip SoC that includes an IOMMU
174 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300175
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200176config TEGRA_IOMMU_GART
177 bool "Tegra GART IOMMU Support"
178 depends on ARCH_TEGRA_2x_SOC
179 select IOMMU_API
180 help
181 Enables support for remapping discontiguous physical memory
182 shared with the operating system into contiguous I/O virtual
183 space through the GART (Graphics Address Relocation Table)
184 hardware included on Tegra SoCs.
185
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200186config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200187 bool "NVIDIA Tegra SMMU Support"
188 depends on ARCH_TEGRA
189 depends on TEGRA_AHB
190 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200191 select IOMMU_API
192 help
Thierry Reding89184652014-04-16 09:24:44 +0200193 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
194 SoCs (Tegra30 up to Tegra124).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200195
KyongHo Cho2a965362012-05-12 05:56:09 +0900196config EXYNOS_IOMMU
197 bool "Exynos IOMMU Support"
Mark Brown20911ce2014-12-15 15:54:42 +0000198 depends on ARCH_EXYNOS && ARM
KyongHo Cho2a965362012-05-12 05:56:09 +0900199 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530200 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900201 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530202 Support for the IOMMU (System MMU) of Samsung Exynos application
203 processor family. This enables H/W multimedia accelerators to see
204 non-linear physical memory chunks as linear memory in their
205 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900206
207 If unsure, say N here.
208
209config EXYNOS_IOMMU_DEBUG
210 bool "Debugging log for Exynos IOMMU"
211 depends on EXYNOS_IOMMU
212 help
213 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530214 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900215
Sachin Kamat5455d702014-05-22 09:50:55 +0530216 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900217
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900218config SHMOBILE_IPMMU
219 bool
220
221config SHMOBILE_IPMMU_TLB
222 bool
223
224config SHMOBILE_IOMMU
225 bool "IOMMU for Renesas IPMMU/IPMMUI"
226 default n
Linus Torvaldsf63c4822013-11-15 18:57:42 -0800227 depends on ARM
Paul Bolleb83544392014-02-08 22:21:54 +0100228 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900229 select IOMMU_API
230 select ARM_DMA_USE_IOMMU
231 select SHMOBILE_IPMMU
232 select SHMOBILE_IPMMU_TLB
233 help
234 Support for Renesas IPMMU/IPMMUI. This option enables
235 remapping of DMA memory accesses from all of the IP blocks
236 on the ICB.
237
238 Warning: Drivers (including userspace drivers of UIO
239 devices) of the IP blocks on the ICB *must* use addresses
240 allocated from the IPMMU (iova) for DMA with this option
241 enabled.
242
243 If unsure, say N.
244
245choice
246 prompt "IPMMU/IPMMUI address space size"
247 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
248 depends on SHMOBILE_IOMMU
249 help
250 This option sets IPMMU/IPMMUI address space size by
251 adjusting the 1st level page table size. The page table size
252 is calculated as follows:
253
254 page table size = number of page table entries * 4 bytes
255 number of page table entries = address space size / 1 MiB
256
257 For example, when the address space size is 2048 MiB, the
258 1st level page table size is 8192 bytes.
259
260 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
261 bool "2 GiB"
262
263 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
264 bool "1 GiB"
265
266 config SHMOBILE_IOMMU_ADDRSIZE_512MB
267 bool "512 MiB"
268
269 config SHMOBILE_IOMMU_ADDRSIZE_256MB
270 bool "256 MiB"
271
272 config SHMOBILE_IOMMU_ADDRSIZE_128MB
273 bool "128 MiB"
274
275 config SHMOBILE_IOMMU_ADDRSIZE_64MB
276 bool "64 MiB"
277
278 config SHMOBILE_IOMMU_ADDRSIZE_32MB
279 bool "32 MiB"
280
281endchoice
282
283config SHMOBILE_IOMMU_L1SIZE
284 int
285 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
286 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
287 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
288 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
289 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
290 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
291 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
292
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200293config IPMMU_VMSA
294 bool "Renesas VMSA-compatible IPMMU"
295 depends on ARM_LPAE
296 depends on ARCH_SHMOBILE || COMPILE_TEST
297 select IOMMU_API
298 select ARM_DMA_USE_IOMMU
299 help
300 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
301 R-Mobile APE6 and R-Car H2/M2 SoCs.
302
303 If unsure, say N.
304
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000305config SPAPR_TCE_IOMMU
306 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000307 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000308 select IOMMU_API
309 help
310 Enables bits of IOMMU API required by VFIO. The iommu_ops
311 is not implemented as it is not necessary for VFIO.
312
Will Deacon45ae7cf2013-06-24 18:31:25 +0100313config ARM_SMMU
314 bool "ARM Ltd. System MMU (SMMU) Support"
315 depends on ARM64 || (ARM_LPAE && OF)
316 select IOMMU_API
317 select ARM_DMA_USE_IOMMU if ARM
318 help
319 Support for implementations of the ARM System MMU architecture
320 versions 1 and 2. The driver supports both v7l and v8l table
321 formats with 4k and 64k page sizes.
322
323 Say Y here if your SoC includes an IOMMU device implementing
324 the ARM SMMU architecture.
325
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300326endif # IOMMU_SUPPORT