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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Robin Murphy114150d2015-01-12 17:51:13 +000017config IOMMU_IOVA
18 bool
19
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030020config OF_IOMMU
21 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010022 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030023
Varun Sethi695093e2013-07-15 10:20:57 +053024config FSL_PAMU
25 bool "Freescale IOMMU support"
26 depends on PPC_E500MC
27 select IOMMU_API
28 select GENERIC_ALLOCATOR
29 help
30 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
31 PAMU can authorize memory access, remap the memory address, and remap I/O
32 transaction types.
33
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030034# MSM IOMMU support
35config MSM_IOMMU
36 bool "MSM IOMMU Support"
37 depends on ARCH_MSM8X60 || ARCH_MSM8960
38 select IOMMU_API
39 help
40 Support for the IOMMUs found on certain Qualcomm SOCs.
41 These IOMMUs allow virtualization of the address space used by most
42 cores within the multimedia subsystem.
43
44 If unsure, say N here.
45
46config IOMMU_PGTABLES_L2
47 def_bool y
48 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030049
50# AMD IOMMU support
51config AMD_IOMMU
52 bool "AMD IOMMU support"
53 select SWIOTLB
54 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010055 select PCI_ATS
56 select PCI_PRI
57 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030058 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020059 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030060 ---help---
61 With this option you can enable support for AMD IOMMU hardware in
62 your system. An IOMMU is a hardware component which provides
63 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090064 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030065 system from misbehaving device drivers or hardware.
66
67 You can find out if your system has an AMD IOMMU if you look into
68 your BIOS for an option to enable it or if you have an IVRS ACPI
69 table.
70
71config AMD_IOMMU_STATS
72 bool "Export AMD IOMMU statistics to debugfs"
73 depends on AMD_IOMMU
74 select DEBUG_FS
75 ---help---
76 This option enables code in the AMD IOMMU driver to collect various
77 statistics about whats happening in the driver and exports that
78 information to userspace via debugfs.
79 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030080
Joerg Roedele3c495c2011-11-09 12:31:15 +010081config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -080082 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +020083 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +010084 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +010085 ---help---
86 This option enables support for the AMD IOMMUv2 features of the IOMMU
87 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +090088 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +010089
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030090# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -070091config DMAR_TABLE
92 bool
93
94config INTEL_IOMMU
95 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030096 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
97 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +000098 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -070099 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300100 help
101 DMA remapping (DMAR) devices support enables independent address
102 translations for Direct Memory Access (DMA) from devices.
103 These DMA remapping devices are reported via ACPI tables
104 and include PCI device scope covered by these DMA
105 remapping devices.
106
Suresh Siddhad3f13812011-08-23 17:05:25 -0700107config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300108 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700109 prompt "Enable Intel DMA Remapping Devices by default"
110 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300111 help
112 Selecting this option will enable a DMAR device at boot time if
113 one is found. If this option is not selected, DMAR support can
114 be enabled by passing intel_iommu=on to the kernel.
115
Suresh Siddhad3f13812011-08-23 17:05:25 -0700116config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300117 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700118 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300119 ---help---
120 Current Graphics drivers tend to use physical address
121 for DMA and avoid using DMA APIs. Setting this config
122 option permits the IOMMU driver to set a unity map for
123 all the OS-visible memory. Hence the driver can continue
124 to use physical addresses for DMA, at least until this
125 option is removed in the 2.6.32 kernel.
126
Suresh Siddhad3f13812011-08-23 17:05:25 -0700127config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300128 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700129 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300130 ---help---
131 Floppy disk drivers are known to bypass DMA API calls
132 thereby failing to work when IOMMU is enabled. This
133 workaround will setup a 1:1 mapping for the first
134 16MiB to make floppy (an ISA device) work.
135
Suresh Siddhad3f13812011-08-23 17:05:25 -0700136config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800137 bool "Support for Interrupt Remapping"
138 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700139 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300140 ---help---
141 Supports Interrupt remapping for IO-APIC and MSI devices.
142 To use x2apic mode in the CPU's which support x2APIC enhancements or
143 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200144
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300145# OMAP IOMMU support
146config OMAP_IOMMU
147 bool "OMAP IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100148 depends on ARCH_OMAP2PLUS && MMU
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300149 select IOMMU_API
150
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300151config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500152 bool "Export OMAP IOMMU internals in DebugFS"
153 depends on OMAP_IOMMU && DEBUG_FS
154 ---help---
155 Select this to see extensive information about
156 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300157
Suman Anna61c75352014-10-22 17:22:30 -0500158 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300159
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800160config ROCKCHIP_IOMMU
161 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100162 depends on ARM
163 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800164 select IOMMU_API
165 select ARM_DMA_USE_IOMMU
166 help
167 Support for IOMMUs found on Rockchip rk32xx SOCs.
168 These IOMMUs allow virtualization of the address space used by most
169 cores within the multimedia subsystem.
170 Say Y here if you are using a Rockchip SoC that includes an IOMMU
171 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300172
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200173config TEGRA_IOMMU_GART
174 bool "Tegra GART IOMMU Support"
175 depends on ARCH_TEGRA_2x_SOC
176 select IOMMU_API
177 help
178 Enables support for remapping discontiguous physical memory
179 shared with the operating system into contiguous I/O virtual
180 space through the GART (Graphics Address Relocation Table)
181 hardware included on Tegra SoCs.
182
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200183config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200184 bool "NVIDIA Tegra SMMU Support"
185 depends on ARCH_TEGRA
186 depends on TEGRA_AHB
187 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200188 select IOMMU_API
189 help
Thierry Reding89184652014-04-16 09:24:44 +0200190 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
191 SoCs (Tegra30 up to Tegra124).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200192
KyongHo Cho2a965362012-05-12 05:56:09 +0900193config EXYNOS_IOMMU
194 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100195 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900196 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530197 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900198 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530199 Support for the IOMMU (System MMU) of Samsung Exynos application
200 processor family. This enables H/W multimedia accelerators to see
201 non-linear physical memory chunks as linear memory in their
202 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900203
204 If unsure, say N here.
205
206config EXYNOS_IOMMU_DEBUG
207 bool "Debugging log for Exynos IOMMU"
208 depends on EXYNOS_IOMMU
209 help
210 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530211 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900212
Sachin Kamat5455d702014-05-22 09:50:55 +0530213 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900214
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900215config SHMOBILE_IPMMU
216 bool
217
218config SHMOBILE_IPMMU_TLB
219 bool
220
221config SHMOBILE_IOMMU
222 bool "IOMMU for Renesas IPMMU/IPMMUI"
223 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100224 depends on ARM && MMU
Paul Bolleb83544392014-02-08 22:21:54 +0100225 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900226 select IOMMU_API
227 select ARM_DMA_USE_IOMMU
228 select SHMOBILE_IPMMU
229 select SHMOBILE_IPMMU_TLB
230 help
231 Support for Renesas IPMMU/IPMMUI. This option enables
232 remapping of DMA memory accesses from all of the IP blocks
233 on the ICB.
234
235 Warning: Drivers (including userspace drivers of UIO
236 devices) of the IP blocks on the ICB *must* use addresses
237 allocated from the IPMMU (iova) for DMA with this option
238 enabled.
239
240 If unsure, say N.
241
242choice
243 prompt "IPMMU/IPMMUI address space size"
244 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
245 depends on SHMOBILE_IOMMU
246 help
247 This option sets IPMMU/IPMMUI address space size by
248 adjusting the 1st level page table size. The page table size
249 is calculated as follows:
250
251 page table size = number of page table entries * 4 bytes
252 number of page table entries = address space size / 1 MiB
253
254 For example, when the address space size is 2048 MiB, the
255 1st level page table size is 8192 bytes.
256
257 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
258 bool "2 GiB"
259
260 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
261 bool "1 GiB"
262
263 config SHMOBILE_IOMMU_ADDRSIZE_512MB
264 bool "512 MiB"
265
266 config SHMOBILE_IOMMU_ADDRSIZE_256MB
267 bool "256 MiB"
268
269 config SHMOBILE_IOMMU_ADDRSIZE_128MB
270 bool "128 MiB"
271
272 config SHMOBILE_IOMMU_ADDRSIZE_64MB
273 bool "64 MiB"
274
275 config SHMOBILE_IOMMU_ADDRSIZE_32MB
276 bool "32 MiB"
277
278endchoice
279
280config SHMOBILE_IOMMU_L1SIZE
281 int
282 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
283 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
284 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
285 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
286 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
287 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
288 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
289
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200290config IPMMU_VMSA
291 bool "Renesas VMSA-compatible IPMMU"
292 depends on ARM_LPAE
293 depends on ARCH_SHMOBILE || COMPILE_TEST
294 select IOMMU_API
295 select ARM_DMA_USE_IOMMU
296 help
297 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
298 R-Mobile APE6 and R-Car H2/M2 SoCs.
299
300 If unsure, say N.
301
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000302config SPAPR_TCE_IOMMU
303 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000304 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000305 select IOMMU_API
306 help
307 Enables bits of IOMMU API required by VFIO. The iommu_ops
308 is not implemented as it is not necessary for VFIO.
309
Will Deacon45ae7cf2013-06-24 18:31:25 +0100310config ARM_SMMU
311 bool "ARM Ltd. System MMU (SMMU) Support"
312 depends on ARM64 || (ARM_LPAE && OF)
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100313 depends on MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100314 select IOMMU_API
315 select ARM_DMA_USE_IOMMU if ARM
316 help
317 Support for implementations of the ARM System MMU architecture
318 versions 1 and 2. The driver supports both v7l and v8l table
319 formats with 4k and 64k page sizes.
320
321 Say Y here if your SoC includes an IOMMU device implementing
322 the ARM SMMU architecture.
323
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300324endif # IOMMU_SUPPORT