Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 1 | /* |
| 2 | * AXI clkgen driver |
| 3 | * |
| 4 | * Copyright 2012-2013 Analog Devices Inc. |
| 5 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
| 6 | * |
| 7 | * Licensed under the GPL-2. |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | #include <linux/platform_device.h> |
| 12 | #include <linux/clk-provider.h> |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 13 | #include <linux/slab.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/of.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/err.h> |
| 18 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 19 | #define AXI_CLKGEN_V2_REG_RESET 0x40 |
| 20 | #define AXI_CLKGEN_V2_REG_DRP_CNTRL 0x70 |
| 21 | #define AXI_CLKGEN_V2_REG_DRP_STATUS 0x74 |
| 22 | |
| 23 | #define AXI_CLKGEN_V2_RESET_MMCM_ENABLE BIT(1) |
| 24 | #define AXI_CLKGEN_V2_RESET_ENABLE BIT(0) |
| 25 | |
| 26 | #define AXI_CLKGEN_V2_DRP_CNTRL_SEL BIT(29) |
| 27 | #define AXI_CLKGEN_V2_DRP_CNTRL_READ BIT(28) |
| 28 | |
| 29 | #define AXI_CLKGEN_V2_DRP_STATUS_BUSY BIT(16) |
| 30 | |
| 31 | #define MMCM_REG_CLKOUT0_1 0x08 |
| 32 | #define MMCM_REG_CLKOUT0_2 0x09 |
| 33 | #define MMCM_REG_CLK_FB1 0x14 |
| 34 | #define MMCM_REG_CLK_FB2 0x15 |
| 35 | #define MMCM_REG_CLK_DIV 0x16 |
| 36 | #define MMCM_REG_LOCK1 0x18 |
| 37 | #define MMCM_REG_LOCK2 0x19 |
| 38 | #define MMCM_REG_LOCK3 0x1a |
| 39 | #define MMCM_REG_FILTER1 0x4e |
| 40 | #define MMCM_REG_FILTER2 0x4f |
| 41 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 42 | struct axi_clkgen { |
| 43 | void __iomem *base; |
| 44 | struct clk_hw clk_hw; |
| 45 | }; |
| 46 | |
| 47 | static uint32_t axi_clkgen_lookup_filter(unsigned int m) |
| 48 | { |
| 49 | switch (m) { |
| 50 | case 0: |
| 51 | return 0x01001990; |
| 52 | case 1: |
| 53 | return 0x01001190; |
| 54 | case 2: |
| 55 | return 0x01009890; |
| 56 | case 3: |
| 57 | return 0x01001890; |
| 58 | case 4: |
| 59 | return 0x01008890; |
| 60 | case 5 ... 8: |
| 61 | return 0x01009090; |
| 62 | case 9 ... 11: |
| 63 | return 0x01000890; |
| 64 | case 12: |
| 65 | return 0x08009090; |
| 66 | case 13 ... 22: |
| 67 | return 0x01001090; |
| 68 | case 23 ... 36: |
| 69 | return 0x01008090; |
| 70 | case 37 ... 46: |
| 71 | return 0x08001090; |
| 72 | default: |
| 73 | return 0x08008090; |
| 74 | } |
| 75 | } |
| 76 | |
| 77 | static const uint32_t axi_clkgen_lock_table[] = { |
| 78 | 0x060603e8, 0x060603e8, 0x080803e8, 0x0b0b03e8, |
| 79 | 0x0e0e03e8, 0x111103e8, 0x131303e8, 0x161603e8, |
| 80 | 0x191903e8, 0x1c1c03e8, 0x1f1f0384, 0x1f1f0339, |
| 81 | 0x1f1f02ee, 0x1f1f02bc, 0x1f1f028a, 0x1f1f0271, |
| 82 | 0x1f1f023f, 0x1f1f0226, 0x1f1f020d, 0x1f1f01f4, |
| 83 | 0x1f1f01db, 0x1f1f01c2, 0x1f1f01a9, 0x1f1f0190, |
| 84 | 0x1f1f0190, 0x1f1f0177, 0x1f1f015e, 0x1f1f015e, |
| 85 | 0x1f1f0145, 0x1f1f0145, 0x1f1f012c, 0x1f1f012c, |
| 86 | 0x1f1f012c, 0x1f1f0113, 0x1f1f0113, 0x1f1f0113, |
| 87 | }; |
| 88 | |
| 89 | static uint32_t axi_clkgen_lookup_lock(unsigned int m) |
| 90 | { |
| 91 | if (m < ARRAY_SIZE(axi_clkgen_lock_table)) |
| 92 | return axi_clkgen_lock_table[m]; |
| 93 | return 0x1f1f00fa; |
| 94 | } |
| 95 | |
| 96 | static const unsigned int fpfd_min = 10000; |
| 97 | static const unsigned int fpfd_max = 300000; |
| 98 | static const unsigned int fvco_min = 600000; |
| 99 | static const unsigned int fvco_max = 1200000; |
| 100 | |
| 101 | static void axi_clkgen_calc_params(unsigned long fin, unsigned long fout, |
| 102 | unsigned int *best_d, unsigned int *best_m, unsigned int *best_dout) |
| 103 | { |
| 104 | unsigned long d, d_min, d_max, _d_min, _d_max; |
| 105 | unsigned long m, m_min, m_max; |
| 106 | unsigned long f, dout, best_f, fvco; |
| 107 | |
| 108 | fin /= 1000; |
| 109 | fout /= 1000; |
| 110 | |
| 111 | best_f = ULONG_MAX; |
| 112 | *best_d = 0; |
| 113 | *best_m = 0; |
| 114 | *best_dout = 0; |
| 115 | |
| 116 | d_min = max_t(unsigned long, DIV_ROUND_UP(fin, fpfd_max), 1); |
| 117 | d_max = min_t(unsigned long, fin / fpfd_min, 80); |
| 118 | |
| 119 | m_min = max_t(unsigned long, DIV_ROUND_UP(fvco_min, fin) * d_min, 1); |
| 120 | m_max = min_t(unsigned long, fvco_max * d_max / fin, 64); |
| 121 | |
| 122 | for (m = m_min; m <= m_max; m++) { |
| 123 | _d_min = max(d_min, DIV_ROUND_UP(fin * m, fvco_max)); |
| 124 | _d_max = min(d_max, fin * m / fvco_min); |
| 125 | |
| 126 | for (d = _d_min; d <= _d_max; d++) { |
| 127 | fvco = fin * m / d; |
| 128 | |
| 129 | dout = DIV_ROUND_CLOSEST(fvco, fout); |
| 130 | dout = clamp_t(unsigned long, dout, 1, 128); |
| 131 | f = fvco / dout; |
| 132 | if (abs(f - fout) < abs(best_f - fout)) { |
| 133 | best_f = f; |
| 134 | *best_d = d; |
| 135 | *best_m = m; |
| 136 | *best_dout = dout; |
| 137 | if (best_f == fout) |
| 138 | return; |
| 139 | } |
| 140 | } |
| 141 | } |
| 142 | } |
| 143 | |
| 144 | static void axi_clkgen_calc_clk_params(unsigned int divider, unsigned int *low, |
| 145 | unsigned int *high, unsigned int *edge, unsigned int *nocount) |
| 146 | { |
| 147 | if (divider == 1) |
| 148 | *nocount = 1; |
| 149 | else |
| 150 | *nocount = 0; |
| 151 | |
| 152 | *high = divider / 2; |
| 153 | *edge = divider % 2; |
| 154 | *low = divider - *high; |
| 155 | } |
| 156 | |
| 157 | static void axi_clkgen_write(struct axi_clkgen *axi_clkgen, |
| 158 | unsigned int reg, unsigned int val) |
| 159 | { |
| 160 | writel(val, axi_clkgen->base + reg); |
| 161 | } |
| 162 | |
| 163 | static void axi_clkgen_read(struct axi_clkgen *axi_clkgen, |
| 164 | unsigned int reg, unsigned int *val) |
| 165 | { |
| 166 | *val = readl(axi_clkgen->base + reg); |
| 167 | } |
| 168 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 169 | static int axi_clkgen_wait_non_busy(struct axi_clkgen *axi_clkgen) |
| 170 | { |
| 171 | unsigned int timeout = 10000; |
| 172 | unsigned int val; |
| 173 | |
| 174 | do { |
| 175 | axi_clkgen_read(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_STATUS, &val); |
| 176 | } while ((val & AXI_CLKGEN_V2_DRP_STATUS_BUSY) && --timeout); |
| 177 | |
| 178 | if (val & AXI_CLKGEN_V2_DRP_STATUS_BUSY) |
| 179 | return -EIO; |
| 180 | |
| 181 | return val & 0xffff; |
| 182 | } |
| 183 | |
Lars-Peter Clausen | d95b599 | 2015-11-30 17:54:55 +0100 | [diff] [blame^] | 184 | static int axi_clkgen_mmcm_read(struct axi_clkgen *axi_clkgen, |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 185 | unsigned int reg, unsigned int *val) |
| 186 | { |
| 187 | unsigned int reg_val; |
| 188 | int ret; |
| 189 | |
| 190 | ret = axi_clkgen_wait_non_busy(axi_clkgen); |
| 191 | if (ret < 0) |
| 192 | return ret; |
| 193 | |
| 194 | reg_val = AXI_CLKGEN_V2_DRP_CNTRL_SEL | AXI_CLKGEN_V2_DRP_CNTRL_READ; |
| 195 | reg_val |= (reg << 16); |
| 196 | |
| 197 | axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_CNTRL, reg_val); |
| 198 | |
| 199 | ret = axi_clkgen_wait_non_busy(axi_clkgen); |
| 200 | if (ret < 0) |
| 201 | return ret; |
| 202 | |
| 203 | *val = ret; |
| 204 | |
| 205 | return 0; |
| 206 | } |
| 207 | |
Lars-Peter Clausen | d95b599 | 2015-11-30 17:54:55 +0100 | [diff] [blame^] | 208 | static int axi_clkgen_mmcm_write(struct axi_clkgen *axi_clkgen, |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 209 | unsigned int reg, unsigned int val, unsigned int mask) |
| 210 | { |
| 211 | unsigned int reg_val = 0; |
| 212 | int ret; |
| 213 | |
| 214 | ret = axi_clkgen_wait_non_busy(axi_clkgen); |
| 215 | if (ret < 0) |
| 216 | return ret; |
| 217 | |
| 218 | if (mask != 0xffff) { |
Lars-Peter Clausen | d95b599 | 2015-11-30 17:54:55 +0100 | [diff] [blame^] | 219 | axi_clkgen_mmcm_read(axi_clkgen, reg, ®_val); |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 220 | reg_val &= ~mask; |
| 221 | } |
| 222 | |
| 223 | reg_val |= AXI_CLKGEN_V2_DRP_CNTRL_SEL | (reg << 16) | (val & mask); |
| 224 | |
| 225 | axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_CNTRL, reg_val); |
| 226 | |
| 227 | return 0; |
| 228 | } |
| 229 | |
Lars-Peter Clausen | d95b599 | 2015-11-30 17:54:55 +0100 | [diff] [blame^] | 230 | static void axi_clkgen_mmcm_enable(struct axi_clkgen *axi_clkgen, |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 231 | bool enable) |
| 232 | { |
| 233 | unsigned int val = AXI_CLKGEN_V2_RESET_ENABLE; |
| 234 | |
| 235 | if (enable) |
| 236 | val |= AXI_CLKGEN_V2_RESET_MMCM_ENABLE; |
| 237 | |
| 238 | axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_RESET, val); |
| 239 | } |
| 240 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 241 | static struct axi_clkgen *clk_hw_to_axi_clkgen(struct clk_hw *clk_hw) |
| 242 | { |
| 243 | return container_of(clk_hw, struct axi_clkgen, clk_hw); |
| 244 | } |
| 245 | |
| 246 | static int axi_clkgen_set_rate(struct clk_hw *clk_hw, |
| 247 | unsigned long rate, unsigned long parent_rate) |
| 248 | { |
| 249 | struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); |
| 250 | unsigned int d, m, dout; |
| 251 | unsigned int nocount; |
| 252 | unsigned int high; |
| 253 | unsigned int edge; |
| 254 | unsigned int low; |
| 255 | uint32_t filter; |
| 256 | uint32_t lock; |
| 257 | |
| 258 | if (parent_rate == 0 || rate == 0) |
| 259 | return -EINVAL; |
| 260 | |
| 261 | axi_clkgen_calc_params(parent_rate, rate, &d, &m, &dout); |
| 262 | |
| 263 | if (d == 0 || dout == 0 || m == 0) |
| 264 | return -EINVAL; |
| 265 | |
| 266 | filter = axi_clkgen_lookup_filter(m - 1); |
| 267 | lock = axi_clkgen_lookup_lock(m - 1); |
| 268 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 269 | axi_clkgen_calc_clk_params(dout, &low, &high, &edge, &nocount); |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 270 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLKOUT0_1, |
| 271 | (high << 6) | low, 0xefff); |
| 272 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLKOUT0_2, |
| 273 | (edge << 7) | (nocount << 6), 0x03ff); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 274 | |
| 275 | axi_clkgen_calc_clk_params(d, &low, &high, &edge, &nocount); |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 276 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLK_DIV, |
| 277 | (edge << 13) | (nocount << 12) | (high << 6) | low, 0x3fff); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 278 | |
| 279 | axi_clkgen_calc_clk_params(m, &low, &high, &edge, &nocount); |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 280 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLK_FB1, |
| 281 | (high << 6) | low, 0xefff); |
| 282 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLK_FB2, |
| 283 | (edge << 7) | (nocount << 6), 0x03ff); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 284 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 285 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_LOCK1, lock & 0x3ff, 0x3ff); |
| 286 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_LOCK2, |
| 287 | (((lock >> 16) & 0x1f) << 10) | 0x1, 0x7fff); |
| 288 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_LOCK3, |
| 289 | (((lock >> 24) & 0x1f) << 10) | 0x3e9, 0x7fff); |
| 290 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_FILTER1, filter >> 16, 0x9900); |
| 291 | axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_FILTER2, filter, 0x9900); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 292 | |
| 293 | return 0; |
| 294 | } |
| 295 | |
| 296 | static long axi_clkgen_round_rate(struct clk_hw *hw, unsigned long rate, |
| 297 | unsigned long *parent_rate) |
| 298 | { |
| 299 | unsigned int d, m, dout; |
| 300 | |
| 301 | axi_clkgen_calc_params(*parent_rate, rate, &d, &m, &dout); |
| 302 | |
| 303 | if (d == 0 || dout == 0 || m == 0) |
| 304 | return -EINVAL; |
| 305 | |
| 306 | return *parent_rate / d * m / dout; |
| 307 | } |
| 308 | |
| 309 | static unsigned long axi_clkgen_recalc_rate(struct clk_hw *clk_hw, |
| 310 | unsigned long parent_rate) |
| 311 | { |
| 312 | struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); |
| 313 | unsigned int d, m, dout; |
| 314 | unsigned int reg; |
| 315 | unsigned long long tmp; |
| 316 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 317 | axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLKOUT0_1, ®); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 318 | dout = (reg & 0x3f) + ((reg >> 6) & 0x3f); |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 319 | axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLK_DIV, ®); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 320 | d = (reg & 0x3f) + ((reg >> 6) & 0x3f); |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 321 | axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLK_FB1, ®); |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 322 | m = (reg & 0x3f) + ((reg >> 6) & 0x3f); |
| 323 | |
| 324 | if (d == 0 || dout == 0) |
| 325 | return 0; |
| 326 | |
| 327 | tmp = (unsigned long long)(parent_rate / d) * m; |
| 328 | do_div(tmp, dout); |
| 329 | |
| 330 | if (tmp > ULONG_MAX) |
| 331 | return ULONG_MAX; |
| 332 | |
| 333 | return tmp; |
| 334 | } |
| 335 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 336 | static int axi_clkgen_enable(struct clk_hw *clk_hw) |
| 337 | { |
| 338 | struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); |
| 339 | |
| 340 | axi_clkgen_mmcm_enable(axi_clkgen, true); |
| 341 | |
| 342 | return 0; |
| 343 | } |
| 344 | |
| 345 | static void axi_clkgen_disable(struct clk_hw *clk_hw) |
| 346 | { |
| 347 | struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); |
| 348 | |
| 349 | axi_clkgen_mmcm_enable(axi_clkgen, false); |
| 350 | } |
| 351 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 352 | static const struct clk_ops axi_clkgen_ops = { |
| 353 | .recalc_rate = axi_clkgen_recalc_rate, |
| 354 | .round_rate = axi_clkgen_round_rate, |
| 355 | .set_rate = axi_clkgen_set_rate, |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 356 | .enable = axi_clkgen_enable, |
| 357 | .disable = axi_clkgen_disable, |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 358 | }; |
| 359 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 360 | static const struct of_device_id axi_clkgen_ids[] = { |
| 361 | { |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 362 | .compatible = "adi,axi-clkgen-2.00.a", |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 363 | }, |
| 364 | { }, |
| 365 | }; |
| 366 | MODULE_DEVICE_TABLE(of, axi_clkgen_ids); |
| 367 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 368 | static int axi_clkgen_probe(struct platform_device *pdev) |
| 369 | { |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 370 | const struct of_device_id *id; |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 371 | struct axi_clkgen *axi_clkgen; |
| 372 | struct clk_init_data init; |
| 373 | const char *parent_name; |
| 374 | const char *clk_name; |
| 375 | struct resource *mem; |
| 376 | struct clk *clk; |
| 377 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 378 | if (!pdev->dev.of_node) |
| 379 | return -ENODEV; |
| 380 | |
| 381 | id = of_match_node(axi_clkgen_ids, pdev->dev.of_node); |
| 382 | if (!id) |
| 383 | return -ENODEV; |
| 384 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 385 | axi_clkgen = devm_kzalloc(&pdev->dev, sizeof(*axi_clkgen), GFP_KERNEL); |
| 386 | if (!axi_clkgen) |
| 387 | return -ENOMEM; |
| 388 | |
| 389 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 390 | axi_clkgen->base = devm_ioremap_resource(&pdev->dev, mem); |
| 391 | if (IS_ERR(axi_clkgen->base)) |
| 392 | return PTR_ERR(axi_clkgen->base); |
| 393 | |
| 394 | parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0); |
| 395 | if (!parent_name) |
| 396 | return -EINVAL; |
| 397 | |
| 398 | clk_name = pdev->dev.of_node->name; |
| 399 | of_property_read_string(pdev->dev.of_node, "clock-output-names", |
| 400 | &clk_name); |
| 401 | |
| 402 | init.name = clk_name; |
| 403 | init.ops = &axi_clkgen_ops; |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 404 | init.flags = CLK_SET_RATE_GATE; |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 405 | init.parent_names = &parent_name; |
| 406 | init.num_parents = 1; |
| 407 | |
Lars-Peter Clausen | 1887c3a | 2014-02-17 10:31:53 +0100 | [diff] [blame] | 408 | axi_clkgen_mmcm_enable(axi_clkgen, false); |
| 409 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 410 | axi_clkgen->clk_hw.init = &init; |
| 411 | clk = devm_clk_register(&pdev->dev, &axi_clkgen->clk_hw); |
| 412 | if (IS_ERR(clk)) |
| 413 | return PTR_ERR(clk); |
| 414 | |
| 415 | return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get, |
| 416 | clk); |
| 417 | } |
| 418 | |
| 419 | static int axi_clkgen_remove(struct platform_device *pdev) |
| 420 | { |
| 421 | of_clk_del_provider(pdev->dev.of_node); |
| 422 | |
| 423 | return 0; |
| 424 | } |
| 425 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 426 | static struct platform_driver axi_clkgen_driver = { |
| 427 | .driver = { |
| 428 | .name = "adi-axi-clkgen", |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 429 | .of_match_table = axi_clkgen_ids, |
| 430 | }, |
| 431 | .probe = axi_clkgen_probe, |
| 432 | .remove = axi_clkgen_remove, |
| 433 | }; |
| 434 | module_platform_driver(axi_clkgen_driver); |
| 435 | |
| 436 | MODULE_LICENSE("GPL v2"); |
| 437 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); |
| 438 | MODULE_DESCRIPTION("Driver for the Analog Devices' AXI clkgen pcore clock generator"); |