blob: bbf082c7682a870748068d75e6c13ca0fff9ad02 [file] [log] [blame]
Caesar Wangcbac8f632014-11-24 12:58:59 +08001/*
2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/platform_device.h>
23#include <linux/reset.h>
24#include <linux/thermal.h>
Caesar Wangc9708722015-11-11 19:43:11 -080025#include <linux/pinctrl/consumer.h>
Caesar Wangcbac8f632014-11-24 12:58:59 +080026
27/**
28 * If the temperature over a period of time High,
29 * the resulting TSHUT gave CRU module,let it reset the entire chip,
30 * or via GPIO give PMIC.
31 */
32enum tshut_mode {
33 TSHUT_MODE_CRU = 0,
34 TSHUT_MODE_GPIO,
35};
36
37/**
38 * the system Temperature Sensors tshut(tshut) polarity
39 * the bit 8 is tshut polarity.
40 * 0: low active, 1: high active
41 */
42enum tshut_polarity {
43 TSHUT_LOW_ACTIVE = 0,
44 TSHUT_HIGH_ACTIVE,
45};
46
47/**
Caesar Wang1d98b6182015-11-05 13:17:58 +080048 * The system has two Temperature Sensors.
49 * sensor0 is for CPU, and sensor1 is for GPU.
Caesar Wangcbac8f632014-11-24 12:58:59 +080050 */
51enum sensor_id {
Caesar Wang1d98b6182015-11-05 13:17:58 +080052 SENSOR_CPU = 0,
Caesar Wangcbac8f632014-11-24 12:58:59 +080053 SENSOR_GPU,
54};
55
Caesar Wang1d98b6182015-11-05 13:17:58 +080056/**
57 * The max sensors is two in rockchip SoCs.
58 * Two sensors: CPU and GPU sensor.
59 */
60#define SOC_MAX_SENSORS 2
61
Caesar Wangce741102015-11-09 12:48:56 +080062struct chip_tsadc_table {
63 const struct tsadc_table *id;
64
65 /* the array table size*/
66 unsigned int length;
67
68 /* that analogic mask data */
69 u32 data_mask;
70};
71
Caesar Wangcbac8f632014-11-24 12:58:59 +080072struct rockchip_tsadc_chip {
Caesar Wang1d98b6182015-11-05 13:17:58 +080073 /* The sensor id of chip correspond to the ADC channel */
74 int chn_id[SOC_MAX_SENSORS];
75 int chn_num;
76
Caesar Wangcbac8f632014-11-24 12:58:59 +080077 /* The hardware-controlled tshut property */
78 long tshut_temp;
79 enum tshut_mode tshut_mode;
80 enum tshut_polarity tshut_polarity;
81
82 /* Chip-wide methods */
83 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
84 void (*irq_ack)(void __iomem *reg);
85 void (*control)(void __iomem *reg, bool on);
86
87 /* Per-sensor methods */
Caesar Wangce741102015-11-09 12:48:56 +080088 int (*get_temp)(struct chip_tsadc_table table,
89 int chn, void __iomem *reg, int *temp);
90 void (*set_tshut_temp)(struct chip_tsadc_table table,
91 int chn, void __iomem *reg, long temp);
Caesar Wangcbac8f632014-11-24 12:58:59 +080092 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
Caesar Wangce741102015-11-09 12:48:56 +080093
94 /* Per-table methods */
95 struct chip_tsadc_table table;
Caesar Wangcbac8f632014-11-24 12:58:59 +080096};
97
98struct rockchip_thermal_sensor {
99 struct rockchip_thermal_data *thermal;
100 struct thermal_zone_device *tzd;
Caesar Wang1d98b6182015-11-05 13:17:58 +0800101 int id;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800102};
103
Caesar Wangcbac8f632014-11-24 12:58:59 +0800104struct rockchip_thermal_data {
105 const struct rockchip_tsadc_chip *chip;
106 struct platform_device *pdev;
107 struct reset_control *reset;
108
Caesar Wang1d98b6182015-11-05 13:17:58 +0800109 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
Caesar Wangcbac8f632014-11-24 12:58:59 +0800110
111 struct clk *clk;
112 struct clk *pclk;
113
114 void __iomem *regs;
115
116 long tshut_temp;
117 enum tshut_mode tshut_mode;
118 enum tshut_polarity tshut_polarity;
119};
120
Caesar Wang1d98b6182015-11-05 13:17:58 +0800121/* TSADC Sensor info define: */
Caesar Wangcbac8f632014-11-24 12:58:59 +0800122#define TSADCV2_AUTO_CON 0x04
123#define TSADCV2_INT_EN 0x08
124#define TSADCV2_INT_PD 0x0c
125#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
126#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
127#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
128#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
129#define TSADCV2_AUTO_PERIOD 0x68
130#define TSADCV2_AUTO_PERIOD_HT 0x6c
131
132#define TSADCV2_AUTO_EN BIT(0)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800133#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
134#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800135
136#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
137#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
138#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
139
Dmitry Torokhov452e01b2015-08-07 14:00:52 -0700140#define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800141
142#define TSADCV2_DATA_MASK 0xfff
143#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
144#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
145#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
146#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
147
148struct tsadc_table {
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700149 u32 code;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800150 long temp;
151};
152
153static const struct tsadc_table v2_code_table[] = {
154 {TSADCV2_DATA_MASK, -40000},
155 {3800, -40000},
156 {3792, -35000},
157 {3783, -30000},
158 {3774, -25000},
159 {3765, -20000},
160 {3756, -15000},
161 {3747, -10000},
162 {3737, -5000},
163 {3728, 0},
164 {3718, 5000},
165 {3708, 10000},
166 {3698, 15000},
167 {3688, 20000},
168 {3678, 25000},
169 {3667, 30000},
170 {3656, 35000},
171 {3645, 40000},
172 {3634, 45000},
173 {3623, 50000},
174 {3611, 55000},
175 {3600, 60000},
176 {3588, 65000},
177 {3575, 70000},
178 {3563, 75000},
179 {3550, 80000},
180 {3537, 85000},
181 {3524, 90000},
182 {3510, 95000},
183 {3496, 100000},
184 {3482, 105000},
185 {3467, 110000},
186 {3452, 115000},
187 {3437, 120000},
188 {3421, 125000},
Caesar Wangcbac8f632014-11-24 12:58:59 +0800189};
190
Caesar Wangce741102015-11-09 12:48:56 +0800191static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
192 long temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800193{
194 int high, low, mid;
195
196 low = 0;
Caesar Wangce741102015-11-09 12:48:56 +0800197 high = table.length - 1;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800198 mid = (high + low) / 2;
199
Caesar Wangce741102015-11-09 12:48:56 +0800200 if (temp < table.id[low].temp || temp > table.id[high].temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800201 return 0;
202
203 while (low <= high) {
Caesar Wangce741102015-11-09 12:48:56 +0800204 if (temp == table.id[mid].temp)
205 return table.id[mid].code;
206 else if (temp < table.id[mid].temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800207 high = mid - 1;
208 else
209 low = mid + 1;
210 mid = (low + high) / 2;
211 }
212
213 return 0;
214}
215
Caesar Wangce741102015-11-09 12:48:56 +0800216static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
217 int *temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800218{
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700219 unsigned int low = 1;
Caesar Wangce741102015-11-09 12:48:56 +0800220 unsigned int high = table.length - 1;
Caesar Wang1e9a1aea2015-01-25 10:11:11 +0800221 unsigned int mid = (low + high) / 2;
222 unsigned int num;
223 unsigned long denom;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800224
Caesar Wangce741102015-11-09 12:48:56 +0800225 WARN_ON(table.length < 2);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800226
Caesar Wangce741102015-11-09 12:48:56 +0800227 code &= table.data_mask;
228 if (code < table.id[high].code)
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700229 return -EAGAIN; /* Incorrect reading */
230
231 while (low <= high) {
Caesar Wangce741102015-11-09 12:48:56 +0800232 if (code >= table.id[mid].code &&
233 code < table.id[mid - 1].code)
Caesar Wang1e9a1aea2015-01-25 10:11:11 +0800234 break;
Caesar Wangce741102015-11-09 12:48:56 +0800235 else if (code < table.id[mid].code)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800236 low = mid + 1;
237 else
238 high = mid - 1;
239 mid = (low + high) / 2;
240 }
241
Caesar Wang1e9a1aea2015-01-25 10:11:11 +0800242 /*
243 * The 5C granularity provided by the table is too much. Let's
244 * assume that the relationship between sensor readings and
245 * temperature between 2 table entries is linear and interpolate
246 * to produce less granular result.
247 */
Caesar Wangce741102015-11-09 12:48:56 +0800248 num = table.id[mid].temp - v2_code_table[mid - 1].temp;
249 num *= table.id[mid - 1].code - code;
250 denom = table.id[mid - 1].code - table.id[mid].code;
251 *temp = table.id[mid - 1].temp + (num / denom);
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700252
253 return 0;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800254}
255
256/**
Caesar Wang144c5562015-11-05 13:17:59 +0800257 * rk_tsadcv2_initialize - initialize TASDC Controller.
258 *
259 * (1) Set TSADC_V2_AUTO_PERIOD:
260 * Configure the interleave between every two accessing of
261 * TSADC in normal operation.
262 *
263 * (2) Set TSADCV2_AUTO_PERIOD_HT:
264 * Configure the interleave between every two accessing of
265 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
266 *
267 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
268 * If the temperature is higher than COMP_INT or COMP_SHUT for
269 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
Caesar Wangcbac8f632014-11-24 12:58:59 +0800270 */
271static void rk_tsadcv2_initialize(void __iomem *regs,
272 enum tshut_polarity tshut_polarity)
273{
274 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
Dmitry Torokhov452e01b2015-08-07 14:00:52 -0700275 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
Caesar Wangcbac8f632014-11-24 12:58:59 +0800276 regs + TSADCV2_AUTO_CON);
277 else
Dmitry Torokhov452e01b2015-08-07 14:00:52 -0700278 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
Caesar Wangcbac8f632014-11-24 12:58:59 +0800279 regs + TSADCV2_AUTO_CON);
280
281 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
282 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
283 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
284 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
285 regs + TSADCV2_AUTO_PERIOD_HT);
286 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
287 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
288}
289
290static void rk_tsadcv2_irq_ack(void __iomem *regs)
291{
292 u32 val;
293
294 val = readl_relaxed(regs + TSADCV2_INT_PD);
Dmitry Torokhov452e01b2015-08-07 14:00:52 -0700295 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800296}
297
298static void rk_tsadcv2_control(void __iomem *regs, bool enable)
299{
300 u32 val;
301
302 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
303 if (enable)
304 val |= TSADCV2_AUTO_EN;
305 else
306 val &= ~TSADCV2_AUTO_EN;
307
308 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
309}
310
Caesar Wangce741102015-11-09 12:48:56 +0800311static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
312 int chn, void __iomem *regs, int *temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800313{
314 u32 val;
315
Caesar Wangcbac8f632014-11-24 12:58:59 +0800316 val = readl_relaxed(regs + TSADCV2_DATA(chn));
Caesar Wangcbac8f632014-11-24 12:58:59 +0800317
Caesar Wangce741102015-11-09 12:48:56 +0800318 return rk_tsadcv2_code_to_temp(table, val, temp);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800319}
320
Caesar Wangce741102015-11-09 12:48:56 +0800321static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
322 int chn, void __iomem *regs, long temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800323{
324 u32 tshut_value, val;
325
Caesar Wangce741102015-11-09 12:48:56 +0800326 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800327 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
328
329 /* TSHUT will be valid */
330 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
331 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
332}
333
334static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
335 enum tshut_mode mode)
336{
337 u32 val;
338
339 val = readl_relaxed(regs + TSADCV2_INT_EN);
340 if (mode == TSHUT_MODE_GPIO) {
341 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
342 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
343 } else {
344 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
345 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
346 }
347
348 writel_relaxed(val, regs + TSADCV2_INT_EN);
349}
350
351static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
Caesar Wang1d98b6182015-11-05 13:17:58 +0800352 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
353 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
354 .chn_num = 2, /* two channels for tsadc */
355
Caesar Wangcbac8f632014-11-24 12:58:59 +0800356 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
357 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
358 .tshut_temp = 95000,
359
360 .initialize = rk_tsadcv2_initialize,
361 .irq_ack = rk_tsadcv2_irq_ack,
362 .control = rk_tsadcv2_control,
363 .get_temp = rk_tsadcv2_get_temp,
364 .set_tshut_temp = rk_tsadcv2_tshut_temp,
365 .set_tshut_mode = rk_tsadcv2_tshut_mode,
Caesar Wangce741102015-11-09 12:48:56 +0800366
367 .table = {
368 .id = v2_code_table,
369 .length = ARRAY_SIZE(v2_code_table),
370 .data_mask = TSADCV2_DATA_MASK,
371 },
Caesar Wangcbac8f632014-11-24 12:58:59 +0800372};
373
374static const struct of_device_id of_rockchip_thermal_match[] = {
375 {
376 .compatible = "rockchip,rk3288-tsadc",
377 .data = (void *)&rk3288_tsadc_data,
378 },
379 { /* end */ },
380};
381MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
382
383static void
384rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
385{
386 struct thermal_zone_device *tzd = sensor->tzd;
387
388 tzd->ops->set_mode(tzd,
389 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
390}
391
392static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
393{
394 struct rockchip_thermal_data *thermal = dev;
395 int i;
396
397 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
398
399 thermal->chip->irq_ack(thermal->regs);
400
Caesar Wang1d98b6182015-11-05 13:17:58 +0800401 for (i = 0; i < thermal->chip->chn_num; i++)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800402 thermal_zone_device_update(thermal->sensors[i].tzd);
403
404 return IRQ_HANDLED;
405}
406
Sascha Hauer17e83512015-07-24 08:12:54 +0200407static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800408{
409 struct rockchip_thermal_sensor *sensor = _sensor;
410 struct rockchip_thermal_data *thermal = sensor->thermal;
411 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
412 int retval;
413
Caesar Wangce741102015-11-09 12:48:56 +0800414 retval = tsadc->get_temp(tsadc->table,
415 sensor->id, thermal->regs, out_temp);
Sascha Hauer17e83512015-07-24 08:12:54 +0200416 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
Caesar Wangcbac8f632014-11-24 12:58:59 +0800417 sensor->id, *out_temp, retval);
418
419 return retval;
420}
421
422static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
423 .get_temp = rockchip_thermal_get_temp,
424};
425
426static int rockchip_configure_from_dt(struct device *dev,
427 struct device_node *np,
428 struct rockchip_thermal_data *thermal)
429{
430 u32 shut_temp, tshut_mode, tshut_polarity;
431
432 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
433 dev_warn(dev,
434 "Missing tshut temp property, using default %ld\n",
435 thermal->chip->tshut_temp);
436 thermal->tshut_temp = thermal->chip->tshut_temp;
437 } else {
438 thermal->tshut_temp = shut_temp;
439 }
440
441 if (thermal->tshut_temp > INT_MAX) {
442 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
443 thermal->tshut_temp);
444 return -ERANGE;
445 }
446
447 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
448 dev_warn(dev,
449 "Missing tshut mode property, using default (%s)\n",
450 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
451 "gpio" : "cru");
452 thermal->tshut_mode = thermal->chip->tshut_mode;
453 } else {
454 thermal->tshut_mode = tshut_mode;
455 }
456
457 if (thermal->tshut_mode > 1) {
458 dev_err(dev, "Invalid tshut mode specified: %d\n",
459 thermal->tshut_mode);
460 return -EINVAL;
461 }
462
463 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
464 &tshut_polarity)) {
465 dev_warn(dev,
466 "Missing tshut-polarity property, using default (%s)\n",
467 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
468 "low" : "high");
469 thermal->tshut_polarity = thermal->chip->tshut_polarity;
470 } else {
471 thermal->tshut_polarity = tshut_polarity;
472 }
473
474 if (thermal->tshut_polarity > 1) {
475 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
476 thermal->tshut_polarity);
477 return -EINVAL;
478 }
479
480 return 0;
481}
482
483static int
484rockchip_thermal_register_sensor(struct platform_device *pdev,
485 struct rockchip_thermal_data *thermal,
486 struct rockchip_thermal_sensor *sensor,
Caesar Wang1d98b6182015-11-05 13:17:58 +0800487 int id)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800488{
489 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
490 int error;
491
492 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
Caesar Wangce741102015-11-09 12:48:56 +0800493 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
494 thermal->tshut_temp);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800495
496 sensor->thermal = thermal;
497 sensor->id = id;
498 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
499 &rockchip_of_thermal_ops);
500 if (IS_ERR(sensor->tzd)) {
501 error = PTR_ERR(sensor->tzd);
502 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
503 id, error);
504 return error;
505 }
506
507 return 0;
508}
509
510/*
511 * Reset TSADC Controller, reset all tsadc registers.
512 */
513static void rockchip_thermal_reset_controller(struct reset_control *reset)
514{
515 reset_control_assert(reset);
516 usleep_range(10, 20);
517 reset_control_deassert(reset);
518}
519
520static int rockchip_thermal_probe(struct platform_device *pdev)
521{
522 struct device_node *np = pdev->dev.of_node;
523 struct rockchip_thermal_data *thermal;
524 const struct of_device_id *match;
525 struct resource *res;
526 int irq;
Caesar Wang1d98b6182015-11-05 13:17:58 +0800527 int i, j;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800528 int error;
529
530 match = of_match_node(of_rockchip_thermal_match, np);
531 if (!match)
532 return -ENXIO;
533
534 irq = platform_get_irq(pdev, 0);
535 if (irq < 0) {
536 dev_err(&pdev->dev, "no irq resource?\n");
537 return -EINVAL;
538 }
539
540 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
541 GFP_KERNEL);
542 if (!thermal)
543 return -ENOMEM;
544
545 thermal->pdev = pdev;
546
547 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
548 if (!thermal->chip)
549 return -EINVAL;
550
551 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
552 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
553 if (IS_ERR(thermal->regs))
554 return PTR_ERR(thermal->regs);
555
556 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
557 if (IS_ERR(thermal->reset)) {
558 error = PTR_ERR(thermal->reset);
559 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
560 return error;
561 }
562
563 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
564 if (IS_ERR(thermal->clk)) {
565 error = PTR_ERR(thermal->clk);
566 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
567 return error;
568 }
569
570 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
571 if (IS_ERR(thermal->pclk)) {
Dan Carpenter0d0a2bf2015-04-21 12:34:10 +0300572 error = PTR_ERR(thermal->pclk);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800573 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
574 error);
575 return error;
576 }
577
578 error = clk_prepare_enable(thermal->clk);
579 if (error) {
580 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
581 error);
582 return error;
583 }
584
585 error = clk_prepare_enable(thermal->pclk);
586 if (error) {
587 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
588 goto err_disable_clk;
589 }
590
591 rockchip_thermal_reset_controller(thermal->reset);
592
593 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
594 if (error) {
595 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
596 error);
597 goto err_disable_pclk;
598 }
599
600 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
601
Caesar Wang1d98b6182015-11-05 13:17:58 +0800602 for (i = 0; i < thermal->chip->chn_num; i++) {
603 error = rockchip_thermal_register_sensor(pdev, thermal,
604 &thermal->sensors[i],
605 thermal->chip->chn_id[i]);
606 if (error) {
607 dev_err(&pdev->dev,
608 "failed to register sensor[%d] : error = %d\n",
609 i, error);
610 for (j = 0; j < i; j++)
611 thermal_zone_of_sensor_unregister(&pdev->dev,
612 thermal->sensors[j].tzd);
613 goto err_disable_pclk;
614 }
Caesar Wangcbac8f632014-11-24 12:58:59 +0800615 }
616
617 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
618 &rockchip_thermal_alarm_irq_thread,
619 IRQF_ONESHOT,
620 "rockchip_thermal", thermal);
621 if (error) {
622 dev_err(&pdev->dev,
623 "failed to request tsadc irq: %d\n", error);
Caesar Wang1d98b6182015-11-05 13:17:58 +0800624 goto err_unregister_sensor;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800625 }
626
627 thermal->chip->control(thermal->regs, true);
628
Caesar Wang1d98b6182015-11-05 13:17:58 +0800629 for (i = 0; i < thermal->chip->chn_num; i++)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800630 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
631
632 platform_set_drvdata(pdev, thermal);
633
634 return 0;
635
Caesar Wang1d98b6182015-11-05 13:17:58 +0800636err_unregister_sensor:
637 while (i--)
638 thermal_zone_of_sensor_unregister(&pdev->dev,
639 thermal->sensors[i].tzd);
640
Caesar Wangcbac8f632014-11-24 12:58:59 +0800641err_disable_pclk:
642 clk_disable_unprepare(thermal->pclk);
643err_disable_clk:
644 clk_disable_unprepare(thermal->clk);
645
646 return error;
647}
648
649static int rockchip_thermal_remove(struct platform_device *pdev)
650{
651 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
652 int i;
653
Caesar Wang1d98b6182015-11-05 13:17:58 +0800654 for (i = 0; i < thermal->chip->chn_num; i++) {
Caesar Wangcbac8f632014-11-24 12:58:59 +0800655 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
656
657 rockchip_thermal_toggle_sensor(sensor, false);
658 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
659 }
660
661 thermal->chip->control(thermal->regs, false);
662
663 clk_disable_unprepare(thermal->pclk);
664 clk_disable_unprepare(thermal->clk);
665
666 return 0;
667}
668
669static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
670{
671 struct platform_device *pdev = to_platform_device(dev);
672 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
673 int i;
674
Caesar Wang1d98b6182015-11-05 13:17:58 +0800675 for (i = 0; i < thermal->chip->chn_num; i++)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800676 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
677
678 thermal->chip->control(thermal->regs, false);
679
680 clk_disable(thermal->pclk);
681 clk_disable(thermal->clk);
682
Caesar Wang7e38a5b2015-10-23 19:25:27 +0800683 pinctrl_pm_select_sleep_state(dev);
684
Caesar Wangcbac8f632014-11-24 12:58:59 +0800685 return 0;
686}
687
688static int __maybe_unused rockchip_thermal_resume(struct device *dev)
689{
690 struct platform_device *pdev = to_platform_device(dev);
691 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
692 int i;
693 int error;
694
695 error = clk_enable(thermal->clk);
696 if (error)
697 return error;
698
699 error = clk_enable(thermal->pclk);
700 if (error)
701 return error;
702
703 rockchip_thermal_reset_controller(thermal->reset);
704
705 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
706
Caesar Wang1d98b6182015-11-05 13:17:58 +0800707 for (i = 0; i < thermal->chip->chn_num; i++) {
708 int id = thermal->sensors[i].id;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800709
710 thermal->chip->set_tshut_mode(id, thermal->regs,
711 thermal->tshut_mode);
Caesar Wangce741102015-11-09 12:48:56 +0800712 thermal->chip->set_tshut_temp(thermal->chip->table,
713 id, thermal->regs,
Caesar Wangcbac8f632014-11-24 12:58:59 +0800714 thermal->tshut_temp);
715 }
716
717 thermal->chip->control(thermal->regs, true);
718
Caesar Wang1d98b6182015-11-05 13:17:58 +0800719 for (i = 0; i < thermal->chip->chn_num; i++)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800720 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
721
Caesar Wang7e38a5b2015-10-23 19:25:27 +0800722 pinctrl_pm_select_default_state(dev);
723
Caesar Wangcbac8f632014-11-24 12:58:59 +0800724 return 0;
725}
726
727static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
728 rockchip_thermal_suspend, rockchip_thermal_resume);
729
730static struct platform_driver rockchip_thermal_driver = {
731 .driver = {
732 .name = "rockchip-thermal",
Caesar Wangcbac8f632014-11-24 12:58:59 +0800733 .pm = &rockchip_thermal_pm_ops,
734 .of_match_table = of_rockchip_thermal_match,
735 },
736 .probe = rockchip_thermal_probe,
737 .remove = rockchip_thermal_remove,
738};
739
740module_platform_driver(rockchip_thermal_driver);
741
742MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
743MODULE_AUTHOR("Rockchip, Inc.");
744MODULE_LICENSE("GPL v2");
745MODULE_ALIAS("platform:rockchip-thermal");