Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * x86 SMP booting functions |
| 3 | * |
| 4 | * (c) 1995 Alan Cox, Building #3 <alan@redhat.com> |
| 5 | * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> |
| 6 | * Copyright 2001 Andi Kleen, SuSE Labs. |
| 7 | * |
| 8 | * Much of the core SMP work is based on previous work by Thomas Radke, to |
| 9 | * whom a great many thanks are extended. |
| 10 | * |
| 11 | * Thanks to Intel for making available several different Pentium, |
| 12 | * Pentium Pro and Pentium-II/Xeon MP machines. |
| 13 | * Original development of Linux SMP code supported by Caldera. |
| 14 | * |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 15 | * This code is released under the GNU General Public License version 2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | * |
| 17 | * Fixes |
| 18 | * Felix Koop : NR_CPUS used properly |
| 19 | * Jose Renau : Handle single CPU case. |
| 20 | * Alan Cox : By repeated request 8) - Total BogoMIP report. |
| 21 | * Greg Wright : Fix for kernel stacks panic. |
| 22 | * Erich Boleyn : MP v1.4 and additional changes. |
| 23 | * Matthias Sattler : Changes for 2.1 kernel map. |
| 24 | * Michel Lespinasse : Changes for 2.1 kernel map. |
| 25 | * Michael Chastain : Change trampoline.S to gnu as. |
| 26 | * Alan Cox : Dumb bug: 'B' step PPro's are fine |
| 27 | * Ingo Molnar : Added APIC timers, based on code |
| 28 | * from Jose Renau |
| 29 | * Ingo Molnar : various cleanups and rewrites |
| 30 | * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug. |
| 31 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs |
| 32 | * Andi Kleen : Changed for SMP boot into long mode. |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 33 | * Rusty Russell : Hacked into shape for new "hotplug" boot process. |
| 34 | * Andi Kleen : Converted to new state machine. |
| 35 | * Various cleanups. |
| 36 | * Probably mostly hotplug CPU ready now. |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 37 | * Ashok Raj : CPU hotplug support |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | */ |
| 39 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 40 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <linux/config.h> |
| 42 | #include <linux/init.h> |
| 43 | |
| 44 | #include <linux/mm.h> |
| 45 | #include <linux/kernel_stat.h> |
| 46 | #include <linux/smp_lock.h> |
| 47 | #include <linux/irq.h> |
| 48 | #include <linux/bootmem.h> |
| 49 | #include <linux/thread_info.h> |
| 50 | #include <linux/module.h> |
| 51 | |
| 52 | #include <linux/delay.h> |
| 53 | #include <linux/mc146818rtc.h> |
| 54 | #include <asm/mtrr.h> |
| 55 | #include <asm/pgalloc.h> |
| 56 | #include <asm/desc.h> |
| 57 | #include <asm/kdebug.h> |
| 58 | #include <asm/tlbflush.h> |
| 59 | #include <asm/proto.h> |
Andi Kleen | 7515211 | 2005-05-16 21:53:34 -0700 | [diff] [blame] | 60 | #include <asm/nmi.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | |
| 62 | /* Number of siblings per CPU package */ |
| 63 | int smp_num_siblings = 1; |
| 64 | /* Package ID of each logical CPU */ |
Ravikiran G Thirumalai | 6c231b7 | 2005-09-06 15:17:45 -0700 | [diff] [blame] | 65 | u8 phys_proc_id[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID }; |
| 66 | u8 cpu_core_id[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | EXPORT_SYMBOL(phys_proc_id); |
Andi Kleen | 3dd9d51 | 2005-04-16 15:25:15 -0700 | [diff] [blame] | 68 | EXPORT_SYMBOL(cpu_core_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
| 70 | /* Bitmask of currently online CPUs */ |
Ravikiran G Thirumalai | 6c231b7 | 2005-09-06 15:17:45 -0700 | [diff] [blame] | 71 | cpumask_t cpu_online_map __read_mostly; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 73 | EXPORT_SYMBOL(cpu_online_map); |
| 74 | |
| 75 | /* |
| 76 | * Private maps to synchronize booting between AP and BP. |
| 77 | * Probably not needed anymore, but it makes for easier debugging. -AK |
| 78 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | cpumask_t cpu_callin_map; |
| 80 | cpumask_t cpu_callout_map; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 81 | |
| 82 | cpumask_t cpu_possible_map; |
| 83 | EXPORT_SYMBOL(cpu_possible_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | |
| 85 | /* Per CPU bogomips and other parameters */ |
| 86 | struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned; |
| 87 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 88 | /* Set when the idlers are all forked */ |
| 89 | int smp_threads_ready; |
| 90 | |
Ravikiran G Thirumalai | 6c231b7 | 2005-09-06 15:17:45 -0700 | [diff] [blame] | 91 | cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly; |
| 92 | cpumask_t cpu_core_map[NR_CPUS] __read_mostly; |
Andi Kleen | 2df9fa3 | 2005-05-20 14:27:59 -0700 | [diff] [blame] | 93 | EXPORT_SYMBOL(cpu_core_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
| 95 | /* |
| 96 | * Trampoline 80x86 program as an array. |
| 97 | */ |
| 98 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 99 | extern unsigned char trampoline_data[]; |
| 100 | extern unsigned char trampoline_end[]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 102 | /* State of each CPU */ |
| 103 | DEFINE_PER_CPU(int, cpu_state) = { 0 }; |
| 104 | |
| 105 | /* |
| 106 | * Store all idle threads, this can be reused instead of creating |
| 107 | * a new thread. Also avoids complicated thread destroy functionality |
| 108 | * for idle threads. |
| 109 | */ |
| 110 | struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ; |
| 111 | |
| 112 | #define get_idle_for_cpu(x) (idle_thread_array[(x)]) |
| 113 | #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) |
| 114 | |
| 115 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | * Currently trivial. Write the real->protected mode |
| 117 | * bootstrap into the page concerned. The caller |
| 118 | * has made sure it's suitably aligned. |
| 119 | */ |
| 120 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 121 | static unsigned long __cpuinit setup_trampoline(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | { |
| 123 | void *tramp = __va(SMP_TRAMPOLINE_BASE); |
| 124 | memcpy(tramp, trampoline_data, trampoline_end - trampoline_data); |
| 125 | return virt_to_phys(tramp); |
| 126 | } |
| 127 | |
| 128 | /* |
| 129 | * The bootstrap kernel entry code has set these up. Save them for |
| 130 | * a given CPU |
| 131 | */ |
| 132 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 133 | static void __cpuinit smp_store_cpu_info(int id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | { |
| 135 | struct cpuinfo_x86 *c = cpu_data + id; |
| 136 | |
| 137 | *c = boot_cpu_data; |
| 138 | identify_cpu(c); |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 139 | print_cpu_info(c); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | /* |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 143 | * New Funky TSC sync algorithm borrowed from IA64. |
| 144 | * Main advantage is that it doesn't reset the TSCs fully and |
| 145 | * in general looks more robust and it works better than my earlier |
| 146 | * attempts. I believe it was written by David Mosberger. Some minor |
| 147 | * adjustments for x86-64 by me -AK |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | * |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 149 | * Original comment reproduced below. |
| 150 | * |
| 151 | * Synchronize TSC of the current (slave) CPU with the TSC of the |
| 152 | * MASTER CPU (normally the time-keeper CPU). We use a closed loop to |
| 153 | * eliminate the possibility of unaccounted-for errors (such as |
| 154 | * getting a machine check in the middle of a calibration step). The |
| 155 | * basic idea is for the slave to ask the master what itc value it has |
| 156 | * and to read its own itc before and after the master responds. Each |
| 157 | * iteration gives us three timestamps: |
| 158 | * |
| 159 | * slave master |
| 160 | * |
| 161 | * t0 ---\ |
| 162 | * ---\ |
| 163 | * ---> |
| 164 | * tm |
| 165 | * /--- |
| 166 | * /--- |
| 167 | * t1 <--- |
| 168 | * |
| 169 | * |
| 170 | * The goal is to adjust the slave's TSC such that tm falls exactly |
| 171 | * half-way between t0 and t1. If we achieve this, the clocks are |
| 172 | * synchronized provided the interconnect between the slave and the |
| 173 | * master is symmetric. Even if the interconnect were asymmetric, we |
| 174 | * would still know that the synchronization error is smaller than the |
| 175 | * roundtrip latency (t0 - t1). |
| 176 | * |
| 177 | * When the interconnect is quiet and symmetric, this lets us |
| 178 | * synchronize the TSC to within one or two cycles. However, we can |
| 179 | * only *guarantee* that the synchronization is accurate to within a |
| 180 | * round-trip time, which is typically in the range of several hundred |
| 181 | * cycles (e.g., ~500 cycles). In practice, this means that the TSCs |
| 182 | * are usually almost perfectly synchronized, but we shouldn't assume |
| 183 | * that the accuracy is much better than half a micro second or so. |
| 184 | * |
| 185 | * [there are other errors like the latency of RDTSC and of the |
| 186 | * WRMSR. These can also account to hundreds of cycles. So it's |
| 187 | * probably worse. It claims 153 cycles error on a dual Opteron, |
| 188 | * but I suspect the numbers are actually somewhat worse -AK] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | */ |
| 190 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 191 | #define MASTER 0 |
| 192 | #define SLAVE (SMP_CACHE_BYTES/8) |
| 193 | |
| 194 | /* Intentionally don't use cpu_relax() while TSC synchronization |
| 195 | because we don't want to go into funky power save modi or cause |
| 196 | hypervisors to schedule us away. Going to sleep would likely affect |
| 197 | latency and low latency is the primary objective here. -AK */ |
| 198 | #define no_cpu_relax() barrier() |
| 199 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 200 | static __cpuinitdata DEFINE_SPINLOCK(tsc_sync_lock); |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 201 | static volatile __cpuinitdata unsigned long go[SLAVE + 1]; |
| 202 | static int notscsync __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 204 | #undef DEBUG_TSC_SYNC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 206 | #define NUM_ROUNDS 64 /* magic value */ |
| 207 | #define NUM_ITERS 5 /* likewise */ |
| 208 | |
| 209 | /* Callback on boot CPU */ |
| 210 | static __cpuinit void sync_master(void *arg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | { |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 212 | unsigned long flags, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 214 | go[MASTER] = 0; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 215 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 216 | local_irq_save(flags); |
| 217 | { |
| 218 | for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { |
| 219 | while (!go[MASTER]) |
| 220 | no_cpu_relax(); |
| 221 | go[MASTER] = 0; |
| 222 | rdtscll(go[SLAVE]); |
| 223 | } |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 224 | } |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 225 | local_irq_restore(flags); |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 226 | } |
| 227 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 228 | /* |
| 229 | * Return the number of cycles by which our tsc differs from the tsc |
| 230 | * on the master (time-keeper) CPU. A positive number indicates our |
| 231 | * tsc is ahead of the master, negative that it is behind. |
| 232 | */ |
| 233 | static inline long |
| 234 | get_delta(long *rt, long *master) |
| 235 | { |
| 236 | unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; |
| 237 | unsigned long tcenter, t0, t1, tm; |
| 238 | int i; |
| 239 | |
| 240 | for (i = 0; i < NUM_ITERS; ++i) { |
| 241 | rdtscll(t0); |
| 242 | go[MASTER] = 1; |
| 243 | while (!(tm = go[SLAVE])) |
| 244 | no_cpu_relax(); |
| 245 | go[SLAVE] = 0; |
| 246 | rdtscll(t1); |
| 247 | |
| 248 | if (t1 - t0 < best_t1 - best_t0) |
| 249 | best_t0 = t0, best_t1 = t1, best_tm = tm; |
| 250 | } |
| 251 | |
| 252 | *rt = best_t1 - best_t0; |
| 253 | *master = best_tm - best_t0; |
| 254 | |
| 255 | /* average best_t0 and best_t1 without overflow: */ |
| 256 | tcenter = (best_t0/2 + best_t1/2); |
| 257 | if (best_t0 % 2 + best_t1 % 2 == 2) |
| 258 | ++tcenter; |
| 259 | return tcenter - best_tm; |
| 260 | } |
| 261 | |
Eric W. Biederman | 3d483f4 | 2005-07-29 14:03:29 -0700 | [diff] [blame] | 262 | static __cpuinit void sync_tsc(unsigned int master) |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 263 | { |
| 264 | int i, done = 0; |
| 265 | long delta, adj, adjust_latency = 0; |
| 266 | unsigned long flags, rt, master_time_stamp, bound; |
Olaf Hering | 44456d3 | 2005-07-27 11:45:17 -0700 | [diff] [blame] | 267 | #ifdef DEBUG_TSC_SYNC |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 268 | static struct syncdebug { |
| 269 | long rt; /* roundtrip time */ |
| 270 | long master; /* master's timestamp */ |
| 271 | long diff; /* difference between midpoint and master's timestamp */ |
| 272 | long lat; /* estimate of tsc adjustment latency */ |
| 273 | } t[NUM_ROUNDS] __cpuinitdata; |
| 274 | #endif |
| 275 | |
Eric W. Biederman | 3d483f4 | 2005-07-29 14:03:29 -0700 | [diff] [blame] | 276 | printk(KERN_INFO "CPU %d: Syncing TSC to CPU %u.\n", |
| 277 | smp_processor_id(), master); |
| 278 | |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 279 | go[MASTER] = 1; |
| 280 | |
Eric W. Biederman | 3d483f4 | 2005-07-29 14:03:29 -0700 | [diff] [blame] | 281 | /* It is dangerous to broadcast IPI as cpus are coming up, |
| 282 | * as they may not be ready to accept them. So since |
| 283 | * we only need to send the ipi to the boot cpu direct |
| 284 | * the message, and avoid the race. |
| 285 | */ |
| 286 | smp_call_function_single(master, sync_master, NULL, 1, 0); |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 287 | |
| 288 | while (go[MASTER]) /* wait for master to be ready */ |
| 289 | no_cpu_relax(); |
| 290 | |
| 291 | spin_lock_irqsave(&tsc_sync_lock, flags); |
| 292 | { |
| 293 | for (i = 0; i < NUM_ROUNDS; ++i) { |
| 294 | delta = get_delta(&rt, &master_time_stamp); |
| 295 | if (delta == 0) { |
| 296 | done = 1; /* let's lock on to this... */ |
| 297 | bound = rt; |
| 298 | } |
| 299 | |
| 300 | if (!done) { |
| 301 | unsigned long t; |
| 302 | if (i > 0) { |
| 303 | adjust_latency += -delta; |
| 304 | adj = -delta + adjust_latency/4; |
| 305 | } else |
| 306 | adj = -delta; |
| 307 | |
| 308 | rdtscll(t); |
| 309 | wrmsrl(MSR_IA32_TSC, t + adj); |
| 310 | } |
Olaf Hering | 44456d3 | 2005-07-27 11:45:17 -0700 | [diff] [blame] | 311 | #ifdef DEBUG_TSC_SYNC |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 312 | t[i].rt = rt; |
| 313 | t[i].master = master_time_stamp; |
| 314 | t[i].diff = delta; |
| 315 | t[i].lat = adjust_latency/4; |
| 316 | #endif |
| 317 | } |
| 318 | } |
| 319 | spin_unlock_irqrestore(&tsc_sync_lock, flags); |
| 320 | |
Olaf Hering | 44456d3 | 2005-07-27 11:45:17 -0700 | [diff] [blame] | 321 | #ifdef DEBUG_TSC_SYNC |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 322 | for (i = 0; i < NUM_ROUNDS; ++i) |
| 323 | printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", |
| 324 | t[i].rt, t[i].master, t[i].diff, t[i].lat); |
| 325 | #endif |
| 326 | |
| 327 | printk(KERN_INFO |
| 328 | "CPU %d: synchronized TSC with CPU %u (last diff %ld cycles, " |
| 329 | "maxerr %lu cycles)\n", |
Eric W. Biederman | 3d483f4 | 2005-07-29 14:03:29 -0700 | [diff] [blame] | 330 | smp_processor_id(), master, delta, rt); |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 331 | } |
| 332 | |
| 333 | static void __cpuinit tsc_sync_wait(void) |
| 334 | { |
| 335 | if (notscsync || !cpu_has_tsc) |
| 336 | return; |
Eric W. Biederman | 349188f | 2005-08-11 22:26:25 -0600 | [diff] [blame] | 337 | sync_tsc(0); |
Andi Kleen | dda50e7 | 2005-05-16 21:53:25 -0700 | [diff] [blame] | 338 | } |
| 339 | |
| 340 | static __init int notscsync_setup(char *s) |
| 341 | { |
| 342 | notscsync = 1; |
| 343 | return 0; |
| 344 | } |
| 345 | __setup("notscsync", notscsync_setup); |
| 346 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 347 | static atomic_t init_deasserted __cpuinitdata; |
| 348 | |
| 349 | /* |
| 350 | * Report back to the Boot Processor. |
| 351 | * Running on AP. |
| 352 | */ |
| 353 | void __cpuinit smp_callin(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 354 | { |
| 355 | int cpuid, phys_id; |
| 356 | unsigned long timeout; |
| 357 | |
| 358 | /* |
| 359 | * If waken up by an INIT in an 82489DX configuration |
| 360 | * we may get here before an INIT-deassert IPI reaches |
| 361 | * our local APIC. We have to wait for the IPI or we'll |
| 362 | * lock up on an APIC access. |
| 363 | */ |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 364 | while (!atomic_read(&init_deasserted)) |
| 365 | cpu_relax(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | |
| 367 | /* |
| 368 | * (This works even if the APIC is not enabled.) |
| 369 | */ |
| 370 | phys_id = GET_APIC_ID(apic_read(APIC_ID)); |
| 371 | cpuid = smp_processor_id(); |
| 372 | if (cpu_isset(cpuid, cpu_callin_map)) { |
| 373 | panic("smp_callin: phys CPU#%d, CPU#%d already present??\n", |
| 374 | phys_id, cpuid); |
| 375 | } |
| 376 | Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id); |
| 377 | |
| 378 | /* |
| 379 | * STARTUP IPIs are fragile beasts as they might sometimes |
| 380 | * trigger some glue motherboard logic. Complete APIC bus |
| 381 | * silence for 1 second, this overestimates the time the |
| 382 | * boot CPU is spending to send the up to 2 STARTUP IPIs |
| 383 | * by a factor of two. This should be enough. |
| 384 | */ |
| 385 | |
| 386 | /* |
| 387 | * Waiting 2s total for startup (udelay is not yet working) |
| 388 | */ |
| 389 | timeout = jiffies + 2*HZ; |
| 390 | while (time_before(jiffies, timeout)) { |
| 391 | /* |
| 392 | * Has the boot CPU finished it's STARTUP sequence? |
| 393 | */ |
| 394 | if (cpu_isset(cpuid, cpu_callout_map)) |
| 395 | break; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 396 | cpu_relax(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | if (!time_before(jiffies, timeout)) { |
| 400 | panic("smp_callin: CPU%d started up but did not get a callout!\n", |
| 401 | cpuid); |
| 402 | } |
| 403 | |
| 404 | /* |
| 405 | * the boot CPU has finished the init stage and is spinning |
| 406 | * on callin_map until we finish. We are free to set up this |
| 407 | * CPU, first the APIC. (this is probably redundant on most |
| 408 | * boards) |
| 409 | */ |
| 410 | |
| 411 | Dprintk("CALLIN, before setup_local_APIC().\n"); |
| 412 | setup_local_APIC(); |
| 413 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 414 | /* |
| 415 | * Get our bogomips. |
| 416 | */ |
| 417 | calibrate_delay(); |
| 418 | Dprintk("Stack at about %p\n",&cpuid); |
| 419 | |
| 420 | disable_APIC_timer(); |
| 421 | |
| 422 | /* |
| 423 | * Save our processor parameters |
| 424 | */ |
| 425 | smp_store_cpu_info(cpuid); |
| 426 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 427 | /* |
| 428 | * Allow the master to continue. |
| 429 | */ |
| 430 | cpu_set(cpuid, cpu_callin_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | } |
| 432 | |
Ashok Raj | cb0cd8d | 2005-06-25 14:55:01 -0700 | [diff] [blame] | 433 | static inline void set_cpu_sibling_map(int cpu) |
| 434 | { |
| 435 | int i; |
| 436 | |
| 437 | if (smp_num_siblings > 1) { |
| 438 | for_each_cpu(i) { |
| 439 | if (cpu_core_id[cpu] == cpu_core_id[i]) { |
| 440 | cpu_set(i, cpu_sibling_map[cpu]); |
| 441 | cpu_set(cpu, cpu_sibling_map[i]); |
| 442 | } |
| 443 | } |
| 444 | } else { |
| 445 | cpu_set(cpu, cpu_sibling_map[cpu]); |
| 446 | } |
| 447 | |
| 448 | if (current_cpu_data.x86_num_cores > 1) { |
| 449 | for_each_cpu(i) { |
| 450 | if (phys_proc_id[cpu] == phys_proc_id[i]) { |
| 451 | cpu_set(i, cpu_core_map[cpu]); |
| 452 | cpu_set(cpu, cpu_core_map[i]); |
| 453 | } |
| 454 | } |
| 455 | } else { |
| 456 | cpu_core_map[cpu] = cpu_sibling_map[cpu]; |
| 457 | } |
| 458 | } |
| 459 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 461 | * Setup code on secondary processor (after comming out of the trampoline) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | */ |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 463 | void __cpuinit start_secondary(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | { |
| 465 | /* |
| 466 | * Dont put anything before smp_callin(), SMP |
| 467 | * booting is too fragile that we want to limit the |
| 468 | * things done here to the most necessary things. |
| 469 | */ |
| 470 | cpu_init(); |
| 471 | smp_callin(); |
| 472 | |
| 473 | /* otherwise gcc will move up the smp_processor_id before the cpu_init */ |
| 474 | barrier(); |
| 475 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | Dprintk("cpu %d: setting up apic clock\n", smp_processor_id()); |
| 477 | setup_secondary_APIC_clock(); |
| 478 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 479 | Dprintk("cpu %d: enabling apic timer\n", smp_processor_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 480 | |
| 481 | if (nmi_watchdog == NMI_IO_APIC) { |
| 482 | disable_8259A_irq(0); |
| 483 | enable_NMI_through_LVT0(NULL); |
| 484 | enable_8259A_irq(0); |
| 485 | } |
| 486 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 487 | enable_APIC_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | |
| 489 | /* |
Ashok Raj | cb0cd8d | 2005-06-25 14:55:01 -0700 | [diff] [blame] | 490 | * The sibling maps must be set before turing the online map on for |
| 491 | * this cpu |
| 492 | */ |
| 493 | set_cpu_sibling_map(smp_processor_id()); |
| 494 | |
Andi Kleen | 1eecd73 | 2005-08-19 06:56:40 +0200 | [diff] [blame] | 495 | /* |
| 496 | * Wait for TSC sync to not schedule things before. |
| 497 | * We still process interrupts, which could see an inconsistent |
| 498 | * time in that window unfortunately. |
| 499 | * Do this here because TSC sync has global unprotected state. |
| 500 | */ |
| 501 | tsc_sync_wait(); |
| 502 | |
Ashok Raj | cb0cd8d | 2005-06-25 14:55:01 -0700 | [diff] [blame] | 503 | /* |
Ashok Raj | 884d9e40 | 2005-06-25 14:55:02 -0700 | [diff] [blame] | 504 | * We need to hold call_lock, so there is no inconsistency |
| 505 | * between the time smp_call_function() determines number of |
| 506 | * IPI receipients, and the time when the determination is made |
| 507 | * for which cpus receive the IPI in genapic_flat.c. Holding this |
| 508 | * lock helps us to not include this cpu in a currently in progress |
| 509 | * smp_call_function(). |
| 510 | */ |
| 511 | lock_ipi_call_lock(); |
| 512 | |
| 513 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 514 | * Allow the master to continue. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | cpu_set(smp_processor_id(), cpu_online_map); |
Ashok Raj | 884d9e40 | 2005-06-25 14:55:02 -0700 | [diff] [blame] | 517 | per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; |
| 518 | unlock_ipi_call_lock(); |
| 519 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | cpu_idle(); |
| 521 | } |
| 522 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 523 | extern volatile unsigned long init_rsp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | extern void (*initial_code)(void); |
| 525 | |
Olaf Hering | 44456d3 | 2005-07-27 11:45:17 -0700 | [diff] [blame] | 526 | #ifdef APIC_DEBUG |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 527 | static void inquire_remote_apic(int apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 528 | { |
| 529 | unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 }; |
| 530 | char *names[] = { "ID", "VERSION", "SPIV" }; |
| 531 | int timeout, status; |
| 532 | |
| 533 | printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid); |
| 534 | |
| 535 | for (i = 0; i < sizeof(regs) / sizeof(*regs); i++) { |
| 536 | printk("... APIC #%d %s: ", apicid, names[i]); |
| 537 | |
| 538 | /* |
| 539 | * Wait for idle. |
| 540 | */ |
| 541 | apic_wait_icr_idle(); |
| 542 | |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 543 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid)); |
| 544 | apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 545 | |
| 546 | timeout = 0; |
| 547 | do { |
| 548 | udelay(100); |
| 549 | status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK; |
| 550 | } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000); |
| 551 | |
| 552 | switch (status) { |
| 553 | case APIC_ICR_RR_VALID: |
| 554 | status = apic_read(APIC_RRR); |
| 555 | printk("%08x\n", status); |
| 556 | break; |
| 557 | default: |
| 558 | printk("failed\n"); |
| 559 | } |
| 560 | } |
| 561 | } |
| 562 | #endif |
| 563 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 564 | /* |
| 565 | * Kick the secondary to wake up. |
| 566 | */ |
| 567 | static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | { |
| 569 | unsigned long send_status = 0, accept_status = 0; |
| 570 | int maxlvt, timeout, num_starts, j; |
| 571 | |
| 572 | Dprintk("Asserting INIT.\n"); |
| 573 | |
| 574 | /* |
| 575 | * Turn INIT on target chip |
| 576 | */ |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 577 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | |
| 579 | /* |
| 580 | * Send IPI |
| 581 | */ |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 582 | apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | | APIC_DM_INIT); |
| 584 | |
| 585 | Dprintk("Waiting for send to finish...\n"); |
| 586 | timeout = 0; |
| 587 | do { |
| 588 | Dprintk("+"); |
| 589 | udelay(100); |
| 590 | send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; |
| 591 | } while (send_status && (timeout++ < 1000)); |
| 592 | |
| 593 | mdelay(10); |
| 594 | |
| 595 | Dprintk("Deasserting INIT.\n"); |
| 596 | |
| 597 | /* Target chip */ |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 598 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | |
| 600 | /* Send IPI */ |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 601 | apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | |
| 603 | Dprintk("Waiting for send to finish...\n"); |
| 604 | timeout = 0; |
| 605 | do { |
| 606 | Dprintk("+"); |
| 607 | udelay(100); |
| 608 | send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; |
| 609 | } while (send_status && (timeout++ < 1000)); |
| 610 | |
| 611 | atomic_set(&init_deasserted, 1); |
| 612 | |
| 613 | /* |
| 614 | * Should we send STARTUP IPIs ? |
| 615 | * |
| 616 | * Determine this based on the APIC version. |
| 617 | * If we don't have an integrated APIC, don't send the STARTUP IPIs. |
| 618 | */ |
| 619 | if (APIC_INTEGRATED(apic_version[phys_apicid])) |
| 620 | num_starts = 2; |
| 621 | else |
| 622 | num_starts = 0; |
| 623 | |
| 624 | /* |
| 625 | * Run STARTUP IPI loop. |
| 626 | */ |
| 627 | Dprintk("#startup loops: %d.\n", num_starts); |
| 628 | |
| 629 | maxlvt = get_maxlvt(); |
| 630 | |
| 631 | for (j = 1; j <= num_starts; j++) { |
| 632 | Dprintk("Sending STARTUP #%d.\n",j); |
| 633 | apic_read_around(APIC_SPIV); |
| 634 | apic_write(APIC_ESR, 0); |
| 635 | apic_read(APIC_ESR); |
| 636 | Dprintk("After apic_write.\n"); |
| 637 | |
| 638 | /* |
| 639 | * STARTUP IPI |
| 640 | */ |
| 641 | |
| 642 | /* Target chip */ |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 643 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | |
| 645 | /* Boot on the stack */ |
| 646 | /* Kick the second */ |
Andi Kleen | c1507eb | 2005-09-12 18:49:23 +0200 | [diff] [blame^] | 647 | apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | |
| 649 | /* |
| 650 | * Give the other CPU some time to accept the IPI. |
| 651 | */ |
| 652 | udelay(300); |
| 653 | |
| 654 | Dprintk("Startup point 1.\n"); |
| 655 | |
| 656 | Dprintk("Waiting for send to finish...\n"); |
| 657 | timeout = 0; |
| 658 | do { |
| 659 | Dprintk("+"); |
| 660 | udelay(100); |
| 661 | send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; |
| 662 | } while (send_status && (timeout++ < 1000)); |
| 663 | |
| 664 | /* |
| 665 | * Give the other CPU some time to accept the IPI. |
| 666 | */ |
| 667 | udelay(200); |
| 668 | /* |
| 669 | * Due to the Pentium erratum 3AP. |
| 670 | */ |
| 671 | if (maxlvt > 3) { |
| 672 | apic_read_around(APIC_SPIV); |
| 673 | apic_write(APIC_ESR, 0); |
| 674 | } |
| 675 | accept_status = (apic_read(APIC_ESR) & 0xEF); |
| 676 | if (send_status || accept_status) |
| 677 | break; |
| 678 | } |
| 679 | Dprintk("After Startup.\n"); |
| 680 | |
| 681 | if (send_status) |
| 682 | printk(KERN_ERR "APIC never delivered???\n"); |
| 683 | if (accept_status) |
| 684 | printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status); |
| 685 | |
| 686 | return (send_status | accept_status); |
| 687 | } |
| 688 | |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 689 | struct create_idle { |
| 690 | struct task_struct *idle; |
| 691 | struct completion done; |
| 692 | int cpu; |
| 693 | }; |
| 694 | |
| 695 | void do_fork_idle(void *_c_idle) |
| 696 | { |
| 697 | struct create_idle *c_idle = _c_idle; |
| 698 | |
| 699 | c_idle->idle = fork_idle(c_idle->cpu); |
| 700 | complete(&c_idle->done); |
| 701 | } |
| 702 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 703 | /* |
| 704 | * Boot one CPU. |
| 705 | */ |
| 706 | static int __cpuinit do_boot_cpu(int cpu, int apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | unsigned long boot_error; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 709 | int timeout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | unsigned long start_rip; |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 711 | struct create_idle c_idle = { |
| 712 | .cpu = cpu, |
| 713 | .done = COMPLETION_INITIALIZER(c_idle.done), |
| 714 | }; |
| 715 | DECLARE_WORK(work, do_fork_idle, &c_idle); |
| 716 | |
| 717 | c_idle.idle = get_idle_for_cpu(cpu); |
| 718 | |
| 719 | if (c_idle.idle) { |
| 720 | c_idle.idle->thread.rsp = (unsigned long) (((struct pt_regs *) |
| 721 | (THREAD_SIZE + (unsigned long) c_idle.idle->thread_info)) - 1); |
| 722 | init_idle(c_idle.idle, cpu); |
| 723 | goto do_rest; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 724 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 726 | /* |
| 727 | * During cold boot process, keventd thread is not spun up yet. |
| 728 | * When we do cpu hot-add, we create idle threads on the fly, we should |
| 729 | * not acquire any attributes from the calling context. Hence the clean |
| 730 | * way to create kernel_threads() is to do that from keventd(). |
| 731 | * We do the current_is_keventd() due to the fact that ACPI notifier |
| 732 | * was also queuing to keventd() and when the caller is already running |
| 733 | * in context of keventd(), we would end up with locking up the keventd |
| 734 | * thread. |
| 735 | */ |
| 736 | if (!keventd_up() || current_is_keventd()) |
| 737 | work.func(work.data); |
| 738 | else { |
| 739 | schedule_work(&work); |
| 740 | wait_for_completion(&c_idle.done); |
| 741 | } |
| 742 | |
| 743 | if (IS_ERR(c_idle.idle)) { |
| 744 | printk("failed fork for CPU %d\n", cpu); |
| 745 | return PTR_ERR(c_idle.idle); |
| 746 | } |
| 747 | |
| 748 | set_idle_for_cpu(cpu, c_idle.idle); |
| 749 | |
| 750 | do_rest: |
| 751 | |
| 752 | cpu_pda[cpu].pcurrent = c_idle.idle; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | |
| 754 | start_rip = setup_trampoline(); |
| 755 | |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 756 | init_rsp = c_idle.idle->thread.rsp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | per_cpu(init_tss,cpu).rsp0 = init_rsp; |
| 758 | initial_code = start_secondary; |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 759 | clear_ti_thread_flag(c_idle.idle->thread_info, TIF_FORK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | |
Andi Kleen | de04f32 | 2005-07-28 21:15:29 -0700 | [diff] [blame] | 761 | printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu, |
| 762 | cpus_weight(cpu_present_map), |
| 763 | apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | |
| 765 | /* |
| 766 | * This grunge runs the startup process for |
| 767 | * the targeted processor. |
| 768 | */ |
| 769 | |
| 770 | atomic_set(&init_deasserted, 0); |
| 771 | |
| 772 | Dprintk("Setting warm reset code and vector.\n"); |
| 773 | |
| 774 | CMOS_WRITE(0xa, 0xf); |
| 775 | local_flush_tlb(); |
| 776 | Dprintk("1.\n"); |
| 777 | *((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4; |
| 778 | Dprintk("2.\n"); |
| 779 | *((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf; |
| 780 | Dprintk("3.\n"); |
| 781 | |
| 782 | /* |
| 783 | * Be paranoid about clearing APIC errors. |
| 784 | */ |
| 785 | if (APIC_INTEGRATED(apic_version[apicid])) { |
| 786 | apic_read_around(APIC_SPIV); |
| 787 | apic_write(APIC_ESR, 0); |
| 788 | apic_read(APIC_ESR); |
| 789 | } |
| 790 | |
| 791 | /* |
| 792 | * Status is now clean |
| 793 | */ |
| 794 | boot_error = 0; |
| 795 | |
| 796 | /* |
| 797 | * Starting actual IPI sequence... |
| 798 | */ |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 799 | boot_error = wakeup_secondary_via_INIT(apicid, start_rip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | |
| 801 | if (!boot_error) { |
| 802 | /* |
| 803 | * allow APs to start initializing. |
| 804 | */ |
| 805 | Dprintk("Before Callout %d.\n", cpu); |
| 806 | cpu_set(cpu, cpu_callout_map); |
| 807 | Dprintk("After Callout %d.\n", cpu); |
| 808 | |
| 809 | /* |
| 810 | * Wait 5s total for a response |
| 811 | */ |
| 812 | for (timeout = 0; timeout < 50000; timeout++) { |
| 813 | if (cpu_isset(cpu, cpu_callin_map)) |
| 814 | break; /* It has booted */ |
| 815 | udelay(100); |
| 816 | } |
| 817 | |
| 818 | if (cpu_isset(cpu, cpu_callin_map)) { |
| 819 | /* number CPUs logically, starting from 1 (BSP is 0) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | Dprintk("CPU has booted.\n"); |
| 821 | } else { |
| 822 | boot_error = 1; |
| 823 | if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE)) |
| 824 | == 0xA5) |
| 825 | /* trampoline started but...? */ |
| 826 | printk("Stuck ??\n"); |
| 827 | else |
| 828 | /* trampoline code not run */ |
| 829 | printk("Not responding.\n"); |
Olaf Hering | 44456d3 | 2005-07-27 11:45:17 -0700 | [diff] [blame] | 830 | #ifdef APIC_DEBUG |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 831 | inquire_remote_apic(apicid); |
| 832 | #endif |
| 833 | } |
| 834 | } |
| 835 | if (boot_error) { |
| 836 | cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */ |
| 837 | clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */ |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 838 | cpu_clear(cpu, cpu_present_map); |
| 839 | cpu_clear(cpu, cpu_possible_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | x86_cpu_to_apicid[cpu] = BAD_APICID; |
| 841 | x86_cpu_to_log_apicid[cpu] = BAD_APICID; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 842 | return -EIO; |
| 843 | } |
| 844 | |
| 845 | return 0; |
| 846 | } |
| 847 | |
| 848 | cycles_t cacheflush_time; |
| 849 | unsigned long cache_decay_ticks; |
| 850 | |
| 851 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 852 | * Cleanup possible dangling ends... |
| 853 | */ |
| 854 | static __cpuinit void smp_cleanup_boot(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 855 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 857 | * Paranoid: Set warm reset code and vector here back |
| 858 | * to default values. |
| 859 | */ |
| 860 | CMOS_WRITE(0, 0xf); |
| 861 | |
| 862 | /* |
| 863 | * Reset trampoline flag |
| 864 | */ |
| 865 | *((volatile int *) phys_to_virt(0x467)) = 0; |
| 866 | |
| 867 | #ifndef CONFIG_HOTPLUG_CPU |
| 868 | /* |
| 869 | * Free pages reserved for SMP bootup. |
| 870 | * When you add hotplug CPU support later remove this |
| 871 | * Note there is more work to be done for later CPU bootup. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | */ |
| 873 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 874 | free_page((unsigned long) __va(PAGE_SIZE)); |
| 875 | free_page((unsigned long) __va(SMP_TRAMPOLINE_BASE)); |
| 876 | #endif |
| 877 | } |
| 878 | |
| 879 | /* |
| 880 | * Fall back to non SMP mode after errors. |
| 881 | * |
| 882 | * RED-PEN audit/test this more. I bet there is more state messed up here. |
| 883 | */ |
Ashok Raj | e6982c6 | 2005-06-25 14:54:58 -0700 | [diff] [blame] | 884 | static __init void disable_smp(void) |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 885 | { |
| 886 | cpu_present_map = cpumask_of_cpu(0); |
| 887 | cpu_possible_map = cpumask_of_cpu(0); |
| 888 | if (smp_found_config) |
| 889 | phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id); |
| 890 | else |
| 891 | phys_cpu_present_map = physid_mask_of_physid(0); |
| 892 | cpu_set(0, cpu_sibling_map[0]); |
| 893 | cpu_set(0, cpu_core_map[0]); |
| 894 | } |
| 895 | |
Andi Kleen | 61b1b2d | 2005-07-28 21:15:27 -0700 | [diff] [blame] | 896 | #ifdef CONFIG_HOTPLUG_CPU |
| 897 | /* |
| 898 | * cpu_possible_map should be static, it cannot change as cpu's |
| 899 | * are onlined, or offlined. The reason is per-cpu data-structures |
| 900 | * are allocated by some modules at init time, and dont expect to |
| 901 | * do this dynamically on cpu arrival/departure. |
| 902 | * cpu_present_map on the other hand can change dynamically. |
| 903 | * In case when cpu_hotplug is not compiled, then we resort to current |
| 904 | * behaviour, which is cpu_possible == cpu_present. |
| 905 | * If cpu-hotplug is supported, then we need to preallocate for all |
| 906 | * those NR_CPUS, hence cpu_possible_map represents entire NR_CPUS range. |
| 907 | * - Ashok Raj |
| 908 | */ |
| 909 | static void prefill_possible_map(void) |
| 910 | { |
| 911 | int i; |
| 912 | for (i = 0; i < NR_CPUS; i++) |
| 913 | cpu_set(i, cpu_possible_map); |
| 914 | } |
| 915 | #endif |
| 916 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 917 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 918 | * Various sanity checks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 919 | */ |
Ashok Raj | e6982c6 | 2005-06-25 14:54:58 -0700 | [diff] [blame] | 920 | static int __init smp_sanity_check(unsigned max_cpus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 921 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 922 | if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { |
| 923 | printk("weird, boot CPU (#%d) not listed by the BIOS.\n", |
| 924 | hard_smp_processor_id()); |
| 925 | physid_set(hard_smp_processor_id(), phys_cpu_present_map); |
| 926 | } |
| 927 | |
| 928 | /* |
| 929 | * If we couldn't find an SMP configuration at boot time, |
| 930 | * get out of here now! |
| 931 | */ |
| 932 | if (!smp_found_config) { |
| 933 | printk(KERN_NOTICE "SMP motherboard not detected.\n"); |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 934 | disable_smp(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 935 | if (APIC_init_uniprocessor()) |
| 936 | printk(KERN_NOTICE "Local APIC not detected." |
| 937 | " Using dummy APIC emulation.\n"); |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 938 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 939 | } |
| 940 | |
| 941 | /* |
| 942 | * Should not be necessary because the MP table should list the boot |
| 943 | * CPU too, but we do it for the sake of robustness anyway. |
| 944 | */ |
| 945 | if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) { |
| 946 | printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n", |
| 947 | boot_cpu_id); |
| 948 | physid_set(hard_smp_processor_id(), phys_cpu_present_map); |
| 949 | } |
| 950 | |
| 951 | /* |
| 952 | * If we couldn't find a local APIC, then get out of here now! |
| 953 | */ |
| 954 | if (APIC_INTEGRATED(apic_version[boot_cpu_id]) && !cpu_has_apic) { |
| 955 | printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n", |
| 956 | boot_cpu_id); |
| 957 | printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n"); |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 958 | nr_ioapics = 0; |
| 959 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | } |
| 961 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | /* |
| 963 | * If SMP should be disabled, then really disable it! |
| 964 | */ |
| 965 | if (!max_cpus) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n"); |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 967 | nr_ioapics = 0; |
| 968 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 969 | } |
| 970 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 971 | return 0; |
| 972 | } |
| 973 | |
| 974 | /* |
| 975 | * Prepare for SMP bootup. The MP table or ACPI has been read |
| 976 | * earlier. Just do some sanity checking here and enable APIC mode. |
| 977 | */ |
Ashok Raj | e6982c6 | 2005-06-25 14:54:58 -0700 | [diff] [blame] | 978 | void __init smp_prepare_cpus(unsigned int max_cpus) |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 979 | { |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 980 | nmi_watchdog_default(); |
| 981 | current_cpu_data = boot_cpu_data; |
| 982 | current_thread_info()->cpu = 0; /* needed? */ |
| 983 | |
Andi Kleen | 61b1b2d | 2005-07-28 21:15:27 -0700 | [diff] [blame] | 984 | #ifdef CONFIG_HOTPLUG_CPU |
| 985 | prefill_possible_map(); |
| 986 | #endif |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 987 | |
| 988 | if (smp_sanity_check(max_cpus) < 0) { |
| 989 | printk(KERN_INFO "SMP disabled\n"); |
| 990 | disable_smp(); |
| 991 | return; |
| 992 | } |
| 993 | |
| 994 | |
| 995 | /* |
| 996 | * Switch from PIC to APIC mode. |
| 997 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | connect_bsp_APIC(); |
| 999 | setup_local_APIC(); |
| 1000 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1001 | if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) { |
| 1002 | panic("Boot APIC ID in local APIC unexpected (%d vs %d)", |
| 1003 | GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id); |
| 1004 | /* Or can we switch back to PIC here? */ |
| 1005 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1006 | |
| 1007 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1008 | * Now start the IO-APICs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1009 | */ |
| 1010 | if (!skip_ioapic_setup && nr_ioapics) |
| 1011 | setup_IO_APIC(); |
| 1012 | else |
| 1013 | nr_ioapics = 0; |
| 1014 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1015 | /* |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1016 | * Set up local APIC timer on boot CPU. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1017 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1018 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1019 | setup_boot_APIC_clock(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | } |
| 1021 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1022 | /* |
| 1023 | * Early setup to make printk work. |
| 1024 | */ |
| 1025 | void __init smp_prepare_boot_cpu(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | { |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1027 | int me = smp_processor_id(); |
| 1028 | cpu_set(me, cpu_online_map); |
| 1029 | cpu_set(me, cpu_callout_map); |
Ashok Raj | cb0cd8d | 2005-06-25 14:55:01 -0700 | [diff] [blame] | 1030 | cpu_set(0, cpu_sibling_map[0]); |
| 1031 | cpu_set(0, cpu_core_map[0]); |
Ashok Raj | 884d9e40 | 2005-06-25 14:55:02 -0700 | [diff] [blame] | 1032 | per_cpu(cpu_state, me) = CPU_ONLINE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1033 | } |
| 1034 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1035 | /* |
| 1036 | * Entry point to boot a CPU. |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1037 | */ |
| 1038 | int __cpuinit __cpu_up(unsigned int cpu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1039 | { |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1040 | int err; |
| 1041 | int apicid = cpu_present_to_apicid(cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1042 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1043 | WARN_ON(irqs_disabled()); |
| 1044 | |
| 1045 | Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu); |
| 1046 | |
| 1047 | if (apicid == BAD_APICID || apicid == boot_cpu_id || |
| 1048 | !physid_isset(apicid, phys_cpu_present_map)) { |
| 1049 | printk("__cpu_up: bad cpu %d\n", cpu); |
| 1050 | return -EINVAL; |
| 1051 | } |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1052 | |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1053 | /* |
| 1054 | * Already booted CPU? |
| 1055 | */ |
| 1056 | if (cpu_isset(cpu, cpu_callin_map)) { |
| 1057 | Dprintk("do_boot_cpu %d Already started\n", cpu); |
| 1058 | return -ENOSYS; |
| 1059 | } |
| 1060 | |
Ashok Raj | 884d9e40 | 2005-06-25 14:55:02 -0700 | [diff] [blame] | 1061 | per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1062 | /* Boot it! */ |
| 1063 | err = do_boot_cpu(cpu, apicid); |
| 1064 | if (err < 0) { |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1065 | Dprintk("do_boot_cpu failed %d\n", err); |
| 1066 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | } |
| 1068 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1069 | /* Unleash the CPU! */ |
| 1070 | Dprintk("waiting for cpu %d\n", cpu); |
| 1071 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1072 | while (!cpu_isset(cpu, cpu_online_map)) |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1073 | cpu_relax(); |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1074 | err = 0; |
| 1075 | |
| 1076 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1077 | } |
| 1078 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1079 | /* |
| 1080 | * Finish the SMP boot. |
| 1081 | */ |
Ashok Raj | e6982c6 | 2005-06-25 14:54:58 -0700 | [diff] [blame] | 1082 | void __init smp_cpus_done(unsigned int max_cpus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | { |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1084 | #ifndef CONFIG_HOTPLUG_CPU |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1085 | zap_low_mappings(); |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1086 | #endif |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1087 | smp_cleanup_boot(); |
| 1088 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1089 | #ifdef CONFIG_X86_IO_APIC |
| 1090 | setup_ioapic_dest(); |
| 1091 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1093 | time_init_gtod(); |
Andi Kleen | 7515211 | 2005-05-16 21:53:34 -0700 | [diff] [blame] | 1094 | |
| 1095 | check_nmi_watchdog(); |
Andi Kleen | a8ab26f | 2005-04-16 15:25:19 -0700 | [diff] [blame] | 1096 | } |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1097 | |
| 1098 | #ifdef CONFIG_HOTPLUG_CPU |
| 1099 | |
Ashok Raj | cb0cd8d | 2005-06-25 14:55:01 -0700 | [diff] [blame] | 1100 | static void remove_siblinginfo(int cpu) |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1101 | { |
| 1102 | int sibling; |
| 1103 | |
| 1104 | for_each_cpu_mask(sibling, cpu_sibling_map[cpu]) |
| 1105 | cpu_clear(cpu, cpu_sibling_map[sibling]); |
| 1106 | for_each_cpu_mask(sibling, cpu_core_map[cpu]) |
| 1107 | cpu_clear(cpu, cpu_core_map[sibling]); |
| 1108 | cpus_clear(cpu_sibling_map[cpu]); |
| 1109 | cpus_clear(cpu_core_map[cpu]); |
| 1110 | phys_proc_id[cpu] = BAD_APICID; |
| 1111 | cpu_core_id[cpu] = BAD_APICID; |
| 1112 | } |
| 1113 | |
| 1114 | void remove_cpu_from_maps(void) |
| 1115 | { |
| 1116 | int cpu = smp_processor_id(); |
| 1117 | |
| 1118 | cpu_clear(cpu, cpu_callout_map); |
| 1119 | cpu_clear(cpu, cpu_callin_map); |
| 1120 | clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */ |
| 1121 | } |
| 1122 | |
| 1123 | int __cpu_disable(void) |
| 1124 | { |
| 1125 | int cpu = smp_processor_id(); |
| 1126 | |
| 1127 | /* |
| 1128 | * Perhaps use cpufreq to drop frequency, but that could go |
| 1129 | * into generic code. |
| 1130 | * |
| 1131 | * We won't take down the boot processor on i386 due to some |
| 1132 | * interrupts only being able to be serviced by the BSP. |
| 1133 | * Especially so if we're not using an IOAPIC -zwane |
| 1134 | */ |
| 1135 | if (cpu == 0) |
| 1136 | return -EBUSY; |
| 1137 | |
| 1138 | disable_APIC_timer(); |
| 1139 | |
| 1140 | /* |
| 1141 | * HACK: |
| 1142 | * Allow any queued timer interrupts to get serviced |
| 1143 | * This is only a temporary solution until we cleanup |
| 1144 | * fixup_irqs as we do for IA64. |
| 1145 | */ |
| 1146 | local_irq_enable(); |
| 1147 | mdelay(1); |
| 1148 | |
| 1149 | local_irq_disable(); |
| 1150 | remove_siblinginfo(cpu); |
| 1151 | |
| 1152 | /* It's now safe to remove this processor from the online map */ |
| 1153 | cpu_clear(cpu, cpu_online_map); |
| 1154 | remove_cpu_from_maps(); |
| 1155 | fixup_irqs(cpu_online_map); |
| 1156 | return 0; |
| 1157 | } |
| 1158 | |
| 1159 | void __cpu_die(unsigned int cpu) |
| 1160 | { |
| 1161 | /* We don't do anything here: idle task is faking death itself. */ |
| 1162 | unsigned int i; |
| 1163 | |
| 1164 | for (i = 0; i < 10; i++) { |
| 1165 | /* They ack this in play_dead by setting CPU_DEAD */ |
Ashok Raj | 884d9e40 | 2005-06-25 14:55:02 -0700 | [diff] [blame] | 1166 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) { |
| 1167 | printk ("CPU %d is now offline\n", cpu); |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1168 | return; |
Ashok Raj | 884d9e40 | 2005-06-25 14:55:02 -0700 | [diff] [blame] | 1169 | } |
Nishanth Aravamudan | ef6e525 | 2005-07-28 21:15:53 -0700 | [diff] [blame] | 1170 | msleep(100); |
Ashok Raj | 76e4f66 | 2005-06-25 14:55:00 -0700 | [diff] [blame] | 1171 | } |
| 1172 | printk(KERN_ERR "CPU %u didn't die...\n", cpu); |
| 1173 | } |
| 1174 | |
| 1175 | #else /* ... !CONFIG_HOTPLUG_CPU */ |
| 1176 | |
| 1177 | int __cpu_disable(void) |
| 1178 | { |
| 1179 | return -ENOSYS; |
| 1180 | } |
| 1181 | |
| 1182 | void __cpu_die(unsigned int cpu) |
| 1183 | { |
| 1184 | /* We said "no" in __cpu_disable */ |
| 1185 | BUG(); |
| 1186 | } |
| 1187 | #endif /* CONFIG_HOTPLUG_CPU */ |