blob: b24bee3d00b444e0ae79382f945e8323791c8072 [file] [log] [blame]
Graeme Gregory2945fbc2012-05-15 15:48:56 +09001/*
2 * TI Palmas MFD Driver
3 *
4 * Copyright 2011-2012 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/slab.h>
19#include <linux/i2c.h>
20#include <linux/interrupt.h>
21#include <linux/irq.h>
22#include <linux/regmap.h>
23#include <linux/err.h>
24#include <linux/mfd/core.h>
25#include <linux/mfd/palmas.h>
Graeme Gregory9c14ac32012-08-28 13:47:38 +020026#include <linux/of_platform.h>
Graeme Gregory2945fbc2012-05-15 15:48:56 +090027
Graeme Gregory2945fbc2012-05-15 15:48:56 +090028static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
29 {
30 .reg_bits = 8,
31 .val_bits = 8,
32 .max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
33 PALMAS_PRIMARY_SECONDARY_PAD3),
34 },
35 {
36 .reg_bits = 8,
37 .val_bits = 8,
38 .max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
39 PALMAS_GPADC_SMPS_VSEL_MONITORING),
40 },
41 {
42 .reg_bits = 8,
43 .val_bits = 8,
44 .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
45 PALMAS_GPADC_TRIM16),
46 },
47};
48
49static const struct regmap_irq palmas_irqs[] = {
50 /* INT1 IRQs */
51 [PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
52 .mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
53 },
54 [PALMAS_PWRON_IRQ] = {
55 .mask = PALMAS_INT1_STATUS_PWRON,
56 },
57 [PALMAS_LONG_PRESS_KEY_IRQ] = {
58 .mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
59 },
60 [PALMAS_RPWRON_IRQ] = {
61 .mask = PALMAS_INT1_STATUS_RPWRON,
62 },
63 [PALMAS_PWRDOWN_IRQ] = {
64 .mask = PALMAS_INT1_STATUS_PWRDOWN,
65 },
66 [PALMAS_HOTDIE_IRQ] = {
67 .mask = PALMAS_INT1_STATUS_HOTDIE,
68 },
69 [PALMAS_VSYS_MON_IRQ] = {
70 .mask = PALMAS_INT1_STATUS_VSYS_MON,
71 },
72 [PALMAS_VBAT_MON_IRQ] = {
73 .mask = PALMAS_INT1_STATUS_VBAT_MON,
74 },
75 /* INT2 IRQs*/
76 [PALMAS_RTC_ALARM_IRQ] = {
77 .mask = PALMAS_INT2_STATUS_RTC_ALARM,
78 .reg_offset = 1,
79 },
80 [PALMAS_RTC_TIMER_IRQ] = {
81 .mask = PALMAS_INT2_STATUS_RTC_TIMER,
82 .reg_offset = 1,
83 },
84 [PALMAS_WDT_IRQ] = {
85 .mask = PALMAS_INT2_STATUS_WDT,
86 .reg_offset = 1,
87 },
88 [PALMAS_BATREMOVAL_IRQ] = {
89 .mask = PALMAS_INT2_STATUS_BATREMOVAL,
90 .reg_offset = 1,
91 },
92 [PALMAS_RESET_IN_IRQ] = {
93 .mask = PALMAS_INT2_STATUS_RESET_IN,
94 .reg_offset = 1,
95 },
96 [PALMAS_FBI_BB_IRQ] = {
97 .mask = PALMAS_INT2_STATUS_FBI_BB,
98 .reg_offset = 1,
99 },
100 [PALMAS_SHORT_IRQ] = {
101 .mask = PALMAS_INT2_STATUS_SHORT,
102 .reg_offset = 1,
103 },
104 [PALMAS_VAC_ACOK_IRQ] = {
105 .mask = PALMAS_INT2_STATUS_VAC_ACOK,
106 .reg_offset = 1,
107 },
108 /* INT3 IRQs */
109 [PALMAS_GPADC_AUTO_0_IRQ] = {
110 .mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
111 .reg_offset = 2,
112 },
113 [PALMAS_GPADC_AUTO_1_IRQ] = {
114 .mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
115 .reg_offset = 2,
116 },
117 [PALMAS_GPADC_EOC_SW_IRQ] = {
118 .mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
119 .reg_offset = 2,
120 },
121 [PALMAS_GPADC_EOC_RT_IRQ] = {
122 .mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
123 .reg_offset = 2,
124 },
125 [PALMAS_ID_OTG_IRQ] = {
126 .mask = PALMAS_INT3_STATUS_ID_OTG,
127 .reg_offset = 2,
128 },
129 [PALMAS_ID_IRQ] = {
130 .mask = PALMAS_INT3_STATUS_ID,
131 .reg_offset = 2,
132 },
133 [PALMAS_VBUS_OTG_IRQ] = {
134 .mask = PALMAS_INT3_STATUS_VBUS_OTG,
135 .reg_offset = 2,
136 },
137 [PALMAS_VBUS_IRQ] = {
138 .mask = PALMAS_INT3_STATUS_VBUS,
139 .reg_offset = 2,
140 },
141 /* INT4 IRQs */
142 [PALMAS_GPIO_0_IRQ] = {
143 .mask = PALMAS_INT4_STATUS_GPIO_0,
144 .reg_offset = 3,
145 },
146 [PALMAS_GPIO_1_IRQ] = {
147 .mask = PALMAS_INT4_STATUS_GPIO_1,
148 .reg_offset = 3,
149 },
150 [PALMAS_GPIO_2_IRQ] = {
151 .mask = PALMAS_INT4_STATUS_GPIO_2,
152 .reg_offset = 3,
153 },
154 [PALMAS_GPIO_3_IRQ] = {
155 .mask = PALMAS_INT4_STATUS_GPIO_3,
156 .reg_offset = 3,
157 },
158 [PALMAS_GPIO_4_IRQ] = {
159 .mask = PALMAS_INT4_STATUS_GPIO_4,
160 .reg_offset = 3,
161 },
162 [PALMAS_GPIO_5_IRQ] = {
163 .mask = PALMAS_INT4_STATUS_GPIO_5,
164 .reg_offset = 3,
165 },
166 [PALMAS_GPIO_6_IRQ] = {
167 .mask = PALMAS_INT4_STATUS_GPIO_6,
168 .reg_offset = 3,
169 },
170 [PALMAS_GPIO_7_IRQ] = {
171 .mask = PALMAS_INT4_STATUS_GPIO_7,
172 .reg_offset = 3,
173 },
174};
175
176static struct regmap_irq_chip palmas_irq_chip = {
177 .name = "palmas",
178 .irqs = palmas_irqs,
179 .num_irqs = ARRAY_SIZE(palmas_irqs),
180
181 .num_regs = 4,
182 .irq_reg_stride = 5,
183 .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
184 PALMAS_INT1_STATUS),
185 .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
186 PALMAS_INT1_MASK),
187};
188
Laxman Dewangandf545d12013-03-01 20:13:46 +0530189static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200190 struct palmas_platform_data *pdata)
191{
Laxman Dewangandf545d12013-03-01 20:13:46 +0530192 struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
193 if (!irq_data) {
194 dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
195 return -EINVAL;
196 }
197
198 pdata->irq_flags = irqd_get_trigger_type(irq_data);
199 dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
200 return 0;
201}
202
203static void palmas_dt_to_pdata(struct i2c_client *i2c,
204 struct palmas_platform_data *pdata)
205{
206 struct device_node *node = i2c->dev.of_node;
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200207 int ret;
208 u32 prop;
209
J Keerthy2154a2b2013-02-18 10:42:44 +0530210 ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200211 if (!ret) {
212 pdata->mux_from_pdata = 1;
213 pdata->pad1 = prop;
214 }
215
J Keerthy2154a2b2013-02-18 10:42:44 +0530216 ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200217 if (!ret) {
218 pdata->mux_from_pdata = 1;
219 pdata->pad2 = prop;
220 }
221
222 /* The default for this register is all masked */
J Keerthy2154a2b2013-02-18 10:42:44 +0530223 ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200224 if (!ret)
225 pdata->power_ctrl = prop;
226 else
227 pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK |
228 PALMAS_POWER_CTRL_ENABLE1_MASK |
229 PALMAS_POWER_CTRL_ENABLE2_MASK;
Laxman Dewangandf545d12013-03-01 20:13:46 +0530230 if (i2c->irq)
231 palmas_set_pdata_irq_flag(i2c, pdata);
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200232}
233
Bill Pembertonf791be42012-11-19 13:23:04 -0500234static int palmas_i2c_probe(struct i2c_client *i2c,
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900235 const struct i2c_device_id *id)
236{
237 struct palmas *palmas;
238 struct palmas_platform_data *pdata;
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200239 struct device_node *node = i2c->dev.of_node;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900240 int ret = 0, i;
241 unsigned int reg, addr;
242 int slave;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900243
244 pdata = dev_get_platdata(&i2c->dev);
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200245
246 if (node && !pdata) {
247 pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
248
249 if (!pdata)
250 return -ENOMEM;
251
Laxman Dewangandf545d12013-03-01 20:13:46 +0530252 palmas_dt_to_pdata(i2c, pdata);
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200253 }
254
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900255 if (!pdata)
256 return -EINVAL;
257
258 palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
259 if (palmas == NULL)
260 return -ENOMEM;
261
262 i2c_set_clientdata(i2c, palmas);
263 palmas->dev = &i2c->dev;
264 palmas->id = id->driver_data;
265 palmas->irq = i2c->irq;
266
267 for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
268 if (i == 0)
269 palmas->i2c_clients[i] = i2c;
270 else {
271 palmas->i2c_clients[i] =
272 i2c_new_dummy(i2c->adapter,
273 i2c->addr + i);
274 if (!palmas->i2c_clients[i]) {
275 dev_err(palmas->dev,
276 "can't attach client %d\n", i);
277 ret = -ENOMEM;
278 goto err;
279 }
Laxman Dewanganc4fbec32013-03-19 14:28:20 +0530280 palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900281 }
282 palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
283 &palmas_regmap_config[i]);
284 if (IS_ERR(palmas->regmap[i])) {
285 ret = PTR_ERR(palmas->regmap[i]);
286 dev_err(palmas->dev,
287 "Failed to allocate regmap %d, err: %d\n",
288 i, ret);
289 goto err;
290 }
291 }
292
J Keerthyad522f42013-06-19 11:27:47 +0530293 if (!palmas->irq) {
294 dev_warn(palmas->dev, "IRQ missing: skipping irq request\n");
295 goto no_irq;
296 }
297
Laxman Dewangandf545d12013-03-01 20:13:46 +0530298 /* Change interrupt line output polarity */
299 if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
300 reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
301 else
302 reg = 0;
303 ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
304 PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
305 reg);
306 if (ret < 0) {
307 dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
308 goto err;
309 }
310
Graeme Gregoryb330f852012-06-22 13:36:19 +0100311 /* Change IRQ into clear on read mode for efficiency */
312 slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
313 addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
314 reg = PALMAS_INT_CTRL_INT_CLEAR;
315
316 regmap_write(palmas->regmap[slave], addr, reg);
317
318 ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
Laxman Dewangandf545d12013-03-01 20:13:46 +0530319 IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip,
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900320 &palmas->irq_data);
321 if (ret < 0)
322 goto err;
323
J Keerthyad522f42013-06-19 11:27:47 +0530324no_irq:
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900325 slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
326 addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
327 PALMAS_PRIMARY_SECONDARY_PAD1);
328
329 if (pdata->mux_from_pdata) {
330 reg = pdata->pad1;
331 ret = regmap_write(palmas->regmap[slave], addr, reg);
332 if (ret)
Graeme Gregory3f78dec2012-08-28 13:47:35 +0200333 goto err_irq;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900334 } else {
335 ret = regmap_read(palmas->regmap[slave], addr, &reg);
336 if (ret)
Graeme Gregory3f78dec2012-08-28 13:47:35 +0200337 goto err_irq;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900338 }
339
340 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
341 palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED;
342 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
343 palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED;
344 else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
345 (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
346 palmas->led_muxed |= PALMAS_LED1_MUXED;
347 else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
348 (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
349 palmas->pwm_muxed |= PALMAS_PWM1_MUXED;
350 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
351 palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED;
352 else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
353 (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
354 palmas->led_muxed |= PALMAS_LED2_MUXED;
355 else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
356 (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
357 palmas->pwm_muxed |= PALMAS_PWM2_MUXED;
358 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
359 palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED;
360
361 addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
362 PALMAS_PRIMARY_SECONDARY_PAD2);
363
364 if (pdata->mux_from_pdata) {
365 reg = pdata->pad2;
366 ret = regmap_write(palmas->regmap[slave], addr, reg);
367 if (ret)
Graeme Gregory3f78dec2012-08-28 13:47:35 +0200368 goto err_irq;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900369 } else {
370 ret = regmap_read(palmas->regmap[slave], addr, &reg);
371 if (ret)
Graeme Gregory3f78dec2012-08-28 13:47:35 +0200372 goto err_irq;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900373 }
374
375 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
376 palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED;
377 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
378 palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED;
379 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
380 palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED;
381 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
382 palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED;
383
384 dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
385 palmas->gpio_muxed, palmas->pwm_muxed,
386 palmas->led_muxed);
387
388 reg = pdata->power_ctrl;
389
390 slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
391 addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);
392
393 ret = regmap_write(palmas->regmap[slave], addr, reg);
394 if (ret)
Graeme Gregory3f78dec2012-08-28 13:47:35 +0200395 goto err_irq;
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900396
Graeme Gregory9c14ac32012-08-28 13:47:38 +0200397 /*
398 * If we are probing with DT do this the DT way and return here
399 * otherwise continue and add devices using mfd helpers.
400 */
401 if (node) {
402 ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
403 if (ret < 0)
404 goto err_irq;
405 else
406 return ret;
407 }
408
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900409 return ret;
410
Graeme Gregory3f78dec2012-08-28 13:47:35 +0200411err_irq:
412 regmap_del_irq_chip(palmas->irq, palmas->irq_data);
413err:
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900414 return ret;
415}
416
417static int palmas_i2c_remove(struct i2c_client *i2c)
418{
419 struct palmas *palmas = i2c_get_clientdata(i2c);
420
421 mfd_remove_devices(palmas->dev);
422 regmap_del_irq_chip(palmas->irq, palmas->irq_data);
423
424 return 0;
425}
426
427static const struct i2c_device_id palmas_i2c_id[] = {
428 { "palmas", },
429 { "twl6035", },
430 { "twl6037", },
431 { "tps65913", },
Axel Lin00ba81c2012-05-21 23:33:22 +0800432 { /* end */ }
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900433};
434MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);
435
Bill Pembertona9e9ce42012-11-19 13:24:21 -0500436static struct of_device_id of_palmas_match_tbl[] = {
Graeme Gregory2945fbc2012-05-15 15:48:56 +0900437 { .compatible = "ti,palmas", },
438 { /* end */ }
439};
440
441static struct i2c_driver palmas_i2c_driver = {
442 .driver = {
443 .name = "palmas",
444 .of_match_table = of_palmas_match_tbl,
445 .owner = THIS_MODULE,
446 },
447 .probe = palmas_i2c_probe,
448 .remove = palmas_i2c_remove,
449 .id_table = palmas_i2c_id,
450};
451
452static int __init palmas_i2c_init(void)
453{
454 return i2c_add_driver(&palmas_i2c_driver);
455}
456/* init early so consumer devices can complete system boot */
457subsys_initcall(palmas_i2c_init);
458
459static void __exit palmas_i2c_exit(void)
460{
461 i2c_del_driver(&palmas_i2c_driver);
462}
463module_exit(palmas_i2c_exit);
464
465MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
466MODULE_DESCRIPTION("Palmas chip family multi-function driver");
467MODULE_LICENSE("GPL");