blob: 37dac434c7a13814d23ff2c1e3b72aaff1cc394e [file] [log] [blame]
Hiroshi DOYUa9dcad52009-01-26 15:13:40 +02001/*
2 * omap iommu: pagetable definitions
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_OMAP_IOMMU_H
14#define __PLAT_OMAP_IOMMU_H
15
16#define IOPGD_SHIFT 20
17#define IOPGD_SIZE (1 << IOPGD_SHIFT)
18#define IOPGD_MASK (~(IOPGD_SIZE - 1))
19#define IOSECTION_MASK IOPGD_MASK
20#define PTRS_PER_IOPGD (1 << (32 - IOPGD_SHIFT))
21#define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32))
22
23#define IOSUPER_SIZE (IOPGD_SIZE << 4)
24#define IOSUPER_MASK (~(IOSUPER_SIZE - 1))
25
26#define IOPTE_SHIFT 12
27#define IOPTE_SIZE (1 << IOPTE_SHIFT)
28#define IOPTE_MASK (~(IOPTE_SIZE - 1))
29#define IOPAGE_MASK IOPTE_MASK
30#define PTRS_PER_IOPTE (1 << (IOPGD_SHIFT - IOPTE_SHIFT))
31#define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32))
32
33#define IOLARGE_SIZE (IOPTE_SIZE << 4)
34#define IOLARGE_MASK (~(IOLARGE_SIZE - 1))
35
36#define IOPGD_TABLE (1 << 0)
37#define IOPGD_SECTION (2 << 0)
38#define IOPGD_SUPER (1 << 18 | 2 << 0)
39
40#define IOPTE_SMALL (2 << 0)
41#define IOPTE_LARGE (1 << 0)
42
43#define iopgd_index(da) (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1))
44#define iopgd_offset(obj, da) ((obj)->iopgd + iopgd_index(da))
45
46#define iopte_paddr(iopgd) (*iopgd & ~((1 << 10) - 1))
47#define iopte_vaddr(iopgd) ((u32 *)phys_to_virt(iopte_paddr(iopgd)))
48
49#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
50#define iopte_offset(iopgd, da) (iopte_vaddr(iopgd) + iopte_index(da))
51
52static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
53 u32 flags)
54{
55 memset(e, 0, sizeof(*e));
56
57 e->da = da;
58 e->pa = pa;
59 e->valid = 1;
60 /* FIXME: add OMAP1 support */
61 e->pgsz = flags & MMU_CAM_PGSZ_MASK;
62 e->endian = flags & MMU_RAM_ENDIAN_MASK;
63 e->elsz = flags & MMU_RAM_ELSZ_MASK;
64 e->mixed = flags & MMU_RAM_MIXED_MASK;
65
66 return iopgsz_to_bytes(e->pgsz);
67}
68
69#define to_iommu(dev) \
70 (struct iommu *)platform_get_drvdata(to_platform_device(dev))
71
72#endif /* __PLAT_OMAP_IOMMU_H */