blob: fdb47051d5492a4db126cc525667bd181343d2cd [file] [log] [blame]
Dave Airliead7f8a12014-06-05 14:01:32 +10001/*
2 * Copyright © 2014 Red Hat.
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22#ifndef _DRM_DP_MST_HELPER_H_
23#define _DRM_DP_MST_HELPER_H_
24
25#include <linux/types.h>
26#include <drm/drm_dp_helper.h>
27
28struct drm_dp_mst_branch;
29
30/**
Masanari Iida32197aa2014-10-20 23:53:13 +090031 * struct drm_dp_vcpi - Virtual Channel Payload Identifier
Dave Airliead7f8a12014-06-05 14:01:32 +100032 * @vcpi: Virtual channel ID.
33 * @pbn: Payload Bandwidth Number for this channel
34 * @aligned_pbn: PBN aligned with slot size
35 * @num_slots: number of slots for this PBN
36 */
37struct drm_dp_vcpi {
38 int vcpi;
39 int pbn;
40 int aligned_pbn;
41 int num_slots;
42};
43
44/**
45 * struct drm_dp_mst_port - MST port
46 * @kref: reference count for this port.
Dave Airliead7f8a12014-06-05 14:01:32 +100047 * @port_num: port number
48 * @input: if this port is an input port.
49 * @mcs: message capability status - DP 1.2 spec.
50 * @ddps: DisplayPort Device Plug Status - DP 1.2
51 * @pdt: Peer Device Type
52 * @ldps: Legacy Device Plug Status
53 * @dpcd_rev: DPCD revision of device on this port
54 * @num_sdp_streams: Number of simultaneous streams
55 * @num_sdp_stream_sinks: Number of stream sinks
56 * @available_pbn: Available bandwidth for this port.
57 * @next: link to next port on this branch device
58 * @mstb: branch device attach below this port
59 * @aux: i2c aux transport to talk to device connected to this port.
60 * @parent: branch device parent of this port
61 * @vcpi: Virtual Channel Payload info for this port.
62 * @connector: DRM connector this port is connected to.
63 * @mgr: topology manager this port lives under.
64 *
65 * This structure represents an MST port endpoint on a device somewhere
66 * in the MST topology.
67 */
68struct drm_dp_mst_port {
69 struct kref kref;
70
Dave Airliead7f8a12014-06-05 14:01:32 +100071 u8 port_num;
72 bool input;
73 bool mcs;
74 bool ddps;
75 u8 pdt;
76 bool ldps;
77 u8 dpcd_rev;
78 u8 num_sdp_streams;
79 u8 num_sdp_stream_sinks;
80 uint16_t available_pbn;
81 struct list_head next;
82 struct drm_dp_mst_branch *mstb; /* pointer to an mstb if this port has one */
83 struct drm_dp_aux aux; /* i2c bus for this port? */
84 struct drm_dp_mst_branch *parent;
85
86 struct drm_dp_vcpi vcpi;
87 struct drm_connector *connector;
88 struct drm_dp_mst_topology_mgr *mgr;
Dave Airliec6a0aed2014-10-20 16:28:02 +100089
90 struct edid *cached_edid; /* for DP logical ports - make tiling work */
Libin Yangef8f9be2015-12-02 14:09:43 +080091 bool has_audio;
Dave Airliead7f8a12014-06-05 14:01:32 +100092};
93
94/**
95 * struct drm_dp_mst_branch - MST branch device.
96 * @kref: reference count for this port.
97 * @rad: Relative Address to talk to this branch device.
98 * @lct: Link count total to talk to this branch device.
99 * @num_ports: number of ports on the branch.
100 * @msg_slots: one bit per transmitted msg slot.
101 * @ports: linked list of ports on this branch.
102 * @port_parent: pointer to the port parent, NULL if toplevel.
103 * @mgr: topology manager for this branch device.
104 * @tx_slots: transmission slots for this device.
105 * @last_seqno: last sequence number used to talk to this.
106 * @link_address_sent: if a link address message has been sent to this device yet.
Hersen Wu5e93b822016-01-22 17:07:28 -0500107 * @guid: guid for DP 1.2 branch device. port under this branch can be
108 * identified by port #.
Dave Airliead7f8a12014-06-05 14:01:32 +1000109 *
110 * This structure represents an MST branch device, there is one
Hersen Wu5e93b822016-01-22 17:07:28 -0500111 * primary branch device at the root, along with any other branches connected
112 * to downstream port of parent branches.
Dave Airliead7f8a12014-06-05 14:01:32 +1000113 */
114struct drm_dp_mst_branch {
115 struct kref kref;
116 u8 rad[8];
117 u8 lct;
118 int num_ports;
119
120 int msg_slots;
121 struct list_head ports;
122
123 /* list of tx ops queue for this port */
124 struct drm_dp_mst_port *port_parent;
125 struct drm_dp_mst_topology_mgr *mgr;
126
127 /* slots are protected by mstb->mgr->qlock */
128 struct drm_dp_sideband_msg_tx *tx_slots[2];
129 int last_seqno;
130 bool link_address_sent;
Hersen Wu5e93b822016-01-22 17:07:28 -0500131
132 /* global unique identifier to identify branch devices */
133 u8 guid[16];
Dave Airliead7f8a12014-06-05 14:01:32 +1000134};
135
136
137/* sideband msg header - not bit struct */
138struct drm_dp_sideband_msg_hdr {
139 u8 lct;
140 u8 lcr;
141 u8 rad[8];
142 bool broadcast;
143 bool path_msg;
144 u8 msg_len;
145 bool somt;
146 bool eomt;
147 bool seqno;
148};
149
150struct drm_dp_nak_reply {
151 u8 guid[16];
152 u8 reason;
153 u8 nak_data;
154};
155
156struct drm_dp_link_address_ack_reply {
157 u8 guid[16];
158 u8 nports;
159 struct drm_dp_link_addr_reply_port {
160 bool input_port;
161 u8 peer_device_type;
162 u8 port_number;
163 bool mcs;
164 bool ddps;
165 bool legacy_device_plug_status;
166 u8 dpcd_revision;
167 u8 peer_guid[16];
168 u8 num_sdp_streams;
169 u8 num_sdp_stream_sinks;
170 } ports[16];
171};
172
173struct drm_dp_remote_dpcd_read_ack_reply {
174 u8 port_number;
175 u8 num_bytes;
176 u8 bytes[255];
177};
178
179struct drm_dp_remote_dpcd_write_ack_reply {
180 u8 port_number;
181};
182
183struct drm_dp_remote_dpcd_write_nak_reply {
184 u8 port_number;
185 u8 reason;
186 u8 bytes_written_before_failure;
187};
188
189struct drm_dp_remote_i2c_read_ack_reply {
190 u8 port_number;
191 u8 num_bytes;
192 u8 bytes[255];
193};
194
195struct drm_dp_remote_i2c_read_nak_reply {
196 u8 port_number;
197 u8 nak_reason;
198 u8 i2c_nak_transaction;
199};
200
201struct drm_dp_remote_i2c_write_ack_reply {
202 u8 port_number;
203};
204
205
206struct drm_dp_sideband_msg_rx {
207 u8 chunk[48];
208 u8 msg[256];
209 u8 curchunk_len;
210 u8 curchunk_idx; /* chunk we are parsing now */
211 u8 curchunk_hdrlen;
212 u8 curlen; /* total length of the msg */
213 bool have_somt;
214 bool have_eomt;
215 struct drm_dp_sideband_msg_hdr initial_hdr;
216};
217
Libin Yangef8f9be2015-12-02 14:09:43 +0800218#define DRM_DP_MAX_SDP_STREAMS 16
Dave Airliead7f8a12014-06-05 14:01:32 +1000219struct drm_dp_allocate_payload {
220 u8 port_number;
221 u8 number_sdp_streams;
222 u8 vcpi;
223 u16 pbn;
Libin Yangef8f9be2015-12-02 14:09:43 +0800224 u8 sdp_stream_sink[DRM_DP_MAX_SDP_STREAMS];
Dave Airliead7f8a12014-06-05 14:01:32 +1000225};
226
227struct drm_dp_allocate_payload_ack_reply {
228 u8 port_number;
229 u8 vcpi;
230 u16 allocated_pbn;
231};
232
233struct drm_dp_connection_status_notify {
234 u8 guid[16];
235 u8 port_number;
236 bool legacy_device_plug_status;
237 bool displayport_device_plug_status;
238 bool message_capability_status;
239 bool input_port;
240 u8 peer_device_type;
241};
242
243struct drm_dp_remote_dpcd_read {
244 u8 port_number;
245 u32 dpcd_address;
246 u8 num_bytes;
247};
248
249struct drm_dp_remote_dpcd_write {
250 u8 port_number;
251 u32 dpcd_address;
252 u8 num_bytes;
253 u8 *bytes;
254};
255
Dave Airlieae491542015-10-14 18:51:17 +1000256#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4
Dave Airliead7f8a12014-06-05 14:01:32 +1000257struct drm_dp_remote_i2c_read {
258 u8 num_transactions;
259 u8 port_number;
260 struct {
261 u8 i2c_dev_id;
262 u8 num_bytes;
263 u8 *bytes;
264 u8 no_stop_bit;
265 u8 i2c_transaction_delay;
Dave Airlieae491542015-10-14 18:51:17 +1000266 } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS];
Dave Airliead7f8a12014-06-05 14:01:32 +1000267 u8 read_i2c_device_id;
268 u8 num_bytes_read;
269};
270
271struct drm_dp_remote_i2c_write {
272 u8 port_number;
273 u8 write_i2c_device_id;
274 u8 num_bytes;
275 u8 *bytes;
276};
277
278/* this covers ENUM_RESOURCES, POWER_DOWN_PHY, POWER_UP_PHY */
279struct drm_dp_port_number_req {
280 u8 port_number;
281};
282
283struct drm_dp_enum_path_resources_ack_reply {
284 u8 port_number;
285 u16 full_payload_bw_number;
286 u16 avail_payload_bw_number;
287};
288
289/* covers POWER_DOWN_PHY, POWER_UP_PHY */
290struct drm_dp_port_number_rep {
291 u8 port_number;
292};
293
294struct drm_dp_query_payload {
295 u8 port_number;
296 u8 vcpi;
297};
298
299struct drm_dp_resource_status_notify {
300 u8 port_number;
301 u8 guid[16];
302 u16 available_pbn;
303};
304
305struct drm_dp_query_payload_ack_reply {
306 u8 port_number;
307 u8 allocated_pbn;
308};
309
310struct drm_dp_sideband_msg_req_body {
311 u8 req_type;
312 union ack_req {
313 struct drm_dp_connection_status_notify conn_stat;
314 struct drm_dp_port_number_req port_num;
315 struct drm_dp_resource_status_notify resource_stat;
316
317 struct drm_dp_query_payload query_payload;
318 struct drm_dp_allocate_payload allocate_payload;
319
320 struct drm_dp_remote_dpcd_read dpcd_read;
321 struct drm_dp_remote_dpcd_write dpcd_write;
322
323 struct drm_dp_remote_i2c_read i2c_read;
324 struct drm_dp_remote_i2c_write i2c_write;
325 } u;
326};
327
328struct drm_dp_sideband_msg_reply_body {
329 u8 reply_type;
330 u8 req_type;
331 union ack_replies {
332 struct drm_dp_nak_reply nak;
333 struct drm_dp_link_address_ack_reply link_addr;
334 struct drm_dp_port_number_rep port_number;
335
336 struct drm_dp_enum_path_resources_ack_reply path_resources;
337 struct drm_dp_allocate_payload_ack_reply allocate_payload;
338 struct drm_dp_query_payload_ack_reply query_payload;
339
340 struct drm_dp_remote_dpcd_read_ack_reply remote_dpcd_read_ack;
341 struct drm_dp_remote_dpcd_write_ack_reply remote_dpcd_write_ack;
342 struct drm_dp_remote_dpcd_write_nak_reply remote_dpcd_write_nack;
343
344 struct drm_dp_remote_i2c_read_ack_reply remote_i2c_read_ack;
345 struct drm_dp_remote_i2c_read_nak_reply remote_i2c_read_nack;
346 struct drm_dp_remote_i2c_write_ack_reply remote_i2c_write_ack;
347 } u;
348};
349
350/* msg is queued to be put into a slot */
351#define DRM_DP_SIDEBAND_TX_QUEUED 0
352/* msg has started transmitting on a slot - still on msgq */
353#define DRM_DP_SIDEBAND_TX_START_SEND 1
354/* msg has finished transmitting on a slot - removed from msgq only in slot */
355#define DRM_DP_SIDEBAND_TX_SENT 2
356/* msg has received a response - removed from slot */
357#define DRM_DP_SIDEBAND_TX_RX 3
358#define DRM_DP_SIDEBAND_TX_TIMEOUT 4
359
360struct drm_dp_sideband_msg_tx {
361 u8 msg[256];
362 u8 chunk[48];
363 u8 cur_offset;
364 u8 cur_len;
365 struct drm_dp_mst_branch *dst;
366 struct list_head next;
367 int seqno;
368 int state;
369 bool path_msg;
370 struct drm_dp_sideband_msg_reply_body reply;
371};
372
373/* sideband msg handler */
374struct drm_dp_mst_topology_mgr;
375struct drm_dp_mst_topology_cbs {
376 /* create a connector for a port */
Thierry Reding12e6cec2014-05-13 11:38:36 +0200377 struct drm_connector *(*add_connector)(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *path);
Dave Airlied9515c52015-09-16 17:55:23 +1000378 void (*register_connector)(struct drm_connector *connector);
Dave Airliead7f8a12014-06-05 14:01:32 +1000379 void (*destroy_connector)(struct drm_dp_mst_topology_mgr *mgr,
380 struct drm_connector *connector);
381 void (*hotplug)(struct drm_dp_mst_topology_mgr *mgr);
382
383};
384
385#define DP_MAX_PAYLOAD (sizeof(unsigned long) * 8)
386
387#define DP_PAYLOAD_LOCAL 1
388#define DP_PAYLOAD_REMOTE 2
389#define DP_PAYLOAD_DELETE_LOCAL 3
390
391struct drm_dp_payload {
392 int payload_state;
393 int start_slot;
394 int num_slots;
Dave Airliedfda0df2014-08-06 16:26:21 +1000395 int vcpi;
Dave Airliead7f8a12014-06-05 14:01:32 +1000396};
397
398/**
399 * struct drm_dp_mst_topology_mgr - DisplayPort MST manager
400 * @dev: device pointer for adding i2c devices etc.
401 * @cbs: callbacks for connector addition and destruction.
402 * @max_dpcd_transaction_bytes - maximum number of bytes to read/write in one go.
403 * @aux: aux channel for the DP connector.
404 * @max_payloads: maximum number of payloads the GPU can generate.
405 * @conn_base_id: DRM connector ID this mgr is connected to.
406 * @down_rep_recv: msg receiver state for down replies.
407 * @up_req_recv: msg receiver state for up requests.
Hersen Wu5e93b822016-01-22 17:07:28 -0500408 * @lock: protects mst state, primary, dpcd.
Dave Airliead7f8a12014-06-05 14:01:32 +1000409 * @mst_state: if this manager is enabled for an MST capable port.
410 * @mst_primary: pointer to the primary branch device.
Dave Airliead7f8a12014-06-05 14:01:32 +1000411 * @dpcd: cache of DPCD for primary port.
412 * @pbn_div: PBN to slots divisor.
413 *
414 * This struct represents the toplevel displayport MST topology manager.
415 * There should be one instance of this for every MST capable DP connector
416 * on the GPU.
417 */
418struct drm_dp_mst_topology_mgr {
419
420 struct device *dev;
Julia Lawall69a0f892015-12-30 22:20:30 +0100421 const struct drm_dp_mst_topology_cbs *cbs;
Dave Airliead7f8a12014-06-05 14:01:32 +1000422 int max_dpcd_transaction_bytes;
423 struct drm_dp_aux *aux; /* auxch for this topology mgr to use */
424 int max_payloads;
425 int conn_base_id;
426
427 /* only ever accessed from the workqueue - which should be serialised */
428 struct drm_dp_sideband_msg_rx down_rep_recv;
429 struct drm_dp_sideband_msg_rx up_req_recv;
430
431 /* pointer to info about the initial MST device */
Hersen Wu5e93b822016-01-22 17:07:28 -0500432 struct mutex lock; /* protects mst_state + primary + dpcd */
Dave Airliead7f8a12014-06-05 14:01:32 +1000433
434 bool mst_state;
435 struct drm_dp_mst_branch *mst_primary;
Hersen Wu5e93b822016-01-22 17:07:28 -0500436
Dave Airliead7f8a12014-06-05 14:01:32 +1000437 u8 dpcd[DP_RECEIVER_CAP_SIZE];
438 u8 sink_count;
439 int pbn_div;
440 int total_slots;
441 int avail_slots;
442 int total_pbn;
443
444 /* messages to be transmitted */
445 /* qlock protects the upq/downq and in_progress,
446 the mstb tx_slots and txmsg->state once they are queued */
447 struct mutex qlock;
448 struct list_head tx_msg_downq;
Dave Airliead7f8a12014-06-05 14:01:32 +1000449 bool tx_down_in_progress;
Dave Airliead7f8a12014-06-05 14:01:32 +1000450
451 /* payload info + lock for it */
452 struct mutex payload_lock;
453 struct drm_dp_vcpi **proposed_vcpis;
454 struct drm_dp_payload *payloads;
455 unsigned long payload_mask;
Dave Airliedfda0df2014-08-06 16:26:21 +1000456 unsigned long vcpi_mask;
Dave Airliead7f8a12014-06-05 14:01:32 +1000457
458 wait_queue_head_t tx_waitq;
459 struct work_struct work;
460
461 struct work_struct tx_work;
Dave Airlie6b8eeca2015-06-15 10:34:28 +1000462
463 struct list_head destroy_connector_list;
464 struct mutex destroy_connector_lock;
465 struct work_struct destroy_connector_work;
Dave Airliead7f8a12014-06-05 14:01:32 +1000466};
467
468int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id);
469
470void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
471
472
473int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state);
474
475
476int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi, bool *handled);
477
478
Dave Airliec6a0aed2014-10-20 16:28:02 +1000479enum drm_connector_status drm_dp_mst_detect_port(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
Dave Airliead7f8a12014-06-05 14:01:32 +1000480
Libin Yangef8f9be2015-12-02 14:09:43 +0800481bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr,
482 struct drm_dp_mst_port *port);
Dave Airliead7f8a12014-06-05 14:01:32 +1000483struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
484
485
486int drm_dp_calc_pbn_mode(int clock, int bpp);
487
488
489bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn, int *slots);
490
Dave Airlie87f59422015-02-24 09:23:55 +1000491int drm_dp_mst_get_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
492
Dave Airliead7f8a12014-06-05 14:01:32 +1000493
494void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
495
496
497void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
498 struct drm_dp_mst_port *port);
499
500
501int drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr,
502 int pbn);
503
504
505int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr);
506
507
508int drm_dp_update_payload_part2(struct drm_dp_mst_topology_mgr *mgr);
509
510int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr);
511
512void drm_dp_mst_dump_topology(struct seq_file *m,
513 struct drm_dp_mst_topology_mgr *mgr);
514
515void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr);
516int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr);
517#endif