blob: 2ef26e3f7be4752e1b6d2e8331abd53cb5feb6db [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/ide/pci/sl82c105.c
3 *
4 * SL82C105/Winbond 553 IDE driver
5 *
6 * Maintainer unknown.
7 *
8 * Drive tuning added from Rebel.com's kernel sources
9 * -- Russell King (15/11/98) linux@arm.linux.org.uk
10 *
11 * Merge in Russell's HW workarounds, fix various problems
12 * with the timing registers setup.
13 * -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
Sergei Shtylyove93df702007-05-05 22:03:49 +020014 *
15 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 */
17
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#include <linux/types.h>
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/timer.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/interrupt.h>
25#include <linux/blkdev.h>
26#include <linux/hdreg.h>
27#include <linux/pci.h>
28#include <linux/ide.h>
29
30#include <asm/io.h>
31#include <asm/dma.h>
32
33#undef DEBUG
34
35#ifdef DEBUG
36#define DBG(arg) printk arg
37#else
38#define DBG(fmt,...)
39#endif
40/*
41 * SL82C105 PCI config register 0x40 bits.
42 */
43#define CTRL_IDE_IRQB (1 << 30)
44#define CTRL_IDE_IRQA (1 << 28)
45#define CTRL_LEGIRQ (1 << 11)
46#define CTRL_P1F16 (1 << 5)
47#define CTRL_P1EN (1 << 4)
48#define CTRL_P0F16 (1 << 1)
49#define CTRL_P0EN (1 << 0)
50
51/*
Sergei Shtylyove93df702007-05-05 22:03:49 +020052 * Convert a PIO mode and cycle time to the required on/off times
53 * for the interface. This has protection against runaway timings.
Linus Torvalds1da177e2005-04-16 15:20:36 -070054 */
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +020055static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070056{
Sergei Shtylyove93df702007-05-05 22:03:49 +020057 unsigned int cmd_on, cmd_off;
Bartlomiej Zolnierkiewicz22298332007-07-20 01:11:55 +020058 u8 iordy = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +020060 cmd_on = (ide_pio_timings[pio].active_time + 29) / 30;
61 cmd_off = (ide_pio_cycle_time(drive, pio) - 30 * cmd_on + 29) / 30;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 if (cmd_on == 0)
64 cmd_on = 1;
65
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 if (cmd_off == 0)
67 cmd_off = 1;
68
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +020069 if (pio > 2 || ide_dev_has_iordy(drive->id))
Bartlomiej Zolnierkiewicz22298332007-07-20 01:11:55 +020070 iordy = 0x40;
71
72 return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073}
74
75/*
Sergei Shtylyove93df702007-05-05 22:03:49 +020076 * Configure the chipset for PIO mode.
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 */
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020078static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070079{
Sergei Shtylyove93df702007-05-05 22:03:49 +020080 struct pci_dev *dev = HWIF(drive)->pci_dev;
81 int reg = 0x44 + drive->dn * 4;
Sergei Shtylyove93df702007-05-05 22:03:49 +020082 u16 drv_ctrl;
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +020084 drv_ctrl = get_pio_timings(drive, pio);
Sergei Shtylyov46cedc92007-05-16 00:51:44 +020085
86 /*
87 * Store the PIO timings so that we can restore them
88 * in case DMA will be turned off...
89 */
90 drive->drive_data &= 0xffff0000;
91 drive->drive_data |= drv_ctrl;
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
Sergei Shtylyove93df702007-05-05 22:03:49 +020093 if (!drive->using_dma) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 /*
95 * If we are actually using MW DMA, then we can not
96 * reprogram the interface drive control register.
97 */
Sergei Shtylyove93df702007-05-05 22:03:49 +020098 pci_write_config_word(dev, reg, drv_ctrl);
99 pci_read_config_word (dev, reg, &drv_ctrl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100 }
Sergei Shtylyove93df702007-05-05 22:03:49 +0200101
102 printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200103 ide_xfer_verbose(pio + XFER_PIO_0),
104 ide_pio_cycle_time(drive, pio), drv_ctrl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105}
106
107/*
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200108 * Configure the chipset for DMA mode.
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200109 */
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200110static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200111{
112 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
113 u16 drv_ctrl;
114
115 DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
116 drive->name, ide_xfer_verbose(speed)));
117
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200118 switch (speed) {
119 case XFER_MW_DMA_2:
120 case XFER_MW_DMA_1:
121 case XFER_MW_DMA_0:
122 drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
123
124 /*
125 * Store the DMA timings so that we can actually program
126 * them when DMA will be turned on...
127 */
128 drive->drive_data &= 0x0000ffff;
129 drive->drive_data |= (unsigned long)drv_ctrl << 16;
130
131 /*
132 * If we are already using DMA, we just reprogram
133 * the drive control register.
134 */
135 if (drive->using_dma) {
136 struct pci_dev *dev = HWIF(drive)->pci_dev;
137 int reg = 0x44 + drive->dn * 4;
138
139 pci_write_config_word(dev, reg, drv_ctrl);
140 }
141 break;
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200142 default:
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200143 return;
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200144 }
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200145}
146
147/*
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200148 * Check to see if the drive and chipset are capable of DMA mode.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 */
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200150static int sl82c105_ide_dma_check(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151{
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200152 DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153
Bartlomiej Zolnierkiewicz4728d542007-05-16 00:51:46 +0200154 if (ide_tune_dma(drive))
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200155 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156
Bartlomiej Zolnierkiewicz3608b5d2007-02-17 02:40:26 +0100157 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158}
159
160/*
161 * The SL82C105 holds off all IDE interrupts while in DMA mode until
162 * all DMA activity is completed. Sometimes this causes problems (eg,
163 * when the drive wants to report an error condition).
164 *
165 * 0x7e is a "chip testing" register. Bit 2 resets the DMA controller
166 * state machine. We need to kick this to work around various bugs.
167 */
168static inline void sl82c105_reset_host(struct pci_dev *dev)
169{
170 u16 val;
171
172 pci_read_config_word(dev, 0x7e, &val);
173 pci_write_config_word(dev, 0x7e, val | (1 << 2));
174 pci_write_config_word(dev, 0x7e, val & ~(1 << 2));
175}
176
177/*
178 * If we get an IRQ timeout, it might be that the DMA state machine
179 * got confused. Fix from Todd Inglett. Details from Winbond.
180 *
181 * This function is called when the IDE timer expires, the drive
182 * indicates that it is READY, and we were waiting for DMA to complete.
183 */
Sergei Shtylyov841d2a92007-07-09 23:17:54 +0200184static void sl82c105_dma_lost_irq(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185{
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200186 ide_hwif_t *hwif = HWIF(drive);
187 struct pci_dev *dev = hwif->pci_dev;
188 u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
189 u8 dma_cmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200191 printk("sl82c105: lost IRQ, resetting host\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192
193 /*
194 * Check the raw interrupt from the drive.
195 */
196 pci_read_config_dword(dev, 0x40, &val);
197 if (val & mask)
198 printk("sl82c105: drive was requesting IRQ, but host lost it\n");
199
200 /*
201 * Was DMA enabled? If so, disable it - we're resetting the
202 * host. The IDE layer will be handling the drive for us.
203 */
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200204 dma_cmd = inb(hwif->dma_command);
205 if (dma_cmd & 1) {
206 outb(dma_cmd & ~1, hwif->dma_command);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 printk("sl82c105: DMA was enabled\n");
208 }
209
210 sl82c105_reset_host(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211}
212
213/*
214 * ATAPI devices can cause the SL82C105 DMA state machine to go gaga.
215 * Winbond recommend that the DMA state machine is reset prior to
216 * setting the bus master DMA enable bit.
217 *
218 * The generic IDE core will have disabled the BMEN bit before this
219 * function is called.
220 */
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200221static void sl82c105_dma_start(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222{
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200223 ide_hwif_t *hwif = HWIF(drive);
224 struct pci_dev *dev = hwif->pci_dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225
226 sl82c105_reset_host(dev);
227 ide_dma_start(drive);
228}
229
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200230static void sl82c105_dma_timeout(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231{
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200232 DBG(("sl82c105_dma_timeout(drive:%s)\n", drive->name));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200234 sl82c105_reset_host(HWIF(drive)->pci_dev);
235 ide_dma_timeout(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236}
237
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200238static int sl82c105_ide_dma_on(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239{
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200240 struct pci_dev *dev = HWIF(drive)->pci_dev;
241 int rc, reg = 0x44 + drive->dn * 4;
242
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
244
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200245 rc = __ide_dma_on(drive);
246 if (rc == 0) {
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200247 pci_write_config_word(dev, reg, drive->drive_data >> 16);
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200248
249 printk(KERN_INFO "%s: DMA enabled\n", drive->name);
250 }
251 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252}
253
Bartlomiej Zolnierkiewicz7469aaf2007-02-17 02:40:26 +0100254static void sl82c105_dma_off_quietly(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255{
Sergei Shtylyove93df702007-05-05 22:03:49 +0200256 struct pci_dev *dev = HWIF(drive)->pci_dev;
257 int reg = 0x44 + drive->dn * 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
Bartlomiej Zolnierkiewicz7469aaf2007-02-17 02:40:26 +0100259 DBG(("sl82c105_dma_off_quietly(drive:%s)\n", drive->name));
260
Sergei Shtylyove93df702007-05-05 22:03:49 +0200261 pci_write_config_word(dev, reg, drive->drive_data);
262
Bartlomiej Zolnierkiewicz7469aaf2007-02-17 02:40:26 +0100263 ide_dma_off_quietly(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264}
265
266/*
267 * Ok, that is nasty, but we must make sure the DMA timings
268 * won't be used for a PIO access. The solution here is
269 * to make sure the 16 bits mode is diabled on the channel
270 * when DMA is enabled, thus causing the chip to use PIO0
271 * timings for those operations.
272 */
273static void sl82c105_selectproc(ide_drive_t *drive)
274{
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200275 ide_hwif_t *hwif = HWIF(drive);
276 struct pci_dev *dev = hwif->pci_dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 u32 val, old, mask;
278
279 //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
280
281 mask = hwif->channel ? CTRL_P1F16 : CTRL_P0F16;
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800282 old = val = (u32)pci_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283 if (drive->using_dma)
284 val &= ~mask;
285 else
286 val |= mask;
287 if (old != val) {
288 pci_write_config_dword(dev, 0x40, val);
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800289 pci_set_drvdata(dev, (void *)val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290 }
291}
292
293/*
294 * ATA reset will clear the 16 bits mode in the control
295 * register, we need to update our cache
296 */
297static void sl82c105_resetproc(ide_drive_t *drive)
298{
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800299 struct pci_dev *dev = HWIF(drive)->pci_dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 u32 val;
301
302 DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
303
304 pci_read_config_dword(dev, 0x40, &val);
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800305 pci_set_drvdata(dev, (void *)val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307
308/*
309 * Return the revision of the Winbond bridge
310 * which this function is part of.
311 */
312static unsigned int sl82c105_bridge_revision(struct pci_dev *dev)
313{
314 struct pci_dev *bridge;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315
316 /*
317 * The bridge should be part of the same device, but function 0.
318 */
Alan Cox640b31b2007-05-16 00:51:46 +0200319 bridge = pci_get_bus_and_slot(dev->bus->number,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
321 if (!bridge)
322 return -1;
323
324 /*
325 * Make sure it is a Winbond 553 and is an ISA bridge.
326 */
327 if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
328 bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
Alan Cox640b31b2007-05-16 00:51:46 +0200329 bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
330 pci_dev_put(bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 return -1;
Alan Cox640b31b2007-05-16 00:51:46 +0200332 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 /*
334 * We need to find function 0's revision, not function 1
335 */
Alan Cox640b31b2007-05-16 00:51:46 +0200336 pci_dev_put(bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337
Auke Kok44c10132007-06-08 15:46:36 -0700338 return bridge->revision;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339}
340
341/*
342 * Enable the PCI device
343 *
344 * --BenH: It's arch fixup code that should enable channels that
345 * have not been enabled by firmware. I decided we can still enable
346 * channel 0 here at least, but channel 1 has to be enabled by
347 * firmware or arch code. We still set both to 16 bits mode.
348 */
Herbert Xu34a62242005-07-03 16:36:56 +0200349static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const char *msg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350{
351 u32 val;
352
353 DBG(("init_chipset_sl82c105()\n"));
354
355 pci_read_config_dword(dev, 0x40, &val);
356 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
357 pci_write_config_dword(dev, 0x40, val);
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800358 pci_set_drvdata(dev, (void *)val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359
360 return dev->irq;
361}
362
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363/*
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200364 * Initialise IDE channel
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 */
Herbert Xu34a62242005-07-03 16:36:56 +0200366static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367{
Russell King9648f552005-11-12 16:57:29 +0000368 unsigned int rev;
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800369
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
371
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200372 hwif->set_pio_mode = &sl82c105_set_pio_mode;
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200373 hwif->set_dma_mode = &sl82c105_set_dma_mode;
Sergei Shtylyove93df702007-05-05 22:03:49 +0200374 hwif->selectproc = &sl82c105_selectproc;
375 hwif->resetproc = &sl82c105_resetproc;
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800376
377 /*
Sergei Shtylyove93df702007-05-05 22:03:49 +0200378 * We support 32-bit I/O on this interface, and
379 * it doesn't have problems with interrupts.
380 */
381 hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1;
382 hwif->drives[0].unmask = hwif->drives[1].unmask = 1;
383
384 /*
Sergei Shtylyovdd607d22006-12-08 02:40:01 -0800385 * We always autotune PIO, this is done before DMA is checked,
386 * so there's no risk of accidentally disabling DMA
387 */
Sergei Shtylyove93df702007-05-05 22:03:49 +0200388 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 if (!hwif->dma_base)
391 return;
392
Russell King9648f552005-11-12 16:57:29 +0000393 rev = sl82c105_bridge_revision(hwif->pci_dev);
394 if (rev <= 5) {
395 /*
396 * Never ever EVER under any circumstances enable
397 * DMA when the bridge is this old.
398 */
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200399 printk(" %s: Winbond W83C553 bridge revision %d, "
400 "BM-DMA disabled\n", hwif->name, rev);
401 return;
Russell King9648f552005-11-12 16:57:29 +0000402 }
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200403
404 hwif->atapi_dma = 1;
Sergei Shtylyov46cedc92007-05-16 00:51:44 +0200405 hwif->mwdma_mask = 0x07;
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200406
407 hwif->ide_dma_check = &sl82c105_ide_dma_check;
408 hwif->ide_dma_on = &sl82c105_ide_dma_on;
409 hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
Sergei Shtylyov841d2a92007-07-09 23:17:54 +0200410 hwif->dma_lost_irq = &sl82c105_dma_lost_irq;
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200411 hwif->dma_start = &sl82c105_dma_start;
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200412 hwif->dma_timeout = &sl82c105_dma_timeout;
Sergei Shtylyov688a87d2007-05-05 22:03:49 +0200413
414 if (!noautodma)
415 hwif->autodma = 1;
416 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
417
418 if (hwif->mate)
419 hwif->serialized = hwif->mate->serialized = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420}
421
422static ide_pci_device_t sl82c105_chipset __devinitdata = {
423 .name = "W82C105",
424 .init_chipset = init_chipset_sl82c105,
425 .init_hwif = init_hwif_sl82c105,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426 .autodma = NOAUTODMA,
427 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
428 .bootable = ON_BOARD,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200429 .pio_mask = ATA_PIO5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430};
431
432static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
433{
434 return ide_setup_pci_device(dev, &sl82c105_chipset);
435}
436
437static struct pci_device_id sl82c105_pci_tbl[] = {
Alan Coxf201f502006-06-28 04:27:02 -0700438 { PCI_DEVICE(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 { 0, },
440};
441MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl);
442
443static struct pci_driver driver = {
444 .name = "W82C105_IDE",
445 .id_table = sl82c105_pci_tbl,
446 .probe = sl82c105_init_one,
447};
448
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100449static int __init sl82c105_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450{
451 return ide_pci_register_driver(&driver);
452}
453
454module_init(sl82c105_ide_init);
455
456MODULE_DESCRIPTION("PCI driver module for W82C105 IDE");
457MODULE_LICENSE("GPL");