Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 1 | /* |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 2 | * Interrupt handling for IPR-based IRQ. |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi |
| 5 | * Copyright (C) 2000 Kazumoto Kojima |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 6 | * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> |
| 7 | * Copyright (C) 2006 Paul Mundt |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 8 | * |
| 9 | * Supported system: |
| 10 | * On-chip supporting modules (TMU, RTC, etc.). |
| 11 | * On-chip supporting modules for SH7709/SH7709A/SH7729/SH7300. |
| 12 | * Hitachi SolutionEngine external I/O: |
| 13 | * MS7709SE01, MS7709ASE01, and MS7750SE01 |
| 14 | * |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 15 | * This file is subject to the terms and conditions of the GNU General Public |
| 16 | * License. See the file "COPYING" in the main directory of this archive |
| 17 | * for more details. |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 18 | */ |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 19 | #include <linux/init.h> |
| 20 | #include <linux/irq.h> |
| 21 | #include <linux/module.h> |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 22 | #include <asm/system.h> |
| 23 | #include <asm/io.h> |
| 24 | #include <asm/machvec.h> |
| 25 | |
| 26 | struct ipr_data { |
| 27 | unsigned int addr; /* Address of Interrupt Priority Register */ |
| 28 | int shift; /* Shifts of the 16-bit data */ |
| 29 | int priority; /* The priority */ |
| 30 | }; |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 31 | |
| 32 | static void disable_ipr_irq(unsigned int irq) |
| 33 | { |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 34 | struct ipr_data *p = get_irq_chip_data(irq); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 35 | /* Set the priority in IPR to 0 */ |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 36 | ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | static void enable_ipr_irq(unsigned int irq) |
| 40 | { |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 41 | struct ipr_data *p = get_irq_chip_data(irq); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 42 | /* Set priority in IPR back to original value */ |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 43 | ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 44 | } |
| 45 | |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 46 | static struct irq_chip ipr_irq_chip = { |
Paul Mundt | 709bc44 | 2006-10-19 17:32:56 +0900 | [diff] [blame] | 47 | .name = "IPR", |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 48 | .mask = disable_ipr_irq, |
| 49 | .unmask = enable_ipr_irq, |
| 50 | .mask_ack = disable_ipr_irq, |
| 51 | }; |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 52 | |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 53 | void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 54 | { |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 55 | struct ipr_data ipr_data; |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 56 | |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 57 | disable_irq_nosync(irq); |
| 58 | |
| 59 | ipr_data.addr = addr; |
| 60 | ipr_data.shift = pos*4; /* POSition (0-3) x 4 means shift */ |
| 61 | ipr_data.priority = priority; |
| 62 | |
Paul Mundt | 709bc44 | 2006-10-19 17:32:56 +0900 | [diff] [blame] | 63 | set_irq_chip_and_handler_name(irq, &ipr_irq_chip, |
| 64 | handle_level_irq, "level"); |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 65 | set_irq_chip_data(irq, &ipr_data); |
| 66 | |
| 67 | enable_ipr_irq(irq); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 68 | } |
| 69 | |
Paul Mundt | 0f13804 | 2006-10-06 17:55:25 +0900 | [diff] [blame] | 70 | /* XXX: This needs to die a horrible death.. */ |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 71 | void __init init_IRQ(void) |
| 72 | { |
| 73 | #ifndef CONFIG_CPU_SUBTYPE_SH7780 |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 74 | make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); |
| 75 | make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); |
Paul Mundt | 91550f7 | 2006-09-27 17:45:01 +0900 | [diff] [blame] | 76 | #ifdef RTC_IRQ |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 77 | make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 78 | #endif |
| 79 | |
| 80 | #ifdef SCI_ERI_IRQ |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 81 | make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); |
| 82 | make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); |
| 83 | make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 84 | #endif |
| 85 | |
| 86 | #ifdef SCIF1_ERI_IRQ |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 87 | make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); |
| 88 | make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); |
| 89 | make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); |
| 90 | make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 91 | #endif |
| 92 | |
| 93 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 94 | make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY); |
| 95 | make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); |
| 96 | make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); |
| 97 | make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 98 | #endif |
| 99 | |
| 100 | #ifdef SCIF_ERI_IRQ |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 101 | make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); |
| 102 | make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); |
| 103 | make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); |
| 104 | make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 105 | #endif |
| 106 | |
| 107 | #ifdef IRDA_ERI_IRQ |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 108 | make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); |
| 109 | make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); |
| 110 | make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); |
| 111 | make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 112 | #endif |
| 113 | |
| 114 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ |
Paul Mundt | e5723e0 | 2006-09-27 17:38:11 +0900 | [diff] [blame] | 115 | defined(CONFIG_CPU_SUBTYPE_SH7706) || \ |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 116 | defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) |
| 117 | /* |
| 118 | * Initialize the Interrupt Controller (INTC) |
| 119 | * registers to their power on values |
| 120 | */ |
| 121 | |
| 122 | /* |
| 123 | * Enable external irq (INTC IRQ mode). |
| 124 | * You should set corresponding bits of PFC to "00" |
| 125 | * to enable these interrupts. |
| 126 | */ |
Paul Mundt | 8d27e08 | 2006-02-01 03:06:04 -0800 | [diff] [blame] | 127 | make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY); |
| 128 | make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY); |
| 129 | make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY); |
| 130 | make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY); |
| 131 | make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY); |
| 132 | make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 133 | #endif |
| 134 | #endif |
| 135 | |
| 136 | #ifdef CONFIG_CPU_HAS_PINT_IRQ |
| 137 | init_IRQ_pint(); |
| 138 | #endif |
| 139 | |
| 140 | #ifdef CONFIG_CPU_HAS_INTC2_IRQ |
| 141 | init_IRQ_intc2(); |
| 142 | #endif |
| 143 | /* Perform the machine specific initialisation */ |
| 144 | if (sh_mv.mv_init_irq != NULL) |
| 145 | sh_mv.mv_init_irq(); |
Paul Mundt | a6a31139 | 2006-09-27 18:22:14 +0900 | [diff] [blame] | 146 | |
| 147 | irq_ctx_init(smp_processor_id()); |
Paul Mundt | bf3a00f | 2006-01-16 22:14:14 -0800 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | #if !defined(CONFIG_CPU_HAS_PINT_IRQ) |
| 151 | int ipr_irq_demux(int irq) |
| 152 | { |
| 153 | return irq; |
| 154 | } |
| 155 | #endif |
| 156 | |
| 157 | EXPORT_SYMBOL(make_ipr_irq); |