Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * AMD 76x Memory Controller kernel module |
| 3 | * (C) 2003 Linux Networx (http://lnxi.com) |
| 4 | * This file may be distributed under the terms of the |
| 5 | * GNU General Public License. |
| 6 | * |
| 7 | * Written by Thayne Harbaugh |
| 8 | * Based on work by Dan Hollis <goemon at anime dot net> and others. |
| 9 | * http://www.anime.net/~goemon/linux-ecc/ |
| 10 | * |
| 11 | * $Id: edac_amd76x.c,v 1.4.2.5 2005/10/05 00:43:44 dsp_llnl Exp $ |
| 12 | * |
| 13 | */ |
| 14 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 15 | #include <linux/module.h> |
| 16 | #include <linux/init.h> |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 17 | #include <linux/pci.h> |
| 18 | #include <linux/pci_ids.h> |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 19 | #include <linux/slab.h> |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 20 | #include "edac_mc.h" |
| 21 | |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 22 | #define amd76x_printk(level, fmt, arg...) \ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 23 | edac_printk(level, "amd76x", fmt, ##arg) |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 24 | |
| 25 | #define amd76x_mc_printk(mci, level, fmt, arg...) \ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 26 | edac_mc_chipset_printk(mci, level, "amd76x", fmt, ##arg) |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 27 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 28 | #define AMD76X_NR_CSROWS 8 |
| 29 | #define AMD76X_NR_CHANS 1 |
| 30 | #define AMD76X_NR_DIMMS 4 |
| 31 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 32 | /* AMD 76x register addresses - device 0 function 0 - PCI bridge */ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 33 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 34 | #define AMD76X_ECC_MODE_STATUS 0x48 /* Mode and status of ECC (32b) |
| 35 | * |
| 36 | * 31:16 reserved |
| 37 | * 15:14 SERR enabled: x1=ue 1x=ce |
| 38 | * 13 reserved |
| 39 | * 12 diag: disabled, enabled |
| 40 | * 11:10 mode: dis, EC, ECC, ECC+scrub |
| 41 | * 9:8 status: x1=ue 1x=ce |
| 42 | * 7:4 UE cs row |
| 43 | * 3:0 CE cs row |
| 44 | */ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 45 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 46 | #define AMD76X_DRAM_MODE_STATUS 0x58 /* DRAM Mode and status (32b) |
| 47 | * |
| 48 | * 31:26 clock disable 5 - 0 |
| 49 | * 25 SDRAM init |
| 50 | * 24 reserved |
| 51 | * 23 mode register service |
| 52 | * 22:21 suspend to RAM |
| 53 | * 20 burst refresh enable |
| 54 | * 19 refresh disable |
| 55 | * 18 reserved |
| 56 | * 17:16 cycles-per-refresh |
| 57 | * 15:8 reserved |
| 58 | * 7:0 x4 mode enable 7 - 0 |
| 59 | */ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 60 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 61 | #define AMD76X_MEM_BASE_ADDR 0xC0 /* Memory base address (8 x 32b) |
| 62 | * |
| 63 | * 31:23 chip-select base |
| 64 | * 22:16 reserved |
| 65 | * 15:7 chip-select mask |
| 66 | * 6:3 reserved |
| 67 | * 2:1 address mode |
| 68 | * 0 chip-select enable |
| 69 | */ |
| 70 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 71 | struct amd76x_error_info { |
| 72 | u32 ecc_mode_status; |
| 73 | }; |
| 74 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 75 | enum amd76x_chips { |
| 76 | AMD761 = 0, |
| 77 | AMD762 |
| 78 | }; |
| 79 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 80 | struct amd76x_dev_info { |
| 81 | const char *ctl_name; |
| 82 | }; |
| 83 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 84 | static const struct amd76x_dev_info amd76x_devs[] = { |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 85 | [AMD761] = { |
| 86 | .ctl_name = "AMD761" |
| 87 | }, |
| 88 | [AMD762] = { |
| 89 | .ctl_name = "AMD762" |
| 90 | }, |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 91 | }; |
| 92 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 93 | /** |
| 94 | * amd76x_get_error_info - fetch error information |
| 95 | * @mci: Memory controller |
| 96 | * @info: Info to fill in |
| 97 | * |
| 98 | * Fetch and store the AMD76x ECC status. Clear pending status |
| 99 | * on the chip so that further errors will be reported |
| 100 | */ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 101 | static void amd76x_get_error_info(struct mem_ctl_info *mci, |
| 102 | struct amd76x_error_info *info) |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 103 | { |
| 104 | pci_read_config_dword(mci->pdev, AMD76X_ECC_MODE_STATUS, |
| 105 | &info->ecc_mode_status); |
| 106 | |
| 107 | if (info->ecc_mode_status & BIT(8)) |
| 108 | pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 109 | (u32) BIT(8), (u32) BIT(8)); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 110 | |
| 111 | if (info->ecc_mode_status & BIT(9)) |
| 112 | pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 113 | (u32) BIT(9), (u32) BIT(9)); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 114 | } |
| 115 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 116 | /** |
| 117 | * amd76x_process_error_info - Error check |
| 118 | * @mci: Memory controller |
| 119 | * @info: Previously fetched information from chip |
| 120 | * @handle_errors: 1 if we should do recovery |
| 121 | * |
| 122 | * Process the chip state and decide if an error has occurred. |
| 123 | * A return of 1 indicates an error. Also if handle_errors is true |
| 124 | * then attempt to handle and clean up after the error |
| 125 | */ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 126 | static int amd76x_process_error_info(struct mem_ctl_info *mci, |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 127 | struct amd76x_error_info *info, int handle_errors) |
| 128 | { |
| 129 | int error_found; |
| 130 | u32 row; |
| 131 | |
| 132 | error_found = 0; |
| 133 | |
| 134 | /* |
| 135 | * Check for an uncorrectable error |
| 136 | */ |
| 137 | if (info->ecc_mode_status & BIT(8)) { |
| 138 | error_found = 1; |
| 139 | |
| 140 | if (handle_errors) { |
| 141 | row = (info->ecc_mode_status >> 4) & 0xf; |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 142 | edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0, |
| 143 | row, mci->ctl_name); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 144 | } |
| 145 | } |
| 146 | |
| 147 | /* |
| 148 | * Check for a correctable error |
| 149 | */ |
| 150 | if (info->ecc_mode_status & BIT(9)) { |
| 151 | error_found = 1; |
| 152 | |
| 153 | if (handle_errors) { |
| 154 | row = info->ecc_mode_status & 0xf; |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 155 | edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0, |
| 156 | 0, row, 0, mci->ctl_name); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 157 | } |
| 158 | } |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 159 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 160 | return error_found; |
| 161 | } |
| 162 | |
| 163 | /** |
| 164 | * amd76x_check - Poll the controller |
| 165 | * @mci: Memory controller |
| 166 | * |
| 167 | * Called by the poll handlers this function reads the status |
| 168 | * from the controller and checks for errors. |
| 169 | */ |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 170 | static void amd76x_check(struct mem_ctl_info *mci) |
| 171 | { |
| 172 | struct amd76x_error_info info; |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 173 | debugf3("%s()\n", __func__); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 174 | amd76x_get_error_info(mci, &info); |
| 175 | amd76x_process_error_info(mci, &info, 1); |
| 176 | } |
| 177 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 178 | /** |
| 179 | * amd76x_probe1 - Perform set up for detected device |
| 180 | * @pdev; PCI device detected |
| 181 | * @dev_idx: Device type index |
| 182 | * |
| 183 | * We have found an AMD76x and now need to set up the memory |
| 184 | * controller status reporting. We configure and set up the |
| 185 | * memory controller reporting and claim the device. |
| 186 | */ |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 187 | static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) |
| 188 | { |
| 189 | int rc = -ENODEV; |
| 190 | int index; |
| 191 | struct mem_ctl_info *mci = NULL; |
| 192 | enum edac_type ems_modes[] = { |
| 193 | EDAC_NONE, |
| 194 | EDAC_EC, |
| 195 | EDAC_SECDED, |
| 196 | EDAC_SECDED |
| 197 | }; |
| 198 | u32 ems; |
| 199 | u32 ems_mode; |
Dave Peterson | 749ede5 | 2006-03-26 01:38:45 -0800 | [diff] [blame] | 200 | struct amd76x_error_info discard; |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 201 | |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 202 | debugf0("%s()\n", __func__); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 203 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems); |
| 204 | ems_mode = (ems >> 10) & 0x3; |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 205 | mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS); |
| 206 | |
| 207 | if (mci == NULL) { |
| 208 | rc = -ENOMEM; |
| 209 | goto fail; |
| 210 | } |
| 211 | |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 212 | debugf0("%s(): mci = %p\n", __func__, mci); |
Dave Peterson | 225159b | 2006-03-26 01:38:41 -0800 | [diff] [blame] | 213 | mci->pdev = pdev; |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 214 | mci->mtype_cap = MEM_FLAG_RDDR; |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 215 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; |
| 216 | mci->edac_cap = ems_mode ? |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 217 | (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE; |
Dave Peterson | 680cbbb | 2006-03-26 01:38:41 -0800 | [diff] [blame] | 218 | mci->mod_name = EDAC_MOD_STR; |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 219 | mci->mod_ver = "$Revision: 1.4.2.5 $"; |
| 220 | mci->ctl_name = amd76x_devs[dev_idx].ctl_name; |
| 221 | mci->edac_check = amd76x_check; |
| 222 | mci->ctl_page_to_phys = NULL; |
| 223 | |
| 224 | for (index = 0; index < mci->nr_csrows; index++) { |
| 225 | struct csrow_info *csrow = &mci->csrows[index]; |
| 226 | u32 mba; |
| 227 | u32 mba_base; |
| 228 | u32 mba_mask; |
| 229 | u32 dms; |
| 230 | |
| 231 | /* find the DRAM Chip Select Base address and mask */ |
| 232 | pci_read_config_dword(mci->pdev, |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 233 | AMD76X_MEM_BASE_ADDR + (index * 4), &mba); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 234 | |
| 235 | if (!(mba & BIT(0))) |
| 236 | continue; |
| 237 | |
| 238 | mba_base = mba & 0xff800000UL; |
| 239 | mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL; |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 240 | pci_read_config_dword(mci->pdev, AMD76X_DRAM_MODE_STATUS, |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 241 | &dms); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 242 | csrow->first_page = mba_base >> PAGE_SHIFT; |
| 243 | csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; |
| 244 | csrow->last_page = csrow->first_page + csrow->nr_pages - 1; |
| 245 | csrow->page_mask = mba_mask >> PAGE_SHIFT; |
| 246 | csrow->grain = csrow->nr_pages << PAGE_SHIFT; |
| 247 | csrow->mtype = MEM_RDDR; |
| 248 | csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; |
| 249 | csrow->edac_mode = ems_modes[ems_mode]; |
| 250 | } |
| 251 | |
Dave Peterson | 749ede5 | 2006-03-26 01:38:45 -0800 | [diff] [blame] | 252 | amd76x_get_error_info(mci, &discard); /* clear counters */ |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 253 | |
| 254 | if (edac_mc_add_mc(mci)) { |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 255 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 256 | goto fail; |
| 257 | } |
| 258 | |
| 259 | /* get this far and it's successful */ |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 260 | debugf3("%s(): success\n", __func__); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 261 | return 0; |
| 262 | |
| 263 | fail: |
Dave Peterson | 225159b | 2006-03-26 01:38:41 -0800 | [diff] [blame] | 264 | if (mci != NULL) |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 265 | edac_mc_free(mci); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 266 | return rc; |
| 267 | } |
| 268 | |
| 269 | /* returns count (>= 0), or negative on error */ |
| 270 | static int __devinit amd76x_init_one(struct pci_dev *pdev, |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 271 | const struct pci_device_id *ent) |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 272 | { |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 273 | debugf0("%s()\n", __func__); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 274 | |
| 275 | /* don't need to call pci_device_enable() */ |
| 276 | return amd76x_probe1(pdev, ent->driver_data); |
| 277 | } |
| 278 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 279 | /** |
| 280 | * amd76x_remove_one - driver shutdown |
| 281 | * @pdev: PCI device being handed back |
| 282 | * |
| 283 | * Called when the driver is unloaded. Find the matching mci |
| 284 | * structure for the device then delete the mci and free the |
| 285 | * resources. |
| 286 | */ |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 287 | static void __devexit amd76x_remove_one(struct pci_dev *pdev) |
| 288 | { |
| 289 | struct mem_ctl_info *mci; |
| 290 | |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 291 | debugf0("%s()\n", __func__); |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 292 | |
Dave Peterson | 18dbc33 | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 293 | if ((mci = edac_mc_del_mc(pdev)) == NULL) |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 294 | return; |
Dave Peterson | 18dbc33 | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 295 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 296 | edac_mc_free(mci); |
| 297 | } |
| 298 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 299 | static const struct pci_device_id amd76x_pci_tbl[] __devinitdata = { |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 300 | { |
| 301 | PCI_VEND_DEV(AMD, FE_GATE_700C), PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 302 | AMD762 |
| 303 | }, |
| 304 | { |
| 305 | PCI_VEND_DEV(AMD, FE_GATE_700E), PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 306 | AMD761 |
| 307 | }, |
| 308 | { |
| 309 | 0, |
| 310 | } /* 0 terminated list. */ |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 311 | }; |
| 312 | |
| 313 | MODULE_DEVICE_TABLE(pci, amd76x_pci_tbl); |
| 314 | |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 315 | static struct pci_driver amd76x_driver = { |
Dave Peterson | 680cbbb | 2006-03-26 01:38:41 -0800 | [diff] [blame] | 316 | .name = EDAC_MOD_STR, |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 317 | .probe = amd76x_init_one, |
| 318 | .remove = __devexit_p(amd76x_remove_one), |
| 319 | .id_table = amd76x_pci_tbl, |
| 320 | }; |
| 321 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 322 | static int __init amd76x_init(void) |
Alan Cox | 806c35f | 2006-01-18 17:44:08 -0800 | [diff] [blame] | 323 | { |
| 324 | return pci_register_driver(&amd76x_driver); |
| 325 | } |
| 326 | |
| 327 | static void __exit amd76x_exit(void) |
| 328 | { |
| 329 | pci_unregister_driver(&amd76x_driver); |
| 330 | } |
| 331 | |
| 332 | module_init(amd76x_init); |
| 333 | module_exit(amd76x_exit); |
| 334 | |
| 335 | MODULE_LICENSE("GPL"); |
| 336 | MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh"); |
| 337 | MODULE_DESCRIPTION("MC support for AMD 76x memory controllers"); |