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Rafael J. Wysockic7f48652010-02-17 23:39:08 +01001/*
2 * PCIe Native PME support
3 *
4 * Copyright (C) 2007 - 2009 Intel Corp
5 * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
6 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License V2. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/pci.h>
15#include <linux/kernel.h>
16#include <linux/errno.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090017#include <linux/slab.h>
Rafael J. Wysockic7f48652010-02-17 23:39:08 +010018#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/device.h>
21#include <linux/pcieport_if.h>
22#include <linux/acpi.h>
23#include <linux/pci-acpi.h>
24#include <linux/pm_runtime.h>
25
26#include "../../pci.h"
27#include "pcie_pme.h"
28
29#define PCI_EXP_RTSTA_PME 0x10000 /* PME status */
30#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
31
32/*
33 * If set, this switch will prevent the PCIe root port PME service driver from
34 * being registered. Consequently, the interrupt-based PCIe PME signaling will
35 * not be used by any PCIe root ports in that case.
36 */
37static bool pcie_pme_disabled;
38
39/*
40 * The PCI Express Base Specification 2.0, Section 6.1.8, states the following:
41 * "In order to maintain compatibility with non-PCI Express-aware system
42 * software, system power management logic must be configured by firmware to use
43 * the legacy mechanism of signaling PME by default. PCI Express-aware system
44 * software must notify the firmware prior to enabling native, interrupt-based
45 * PME signaling." However, if the platform doesn't provide us with a suitable
46 * notification mechanism or the notification fails, it is not clear whether or
47 * not we are supposed to use the interrupt-based PCIe PME signaling. The
48 * switch below can be used to indicate the desired behaviour. When set, it
49 * will make the kernel use the interrupt-based PCIe PME signaling regardless of
50 * the platform notification status, although the kernel will attempt to notify
51 * the platform anyway. When unset, it will prevent the kernel from using the
52 * the interrupt-based PCIe PME signaling if the platform notification fails,
53 * which is the default.
54 */
55static bool pcie_pme_force_enable;
56
Rafael J. Wysockic39fae12010-02-17 23:40:07 +010057/*
58 * If this switch is set, MSI will not be used for PCIe PME signaling. This
59 * causes the PCIe port driver to use INTx interrupts only, but it turns out
60 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
61 * wake-up from system sleep states.
62 */
63bool pcie_pme_msi_disabled;
64
Rafael J. Wysockic7f48652010-02-17 23:39:08 +010065static int __init pcie_pme_setup(char *str)
66{
67 if (!strcmp(str, "off"))
68 pcie_pme_disabled = true;
69 else if (!strcmp(str, "force"))
70 pcie_pme_force_enable = true;
Rafael J. Wysockic39fae12010-02-17 23:40:07 +010071 else if (!strcmp(str, "nomsi"))
72 pcie_pme_msi_disabled = true;
Rafael J. Wysockic7f48652010-02-17 23:39:08 +010073 return 1;
74}
75__setup("pcie_pme=", pcie_pme_setup);
76
77/**
78 * pcie_pme_platform_setup - Ensure that the kernel controls the PCIe PME.
79 * @srv: PCIe PME root port service to use for carrying out the check.
80 *
81 * Notify the platform that the native PCIe PME is going to be used and return
82 * 'true' if the control of the PCIe PME registers has been acquired from the
83 * platform.
84 */
85static bool pcie_pme_platform_setup(struct pcie_device *srv)
86{
Rafael J. Wysockic39fae12010-02-17 23:40:07 +010087 if (!pcie_pme_platform_notify(srv))
88 return true;
89 return pcie_pme_force_enable;
Rafael J. Wysockic7f48652010-02-17 23:39:08 +010090}
91
92struct pcie_pme_service_data {
93 spinlock_t lock;
94 struct pcie_device *srv;
95 struct work_struct work;
96 bool noirq; /* Don't enable the PME interrupt used by this service. */
97};
98
99/**
100 * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
101 * @dev: PCIe root port or event collector.
102 * @enable: Enable or disable the interrupt.
103 */
104static void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
105{
106 int rtctl_pos;
107 u16 rtctl;
108
Kenji Kaneshigeb16694f2010-02-22 14:13:39 +0900109 rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100110
111 pci_read_config_word(dev, rtctl_pos, &rtctl);
112 if (enable)
113 rtctl |= PCI_EXP_RTCTL_PMEIE;
114 else
115 rtctl &= ~PCI_EXP_RTCTL_PMEIE;
116 pci_write_config_word(dev, rtctl_pos, rtctl);
117}
118
119/**
120 * pcie_pme_clear_status - Clear root port PME interrupt status.
121 * @dev: PCIe root port or event collector.
122 */
123static void pcie_pme_clear_status(struct pci_dev *dev)
124{
125 int rtsta_pos;
126 u32 rtsta;
127
Kenji Kaneshigeb16694f2010-02-22 14:13:39 +0900128 rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100129
130 pci_read_config_dword(dev, rtsta_pos, &rtsta);
131 rtsta |= PCI_EXP_RTSTA_PME;
132 pci_write_config_dword(dev, rtsta_pos, rtsta);
133}
134
135/**
136 * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
137 * @bus: PCI bus to scan.
138 *
139 * Scan given PCI bus and all buses under it for devices asserting PME#.
140 */
141static bool pcie_pme_walk_bus(struct pci_bus *bus)
142{
143 struct pci_dev *dev;
144 bool ret = false;
145
146 list_for_each_entry(dev, &bus->devices, bus_list) {
147 /* Skip PCIe devices in case we started from a root port. */
Kenji Kaneshige552be542010-02-22 14:12:24 +0900148 if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100149 pm_request_resume(&dev->dev);
150 ret = true;
151 }
152
153 if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
154 ret = true;
155 }
156
157 return ret;
158}
159
160/**
161 * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
162 * @bus: Secondary bus of the bridge.
163 * @devfn: Device/function number to check.
164 *
165 * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
166 * PCIe PME message. In such that case the bridge should use the Requester ID
167 * of device/function number 0 on its secondary bus.
168 */
169static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
170{
171 struct pci_dev *dev;
172 bool found = false;
173
174 if (devfn)
175 return false;
176
177 dev = pci_dev_get(bus->self);
178 if (!dev)
179 return false;
180
Kenji Kaneshige552be542010-02-22 14:12:24 +0900181 if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100182 down_read(&pci_bus_sem);
183 if (pcie_pme_walk_bus(bus))
184 found = true;
185 up_read(&pci_bus_sem);
186 }
187
188 pci_dev_put(dev);
189 return found;
190}
191
192/**
193 * pcie_pme_handle_request - Find device that generated PME and handle it.
194 * @port: Root port or event collector that generated the PME interrupt.
195 * @req_id: PCIe Requester ID of the device that generated the PME.
196 */
197static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
198{
199 u8 busnr = req_id >> 8, devfn = req_id & 0xff;
200 struct pci_bus *bus;
201 struct pci_dev *dev;
202 bool found = false;
203
204 /* First, check if the PME is from the root port itself. */
205 if (port->devfn == devfn && port->bus->number == busnr) {
206 if (pci_check_pme_status(port)) {
207 pm_request_resume(&port->dev);
208 found = true;
209 } else {
210 /*
211 * Apparently, the root port generated the PME on behalf
212 * of a non-PCIe device downstream. If this is done by
213 * a root port, the Requester ID field in its status
214 * register may contain either the root port's, or the
215 * source device's information (PCI Express Base
216 * Specification, Rev. 2.0, Section 6.1.9).
217 */
218 down_read(&pci_bus_sem);
219 found = pcie_pme_walk_bus(port->subordinate);
220 up_read(&pci_bus_sem);
221 }
222 goto out;
223 }
224
225 /* Second, find the bus the source device is on. */
226 bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
227 if (!bus)
228 goto out;
229
230 /* Next, check if the PME is from a PCIe-PCI bridge. */
231 found = pcie_pme_from_pci_bridge(bus, devfn);
232 if (found)
233 goto out;
234
235 /* Finally, try to find the PME source on the bus. */
236 down_read(&pci_bus_sem);
237 list_for_each_entry(dev, &bus->devices, bus_list) {
238 pci_dev_get(dev);
239 if (dev->devfn == devfn) {
240 found = true;
241 break;
242 }
243 pci_dev_put(dev);
244 }
245 up_read(&pci_bus_sem);
246
247 if (found) {
248 /* The device is there, but we have to check its PME status. */
249 found = pci_check_pme_status(dev);
250 if (found)
251 pm_request_resume(&dev->dev);
252 pci_dev_put(dev);
253 } else if (devfn) {
254 /*
255 * The device is not there, but we can still try to recover by
256 * assuming that the PME was reported by a PCIe-PCI bridge that
257 * used devfn different from zero.
258 */
259 dev_dbg(&port->dev, "PME interrupt generated for "
260 "non-existent device %02x:%02x.%d\n",
261 busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
262 found = pcie_pme_from_pci_bridge(bus, 0);
263 }
264
265 out:
266 if (!found)
267 dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
268}
269
270/**
271 * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
272 * @work: Work structure giving access to service data.
273 */
274static void pcie_pme_work_fn(struct work_struct *work)
275{
276 struct pcie_pme_service_data *data =
277 container_of(work, struct pcie_pme_service_data, work);
278 struct pci_dev *port = data->srv->port;
279 int rtsta_pos;
280 u32 rtsta;
281
Kenji Kaneshigeb16694f2010-02-22 14:13:39 +0900282 rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100283
284 spin_lock_irq(&data->lock);
285
286 for (;;) {
287 if (data->noirq)
288 break;
289
290 pci_read_config_dword(port, rtsta_pos, &rtsta);
291 if (rtsta & PCI_EXP_RTSTA_PME) {
292 /*
293 * Clear PME status of the port. If there are other
294 * pending PMEs, the status will be set again.
295 */
296 pcie_pme_clear_status(port);
297
298 spin_unlock_irq(&data->lock);
299 pcie_pme_handle_request(port, rtsta & 0xffff);
300 spin_lock_irq(&data->lock);
301
302 continue;
303 }
304
305 /* No need to loop if there are no more PMEs pending. */
306 if (!(rtsta & PCI_EXP_RTSTA_PENDING))
307 break;
308
309 spin_unlock_irq(&data->lock);
310 cpu_relax();
311 spin_lock_irq(&data->lock);
312 }
313
314 if (!data->noirq)
315 pcie_pme_interrupt_enable(port, true);
316
317 spin_unlock_irq(&data->lock);
318}
319
320/**
321 * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
322 * @irq: Interrupt vector.
323 * @context: Interrupt context pointer.
324 */
325static irqreturn_t pcie_pme_irq(int irq, void *context)
326{
327 struct pci_dev *port;
328 struct pcie_pme_service_data *data;
329 int rtsta_pos;
330 u32 rtsta;
331 unsigned long flags;
332
333 port = ((struct pcie_device *)context)->port;
334 data = get_service_data((struct pcie_device *)context);
335
Kenji Kaneshigeb16694f2010-02-22 14:13:39 +0900336 rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100337
338 spin_lock_irqsave(&data->lock, flags);
339 pci_read_config_dword(port, rtsta_pos, &rtsta);
340
341 if (!(rtsta & PCI_EXP_RTSTA_PME)) {
342 spin_unlock_irqrestore(&data->lock, flags);
343 return IRQ_NONE;
344 }
345
346 pcie_pme_interrupt_enable(port, false);
347 spin_unlock_irqrestore(&data->lock, flags);
348
349 /* We don't use pm_wq, because it's freezable. */
350 schedule_work(&data->work);
351
352 return IRQ_HANDLED;
353}
354
355/**
356 * pcie_pme_set_native - Set the PME interrupt flag for given device.
357 * @dev: PCI device to handle.
358 * @ign: Ignored.
359 */
360static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
361{
362 dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
363
364 device_set_run_wake(&dev->dev, true);
365 dev->pme_interrupt = true;
366 return 0;
367}
368
369/**
370 * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
371 * @port: PCIe root port or event collector to handle.
372 *
373 * For each device below given root port, including the port itself (or for each
374 * root complex integrated endpoint if @port is a root complex event collector)
375 * set the flag indicating that it can signal run-time wake-up events via PCIe
376 * PME interrupts.
377 */
378static void pcie_pme_mark_devices(struct pci_dev *port)
379{
380 pcie_pme_set_native(port, NULL);
381 if (port->subordinate) {
382 pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
383 } else {
384 struct pci_bus *bus = port->bus;
385 struct pci_dev *dev;
386
387 /* Check if this is a root port event collector. */
388 if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
389 return;
390
391 down_read(&pci_bus_sem);
392 list_for_each_entry(dev, &bus->devices, bus_list)
Kenji Kaneshige552be542010-02-22 14:12:24 +0900393 if (pci_is_pcie(dev)
Rafael J. Wysockic7f48652010-02-17 23:39:08 +0100394 && dev->pcie_type == PCI_EXP_TYPE_RC_END)
395 pcie_pme_set_native(dev, NULL);
396 up_read(&pci_bus_sem);
397 }
398}
399
400/**
401 * pcie_pme_probe - Initialize PCIe PME service for given root port.
402 * @srv: PCIe service to initialize.
403 */
404static int pcie_pme_probe(struct pcie_device *srv)
405{
406 struct pci_dev *port;
407 struct pcie_pme_service_data *data;
408 int ret;
409
410 if (!pcie_pme_platform_setup(srv))
411 return -EACCES;
412
413 data = kzalloc(sizeof(*data), GFP_KERNEL);
414 if (!data)
415 return -ENOMEM;
416
417 spin_lock_init(&data->lock);
418 INIT_WORK(&data->work, pcie_pme_work_fn);
419 data->srv = srv;
420 set_service_data(srv, data);
421
422 port = srv->port;
423 pcie_pme_interrupt_enable(port, false);
424 pcie_pme_clear_status(port);
425
426 ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
427 if (ret) {
428 kfree(data);
429 } else {
430 pcie_pme_mark_devices(port);
431 pcie_pme_interrupt_enable(port, true);
432 }
433
434 return ret;
435}
436
437/**
438 * pcie_pme_suspend - Suspend PCIe PME service device.
439 * @srv: PCIe service device to suspend.
440 */
441static int pcie_pme_suspend(struct pcie_device *srv)
442{
443 struct pcie_pme_service_data *data = get_service_data(srv);
444 struct pci_dev *port = srv->port;
445
446 spin_lock_irq(&data->lock);
447 pcie_pme_interrupt_enable(port, false);
448 pcie_pme_clear_status(port);
449 data->noirq = true;
450 spin_unlock_irq(&data->lock);
451
452 synchronize_irq(srv->irq);
453
454 return 0;
455}
456
457/**
458 * pcie_pme_resume - Resume PCIe PME service device.
459 * @srv - PCIe service device to resume.
460 */
461static int pcie_pme_resume(struct pcie_device *srv)
462{
463 struct pcie_pme_service_data *data = get_service_data(srv);
464 struct pci_dev *port = srv->port;
465
466 spin_lock_irq(&data->lock);
467 data->noirq = false;
468 pcie_pme_clear_status(port);
469 pcie_pme_interrupt_enable(port, true);
470 spin_unlock_irq(&data->lock);
471
472 return 0;
473}
474
475/**
476 * pcie_pme_remove - Prepare PCIe PME service device for removal.
477 * @srv - PCIe service device to resume.
478 */
479static void pcie_pme_remove(struct pcie_device *srv)
480{
481 pcie_pme_suspend(srv);
482 free_irq(srv->irq, srv);
483 kfree(get_service_data(srv));
484}
485
486static struct pcie_port_service_driver pcie_pme_driver = {
487 .name = "pcie_pme",
488 .port_type = PCI_EXP_TYPE_ROOT_PORT,
489 .service = PCIE_PORT_SERVICE_PME,
490
491 .probe = pcie_pme_probe,
492 .suspend = pcie_pme_suspend,
493 .resume = pcie_pme_resume,
494 .remove = pcie_pme_remove,
495};
496
497/**
498 * pcie_pme_service_init - Register the PCIe PME service driver.
499 */
500static int __init pcie_pme_service_init(void)
501{
502 return pcie_pme_disabled ?
503 -ENODEV : pcie_port_service_register(&pcie_pme_driver);
504}
505
506module_init(pcie_pme_service_init);