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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
Jacob Panaf7e9062014-10-06 21:17:14 -07002 * axp20x.c - MFD core driver for the X-Powers' Power Management ICs
Carlo Caionecfb61a42014-05-01 14:29:27 +02003 *
Jacob Panaf7e9062014-10-06 21:17:14 -07004 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
Carlo Caionecfb61a42014-05-01 14:29:27 +02007 *
8 * Author: Carlo Caione <carlo@caione.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/err.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/pm_runtime.h>
21#include <linux/regmap.h>
22#include <linux/slab.h>
23#include <linux/regulator/consumer.h>
24#include <linux/mfd/axp20x.h>
25#include <linux/mfd/core.h>
26#include <linux/of_device.h>
27#include <linux/of_irq.h>
Jacob Panaf7e9062014-10-06 21:17:14 -070028#include <linux/acpi.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020029
30#define AXP20X_OFF 0x80
31
Krzysztof Kozlowskic31e8582015-03-24 11:21:17 +010032static const char * const axp20x_model_names[] = {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020033 "AXP152",
Jacob Panaf7e9062014-10-06 21:17:14 -070034 "AXP202",
35 "AXP209",
Boris BREZILLONf05be582015-04-10 12:09:01 +080036 "AXP221",
Jacob Panaf7e9062014-10-06 21:17:14 -070037 "AXP288",
38};
39
Michal Suchanekd8d79f82015-07-11 14:59:56 +020040static const struct regmap_range axp152_writeable_ranges[] = {
41 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
42 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
43};
44
45static const struct regmap_range axp152_volatile_ranges[] = {
46 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
47 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
48 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
49};
50
51static const struct regmap_access_table axp152_writeable_table = {
52 .yes_ranges = axp152_writeable_ranges,
53 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
54};
55
56static const struct regmap_access_table axp152_volatile_table = {
57 .yes_ranges = axp152_volatile_ranges,
58 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
59};
60
Carlo Caionecfb61a42014-05-01 14:29:27 +020061static const struct regmap_range axp20x_writeable_ranges[] = {
62 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
63 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020064 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
Carlo Caionecfb61a42014-05-01 14:29:27 +020065};
66
67static const struct regmap_range axp20x_volatile_ranges[] = {
Bruno Prémont553ed4b2015-08-08 17:58:40 +020068 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
69 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
Carlo Caionecfb61a42014-05-01 14:29:27 +020070 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020071 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
72 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
73 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
Carlo Caionecfb61a42014-05-01 14:29:27 +020074};
75
76static const struct regmap_access_table axp20x_writeable_table = {
77 .yes_ranges = axp20x_writeable_ranges,
78 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
79};
80
81static const struct regmap_access_table axp20x_volatile_table = {
82 .yes_ranges = axp20x_volatile_ranges,
83 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
84};
85
Boris BREZILLONf05be582015-04-10 12:09:01 +080086static const struct regmap_range axp22x_writeable_ranges[] = {
87 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
88 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
89};
90
91static const struct regmap_range axp22x_volatile_ranges[] = {
92 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
93};
94
95static const struct regmap_access_table axp22x_writeable_table = {
96 .yes_ranges = axp22x_writeable_ranges,
97 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
98};
99
100static const struct regmap_access_table axp22x_volatile_table = {
101 .yes_ranges = axp22x_volatile_ranges,
102 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
103};
104
Jacob Panaf7e9062014-10-06 21:17:14 -0700105static const struct regmap_range axp288_writeable_ranges[] = {
106 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
107 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
108};
109
110static const struct regmap_range axp288_volatile_ranges[] = {
111 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
112};
113
114static const struct regmap_access_table axp288_writeable_table = {
115 .yes_ranges = axp288_writeable_ranges,
116 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
117};
118
119static const struct regmap_access_table axp288_volatile_table = {
120 .yes_ranges = axp288_volatile_ranges,
121 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
122};
123
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200124static struct resource axp152_pek_resources[] = {
125 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
126 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
127};
128
Carlo Caionecfb61a42014-05-01 14:29:27 +0200129static struct resource axp20x_pek_resources[] = {
130 {
131 .name = "PEK_DBR",
132 .start = AXP20X_IRQ_PEK_RIS_EDGE,
133 .end = AXP20X_IRQ_PEK_RIS_EDGE,
134 .flags = IORESOURCE_IRQ,
135 }, {
136 .name = "PEK_DBF",
137 .start = AXP20X_IRQ_PEK_FAL_EDGE,
138 .end = AXP20X_IRQ_PEK_FAL_EDGE,
139 .flags = IORESOURCE_IRQ,
140 },
141};
142
Boris BREZILLONf05be582015-04-10 12:09:01 +0800143static struct resource axp22x_pek_resources[] = {
144 {
145 .name = "PEK_DBR",
146 .start = AXP22X_IRQ_PEK_RIS_EDGE,
147 .end = AXP22X_IRQ_PEK_RIS_EDGE,
148 .flags = IORESOURCE_IRQ,
149 }, {
150 .name = "PEK_DBF",
151 .start = AXP22X_IRQ_PEK_FAL_EDGE,
152 .end = AXP22X_IRQ_PEK_FAL_EDGE,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
Todd Brandtd63878742015-02-02 15:41:41 -0800157static struct resource axp288_fuel_gauge_resources[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700158 {
159 .start = AXP288_IRQ_QWBTU,
160 .end = AXP288_IRQ_QWBTU,
161 .flags = IORESOURCE_IRQ,
162 },
163 {
164 .start = AXP288_IRQ_WBTU,
165 .end = AXP288_IRQ_WBTU,
166 .flags = IORESOURCE_IRQ,
167 },
168 {
169 .start = AXP288_IRQ_QWBTO,
170 .end = AXP288_IRQ_QWBTO,
171 .flags = IORESOURCE_IRQ,
172 },
173 {
174 .start = AXP288_IRQ_WBTO,
175 .end = AXP288_IRQ_WBTO,
176 .flags = IORESOURCE_IRQ,
177 },
178 {
179 .start = AXP288_IRQ_WL2,
180 .end = AXP288_IRQ_WL2,
181 .flags = IORESOURCE_IRQ,
182 },
183 {
184 .start = AXP288_IRQ_WL1,
185 .end = AXP288_IRQ_WL1,
186 .flags = IORESOURCE_IRQ,
187 },
188};
189
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200190static const struct regmap_config axp152_regmap_config = {
191 .reg_bits = 8,
192 .val_bits = 8,
193 .wr_table = &axp152_writeable_table,
194 .volatile_table = &axp152_volatile_table,
195 .max_register = AXP152_PWM1_DUTY_CYCLE,
196 .cache_type = REGCACHE_RBTREE,
197};
198
Carlo Caionecfb61a42014-05-01 14:29:27 +0200199static const struct regmap_config axp20x_regmap_config = {
200 .reg_bits = 8,
201 .val_bits = 8,
202 .wr_table = &axp20x_writeable_table,
203 .volatile_table = &axp20x_volatile_table,
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200204 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200205 .cache_type = REGCACHE_RBTREE,
206};
207
Boris BREZILLONf05be582015-04-10 12:09:01 +0800208static const struct regmap_config axp22x_regmap_config = {
209 .reg_bits = 8,
210 .val_bits = 8,
211 .wr_table = &axp22x_writeable_table,
212 .volatile_table = &axp22x_volatile_table,
213 .max_register = AXP22X_BATLOW_THRES1,
214 .cache_type = REGCACHE_RBTREE,
215};
216
Jacob Panaf7e9062014-10-06 21:17:14 -0700217static const struct regmap_config axp288_regmap_config = {
218 .reg_bits = 8,
219 .val_bits = 8,
220 .wr_table = &axp288_writeable_table,
221 .volatile_table = &axp288_volatile_table,
222 .max_register = AXP288_FG_TUNE5,
223 .cache_type = REGCACHE_RBTREE,
224};
225
226#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
227 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
Carlo Caionecfb61a42014-05-01 14:29:27 +0200228
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200229static const struct regmap_irq axp152_regmap_irqs[] = {
230 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
231 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
232 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
233 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
234 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
235 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
236 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
237 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
238 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
239 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
240 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
241 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
242 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
243 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
244 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
245 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
246 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
247};
248
Carlo Caionecfb61a42014-05-01 14:29:27 +0200249static const struct regmap_irq axp20x_regmap_irqs[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700250 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
251 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
252 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
253 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
254 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
255 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
256 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
257 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
258 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
259 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
260 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
261 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
262 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
263 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
264 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
265 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
266 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
267 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
268 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
269 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
270 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
271 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
272 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
273 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
274 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
275 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
276 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
277 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
278 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
279 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
280 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
281 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
282 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
283 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
284 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
285 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
286 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
287};
288
Boris BREZILLONf05be582015-04-10 12:09:01 +0800289static const struct regmap_irq axp22x_regmap_irqs[] = {
290 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
291 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
292 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
293 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
294 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
295 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
296 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
297 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
298 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
299 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
300 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
301 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
302 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
303 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
304 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
305 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
306 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
307 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
308 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
309 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
310 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
311 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
312 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
313 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
314 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
315};
316
Jacob Panaf7e9062014-10-06 21:17:14 -0700317/* some IRQs are compatible with axp20x models */
318static const struct regmap_irq axp288_regmap_irqs[] = {
Jacob Panff3bbc52014-11-11 11:30:09 -0800319 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
320 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
321 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
Jacob Panaf7e9062014-10-06 21:17:14 -0700322
Jacob Panff3bbc52014-11-11 11:30:09 -0800323 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
324 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700325 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
326 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
Jacob Panff3bbc52014-11-11 11:30:09 -0800327 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
328 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700329
330 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
331 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
332 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
Jacob Panff3bbc52014-11-11 11:30:09 -0800333 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700334 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
335 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
336 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
337 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
338
339 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
340 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
341 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
342 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
343
344 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
345 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
346 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
347 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
348 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
349 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
350 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
Jacob Panff3bbc52014-11-11 11:30:09 -0800351 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700352
353 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
354 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200355};
356
357static const struct of_device_id axp20x_of_match[] = {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200358 { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID },
Carlo Caionecfb61a42014-05-01 14:29:27 +0200359 { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
360 { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
Boris BREZILLONf05be582015-04-10 12:09:01 +0800361 { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },
Carlo Caionecfb61a42014-05-01 14:29:27 +0200362 { },
363};
364MODULE_DEVICE_TABLE(of, axp20x_of_match);
365
366/*
367 * This is useless for OF-enabled devices, but it is needed by I2C subsystem
368 */
369static const struct i2c_device_id axp20x_i2c_id[] = {
370 { },
371};
372MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
373
Lee Jones0e50e922014-11-11 12:36:46 +0000374static const struct acpi_device_id axp20x_acpi_match[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700375 {
376 .id = "INT33F4",
377 .driver_data = AXP288_ID,
378 },
379 { },
380};
381MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match);
382
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200383static const struct regmap_irq_chip axp152_regmap_irq_chip = {
384 .name = "axp152_irq_chip",
385 .status_base = AXP152_IRQ1_STATE,
386 .ack_base = AXP152_IRQ1_STATE,
387 .mask_base = AXP152_IRQ1_EN,
388 .mask_invert = true,
389 .init_ack_masked = true,
390 .irqs = axp152_regmap_irqs,
391 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
392 .num_regs = 3,
393};
394
Carlo Caionecfb61a42014-05-01 14:29:27 +0200395static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
396 .name = "axp20x_irq_chip",
397 .status_base = AXP20X_IRQ1_STATE,
398 .ack_base = AXP20X_IRQ1_STATE,
399 .mask_base = AXP20X_IRQ1_EN,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200400 .mask_invert = true,
401 .init_ack_masked = true,
Jacob Panaf7e9062014-10-06 21:17:14 -0700402 .irqs = axp20x_regmap_irqs,
403 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
404 .num_regs = 5,
405
406};
407
Boris BREZILLONf05be582015-04-10 12:09:01 +0800408static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
409 .name = "axp22x_irq_chip",
410 .status_base = AXP20X_IRQ1_STATE,
411 .ack_base = AXP20X_IRQ1_STATE,
412 .mask_base = AXP20X_IRQ1_EN,
413 .mask_invert = true,
414 .init_ack_masked = true,
415 .irqs = axp22x_regmap_irqs,
416 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
417 .num_regs = 5,
418};
419
Jacob Panaf7e9062014-10-06 21:17:14 -0700420static const struct regmap_irq_chip axp288_regmap_irq_chip = {
421 .name = "axp288_irq_chip",
422 .status_base = AXP20X_IRQ1_STATE,
423 .ack_base = AXP20X_IRQ1_STATE,
424 .mask_base = AXP20X_IRQ1_EN,
425 .mask_invert = true,
426 .init_ack_masked = true,
427 .irqs = axp288_regmap_irqs,
428 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
429 .num_regs = 6,
430
Carlo Caionecfb61a42014-05-01 14:29:27 +0200431};
432
Carlo Caionecfb61a42014-05-01 14:29:27 +0200433static struct mfd_cell axp20x_cells[] = {
434 {
435 .name = "axp20x-pek",
436 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
437 .resources = axp20x_pek_resources,
438 }, {
439 .name = "axp20x-regulator",
Carlo Caionecfb61a42014-05-01 14:29:27 +0200440 },
441};
442
Boris BREZILLONf05be582015-04-10 12:09:01 +0800443static struct mfd_cell axp22x_cells[] = {
444 {
445 .name = "axp20x-pek",
446 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
447 .resources = axp22x_pek_resources,
Chen-Yu Tsai6d4fa892015-04-10 12:09:06 +0800448 }, {
449 .name = "axp20x-regulator",
Boris BREZILLONf05be582015-04-10 12:09:01 +0800450 },
451};
452
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200453static struct mfd_cell axp152_cells[] = {
454 {
455 .name = "axp20x-pek",
456 .num_resources = ARRAY_SIZE(axp152_pek_resources),
457 .resources = axp152_pek_resources,
458 },
459};
460
Jacob Panaf7e9062014-10-06 21:17:14 -0700461static struct resource axp288_adc_resources[] = {
462 {
463 .name = "GPADC",
464 .start = AXP288_IRQ_GPADC,
465 .end = AXP288_IRQ_GPADC,
466 .flags = IORESOURCE_IRQ,
467 },
468};
469
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530470static struct resource axp288_extcon_resources[] = {
471 {
472 .start = AXP288_IRQ_VBUS_FALL,
473 .end = AXP288_IRQ_VBUS_FALL,
474 .flags = IORESOURCE_IRQ,
475 },
476 {
477 .start = AXP288_IRQ_VBUS_RISE,
478 .end = AXP288_IRQ_VBUS_RISE,
479 .flags = IORESOURCE_IRQ,
480 },
481 {
482 .start = AXP288_IRQ_MV_CHNG,
483 .end = AXP288_IRQ_MV_CHNG,
484 .flags = IORESOURCE_IRQ,
485 },
486 {
487 .start = AXP288_IRQ_BC_USB_CHNG,
488 .end = AXP288_IRQ_BC_USB_CHNG,
489 .flags = IORESOURCE_IRQ,
490 },
491};
492
Jacob Panaf7e9062014-10-06 21:17:14 -0700493static struct resource axp288_charger_resources[] = {
494 {
495 .start = AXP288_IRQ_OV,
496 .end = AXP288_IRQ_OV,
497 .flags = IORESOURCE_IRQ,
498 },
499 {
500 .start = AXP288_IRQ_DONE,
501 .end = AXP288_IRQ_DONE,
502 .flags = IORESOURCE_IRQ,
503 },
504 {
505 .start = AXP288_IRQ_CHARGING,
506 .end = AXP288_IRQ_CHARGING,
507 .flags = IORESOURCE_IRQ,
508 },
509 {
510 .start = AXP288_IRQ_SAFE_QUIT,
511 .end = AXP288_IRQ_SAFE_QUIT,
512 .flags = IORESOURCE_IRQ,
513 },
514 {
515 .start = AXP288_IRQ_SAFE_ENTER,
516 .end = AXP288_IRQ_SAFE_ENTER,
517 .flags = IORESOURCE_IRQ,
518 },
519 {
520 .start = AXP288_IRQ_QCBTU,
521 .end = AXP288_IRQ_QCBTU,
522 .flags = IORESOURCE_IRQ,
523 },
524 {
525 .start = AXP288_IRQ_CBTU,
526 .end = AXP288_IRQ_CBTU,
527 .flags = IORESOURCE_IRQ,
528 },
529 {
530 .start = AXP288_IRQ_QCBTO,
531 .end = AXP288_IRQ_QCBTO,
532 .flags = IORESOURCE_IRQ,
533 },
534 {
535 .start = AXP288_IRQ_CBTO,
536 .end = AXP288_IRQ_CBTO,
537 .flags = IORESOURCE_IRQ,
538 },
539};
540
541static struct mfd_cell axp288_cells[] = {
542 {
543 .name = "axp288_adc",
544 .num_resources = ARRAY_SIZE(axp288_adc_resources),
545 .resources = axp288_adc_resources,
546 },
547 {
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530548 .name = "axp288_extcon",
549 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
550 .resources = axp288_extcon_resources,
551 },
552 {
Jacob Panaf7e9062014-10-06 21:17:14 -0700553 .name = "axp288_charger",
554 .num_resources = ARRAY_SIZE(axp288_charger_resources),
555 .resources = axp288_charger_resources,
556 },
557 {
Todd Brandtd63878742015-02-02 15:41:41 -0800558 .name = "axp288_fuel_gauge",
559 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
560 .resources = axp288_fuel_gauge_resources,
Jacob Panaf7e9062014-10-06 21:17:14 -0700561 },
Aaron Lud8139f62014-11-24 17:24:47 +0800562 {
563 .name = "axp288_pmic_acpi",
564 },
Jacob Panaf7e9062014-10-06 21:17:14 -0700565};
566
Carlo Caionecfb61a42014-05-01 14:29:27 +0200567static struct axp20x_dev *axp20x_pm_power_off;
568static void axp20x_power_off(void)
569{
Jacob Panaf7e9062014-10-06 21:17:14 -0700570 if (axp20x_pm_power_off->variant == AXP288_ID)
571 return;
572
Carlo Caionecfb61a42014-05-01 14:29:27 +0200573 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
574 AXP20X_OFF);
575}
576
Jacob Panaf7e9062014-10-06 21:17:14 -0700577static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)
578{
579 const struct acpi_device_id *acpi_id;
580 const struct of_device_id *of_id;
581
582 if (dev->of_node) {
583 of_id = of_match_device(axp20x_of_match, dev);
584 if (!of_id) {
585 dev_err(dev, "Unable to match OF ID\n");
586 return -ENODEV;
587 }
588 axp20x->variant = (long) of_id->data;
589 } else {
590 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
591 if (!acpi_id || !acpi_id->driver_data) {
592 dev_err(dev, "Unable to match ACPI ID and data\n");
593 return -ENODEV;
594 }
595 axp20x->variant = (long) acpi_id->driver_data;
596 }
597
598 switch (axp20x->variant) {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200599 case AXP152_ID:
600 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
601 axp20x->cells = axp152_cells;
602 axp20x->regmap_cfg = &axp152_regmap_config;
603 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
604 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700605 case AXP202_ID:
606 case AXP209_ID:
607 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
608 axp20x->cells = axp20x_cells;
609 axp20x->regmap_cfg = &axp20x_regmap_config;
610 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
611 break;
Boris BREZILLONf05be582015-04-10 12:09:01 +0800612 case AXP221_ID:
613 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
614 axp20x->cells = axp22x_cells;
615 axp20x->regmap_cfg = &axp22x_regmap_config;
616 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
617 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700618 case AXP288_ID:
619 axp20x->cells = axp288_cells;
620 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
621 axp20x->regmap_cfg = &axp288_regmap_config;
622 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
623 break;
624 default:
625 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
626 return -EINVAL;
627 }
628 dev_info(dev, "AXP20x variant %s found\n",
629 axp20x_model_names[axp20x->variant]);
630
631 return 0;
632}
633
Carlo Caionecfb61a42014-05-01 14:29:27 +0200634static int axp20x_i2c_probe(struct i2c_client *i2c,
635 const struct i2c_device_id *id)
636{
637 struct axp20x_dev *axp20x;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200638 int ret;
639
640 axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL);
641 if (!axp20x)
642 return -ENOMEM;
643
Jacob Panaf7e9062014-10-06 21:17:14 -0700644 ret = axp20x_match_device(axp20x, &i2c->dev);
645 if (ret)
646 return ret;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200647
648 axp20x->i2c_client = i2c;
649 axp20x->dev = &i2c->dev;
650 dev_set_drvdata(axp20x->dev, axp20x);
651
Jacob Panaf7e9062014-10-06 21:17:14 -0700652 axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200653 if (IS_ERR(axp20x->regmap)) {
654 ret = PTR_ERR(axp20x->regmap);
655 dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
656 return ret;
657 }
658
659 ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq,
660 IRQF_ONESHOT | IRQF_SHARED, -1,
Jacob Panaf7e9062014-10-06 21:17:14 -0700661 axp20x->regmap_irq_chip,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200662 &axp20x->regmap_irqc);
663 if (ret) {
664 dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret);
665 return ret;
666 }
667
Jacob Panaf7e9062014-10-06 21:17:14 -0700668 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
669 axp20x->nr_cells, NULL, 0, NULL);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200670
671 if (ret) {
672 dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
673 regmap_del_irq_chip(i2c->irq, axp20x->regmap_irqc);
674 return ret;
675 }
676
677 if (!pm_power_off) {
678 axp20x_pm_power_off = axp20x;
679 pm_power_off = axp20x_power_off;
680 }
681
682 dev_info(&i2c->dev, "AXP20X driver loaded\n");
683
684 return 0;
685}
686
687static int axp20x_i2c_remove(struct i2c_client *i2c)
688{
689 struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);
690
691 if (axp20x == axp20x_pm_power_off) {
692 axp20x_pm_power_off = NULL;
693 pm_power_off = NULL;
694 }
695
696 mfd_remove_devices(axp20x->dev);
697 regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc);
698
699 return 0;
700}
701
702static struct i2c_driver axp20x_i2c_driver = {
703 .driver = {
704 .name = "axp20x",
Carlo Caionecfb61a42014-05-01 14:29:27 +0200705 .of_match_table = of_match_ptr(axp20x_of_match),
Jacob Panaf7e9062014-10-06 21:17:14 -0700706 .acpi_match_table = ACPI_PTR(axp20x_acpi_match),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200707 },
708 .probe = axp20x_i2c_probe,
709 .remove = axp20x_i2c_remove,
710 .id_table = axp20x_i2c_id,
711};
712
713module_i2c_driver(axp20x_i2c_driver);
714
715MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
716MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
717MODULE_LICENSE("GPL");