blob: f8504b0adebcd5e10fca98274c0eb459ef357481 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/char/21285.c
3 *
4 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
5 *
6 * Based on drivers/char/serial.c
7 *
8 * $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
9 */
10#include <linux/config.h>
11#include <linux/module.h>
12#include <linux/tty.h>
13#include <linux/ioport.h>
14#include <linux/init.h>
15#include <linux/console.h>
16#include <linux/device.h>
17#include <linux/tty_flip.h>
18#include <linux/serial_core.h>
19#include <linux/serial.h>
20
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/mach-types.h>
24#include <asm/hardware/dec21285.h>
25#include <asm/hardware.h>
26
27#define BAUD_BASE (mem_fclk_21285/64)
28
29#define SERIAL_21285_NAME "ttyFB"
30#define SERIAL_21285_MAJOR 204
31#define SERIAL_21285_MINOR 4
32
33#define RXSTAT_DUMMY_READ 0x80000000
34#define RXSTAT_FRAME (1 << 0)
35#define RXSTAT_PARITY (1 << 1)
36#define RXSTAT_OVERRUN (1 << 2)
37#define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
38
39#define H_UBRLCR_BREAK (1 << 0)
40#define H_UBRLCR_PARENB (1 << 1)
41#define H_UBRLCR_PAREVN (1 << 2)
42#define H_UBRLCR_STOPB (1 << 3)
43#define H_UBRLCR_FIFO (1 << 4)
44
45static const char serial21285_name[] = "Footbridge UART";
46
47#define tx_enabled(port) ((port)->unused[0])
48#define rx_enabled(port) ((port)->unused[1])
49
50/*
51 * The documented expression for selecting the divisor is:
52 * BAUD_BASE / baud - 1
53 * However, typically BAUD_BASE is not divisible by baud, so
54 * we want to select the divisor that gives us the minimum
55 * error. Therefore, we want:
56 * int(BAUD_BASE / baud - 0.5) ->
57 * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
58 * int((BAUD_BASE - (baud >> 1)) / baud)
59 */
60
61static void
62serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop)
63{
64 if (tx_enabled(port)) {
65 disable_irq(IRQ_CONTX);
66 tx_enabled(port) = 0;
67 }
68}
69
70static void
71serial21285_start_tx(struct uart_port *port, unsigned int tty_start)
72{
73 if (!tx_enabled(port)) {
74 enable_irq(IRQ_CONTX);
75 tx_enabled(port) = 1;
76 }
77}
78
79static void serial21285_stop_rx(struct uart_port *port)
80{
81 if (rx_enabled(port)) {
82 disable_irq(IRQ_CONRX);
83 rx_enabled(port) = 0;
84 }
85}
86
87static void serial21285_enable_ms(struct uart_port *port)
88{
89}
90
91static irqreturn_t serial21285_rx_chars(int irq, void *dev_id, struct pt_regs *regs)
92{
93 struct uart_port *port = dev_id;
94 struct tty_struct *tty = port->info->tty;
95 unsigned int status, ch, flag, rxs, max_count = 256;
96
97 status = *CSR_UARTFLG;
98 while (!(status & 0x10) && max_count--) {
99 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
100 if (tty->low_latency)
101 tty_flip_buffer_push(tty);
102 /*
103 * If this failed then we will throw away the
104 * bytes but must do so to clear interrupts
105 */
106 }
107
108 ch = *CSR_UARTDR;
109 flag = TTY_NORMAL;
110 port->icount.rx++;
111
112 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
113 if (rxs & RXSTAT_ANYERR) {
114 if (rxs & RXSTAT_PARITY)
115 port->icount.parity++;
116 else if (rxs & RXSTAT_FRAME)
117 port->icount.frame++;
118 if (rxs & RXSTAT_OVERRUN)
119 port->icount.overrun++;
120
121 rxs &= port->read_status_mask;
122
123 if (rxs & RXSTAT_PARITY)
124 flag = TTY_PARITY;
125 else if (rxs & RXSTAT_FRAME)
126 flag = TTY_FRAME;
127 }
128
129 if ((rxs & port->ignore_status_mask) == 0) {
130 tty_insert_flip_char(tty, ch, flag);
131 }
132 if ((rxs & RXSTAT_OVERRUN) &&
133 tty->flip.count < TTY_FLIPBUF_SIZE) {
134 /*
135 * Overrun is special, since it's reported
136 * immediately, and doesn't affect the current
137 * character.
138 */
139 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
140 }
141 status = *CSR_UARTFLG;
142 }
143 tty_flip_buffer_push(tty);
144
145 return IRQ_HANDLED;
146}
147
148static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *regs)
149{
150 struct uart_port *port = dev_id;
151 struct circ_buf *xmit = &port->info->xmit;
152 int count = 256;
153
154 if (port->x_char) {
155 *CSR_UARTDR = port->x_char;
156 port->icount.tx++;
157 port->x_char = 0;
158 goto out;
159 }
160 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
161 serial21285_stop_tx(port, 0);
162 goto out;
163 }
164
165 do {
166 *CSR_UARTDR = xmit->buf[xmit->tail];
167 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
168 port->icount.tx++;
169 if (uart_circ_empty(xmit))
170 break;
171 } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
172
173 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
174 uart_write_wakeup(port);
175
176 if (uart_circ_empty(xmit))
177 serial21285_stop_tx(port, 0);
178
179 out:
180 return IRQ_HANDLED;
181}
182
183static unsigned int serial21285_tx_empty(struct uart_port *port)
184{
185 return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
186}
187
188/* no modem control lines */
189static unsigned int serial21285_get_mctrl(struct uart_port *port)
190{
191 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
192}
193
194static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
195{
196}
197
198static void serial21285_break_ctl(struct uart_port *port, int break_state)
199{
200 unsigned long flags;
201 unsigned int h_lcr;
202
203 spin_lock_irqsave(&port->lock, flags);
204 h_lcr = *CSR_H_UBRLCR;
205 if (break_state)
206 h_lcr |= H_UBRLCR_BREAK;
207 else
208 h_lcr &= ~H_UBRLCR_BREAK;
209 *CSR_H_UBRLCR = h_lcr;
210 spin_unlock_irqrestore(&port->lock, flags);
211}
212
213static int serial21285_startup(struct uart_port *port)
214{
215 int ret;
216
217 tx_enabled(port) = 1;
218 rx_enabled(port) = 1;
219
220 ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
221 serial21285_name, port);
222 if (ret == 0) {
223 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
224 serial21285_name, port);
225 if (ret)
226 free_irq(IRQ_CONRX, port);
227 }
228
229 return ret;
230}
231
232static void serial21285_shutdown(struct uart_port *port)
233{
234 free_irq(IRQ_CONTX, port);
235 free_irq(IRQ_CONRX, port);
236}
237
238static void
239serial21285_set_termios(struct uart_port *port, struct termios *termios,
240 struct termios *old)
241{
242 unsigned long flags;
243 unsigned int baud, quot, h_lcr;
244
245 /*
246 * We don't support modem control lines.
247 */
248 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
249 termios->c_cflag |= CLOCAL;
250
251 /*
252 * We don't support BREAK character recognition.
253 */
254 termios->c_iflag &= ~(IGNBRK | BRKINT);
255
256 /*
257 * Ask the core to calculate the divisor for us.
258 */
259 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
260 quot = uart_get_divisor(port, baud);
261
262 switch (termios->c_cflag & CSIZE) {
263 case CS5:
264 h_lcr = 0x00;
265 break;
266 case CS6:
267 h_lcr = 0x20;
268 break;
269 case CS7:
270 h_lcr = 0x40;
271 break;
272 default: /* CS8 */
273 h_lcr = 0x60;
274 break;
275 }
276
277 if (termios->c_cflag & CSTOPB)
278 h_lcr |= H_UBRLCR_STOPB;
279 if (termios->c_cflag & PARENB) {
280 h_lcr |= H_UBRLCR_PARENB;
281 if (!(termios->c_cflag & PARODD))
282 h_lcr |= H_UBRLCR_PAREVN;
283 }
284
285 if (port->fifosize)
286 h_lcr |= H_UBRLCR_FIFO;
287
288 spin_lock_irqsave(&port->lock, flags);
289
290 /*
291 * Update the per-port timeout.
292 */
293 uart_update_timeout(port, termios->c_cflag, baud);
294
295 /*
296 * Which character status flags are we interested in?
297 */
298 port->read_status_mask = RXSTAT_OVERRUN;
299 if (termios->c_iflag & INPCK)
300 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
301
302 /*
303 * Which character status flags should we ignore?
304 */
305 port->ignore_status_mask = 0;
306 if (termios->c_iflag & IGNPAR)
307 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
308 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
309 port->ignore_status_mask |= RXSTAT_OVERRUN;
310
311 /*
312 * Ignore all characters if CREAD is not set.
313 */
314 if ((termios->c_cflag & CREAD) == 0)
315 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
316
317 quot -= 1;
318
319 *CSR_UARTCON = 0;
320 *CSR_L_UBRLCR = quot & 0xff;
321 *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
322 *CSR_H_UBRLCR = h_lcr;
323 *CSR_UARTCON = 1;
324
325 spin_unlock_irqrestore(&port->lock, flags);
326}
327
328static const char *serial21285_type(struct uart_port *port)
329{
330 return port->type == PORT_21285 ? "DC21285" : NULL;
331}
332
333static void serial21285_release_port(struct uart_port *port)
334{
335 release_mem_region(port->mapbase, 32);
336}
337
338static int serial21285_request_port(struct uart_port *port)
339{
340 return request_mem_region(port->mapbase, 32, serial21285_name)
341 != NULL ? 0 : -EBUSY;
342}
343
344static void serial21285_config_port(struct uart_port *port, int flags)
345{
346 if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
347 port->type = PORT_21285;
348}
349
350/*
351 * verify the new serial_struct (for TIOCSSERIAL).
352 */
353static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
354{
355 int ret = 0;
356 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
357 ret = -EINVAL;
358 if (ser->irq != NO_IRQ)
359 ret = -EINVAL;
360 if (ser->baud_base != port->uartclk / 16)
361 ret = -EINVAL;
362 return ret;
363}
364
365static struct uart_ops serial21285_ops = {
366 .tx_empty = serial21285_tx_empty,
367 .get_mctrl = serial21285_get_mctrl,
368 .set_mctrl = serial21285_set_mctrl,
369 .stop_tx = serial21285_stop_tx,
370 .start_tx = serial21285_start_tx,
371 .stop_rx = serial21285_stop_rx,
372 .enable_ms = serial21285_enable_ms,
373 .break_ctl = serial21285_break_ctl,
374 .startup = serial21285_startup,
375 .shutdown = serial21285_shutdown,
376 .set_termios = serial21285_set_termios,
377 .type = serial21285_type,
378 .release_port = serial21285_release_port,
379 .request_port = serial21285_request_port,
380 .config_port = serial21285_config_port,
381 .verify_port = serial21285_verify_port,
382};
383
384static struct uart_port serial21285_port = {
385 .mapbase = 0x42000160,
386 .iotype = SERIAL_IO_MEM,
387 .irq = NO_IRQ,
388 .fifosize = 16,
389 .ops = &serial21285_ops,
390 .flags = ASYNC_BOOT_AUTOCONF,
391};
392
393static void serial21285_setup_ports(void)
394{
395 serial21285_port.uartclk = mem_fclk_21285 / 4;
396}
397
398#ifdef CONFIG_SERIAL_21285_CONSOLE
399
400static void
401serial21285_console_write(struct console *co, const char *s,
402 unsigned int count)
403{
404 int i;
405
406 for (i = 0; i < count; i++) {
407 while (*CSR_UARTFLG & 0x20)
408 barrier();
409 *CSR_UARTDR = s[i];
410 if (s[i] == '\n') {
411 while (*CSR_UARTFLG & 0x20)
412 barrier();
413 *CSR_UARTDR = '\r';
414 }
415 }
416}
417
418static void __init
419serial21285_get_options(struct uart_port *port, int *baud,
420 int *parity, int *bits)
421{
422 if (*CSR_UARTCON == 1) {
423 unsigned int tmp;
424
425 tmp = *CSR_H_UBRLCR;
426 switch (tmp & 0x60) {
427 case 0x00:
428 *bits = 5;
429 break;
430 case 0x20:
431 *bits = 6;
432 break;
433 case 0x40:
434 *bits = 7;
435 break;
436 default:
437 case 0x60:
438 *bits = 8;
439 break;
440 }
441
442 if (tmp & H_UBRLCR_PARENB) {
443 *parity = 'o';
444 if (tmp & H_UBRLCR_PAREVN)
445 *parity = 'e';
446 }
447
448 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
449
450 *baud = port->uartclk / (16 * (tmp + 1));
451 }
452}
453
454static int __init serial21285_console_setup(struct console *co, char *options)
455{
456 struct uart_port *port = &serial21285_port;
457 int baud = 9600;
458 int bits = 8;
459 int parity = 'n';
460 int flow = 'n';
461
462 if (machine_is_personal_server())
463 baud = 57600;
464
465 /*
466 * Check whether an invalid uart number has been specified, and
467 * if so, search for the first available port that does have
468 * console support.
469 */
470 if (options)
471 uart_parse_options(options, &baud, &parity, &bits, &flow);
472 else
473 serial21285_get_options(port, &baud, &parity, &bits);
474
475 return uart_set_options(port, co, baud, parity, bits, flow);
476}
477
478extern struct uart_driver serial21285_reg;
479
480static struct console serial21285_console =
481{
482 .name = SERIAL_21285_NAME,
483 .write = serial21285_console_write,
484 .device = uart_console_device,
485 .setup = serial21285_console_setup,
486 .flags = CON_PRINTBUFFER,
487 .index = -1,
488 .data = &serial21285_reg,
489};
490
491static int __init rs285_console_init(void)
492{
493 serial21285_setup_ports();
494 register_console(&serial21285_console);
495 return 0;
496}
497console_initcall(rs285_console_init);
498
499#define SERIAL_21285_CONSOLE &serial21285_console
500#else
501#define SERIAL_21285_CONSOLE NULL
502#endif
503
504static struct uart_driver serial21285_reg = {
505 .owner = THIS_MODULE,
506 .driver_name = "ttyFB",
507 .dev_name = "ttyFB",
508 .devfs_name = "ttyFB",
509 .major = SERIAL_21285_MAJOR,
510 .minor = SERIAL_21285_MINOR,
511 .nr = 1,
512 .cons = SERIAL_21285_CONSOLE,
513};
514
515static int __init serial21285_init(void)
516{
517 int ret;
518
519 printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");
520
521 serial21285_setup_ports();
522
523 ret = uart_register_driver(&serial21285_reg);
524 if (ret == 0)
525 uart_add_one_port(&serial21285_reg, &serial21285_port);
526
527 return ret;
528}
529
530static void __exit serial21285_exit(void)
531{
532 uart_remove_one_port(&serial21285_reg, &serial21285_port);
533 uart_unregister_driver(&serial21285_reg);
534}
535
536module_init(serial21285_init);
537module_exit(serial21285_exit);
538
539MODULE_LICENSE("GPL");
540MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
541MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);