Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */ |
| 2 | |
| 3 | #include <linux/config.h> |
| 4 | #include <linux/kernel.h> |
| 5 | #include <linux/string.h> |
| 6 | #include <linux/timer.h> |
| 7 | #include <linux/ptrace.h> |
| 8 | #include <linux/errno.h> |
| 9 | #include <linux/ioport.h> |
| 10 | #include <linux/slab.h> |
| 11 | #include <linux/interrupt.h> |
| 12 | #include <linux/pci.h> |
| 13 | #include <linux/in.h> |
| 14 | #include <linux/if_arp.h> |
| 15 | #include <linux/netdevice.h> |
| 16 | #include <linux/etherdevice.h> |
| 17 | #include <linux/skbuff.h> |
| 18 | #include <linux/inet.h> |
| 19 | #include <linux/bitops.h> |
| 20 | |
| 21 | #include <net/syncppp.h> |
| 22 | |
| 23 | #include <asm/processor.h> /* Processor type for cache alignment. */ |
| 24 | #include <asm/io.h> |
| 25 | #include <asm/dma.h> |
| 26 | |
| 27 | #include <asm/uaccess.h> |
| 28 | |
| 29 | #include "lmc.h" |
| 30 | #include "lmc_var.h" |
| 31 | #include "lmc_ioctl.h" |
| 32 | #include "lmc_debug.h" |
| 33 | |
| 34 | #define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1 |
| 35 | |
| 36 | /* |
| 37 | * Copyright (c) 1997-2000 LAN Media Corporation (LMC) |
| 38 | * All rights reserved. www.lanmedia.com |
| 39 | * |
| 40 | * This code is written by: |
| 41 | * Andrew Stanley-Jones (asj@cban.com) |
| 42 | * Rob Braun (bbraun@vix.com), |
| 43 | * Michael Graff (explorer@vix.com) and |
| 44 | * Matt Thomas (matt@3am-software.com). |
| 45 | * |
| 46 | * This software may be used and distributed according to the terms |
| 47 | * of the GNU General Public License version 2, incorporated herein by reference. |
| 48 | */ |
| 49 | |
| 50 | /* |
| 51 | * For lack of a better place, put the SSI cable stuff here. |
| 52 | */ |
| 53 | char *lmc_t1_cables[] = { |
| 54 | "V.10/RS423", "EIA530A", "reserved", "X.21", "V.35", |
| 55 | "EIA449/EIA530/V.36", "V.28/EIA232", "none", NULL |
| 56 | }; |
| 57 | |
| 58 | /* |
| 59 | * protocol independent method. |
| 60 | */ |
| 61 | static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *); |
| 62 | |
| 63 | /* |
| 64 | * media independent methods to check on media status, link, light LEDs, |
| 65 | * etc. |
| 66 | */ |
| 67 | static void lmc_ds3_init (lmc_softc_t * const); |
| 68 | static void lmc_ds3_default (lmc_softc_t * const); |
| 69 | static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *); |
| 70 | static void lmc_ds3_set_100ft (lmc_softc_t * const, int); |
| 71 | static int lmc_ds3_get_link_status (lmc_softc_t * const); |
| 72 | static void lmc_ds3_set_crc_length (lmc_softc_t * const, int); |
| 73 | static void lmc_ds3_set_scram (lmc_softc_t * const, int); |
| 74 | static void lmc_ds3_watchdog (lmc_softc_t * const); |
| 75 | |
| 76 | static void lmc_hssi_init (lmc_softc_t * const); |
| 77 | static void lmc_hssi_default (lmc_softc_t * const); |
| 78 | static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *); |
| 79 | static void lmc_hssi_set_clock (lmc_softc_t * const, int); |
| 80 | static int lmc_hssi_get_link_status (lmc_softc_t * const); |
| 81 | static void lmc_hssi_set_link_status (lmc_softc_t * const, int); |
| 82 | static void lmc_hssi_set_crc_length (lmc_softc_t * const, int); |
| 83 | static void lmc_hssi_watchdog (lmc_softc_t * const); |
| 84 | |
| 85 | static void lmc_ssi_init (lmc_softc_t * const); |
| 86 | static void lmc_ssi_default (lmc_softc_t * const); |
| 87 | static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *); |
| 88 | static void lmc_ssi_set_clock (lmc_softc_t * const, int); |
| 89 | static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *); |
| 90 | static int lmc_ssi_get_link_status (lmc_softc_t * const); |
| 91 | static void lmc_ssi_set_link_status (lmc_softc_t * const, int); |
| 92 | static void lmc_ssi_set_crc_length (lmc_softc_t * const, int); |
| 93 | static void lmc_ssi_watchdog (lmc_softc_t * const); |
| 94 | |
| 95 | static void lmc_t1_init (lmc_softc_t * const); |
| 96 | static void lmc_t1_default (lmc_softc_t * const); |
| 97 | static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *); |
| 98 | static int lmc_t1_get_link_status (lmc_softc_t * const); |
| 99 | static void lmc_t1_set_circuit_type (lmc_softc_t * const, int); |
| 100 | static void lmc_t1_set_crc_length (lmc_softc_t * const, int); |
| 101 | static void lmc_t1_set_clock (lmc_softc_t * const, int); |
| 102 | static void lmc_t1_watchdog (lmc_softc_t * const); |
| 103 | |
| 104 | static void lmc_dummy_set_1 (lmc_softc_t * const, int); |
| 105 | static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *); |
| 106 | |
| 107 | static inline void write_av9110_bit (lmc_softc_t *, int); |
| 108 | static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t, |
| 109 | u_int32_t, u_int32_t); |
| 110 | |
| 111 | lmc_media_t lmc_ds3_media = { |
| 112 | lmc_ds3_init, /* special media init stuff */ |
| 113 | lmc_ds3_default, /* reset to default state */ |
| 114 | lmc_ds3_set_status, /* reset status to state provided */ |
| 115 | lmc_dummy_set_1, /* set clock source */ |
| 116 | lmc_dummy_set2_1, /* set line speed */ |
| 117 | lmc_ds3_set_100ft, /* set cable length */ |
| 118 | lmc_ds3_set_scram, /* set scrambler */ |
| 119 | lmc_ds3_get_link_status, /* get link status */ |
| 120 | lmc_dummy_set_1, /* set link status */ |
| 121 | lmc_ds3_set_crc_length, /* set CRC length */ |
| 122 | lmc_dummy_set_1, /* set T1 or E1 circuit type */ |
| 123 | lmc_ds3_watchdog |
| 124 | }; |
| 125 | |
| 126 | lmc_media_t lmc_hssi_media = { |
| 127 | lmc_hssi_init, /* special media init stuff */ |
| 128 | lmc_hssi_default, /* reset to default state */ |
| 129 | lmc_hssi_set_status, /* reset status to state provided */ |
| 130 | lmc_hssi_set_clock, /* set clock source */ |
| 131 | lmc_dummy_set2_1, /* set line speed */ |
| 132 | lmc_dummy_set_1, /* set cable length */ |
| 133 | lmc_dummy_set_1, /* set scrambler */ |
| 134 | lmc_hssi_get_link_status, /* get link status */ |
| 135 | lmc_hssi_set_link_status, /* set link status */ |
| 136 | lmc_hssi_set_crc_length, /* set CRC length */ |
| 137 | lmc_dummy_set_1, /* set T1 or E1 circuit type */ |
| 138 | lmc_hssi_watchdog |
| 139 | }; |
| 140 | |
| 141 | lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */ |
| 142 | lmc_ssi_default, /* reset to default state */ |
| 143 | lmc_ssi_set_status, /* reset status to state provided */ |
| 144 | lmc_ssi_set_clock, /* set clock source */ |
| 145 | lmc_ssi_set_speed, /* set line speed */ |
| 146 | lmc_dummy_set_1, /* set cable length */ |
| 147 | lmc_dummy_set_1, /* set scrambler */ |
| 148 | lmc_ssi_get_link_status, /* get link status */ |
| 149 | lmc_ssi_set_link_status, /* set link status */ |
| 150 | lmc_ssi_set_crc_length, /* set CRC length */ |
| 151 | lmc_dummy_set_1, /* set T1 or E1 circuit type */ |
| 152 | lmc_ssi_watchdog |
| 153 | }; |
| 154 | |
| 155 | lmc_media_t lmc_t1_media = { |
| 156 | lmc_t1_init, /* special media init stuff */ |
| 157 | lmc_t1_default, /* reset to default state */ |
| 158 | lmc_t1_set_status, /* reset status to state provided */ |
| 159 | lmc_t1_set_clock, /* set clock source */ |
| 160 | lmc_dummy_set2_1, /* set line speed */ |
| 161 | lmc_dummy_set_1, /* set cable length */ |
| 162 | lmc_dummy_set_1, /* set scrambler */ |
| 163 | lmc_t1_get_link_status, /* get link status */ |
| 164 | lmc_dummy_set_1, /* set link status */ |
| 165 | lmc_t1_set_crc_length, /* set CRC length */ |
| 166 | lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */ |
| 167 | lmc_t1_watchdog |
| 168 | }; |
| 169 | |
| 170 | static void |
| 171 | lmc_dummy_set_1 (lmc_softc_t * const sc, int a) |
| 172 | { |
| 173 | } |
| 174 | |
| 175 | static void |
| 176 | lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a) |
| 177 | { |
| 178 | } |
| 179 | |
| 180 | /* |
| 181 | * HSSI methods |
| 182 | */ |
| 183 | |
| 184 | static void |
| 185 | lmc_hssi_init (lmc_softc_t * const sc) |
| 186 | { |
| 187 | sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200; |
| 188 | |
| 189 | lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK); |
| 190 | } |
| 191 | |
| 192 | static void |
| 193 | lmc_hssi_default (lmc_softc_t * const sc) |
| 194 | { |
| 195 | sc->lmc_miireg16 = LMC_MII16_LED_ALL; |
| 196 | |
| 197 | sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); |
| 198 | sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); |
| 199 | sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); |
| 200 | } |
| 201 | |
| 202 | /* |
| 203 | * Given a user provided state, set ourselves up to match it. This will |
| 204 | * always reset the card if needed. |
| 205 | */ |
| 206 | static void |
| 207 | lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) |
| 208 | { |
| 209 | if (ctl == NULL) |
| 210 | { |
| 211 | sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); |
| 212 | lmc_set_protocol (sc, NULL); |
| 213 | |
| 214 | return; |
| 215 | } |
| 216 | |
| 217 | /* |
| 218 | * check for change in clock source |
| 219 | */ |
| 220 | if (ctl->clock_source && !sc->ictl.clock_source) |
| 221 | { |
| 222 | sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT); |
| 223 | sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT; |
| 224 | } |
| 225 | else if (!ctl->clock_source && sc->ictl.clock_source) |
| 226 | { |
| 227 | sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; |
| 228 | sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); |
| 229 | } |
| 230 | |
| 231 | lmc_set_protocol (sc, ctl); |
| 232 | } |
| 233 | |
| 234 | /* |
| 235 | * 1 == internal, 0 == external |
| 236 | */ |
| 237 | static void |
| 238 | lmc_hssi_set_clock (lmc_softc_t * const sc, int ie) |
| 239 | { |
| 240 | int old; |
| 241 | old = sc->ictl.clock_source; |
| 242 | if (ie == LMC_CTL_CLOCK_SOURCE_EXT) |
| 243 | { |
| 244 | sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK; |
| 245 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 246 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; |
| 247 | if(old != ie) |
| 248 | printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); |
| 249 | } |
| 250 | else |
| 251 | { |
| 252 | sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK); |
| 253 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 254 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; |
| 255 | if(old != ie) |
| 256 | printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); |
| 257 | } |
| 258 | } |
| 259 | |
| 260 | /* |
| 261 | * return hardware link status. |
| 262 | * 0 == link is down, 1 == link is up. |
| 263 | */ |
| 264 | static int |
| 265 | lmc_hssi_get_link_status (lmc_softc_t * const sc) |
| 266 | { |
| 267 | /* |
| 268 | * We're using the same code as SSI since |
| 269 | * they're practically the same |
| 270 | */ |
| 271 | return lmc_ssi_get_link_status(sc); |
| 272 | } |
| 273 | |
| 274 | static void |
| 275 | lmc_hssi_set_link_status (lmc_softc_t * const sc, int state) |
| 276 | { |
| 277 | if (state == LMC_LINK_UP) |
| 278 | sc->lmc_miireg16 |= LMC_MII16_HSSI_TA; |
| 279 | else |
| 280 | sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA; |
| 281 | |
| 282 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 283 | } |
| 284 | |
| 285 | /* |
| 286 | * 0 == 16bit, 1 == 32bit |
| 287 | */ |
| 288 | static void |
| 289 | lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state) |
| 290 | { |
| 291 | if (state == LMC_CTL_CRC_LENGTH_32) |
| 292 | { |
| 293 | /* 32 bit */ |
| 294 | sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC; |
| 295 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; |
| 296 | } |
| 297 | else |
| 298 | { |
| 299 | /* 16 bit */ |
| 300 | sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC; |
| 301 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; |
| 302 | } |
| 303 | |
| 304 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 305 | } |
| 306 | |
| 307 | static void |
| 308 | lmc_hssi_watchdog (lmc_softc_t * const sc) |
| 309 | { |
| 310 | /* HSSI is blank */ |
| 311 | } |
| 312 | |
| 313 | /* |
| 314 | * DS3 methods |
| 315 | */ |
| 316 | |
| 317 | /* |
| 318 | * Set cable length |
| 319 | */ |
| 320 | static void |
| 321 | lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie) |
| 322 | { |
| 323 | if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT) |
| 324 | { |
| 325 | sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO; |
| 326 | sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT; |
| 327 | } |
| 328 | else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT) |
| 329 | { |
| 330 | sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO; |
| 331 | sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT; |
| 332 | } |
| 333 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 334 | } |
| 335 | |
| 336 | static void |
| 337 | lmc_ds3_default (lmc_softc_t * const sc) |
| 338 | { |
| 339 | sc->lmc_miireg16 = LMC_MII16_LED_ALL; |
| 340 | |
| 341 | sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); |
| 342 | sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT); |
| 343 | sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF); |
| 344 | sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); |
| 345 | } |
| 346 | |
| 347 | /* |
| 348 | * Given a user provided state, set ourselves up to match it. This will |
| 349 | * always reset the card if needed. |
| 350 | */ |
| 351 | static void |
| 352 | lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) |
| 353 | { |
| 354 | if (ctl == NULL) |
| 355 | { |
| 356 | sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length); |
| 357 | sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff); |
| 358 | lmc_set_protocol (sc, NULL); |
| 359 | |
| 360 | return; |
| 361 | } |
| 362 | |
| 363 | /* |
| 364 | * check for change in cable length setting |
| 365 | */ |
| 366 | if (ctl->cable_length && !sc->ictl.cable_length) |
| 367 | lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT); |
| 368 | else if (!ctl->cable_length && sc->ictl.cable_length) |
| 369 | lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT); |
| 370 | |
| 371 | /* |
| 372 | * Check for change in scrambler setting (requires reset) |
| 373 | */ |
| 374 | if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff) |
| 375 | lmc_ds3_set_scram (sc, LMC_CTL_ON); |
| 376 | else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff) |
| 377 | lmc_ds3_set_scram (sc, LMC_CTL_OFF); |
| 378 | |
| 379 | lmc_set_protocol (sc, ctl); |
| 380 | } |
| 381 | |
| 382 | static void |
| 383 | lmc_ds3_init (lmc_softc_t * const sc) |
| 384 | { |
| 385 | int i; |
| 386 | |
| 387 | sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245; |
| 388 | |
| 389 | /* writes zeros everywhere */ |
| 390 | for (i = 0; i < 21; i++) |
| 391 | { |
| 392 | lmc_mii_writereg (sc, 0, 17, i); |
| 393 | lmc_mii_writereg (sc, 0, 18, 0); |
| 394 | } |
| 395 | |
| 396 | /* set some essential bits */ |
| 397 | lmc_mii_writereg (sc, 0, 17, 1); |
| 398 | lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */ |
| 399 | |
| 400 | lmc_mii_writereg (sc, 0, 17, 5); |
| 401 | lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */ |
| 402 | |
| 403 | lmc_mii_writereg (sc, 0, 17, 14); |
| 404 | lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */ |
| 405 | |
| 406 | /* clear counters and latched bits */ |
| 407 | for (i = 0; i < 21; i++) |
| 408 | { |
| 409 | lmc_mii_writereg (sc, 0, 17, i); |
| 410 | lmc_mii_readreg (sc, 0, 18); |
| 411 | } |
| 412 | } |
| 413 | |
| 414 | /* |
| 415 | * 1 == DS3 payload scrambled, 0 == not scrambled |
| 416 | */ |
| 417 | static void |
| 418 | lmc_ds3_set_scram (lmc_softc_t * const sc, int ie) |
| 419 | { |
| 420 | if (ie == LMC_CTL_ON) |
| 421 | { |
| 422 | sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM; |
| 423 | sc->ictl.scrambler_onoff = LMC_CTL_ON; |
| 424 | } |
| 425 | else |
| 426 | { |
| 427 | sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM; |
| 428 | sc->ictl.scrambler_onoff = LMC_CTL_OFF; |
| 429 | } |
| 430 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 431 | } |
| 432 | |
| 433 | /* |
| 434 | * return hardware link status. |
| 435 | * 0 == link is down, 1 == link is up. |
| 436 | */ |
| 437 | static int |
| 438 | lmc_ds3_get_link_status (lmc_softc_t * const sc) |
| 439 | { |
| 440 | u_int16_t link_status, link_status_11; |
| 441 | int ret = 1; |
| 442 | |
| 443 | lmc_mii_writereg (sc, 0, 17, 7); |
| 444 | link_status = lmc_mii_readreg (sc, 0, 18); |
| 445 | |
| 446 | /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions |
| 447 | * led0 yellow = far-end adapter is in Red alarm condition |
| 448 | * led1 blue = received an Alarm Indication signal |
| 449 | * (upstream failure) |
| 450 | * led2 Green = power to adapter, Gate Array loaded & driver |
| 451 | * attached |
| 452 | * led3 red = Loss of Signal (LOS) or out of frame (OOF) |
| 453 | * conditions detected on T3 receive signal |
| 454 | */ |
| 455 | |
| 456 | lmc_led_on(sc, LMC_DS3_LED2); |
| 457 | |
| 458 | if ((link_status & LMC_FRAMER_REG0_DLOS) || |
| 459 | (link_status & LMC_FRAMER_REG0_OOFS)){ |
| 460 | ret = 0; |
| 461 | if(sc->last_led_err[3] != 1){ |
| 462 | u16 r1; |
| 463 | lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */ |
| 464 | r1 = lmc_mii_readreg (sc, 0, 18); |
| 465 | r1 &= 0xfe; |
| 466 | lmc_mii_writereg(sc, 0, 18, r1); |
| 467 | printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name); |
| 468 | } |
| 469 | lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */ |
| 470 | sc->last_led_err[3] = 1; |
| 471 | } |
| 472 | else { |
| 473 | lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */ |
| 474 | if(sc->last_led_err[3] == 1){ |
| 475 | u16 r1; |
| 476 | lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */ |
| 477 | r1 = lmc_mii_readreg (sc, 0, 18); |
| 478 | r1 |= 0x01; |
| 479 | lmc_mii_writereg(sc, 0, 18, r1); |
| 480 | } |
| 481 | sc->last_led_err[3] = 0; |
| 482 | } |
| 483 | |
| 484 | lmc_mii_writereg(sc, 0, 17, 0x10); |
| 485 | link_status_11 = lmc_mii_readreg(sc, 0, 18); |
| 486 | if((link_status & LMC_FRAMER_REG0_AIS) || |
| 487 | (link_status_11 & LMC_FRAMER_REG10_XBIT)) { |
| 488 | ret = 0; |
| 489 | if(sc->last_led_err[0] != 1){ |
| 490 | printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name); |
| 491 | printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name); |
| 492 | } |
| 493 | lmc_led_on(sc, LMC_DS3_LED0); |
| 494 | sc->last_led_err[0] = 1; |
| 495 | } |
| 496 | else { |
| 497 | lmc_led_off(sc, LMC_DS3_LED0); |
| 498 | sc->last_led_err[0] = 0; |
| 499 | } |
| 500 | |
| 501 | lmc_mii_writereg (sc, 0, 17, 9); |
| 502 | link_status = lmc_mii_readreg (sc, 0, 18); |
| 503 | |
| 504 | if(link_status & LMC_FRAMER_REG9_RBLUE){ |
| 505 | ret = 0; |
| 506 | if(sc->last_led_err[1] != 1){ |
| 507 | printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name); |
| 508 | } |
| 509 | lmc_led_on(sc, LMC_DS3_LED1); |
| 510 | sc->last_led_err[1] = 1; |
| 511 | } |
| 512 | else { |
| 513 | lmc_led_off(sc, LMC_DS3_LED1); |
| 514 | sc->last_led_err[1] = 0; |
| 515 | } |
| 516 | |
| 517 | return ret; |
| 518 | } |
| 519 | |
| 520 | /* |
| 521 | * 0 == 16bit, 1 == 32bit |
| 522 | */ |
| 523 | static void |
| 524 | lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state) |
| 525 | { |
| 526 | if (state == LMC_CTL_CRC_LENGTH_32) |
| 527 | { |
| 528 | /* 32 bit */ |
| 529 | sc->lmc_miireg16 |= LMC_MII16_DS3_CRC; |
| 530 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; |
| 531 | } |
| 532 | else |
| 533 | { |
| 534 | /* 16 bit */ |
| 535 | sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC; |
| 536 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; |
| 537 | } |
| 538 | |
| 539 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 540 | } |
| 541 | |
| 542 | static void |
| 543 | lmc_ds3_watchdog (lmc_softc_t * const sc) |
| 544 | { |
| 545 | |
| 546 | } |
| 547 | |
| 548 | |
| 549 | /* |
| 550 | * SSI methods |
| 551 | */ |
| 552 | |
| 553 | static void |
| 554 | lmc_ssi_init (lmc_softc_t * const sc) |
| 555 | { |
| 556 | u_int16_t mii17; |
| 557 | int cable; |
| 558 | |
| 559 | sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000; |
| 560 | |
| 561 | mii17 = lmc_mii_readreg (sc, 0, 17); |
| 562 | |
| 563 | cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT; |
| 564 | sc->ictl.cable_type = cable; |
| 565 | |
| 566 | lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK); |
| 567 | } |
| 568 | |
| 569 | static void |
| 570 | lmc_ssi_default (lmc_softc_t * const sc) |
| 571 | { |
| 572 | sc->lmc_miireg16 = LMC_MII16_LED_ALL; |
| 573 | |
| 574 | /* |
| 575 | * make TXCLOCK always be an output |
| 576 | */ |
| 577 | lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK); |
| 578 | |
| 579 | sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); |
| 580 | sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); |
| 581 | sc->lmc_media->set_speed (sc, NULL); |
| 582 | sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); |
| 583 | } |
| 584 | |
| 585 | /* |
| 586 | * Given a user provided state, set ourselves up to match it. This will |
| 587 | * always reset the card if needed. |
| 588 | */ |
| 589 | static void |
| 590 | lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) |
| 591 | { |
| 592 | if (ctl == NULL) |
| 593 | { |
| 594 | sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); |
| 595 | sc->lmc_media->set_speed (sc, &sc->ictl); |
| 596 | lmc_set_protocol (sc, NULL); |
| 597 | |
| 598 | return; |
| 599 | } |
| 600 | |
| 601 | /* |
| 602 | * check for change in clock source |
| 603 | */ |
| 604 | if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT |
| 605 | && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT) |
| 606 | { |
| 607 | sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT); |
| 608 | sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT; |
| 609 | } |
| 610 | else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT |
| 611 | && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT) |
| 612 | { |
| 613 | sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); |
| 614 | sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; |
| 615 | } |
| 616 | |
| 617 | if (ctl->clock_rate != sc->ictl.clock_rate) |
| 618 | sc->lmc_media->set_speed (sc, ctl); |
| 619 | |
| 620 | lmc_set_protocol (sc, ctl); |
| 621 | } |
| 622 | |
| 623 | /* |
| 624 | * 1 == internal, 0 == external |
| 625 | */ |
| 626 | static void |
| 627 | lmc_ssi_set_clock (lmc_softc_t * const sc, int ie) |
| 628 | { |
| 629 | int old; |
| 630 | old = ie; |
| 631 | if (ie == LMC_CTL_CLOCK_SOURCE_EXT) |
| 632 | { |
| 633 | sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK); |
| 634 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 635 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; |
| 636 | if(ie != old) |
| 637 | printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); |
| 638 | } |
| 639 | else |
| 640 | { |
| 641 | sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK; |
| 642 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 643 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; |
| 644 | if(ie != old) |
| 645 | printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); |
| 646 | } |
| 647 | } |
| 648 | |
| 649 | static void |
| 650 | lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl) |
| 651 | { |
| 652 | lmc_ctl_t *ictl = &sc->ictl; |
| 653 | lmc_av9110_t *av; |
| 654 | |
| 655 | /* original settings for clock rate of: |
| 656 | * 100 Khz (8,25,0,0,2) were incorrect |
| 657 | * they should have been 80,125,1,3,3 |
| 658 | * There are 17 param combinations to produce this freq. |
| 659 | * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations) |
| 660 | */ |
| 661 | if (ctl == NULL) |
| 662 | { |
| 663 | av = &ictl->cardspec.ssi; |
| 664 | ictl->clock_rate = 1500000; |
| 665 | av->f = ictl->clock_rate; |
| 666 | av->n = 120; |
| 667 | av->m = 100; |
| 668 | av->v = 1; |
| 669 | av->x = 1; |
| 670 | av->r = 2; |
| 671 | |
| 672 | write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); |
| 673 | return; |
| 674 | } |
| 675 | |
| 676 | av = &ctl->cardspec.ssi; |
| 677 | |
| 678 | if (av->f == 0) |
| 679 | return; |
| 680 | |
| 681 | ictl->clock_rate = av->f; /* really, this is the rate we are */ |
| 682 | ictl->cardspec.ssi = *av; |
| 683 | |
| 684 | write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); |
| 685 | } |
| 686 | |
| 687 | /* |
| 688 | * return hardware link status. |
| 689 | * 0 == link is down, 1 == link is up. |
| 690 | */ |
| 691 | static int |
| 692 | lmc_ssi_get_link_status (lmc_softc_t * const sc) |
| 693 | { |
| 694 | u_int16_t link_status; |
| 695 | u_int32_t ticks; |
| 696 | int ret = 1; |
| 697 | int hw_hdsk = 1; |
| 698 | |
| 699 | /* |
| 700 | * missing CTS? Hmm. If we require CTS on, we may never get the |
| 701 | * link to come up, so omit it in this test. |
| 702 | * |
| 703 | * Also, it seems that with a loopback cable, DCD isn't asserted, |
| 704 | * so just check for things like this: |
| 705 | * DSR _must_ be asserted. |
| 706 | * One of DCD or CTS must be asserted. |
| 707 | */ |
| 708 | |
| 709 | /* LMC 1000 (SSI) LED definitions |
| 710 | * led0 Green = power to adapter, Gate Array loaded & |
| 711 | * driver attached |
| 712 | * led1 Green = DSR and DTR and RTS and CTS are set |
| 713 | * led2 Green = Cable detected |
| 714 | * led3 red = No timing is available from the |
| 715 | * cable or the on-board frequency |
| 716 | * generator. |
| 717 | */ |
| 718 | |
| 719 | link_status = lmc_mii_readreg (sc, 0, 16); |
| 720 | |
| 721 | /* Is the transmit clock still available */ |
| 722 | ticks = LMC_CSR_READ (sc, csr_gp_timer); |
| 723 | ticks = 0x0000ffff - (ticks & 0x0000ffff); |
| 724 | |
| 725 | lmc_led_on (sc, LMC_MII16_LED0); |
| 726 | |
| 727 | /* ====== transmit clock determination ===== */ |
| 728 | if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) { |
| 729 | lmc_led_off(sc, LMC_MII16_LED3); |
| 730 | } |
| 731 | else if (ticks == 0 ) { /* no clock found ? */ |
| 732 | ret = 0; |
| 733 | if(sc->last_led_err[3] != 1){ |
| 734 | sc->stats.tx_lossOfClockCnt++; |
| 735 | printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name); |
| 736 | } |
| 737 | sc->last_led_err[3] = 1; |
| 738 | lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */ |
| 739 | } |
| 740 | else { |
| 741 | if(sc->last_led_err[3] == 1) |
| 742 | printk(KERN_WARNING "%s: Clock Returned\n", sc->name); |
| 743 | sc->last_led_err[3] = 0; |
| 744 | lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */ |
| 745 | } |
| 746 | |
| 747 | if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */ |
| 748 | ret = 0; |
| 749 | hw_hdsk = 0; |
| 750 | } |
| 751 | |
| 752 | #ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE |
| 753 | if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){ |
| 754 | ret = 0; |
| 755 | hw_hdsk = 0; |
| 756 | } |
| 757 | #endif |
| 758 | |
| 759 | if(hw_hdsk == 0){ |
| 760 | if(sc->last_led_err[1] != 1) |
| 761 | printk(KERN_WARNING "%s: DSR not asserted\n", sc->name); |
| 762 | sc->last_led_err[1] = 1; |
| 763 | lmc_led_off(sc, LMC_MII16_LED1); |
| 764 | } |
| 765 | else { |
| 766 | if(sc->last_led_err[1] != 0) |
| 767 | printk(KERN_WARNING "%s: DSR now asserted\n", sc->name); |
| 768 | sc->last_led_err[1] = 0; |
| 769 | lmc_led_on(sc, LMC_MII16_LED1); |
| 770 | } |
| 771 | |
| 772 | if(ret == 1) { |
| 773 | lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */ |
| 774 | } |
| 775 | |
| 776 | return ret; |
| 777 | } |
| 778 | |
| 779 | static void |
| 780 | lmc_ssi_set_link_status (lmc_softc_t * const sc, int state) |
| 781 | { |
| 782 | if (state == LMC_LINK_UP) |
| 783 | { |
| 784 | sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS); |
| 785 | printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS); |
| 786 | } |
| 787 | else |
| 788 | { |
| 789 | sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS); |
| 790 | printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS); |
| 791 | } |
| 792 | |
| 793 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 794 | |
| 795 | } |
| 796 | |
| 797 | /* |
| 798 | * 0 == 16bit, 1 == 32bit |
| 799 | */ |
| 800 | static void |
| 801 | lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state) |
| 802 | { |
| 803 | if (state == LMC_CTL_CRC_LENGTH_32) |
| 804 | { |
| 805 | /* 32 bit */ |
| 806 | sc->lmc_miireg16 |= LMC_MII16_SSI_CRC; |
| 807 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; |
| 808 | sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4; |
| 809 | |
| 810 | } |
| 811 | else |
| 812 | { |
| 813 | /* 16 bit */ |
| 814 | sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC; |
| 815 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; |
| 816 | sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2; |
| 817 | } |
| 818 | |
| 819 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 820 | } |
| 821 | |
| 822 | /* |
| 823 | * These are bits to program the ssi frequency generator |
| 824 | */ |
| 825 | static inline void |
| 826 | write_av9110_bit (lmc_softc_t * sc, int c) |
| 827 | { |
| 828 | /* |
| 829 | * set the data bit as we need it. |
| 830 | */ |
| 831 | sc->lmc_gpio &= ~(LMC_GEP_CLK); |
| 832 | if (c & 0x01) |
| 833 | sc->lmc_gpio |= LMC_GEP_DATA; |
| 834 | else |
| 835 | sc->lmc_gpio &= ~(LMC_GEP_DATA); |
| 836 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 837 | |
| 838 | /* |
| 839 | * set the clock to high |
| 840 | */ |
| 841 | sc->lmc_gpio |= LMC_GEP_CLK; |
| 842 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 843 | |
| 844 | /* |
| 845 | * set the clock to low again. |
| 846 | */ |
| 847 | sc->lmc_gpio &= ~(LMC_GEP_CLK); |
| 848 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 849 | } |
| 850 | |
| 851 | static void |
| 852 | write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v, |
| 853 | u_int32_t x, u_int32_t r) |
| 854 | { |
| 855 | int i; |
| 856 | |
| 857 | #if 0 |
| 858 | printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n", |
| 859 | LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r); |
| 860 | #endif |
| 861 | |
| 862 | sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR; |
| 863 | sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK); |
| 864 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 865 | |
| 866 | /* |
| 867 | * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK |
| 868 | * as outputs. |
| 869 | */ |
| 870 | lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK |
| 871 | | LMC_GEP_SSI_GENERATOR)); |
| 872 | |
| 873 | sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR); |
| 874 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 875 | |
| 876 | /* |
| 877 | * a shifting we will go... |
| 878 | */ |
| 879 | for (i = 0; i < 7; i++) |
| 880 | write_av9110_bit (sc, n >> i); |
| 881 | for (i = 0; i < 7; i++) |
| 882 | write_av9110_bit (sc, m >> i); |
| 883 | for (i = 0; i < 1; i++) |
| 884 | write_av9110_bit (sc, v >> i); |
| 885 | for (i = 0; i < 2; i++) |
| 886 | write_av9110_bit (sc, x >> i); |
| 887 | for (i = 0; i < 2; i++) |
| 888 | write_av9110_bit (sc, r >> i); |
| 889 | for (i = 0; i < 5; i++) |
| 890 | write_av9110_bit (sc, 0x17 >> i); |
| 891 | |
| 892 | /* |
| 893 | * stop driving serial-related signals |
| 894 | */ |
| 895 | lmc_gpio_mkinput (sc, |
| 896 | (LMC_GEP_DATA | LMC_GEP_CLK |
| 897 | | LMC_GEP_SSI_GENERATOR)); |
| 898 | } |
| 899 | |
| 900 | static void |
| 901 | lmc_ssi_watchdog (lmc_softc_t * const sc) |
| 902 | { |
| 903 | u_int16_t mii17; |
| 904 | struct ssicsr2 |
| 905 | { |
| 906 | unsigned short dtr:1, dsr:1, rts:1, cable:3, crc:1, led0:1, led1:1, |
| 907 | led2:1, led3:1, fifo:1, ll:1, rl:1, tm:1, loop:1; |
| 908 | }; |
| 909 | struct ssicsr2 *ssicsr; |
| 910 | mii17 = lmc_mii_readreg (sc, 0, 17); |
| 911 | ssicsr = (struct ssicsr2 *) &mii17; |
| 912 | if (ssicsr->cable == 7) |
| 913 | { |
| 914 | lmc_led_off (sc, LMC_MII16_LED2); |
| 915 | } |
| 916 | else |
| 917 | { |
| 918 | lmc_led_on (sc, LMC_MII16_LED2); |
| 919 | } |
| 920 | |
| 921 | } |
| 922 | |
| 923 | /* |
| 924 | * T1 methods |
| 925 | */ |
| 926 | |
| 927 | /* |
| 928 | * The framer regs are multiplexed through MII regs 17 & 18 |
| 929 | * write the register address to MII reg 17 and the * data to MII reg 18. */ |
| 930 | static void |
| 931 | lmc_t1_write (lmc_softc_t * const sc, int a, int d) |
| 932 | { |
| 933 | lmc_mii_writereg (sc, 0, 17, a); |
| 934 | lmc_mii_writereg (sc, 0, 18, d); |
| 935 | } |
| 936 | |
| 937 | /* Save a warning |
| 938 | static int |
| 939 | lmc_t1_read (lmc_softc_t * const sc, int a) |
| 940 | { |
| 941 | lmc_mii_writereg (sc, 0, 17, a); |
| 942 | return lmc_mii_readreg (sc, 0, 18); |
| 943 | } |
| 944 | */ |
| 945 | |
| 946 | |
| 947 | static void |
| 948 | lmc_t1_init (lmc_softc_t * const sc) |
| 949 | { |
| 950 | u_int16_t mii16; |
| 951 | int i; |
| 952 | |
| 953 | sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200; |
| 954 | mii16 = lmc_mii_readreg (sc, 0, 16); |
| 955 | |
| 956 | /* reset 8370 */ |
| 957 | mii16 &= ~LMC_MII16_T1_RST; |
| 958 | lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST); |
| 959 | lmc_mii_writereg (sc, 0, 16, mii16); |
| 960 | |
| 961 | /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */ |
| 962 | sc->lmc_miireg16 = mii16; |
| 963 | lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1); |
| 964 | mii16 = sc->lmc_miireg16; |
| 965 | |
| 966 | lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */ |
| 967 | lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */ |
| 968 | lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */ |
| 969 | lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */ |
| 970 | lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */ |
| 971 | lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */ |
| 972 | lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */ |
| 973 | lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */ |
| 974 | lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */ |
| 975 | lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */ |
| 976 | lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */ |
| 977 | lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */ |
| 978 | lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */ |
| 979 | lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */ |
| 980 | lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */ |
| 981 | lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */ |
| 982 | lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */ |
| 983 | lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */ |
| 984 | lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */ |
| 985 | lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */ |
| 986 | lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */ |
| 987 | lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */ |
| 988 | lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */ |
| 989 | lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */ |
| 990 | lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */ |
| 991 | lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */ |
| 992 | lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */ |
| 993 | lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */ |
| 994 | for (i = 0; i < 32; i++) |
| 995 | { |
| 996 | lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */ |
| 997 | lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */ |
| 998 | lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */ |
| 999 | } |
| 1000 | for (i = 1; i < 25; i++) |
| 1001 | { |
| 1002 | lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */ |
| 1003 | } |
| 1004 | |
| 1005 | mii16 |= LMC_MII16_T1_XOE; |
| 1006 | lmc_mii_writereg (sc, 0, 16, mii16); |
| 1007 | sc->lmc_miireg16 = mii16; |
| 1008 | } |
| 1009 | |
| 1010 | static void |
| 1011 | lmc_t1_default (lmc_softc_t * const sc) |
| 1012 | { |
| 1013 | sc->lmc_miireg16 = LMC_MII16_LED_ALL; |
| 1014 | sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); |
| 1015 | sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1); |
| 1016 | sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); |
| 1017 | /* Right now we can only clock from out internal source */ |
| 1018 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; |
| 1019 | } |
| 1020 | /* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed. |
| 1021 | */ |
| 1022 | static void |
| 1023 | lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) |
| 1024 | { |
| 1025 | if (ctl == NULL) |
| 1026 | { |
| 1027 | sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type); |
| 1028 | lmc_set_protocol (sc, NULL); |
| 1029 | |
| 1030 | return; |
| 1031 | } |
| 1032 | /* |
| 1033 | * check for change in circuit type */ |
| 1034 | if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1 |
| 1035 | && sc->ictl.circuit_type == |
| 1036 | LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc, |
| 1037 | LMC_CTL_CIRCUIT_TYPE_E1); |
| 1038 | else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1 |
| 1039 | && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1) |
| 1040 | sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1); |
| 1041 | lmc_set_protocol (sc, ctl); |
| 1042 | } |
| 1043 | /* |
| 1044 | * return hardware link status. |
| 1045 | * 0 == link is down, 1 == link is up. |
| 1046 | */ static int |
| 1047 | lmc_t1_get_link_status (lmc_softc_t * const sc) |
| 1048 | { |
| 1049 | u_int16_t link_status; |
| 1050 | int ret = 1; |
| 1051 | |
| 1052 | /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions |
| 1053 | * led0 yellow = far-end adapter is in Red alarm condition |
| 1054 | * led1 blue = received an Alarm Indication signal |
| 1055 | * (upstream failure) |
| 1056 | * led2 Green = power to adapter, Gate Array loaded & driver |
| 1057 | * attached |
| 1058 | * led3 red = Loss of Signal (LOS) or out of frame (OOF) |
| 1059 | * conditions detected on T3 receive signal |
| 1060 | */ |
| 1061 | lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in"); |
| 1062 | lmc_led_on(sc, LMC_DS3_LED2); |
| 1063 | |
| 1064 | lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS); |
| 1065 | link_status = lmc_mii_readreg (sc, 0, 18); |
| 1066 | |
| 1067 | |
| 1068 | if (link_status & T1F_RAIS) { /* turn on blue LED */ |
| 1069 | ret = 0; |
| 1070 | if(sc->last_led_err[1] != 1){ |
| 1071 | printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name); |
| 1072 | } |
| 1073 | lmc_led_on(sc, LMC_DS3_LED1); |
| 1074 | sc->last_led_err[1] = 1; |
| 1075 | } |
| 1076 | else { |
| 1077 | if(sc->last_led_err[1] != 0){ |
| 1078 | printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name); |
| 1079 | } |
| 1080 | lmc_led_off (sc, LMC_DS3_LED1); |
| 1081 | sc->last_led_err[1] = 0; |
| 1082 | } |
| 1083 | |
| 1084 | /* |
| 1085 | * Yellow Alarm is nasty evil stuff, looks at data patterns |
| 1086 | * inside the channel and confuses it with HDLC framing |
| 1087 | * ignore all yellow alarms. |
| 1088 | * |
| 1089 | * Do listen to MultiFrame Yellow alarm which while implemented |
| 1090 | * different ways isn't in the channel and hence somewhat |
| 1091 | * more reliable |
| 1092 | */ |
| 1093 | |
| 1094 | if (link_status & T1F_RMYEL) { |
| 1095 | ret = 0; |
| 1096 | if(sc->last_led_err[0] != 1){ |
| 1097 | printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name); |
| 1098 | } |
| 1099 | lmc_led_on(sc, LMC_DS3_LED0); |
| 1100 | sc->last_led_err[0] = 1; |
| 1101 | } |
| 1102 | else { |
| 1103 | if(sc->last_led_err[0] != 0){ |
| 1104 | printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name); |
| 1105 | } |
| 1106 | lmc_led_off(sc, LMC_DS3_LED0); |
| 1107 | sc->last_led_err[0] = 0; |
| 1108 | } |
| 1109 | |
| 1110 | /* |
| 1111 | * Loss of signal and los of frame |
| 1112 | * Use the green bit to identify which one lit the led |
| 1113 | */ |
| 1114 | if(link_status & T1F_RLOF){ |
| 1115 | ret = 0; |
| 1116 | if(sc->last_led_err[3] != 1){ |
| 1117 | printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name); |
| 1118 | } |
| 1119 | lmc_led_on(sc, LMC_DS3_LED3); |
| 1120 | sc->last_led_err[3] = 1; |
| 1121 | |
| 1122 | } |
| 1123 | else { |
| 1124 | if(sc->last_led_err[3] != 0){ |
| 1125 | printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name); |
| 1126 | } |
| 1127 | if( ! (link_status & T1F_RLOS)) |
| 1128 | lmc_led_off(sc, LMC_DS3_LED3); |
| 1129 | sc->last_led_err[3] = 0; |
| 1130 | } |
| 1131 | |
| 1132 | if(link_status & T1F_RLOS){ |
| 1133 | ret = 0; |
| 1134 | if(sc->last_led_err[2] != 1){ |
| 1135 | printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name); |
| 1136 | } |
| 1137 | lmc_led_on(sc, LMC_DS3_LED3); |
| 1138 | sc->last_led_err[2] = 1; |
| 1139 | |
| 1140 | } |
| 1141 | else { |
| 1142 | if(sc->last_led_err[2] != 0){ |
| 1143 | printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name); |
| 1144 | } |
| 1145 | if( ! (link_status & T1F_RLOF)) |
| 1146 | lmc_led_off(sc, LMC_DS3_LED3); |
| 1147 | sc->last_led_err[2] = 0; |
| 1148 | } |
| 1149 | |
| 1150 | sc->lmc_xinfo.t1_alarm1_status = link_status; |
| 1151 | |
| 1152 | lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS); |
| 1153 | sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18); |
| 1154 | |
| 1155 | |
| 1156 | lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out"); |
| 1157 | |
| 1158 | return ret; |
| 1159 | } |
| 1160 | |
| 1161 | /* |
| 1162 | * 1 == T1 Circuit Type , 0 == E1 Circuit Type |
| 1163 | */ |
| 1164 | static void |
| 1165 | lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie) |
| 1166 | { |
| 1167 | if (ie == LMC_CTL_CIRCUIT_TYPE_T1) { |
| 1168 | sc->lmc_miireg16 |= LMC_MII16_T1_Z; |
| 1169 | sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1; |
| 1170 | printk(KERN_INFO "%s: In T1 Mode\n", sc->name); |
| 1171 | } |
| 1172 | else { |
| 1173 | sc->lmc_miireg16 &= ~LMC_MII16_T1_Z; |
| 1174 | sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1; |
| 1175 | printk(KERN_INFO "%s: In E1 Mode\n", sc->name); |
| 1176 | } |
| 1177 | |
| 1178 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 1179 | |
| 1180 | } |
| 1181 | |
| 1182 | /* |
| 1183 | * 0 == 16bit, 1 == 32bit */ |
| 1184 | static void |
| 1185 | lmc_t1_set_crc_length (lmc_softc_t * const sc, int state) |
| 1186 | { |
| 1187 | if (state == LMC_CTL_CRC_LENGTH_32) |
| 1188 | { |
| 1189 | /* 32 bit */ |
| 1190 | sc->lmc_miireg16 |= LMC_MII16_T1_CRC; |
| 1191 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; |
| 1192 | sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4; |
| 1193 | |
| 1194 | } |
| 1195 | else |
| 1196 | { |
| 1197 | /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC; |
| 1198 | sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; |
| 1199 | sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2; |
| 1200 | |
| 1201 | } |
| 1202 | |
| 1203 | lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); |
| 1204 | } |
| 1205 | |
| 1206 | /* |
| 1207 | * 1 == internal, 0 == external |
| 1208 | */ |
| 1209 | static void |
| 1210 | lmc_t1_set_clock (lmc_softc_t * const sc, int ie) |
| 1211 | { |
| 1212 | int old; |
| 1213 | old = ie; |
| 1214 | if (ie == LMC_CTL_CLOCK_SOURCE_EXT) |
| 1215 | { |
| 1216 | sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK); |
| 1217 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 1218 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; |
| 1219 | if(old != ie) |
| 1220 | printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); |
| 1221 | } |
| 1222 | else |
| 1223 | { |
| 1224 | sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK; |
| 1225 | LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); |
| 1226 | sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; |
| 1227 | if(old != ie) |
| 1228 | printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); |
| 1229 | } |
| 1230 | } |
| 1231 | |
| 1232 | static void |
| 1233 | lmc_t1_watchdog (lmc_softc_t * const sc) |
| 1234 | { |
| 1235 | } |
| 1236 | |
| 1237 | static void |
| 1238 | lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl) |
| 1239 | { |
| 1240 | if (ctl == 0) |
| 1241 | { |
| 1242 | sc->ictl.keepalive_onoff = LMC_CTL_ON; |
| 1243 | |
| 1244 | return; |
| 1245 | } |
| 1246 | } |