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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07006 Portions Copyright 2002 by Mylex (An IBM Business Unit)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
20#define DAC960_DriverVersion "2.5.47"
21#define DAC960_DriverDate "14 November 2002"
22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/mm.h>
37#include <linux/slab.h>
38#include <linux/proc_fs.h>
39#include <linux/reboot.h>
40#include <linux/spinlock.h>
41#include <linux/timer.h>
42#include <linux/pci.h>
43#include <linux/init.h>
Matt Mackall62287fb2006-03-07 21:55:47 -080044#include <linux/random.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <asm/io.h>
46#include <asm/uaccess.h>
47#include "DAC960.h"
48
49#define DAC960_GAM_MINOR 252
50
51
52static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
53static int DAC960_ControllerCount;
54static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
55
56static long disk_size(DAC960_Controller_T *p, int drive_nr)
57{
58 if (p->FirmwareType == DAC960_V1_Controller) {
59 if (drive_nr >= p->LogicalDriveCount)
60 return 0;
61 return p->V1.LogicalDriveInformation[drive_nr].
62 LogicalDriveSize;
63 } else {
64 DAC960_V2_LogicalDeviceInfo_T *i =
65 p->V2.LogicalDeviceInformation[drive_nr];
66 if (i == NULL)
67 return 0;
68 return i->ConfigurableDeviceSize;
69 }
70}
71
72static int DAC960_open(struct inode *inode, struct file *file)
73{
74 struct gendisk *disk = inode->i_bdev->bd_disk;
75 DAC960_Controller_T *p = disk->queue->queuedata;
76 int drive_nr = (long)disk->private_data;
77
78 if (p->FirmwareType == DAC960_V1_Controller) {
79 if (p->V1.LogicalDriveInformation[drive_nr].
80 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
81 return -ENXIO;
82 } else {
83 DAC960_V2_LogicalDeviceInfo_T *i =
84 p->V2.LogicalDeviceInformation[drive_nr];
85 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
86 return -ENXIO;
87 }
88
89 check_disk_change(inode->i_bdev);
90
91 if (!get_capacity(p->disks[drive_nr]))
92 return -ENXIO;
93 return 0;
94}
95
Christoph Hellwiga885c8c2006-01-08 01:02:50 -080096static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
Linus Torvalds1da177e2005-04-16 15:20:36 -070097{
Christoph Hellwiga885c8c2006-01-08 01:02:50 -080098 struct gendisk *disk = bdev->bd_disk;
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 DAC960_Controller_T *p = disk->queue->queuedata;
100 int drive_nr = (long)disk->private_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
102 if (p->FirmwareType == DAC960_V1_Controller) {
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800103 geo->heads = p->V1.GeometryTranslationHeads;
104 geo->sectors = p->V1.GeometryTranslationSectors;
105 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
106 LogicalDriveSize / (geo->heads * geo->sectors);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 } else {
108 DAC960_V2_LogicalDeviceInfo_T *i =
109 p->V2.LogicalDeviceInformation[drive_nr];
110 switch (i->DriveGeometry) {
111 case DAC960_V2_Geometry_128_32:
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800112 geo->heads = 128;
113 geo->sectors = 32;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 break;
115 case DAC960_V2_Geometry_255_63:
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800116 geo->heads = 255;
117 geo->sectors = 63;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 break;
119 default:
120 DAC960_Error("Illegal Logical Device Geometry %d\n",
121 p, i->DriveGeometry);
122 return -EINVAL;
123 }
124
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800125 geo->cylinders = i->ConfigurableDeviceSize /
126 (geo->heads * geo->sectors);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 }
128
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800129 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130}
131
132static int DAC960_media_changed(struct gendisk *disk)
133{
134 DAC960_Controller_T *p = disk->queue->queuedata;
135 int drive_nr = (long)disk->private_data;
136
137 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
138 return 1;
139 return 0;
140}
141
142static int DAC960_revalidate_disk(struct gendisk *disk)
143{
144 DAC960_Controller_T *p = disk->queue->queuedata;
145 int unit = (long)disk->private_data;
146
147 set_capacity(disk, disk_size(p, unit));
148 return 0;
149}
150
151static struct block_device_operations DAC960_BlockDeviceOperations = {
152 .owner = THIS_MODULE,
153 .open = DAC960_open,
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800154 .getgeo = DAC960_getgeo,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 .media_changed = DAC960_media_changed,
156 .revalidate_disk = DAC960_revalidate_disk,
157};
158
159
160/*
161 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
162 Copyright Notice, and Electronic Mail Address.
163*/
164
165static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
166{
167 DAC960_Announce("***** DAC960 RAID Driver Version "
168 DAC960_DriverVersion " of "
169 DAC960_DriverDate " *****\n", Controller);
170 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
171 "<lnz@dandelion.com>\n", Controller);
172}
173
174
175/*
176 DAC960_Failure prints a standardized error message, and then returns false.
177*/
178
179static boolean DAC960_Failure(DAC960_Controller_T *Controller,
180 unsigned char *ErrorMessage)
181{
182 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
183 Controller);
184 if (Controller->IO_Address == 0)
185 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
186 "PCI Address 0x%X\n", Controller,
187 Controller->Bus, Controller->Device,
188 Controller->Function, Controller->PCI_Address);
189 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
190 "0x%X PCI Address 0x%X\n", Controller,
191 Controller->Bus, Controller->Device,
192 Controller->Function, Controller->IO_Address,
193 Controller->PCI_Address);
194 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
195 return false;
196}
197
198/*
199 init_dma_loaf() and slice_dma_loaf() are helper functions for
200 aggregating the dma-mapped memory for a well-known collection of
201 data structures that are of different lengths.
202
203 These routines don't guarantee any alignment. The caller must
204 include any space needed for alignment in the sizes of the structures
205 that are passed in.
206 */
207
208static boolean init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
209 size_t len)
210{
211 void *cpu_addr;
212 dma_addr_t dma_handle;
213
214 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
215 if (cpu_addr == NULL)
216 return false;
217
218 loaf->cpu_free = loaf->cpu_base = cpu_addr;
219 loaf->dma_free =loaf->dma_base = dma_handle;
220 loaf->length = len;
221 memset(cpu_addr, 0, len);
222 return true;
223}
224
225static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
226 dma_addr_t *dma_handle)
227{
228 void *cpu_end = loaf->cpu_free + len;
229 void *cpu_addr = loaf->cpu_free;
230
Eric Sesterhenn089fe1b2006-03-24 18:50:27 +0100231 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232 *dma_handle = loaf->dma_free;
233 loaf->cpu_free = cpu_end;
234 loaf->dma_free += len;
235 return cpu_addr;
236}
237
238static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
239{
240 if (loaf_handle->cpu_base != NULL)
241 pci_free_consistent(dev, loaf_handle->length,
242 loaf_handle->cpu_base, loaf_handle->dma_base);
243}
244
245
246/*
247 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
248 data structures for Controller. It returns true on success and false on
249 failure.
250*/
251
252static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
253{
254 int CommandAllocationLength, CommandAllocationGroupSize;
255 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
256 void *AllocationPointer = NULL;
257 void *ScatterGatherCPU = NULL;
258 dma_addr_t ScatterGatherDMA;
259 struct pci_pool *ScatterGatherPool;
260 void *RequestSenseCPU = NULL;
261 dma_addr_t RequestSenseDMA;
262 struct pci_pool *RequestSensePool = NULL;
263
264 if (Controller->FirmwareType == DAC960_V1_Controller)
265 {
266 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
267 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
268 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
269 Controller->PCIDevice,
270 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
271 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
272 if (ScatterGatherPool == NULL)
273 return DAC960_Failure(Controller,
274 "AUXILIARY STRUCTURE CREATION (SG)");
275 Controller->ScatterGatherPool = ScatterGatherPool;
276 }
277 else
278 {
279 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
280 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
281 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
282 Controller->PCIDevice,
283 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
284 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
285 if (ScatterGatherPool == NULL)
286 return DAC960_Failure(Controller,
287 "AUXILIARY STRUCTURE CREATION (SG)");
288 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
289 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
290 sizeof(int), 0);
291 if (RequestSensePool == NULL) {
292 pci_pool_destroy(ScatterGatherPool);
293 return DAC960_Failure(Controller,
294 "AUXILIARY STRUCTURE CREATION (SG)");
295 }
296 Controller->ScatterGatherPool = ScatterGatherPool;
297 Controller->V2.RequestSensePool = RequestSensePool;
298 }
299 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
300 Controller->FreeCommands = NULL;
301 for (CommandIdentifier = 1;
302 CommandIdentifier <= Controller->DriverQueueDepth;
303 CommandIdentifier++)
304 {
305 DAC960_Command_T *Command;
306 if (--CommandsRemaining <= 0)
307 {
308 CommandsRemaining =
309 Controller->DriverQueueDepth - CommandIdentifier + 1;
310 if (CommandsRemaining > CommandAllocationGroupSize)
311 CommandsRemaining = CommandAllocationGroupSize;
312 CommandGroupByteCount =
313 CommandsRemaining * CommandAllocationLength;
Eric Sesterhenn06ff37f2006-03-08 11:21:52 +0100314 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315 if (AllocationPointer == NULL)
316 return DAC960_Failure(Controller,
317 "AUXILIARY STRUCTURE CREATION");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 }
319 Command = (DAC960_Command_T *) AllocationPointer;
320 AllocationPointer += CommandAllocationLength;
321 Command->CommandIdentifier = CommandIdentifier;
322 Command->Controller = Controller;
323 Command->Next = Controller->FreeCommands;
324 Controller->FreeCommands = Command;
325 Controller->Commands[CommandIdentifier-1] = Command;
326 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, SLAB_ATOMIC,
327 &ScatterGatherDMA);
328 if (ScatterGatherCPU == NULL)
329 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
330
331 if (RequestSensePool != NULL) {
332 RequestSenseCPU = pci_pool_alloc(RequestSensePool, SLAB_ATOMIC,
333 &RequestSenseDMA);
334 if (RequestSenseCPU == NULL) {
335 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
336 ScatterGatherDMA);
337 return DAC960_Failure(Controller,
338 "AUXILIARY STRUCTURE CREATION");
339 }
340 }
341 if (Controller->FirmwareType == DAC960_V1_Controller) {
342 Command->cmd_sglist = Command->V1.ScatterList;
343 Command->V1.ScatterGatherList =
344 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
345 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
346 } else {
347 Command->cmd_sglist = Command->V2.ScatterList;
348 Command->V2.ScatterGatherList =
349 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
350 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
351 Command->V2.RequestSense =
352 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
353 Command->V2.RequestSenseDMA = RequestSenseDMA;
354 }
355 }
356 return true;
357}
358
359
360/*
361 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
362 structures for Controller.
363*/
364
365static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
366{
367 int i;
368 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
369 struct pci_pool *RequestSensePool = NULL;
370 void *ScatterGatherCPU;
371 dma_addr_t ScatterGatherDMA;
372 void *RequestSenseCPU;
373 dma_addr_t RequestSenseDMA;
374 DAC960_Command_T *CommandGroup = NULL;
375
376
377 if (Controller->FirmwareType == DAC960_V2_Controller)
378 RequestSensePool = Controller->V2.RequestSensePool;
379
380 Controller->FreeCommands = NULL;
381 for (i = 0; i < Controller->DriverQueueDepth; i++)
382 {
383 DAC960_Command_T *Command = Controller->Commands[i];
384
385 if (Command == NULL)
386 continue;
387
388 if (Controller->FirmwareType == DAC960_V1_Controller) {
389 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
390 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
391 RequestSenseCPU = NULL;
392 RequestSenseDMA = (dma_addr_t)0;
393 } else {
394 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
395 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
396 RequestSenseCPU = (void *)Command->V2.RequestSense;
397 RequestSenseDMA = Command->V2.RequestSenseDMA;
398 }
399 if (ScatterGatherCPU != NULL)
400 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
401 if (RequestSenseCPU != NULL)
402 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
403
404 if ((Command->CommandIdentifier
405 % Controller->CommandAllocationGroupSize) == 1) {
406 /*
407 * We can't free the group of commands until all of the
408 * request sense and scatter gather dma structures are free.
409 * Remember the beginning of the group, but don't free it
410 * until we've reached the beginning of the next group.
411 */
Jesper Juhl6044ec82005-11-07 01:01:32 -0800412 kfree(CommandGroup);
413 CommandGroup = Command;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 }
415 Controller->Commands[i] = NULL;
416 }
Jesper Juhl6044ec82005-11-07 01:01:32 -0800417 kfree(CommandGroup);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418
419 if (Controller->CombinedStatusBuffer != NULL)
420 {
421 kfree(Controller->CombinedStatusBuffer);
422 Controller->CombinedStatusBuffer = NULL;
423 Controller->CurrentStatusBuffer = NULL;
424 }
425
426 if (ScatterGatherPool != NULL)
427 pci_pool_destroy(ScatterGatherPool);
Jesper Juhl6044ec82005-11-07 01:01:32 -0800428 if (Controller->FirmwareType == DAC960_V1_Controller)
429 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430
431 if (RequestSensePool != NULL)
432 pci_pool_destroy(RequestSensePool);
433
Jesper Juhl6044ec82005-11-07 01:01:32 -0800434 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 kfree(Controller->V2.LogicalDeviceInformation[i]);
436 Controller->V2.LogicalDeviceInformation[i] = NULL;
Jesper Juhl6044ec82005-11-07 01:01:32 -0800437 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438
439 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
440 {
Jesper Juhl6044ec82005-11-07 01:01:32 -0800441 kfree(Controller->V2.PhysicalDeviceInformation[i]);
442 Controller->V2.PhysicalDeviceInformation[i] = NULL;
443 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
444 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 }
446}
447
448
449/*
450 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
451 Firmware Controllers.
452*/
453
454static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
455{
456 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
457 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
458 Command->V1.CommandStatus = 0;
459}
460
461
462/*
463 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
464 Firmware Controllers.
465*/
466
467static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
468{
469 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
470 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
471 Command->V2.CommandStatus = 0;
472}
473
474
475/*
476 DAC960_AllocateCommand allocates a Command structure from Controller's
477 free list. During driver initialization, a special initialization command
478 has been placed on the free list to guarantee that command allocation can
479 never fail.
480*/
481
482static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
483 *Controller)
484{
485 DAC960_Command_T *Command = Controller->FreeCommands;
486 if (Command == NULL) return NULL;
487 Controller->FreeCommands = Command->Next;
488 Command->Next = NULL;
489 return Command;
490}
491
492
493/*
494 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
495 free list.
496*/
497
498static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
499{
500 DAC960_Controller_T *Controller = Command->Controller;
501
502 Command->Request = NULL;
503 Command->Next = Controller->FreeCommands;
504 Controller->FreeCommands = Command;
505}
506
507
508/*
509 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
510*/
511
512static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
513{
514 spin_unlock_irq(&Controller->queue_lock);
515 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
516 spin_lock_irq(&Controller->queue_lock);
517}
518
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -0700519/*
520 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
521*/
522
523static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
524{
525 DAC960_Controller_T *Controller = Command->Controller;
526 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
527 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
528 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
529 Controller->V2.NextCommandMailbox;
530
531 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
532 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
533
534 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
535 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
536 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
537
538 Controller->V2.PreviousCommandMailbox2 =
539 Controller->V2.PreviousCommandMailbox1;
540 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
541
542 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
543 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
544
545 Controller->V2.NextCommandMailbox = NextCommandMailbox;
546}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547
548/*
549 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
550*/
551
552static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
553{
554 DAC960_Controller_T *Controller = Command->Controller;
555 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
556 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
557 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
558 Controller->V2.NextCommandMailbox;
559 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
560 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
561 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
562 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
563 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
564 Controller->V2.PreviousCommandMailbox2 =
565 Controller->V2.PreviousCommandMailbox1;
566 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
567 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
568 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
569 Controller->V2.NextCommandMailbox = NextCommandMailbox;
570}
571
572
573/*
574 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
575*/
576
577static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
578{
579 DAC960_Controller_T *Controller = Command->Controller;
580 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
581 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
582 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
583 Controller->V2.NextCommandMailbox;
584 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
585 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
586 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
587 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
588 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
589 Controller->V2.PreviousCommandMailbox2 =
590 Controller->V2.PreviousCommandMailbox1;
591 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
592 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
593 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
594 Controller->V2.NextCommandMailbox = NextCommandMailbox;
595}
596
597
598/*
599 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
600 Controllers with Dual Mode Firmware.
601*/
602
603static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
604{
605 DAC960_Controller_T *Controller = Command->Controller;
606 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
607 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
608 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
609 Controller->V1.NextCommandMailbox;
610 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
611 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
612 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
613 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
614 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
615 Controller->V1.PreviousCommandMailbox2 =
616 Controller->V1.PreviousCommandMailbox1;
617 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
618 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
619 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
620 Controller->V1.NextCommandMailbox = NextCommandMailbox;
621}
622
623
624/*
625 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
626 Controllers with Single Mode Firmware.
627*/
628
629static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
630{
631 DAC960_Controller_T *Controller = Command->Controller;
632 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
633 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
634 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
635 Controller->V1.NextCommandMailbox;
636 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
637 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
638 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
639 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
640 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
641 Controller->V1.PreviousCommandMailbox2 =
642 Controller->V1.PreviousCommandMailbox1;
643 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
644 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
645 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
646 Controller->V1.NextCommandMailbox = NextCommandMailbox;
647}
648
649
650/*
651 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
652 Controllers with Dual Mode Firmware.
653*/
654
655static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
656{
657 DAC960_Controller_T *Controller = Command->Controller;
658 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
659 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
660 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
661 Controller->V1.NextCommandMailbox;
662 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
663 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
664 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
665 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
666 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
667 Controller->V1.PreviousCommandMailbox2 =
668 Controller->V1.PreviousCommandMailbox1;
669 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
670 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
671 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
672 Controller->V1.NextCommandMailbox = NextCommandMailbox;
673}
674
675
676/*
677 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
678 Controllers with Single Mode Firmware.
679*/
680
681static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
682{
683 DAC960_Controller_T *Controller = Command->Controller;
684 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
685 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
686 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
687 Controller->V1.NextCommandMailbox;
688 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
689 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
690 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
691 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
692 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
693 Controller->V1.PreviousCommandMailbox2 =
694 Controller->V1.PreviousCommandMailbox1;
695 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
696 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
697 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
698 Controller->V1.NextCommandMailbox = NextCommandMailbox;
699}
700
701
702/*
703 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
704*/
705
706static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
707{
708 DAC960_Controller_T *Controller = Command->Controller;
709 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
710 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
711 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
712 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
713 udelay(1);
714 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
715 DAC960_PD_NewCommand(ControllerBaseAddress);
716}
717
718
719/*
720 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
721*/
722
723static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
724{
725 DAC960_Controller_T *Controller = Command->Controller;
726 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
727 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
728 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
729 switch (CommandMailbox->Common.CommandOpcode)
730 {
731 case DAC960_V1_Enquiry:
732 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
733 break;
734 case DAC960_V1_GetDeviceState:
735 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
736 break;
737 case DAC960_V1_Read:
738 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
739 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
740 break;
741 case DAC960_V1_Write:
742 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
743 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
744 break;
745 case DAC960_V1_ReadWithScatterGather:
746 CommandMailbox->Common.CommandOpcode =
747 DAC960_V1_ReadWithScatterGather_Old;
748 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
749 break;
750 case DAC960_V1_WriteWithScatterGather:
751 CommandMailbox->Common.CommandOpcode =
752 DAC960_V1_WriteWithScatterGather_Old;
753 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
754 break;
755 default:
756 break;
757 }
758 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
759 udelay(1);
760 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
761 DAC960_PD_NewCommand(ControllerBaseAddress);
762}
763
764
765/*
766 DAC960_ExecuteCommand executes Command and waits for completion.
767*/
768
769static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
770{
771 DAC960_Controller_T *Controller = Command->Controller;
772 DECLARE_COMPLETION(Completion);
773 unsigned long flags;
774 Command->Completion = &Completion;
775
776 spin_lock_irqsave(&Controller->queue_lock, flags);
777 DAC960_QueueCommand(Command);
778 spin_unlock_irqrestore(&Controller->queue_lock, flags);
779
780 if (in_interrupt())
781 return;
782 wait_for_completion(&Completion);
783}
784
785
786/*
787 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
788 Command and waits for completion. It returns true on success and false
789 on failure.
790*/
791
792static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
793 DAC960_V1_CommandOpcode_T CommandOpcode,
794 dma_addr_t DataDMA)
795{
796 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
797 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
798 DAC960_V1_CommandStatus_T CommandStatus;
799 DAC960_V1_ClearCommand(Command);
800 Command->CommandType = DAC960_ImmediateCommand;
801 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
802 CommandMailbox->Type3.BusAddress = DataDMA;
803 DAC960_ExecuteCommand(Command);
804 CommandStatus = Command->V1.CommandStatus;
805 DAC960_DeallocateCommand(Command);
806 return (CommandStatus == DAC960_V1_NormalCompletion);
807}
808
809
810/*
811 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
812 Command and waits for completion. It returns true on success and false
813 on failure.
814*/
815
816static boolean DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
817 DAC960_V1_CommandOpcode_T CommandOpcode,
818 unsigned char CommandOpcode2,
819 dma_addr_t DataDMA)
820{
821 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
822 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
823 DAC960_V1_CommandStatus_T CommandStatus;
824 DAC960_V1_ClearCommand(Command);
825 Command->CommandType = DAC960_ImmediateCommand;
826 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
827 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
828 CommandMailbox->Type3B.BusAddress = DataDMA;
829 DAC960_ExecuteCommand(Command);
830 CommandStatus = Command->V1.CommandStatus;
831 DAC960_DeallocateCommand(Command);
832 return (CommandStatus == DAC960_V1_NormalCompletion);
833}
834
835
836/*
837 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
838 Command and waits for completion. It returns true on success and false
839 on failure.
840*/
841
842static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
843 DAC960_V1_CommandOpcode_T CommandOpcode,
844 unsigned char Channel,
845 unsigned char TargetID,
846 dma_addr_t DataDMA)
847{
848 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
849 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
850 DAC960_V1_CommandStatus_T CommandStatus;
851 DAC960_V1_ClearCommand(Command);
852 Command->CommandType = DAC960_ImmediateCommand;
853 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
854 CommandMailbox->Type3D.Channel = Channel;
855 CommandMailbox->Type3D.TargetID = TargetID;
856 CommandMailbox->Type3D.BusAddress = DataDMA;
857 DAC960_ExecuteCommand(Command);
858 CommandStatus = Command->V1.CommandStatus;
859 DAC960_DeallocateCommand(Command);
860 return (CommandStatus == DAC960_V1_NormalCompletion);
861}
862
863
864/*
865 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
866 Reading IOCTL Command and waits for completion. It returns true on success
867 and false on failure.
868
869 Return data in The controller's HealthStatusBuffer, which is dma-able memory
870*/
871
872static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
873{
874 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
875 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
876 DAC960_V2_CommandStatus_T CommandStatus;
877 DAC960_V2_ClearCommand(Command);
878 Command->CommandType = DAC960_ImmediateCommand;
879 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
880 CommandMailbox->Common.CommandControlBits
881 .DataTransferControllerToHost = true;
882 CommandMailbox->Common.CommandControlBits
883 .NoAutoRequestSense = true;
884 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
885 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
886 CommandMailbox->Common.DataTransferMemoryAddress
887 .ScatterGatherSegments[0]
888 .SegmentDataPointer =
889 Controller->V2.HealthStatusBufferDMA;
890 CommandMailbox->Common.DataTransferMemoryAddress
891 .ScatterGatherSegments[0]
892 .SegmentByteCount =
893 CommandMailbox->Common.DataTransferSize;
894 DAC960_ExecuteCommand(Command);
895 CommandStatus = Command->V2.CommandStatus;
896 DAC960_DeallocateCommand(Command);
897 return (CommandStatus == DAC960_V2_NormalCompletion);
898}
899
900
901/*
902 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
903 Information Reading IOCTL Command and waits for completion. It returns
904 true on success and false on failure.
905
906 Data is returned in the controller's V2.NewControllerInformation dma-able
907 memory buffer.
908*/
909
910static boolean DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
911{
912 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
913 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
914 DAC960_V2_CommandStatus_T CommandStatus;
915 DAC960_V2_ClearCommand(Command);
916 Command->CommandType = DAC960_ImmediateCommand;
917 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
918 CommandMailbox->ControllerInfo.CommandControlBits
919 .DataTransferControllerToHost = true;
920 CommandMailbox->ControllerInfo.CommandControlBits
921 .NoAutoRequestSense = true;
922 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
923 CommandMailbox->ControllerInfo.ControllerNumber = 0;
924 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
925 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
926 .ScatterGatherSegments[0]
927 .SegmentDataPointer =
928 Controller->V2.NewControllerInformationDMA;
929 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
930 .ScatterGatherSegments[0]
931 .SegmentByteCount =
932 CommandMailbox->ControllerInfo.DataTransferSize;
933 DAC960_ExecuteCommand(Command);
934 CommandStatus = Command->V2.CommandStatus;
935 DAC960_DeallocateCommand(Command);
936 return (CommandStatus == DAC960_V2_NormalCompletion);
937}
938
939
940/*
941 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
942 Device Information Reading IOCTL Command and waits for completion. It
943 returns true on success and false on failure.
944
945 Data is returned in the controller's V2.NewLogicalDeviceInformation
946*/
947
948static boolean DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
949 unsigned short LogicalDeviceNumber)
950{
951 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
952 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
953 DAC960_V2_CommandStatus_T CommandStatus;
954
955 DAC960_V2_ClearCommand(Command);
956 Command->CommandType = DAC960_ImmediateCommand;
957 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
958 DAC960_V2_IOCTL;
959 CommandMailbox->LogicalDeviceInfo.CommandControlBits
960 .DataTransferControllerToHost = true;
961 CommandMailbox->LogicalDeviceInfo.CommandControlBits
962 .NoAutoRequestSense = true;
963 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
964 sizeof(DAC960_V2_LogicalDeviceInfo_T);
965 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
966 LogicalDeviceNumber;
967 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
968 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
969 .ScatterGatherSegments[0]
970 .SegmentDataPointer =
971 Controller->V2.NewLogicalDeviceInformationDMA;
972 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
973 .ScatterGatherSegments[0]
974 .SegmentByteCount =
975 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
976 DAC960_ExecuteCommand(Command);
977 CommandStatus = Command->V2.CommandStatus;
978 DAC960_DeallocateCommand(Command);
979 return (CommandStatus == DAC960_V2_NormalCompletion);
980}
981
982
983/*
984 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
985 Physical Device Information" IOCTL Command and waits for completion. It
986 returns true on success and false on failure.
987
988 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
989 this function is called for a given controller. This will return data
990 for the "first" device on that controller. The returned data includes a
991 Channel, TargetID, LogicalUnit that can be passed in to this routine to
992 get data for the NEXT device on that controller.
993
994 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
995 memory buffer.
996
997*/
998
999static boolean DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1000 unsigned char Channel,
1001 unsigned char TargetID,
1002 unsigned char LogicalUnit)
1003{
1004 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1005 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1006 DAC960_V2_CommandStatus_T CommandStatus;
1007
1008 DAC960_V2_ClearCommand(Command);
1009 Command->CommandType = DAC960_ImmediateCommand;
1010 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1011 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1012 .DataTransferControllerToHost = true;
1013 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1014 .NoAutoRequestSense = true;
1015 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1016 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1017 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1018 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1019 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1020 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1021 DAC960_V2_GetPhysicalDeviceInfoValid;
1022 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1023 .ScatterGatherSegments[0]
1024 .SegmentDataPointer =
1025 Controller->V2.NewPhysicalDeviceInformationDMA;
1026 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1027 .ScatterGatherSegments[0]
1028 .SegmentByteCount =
1029 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1030 DAC960_ExecuteCommand(Command);
1031 CommandStatus = Command->V2.CommandStatus;
1032 DAC960_DeallocateCommand(Command);
1033 return (CommandStatus == DAC960_V2_NormalCompletion);
1034}
1035
1036
1037static void DAC960_V2_ConstructNewUnitSerialNumber(
1038 DAC960_Controller_T *Controller,
1039 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1040 int LogicalUnit)
1041{
1042 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1043 CommandMailbox->SCSI_10.CommandControlBits
1044 .DataTransferControllerToHost = true;
1045 CommandMailbox->SCSI_10.CommandControlBits
1046 .NoAutoRequestSense = true;
1047 CommandMailbox->SCSI_10.DataTransferSize =
1048 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1049 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1050 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1051 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1052 CommandMailbox->SCSI_10.CDBLength = 6;
1053 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1054 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1055 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1056 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1057 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1058 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1059 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1060 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1061 .ScatterGatherSegments[0]
1062 .SegmentDataPointer =
1063 Controller->V2.NewInquiryUnitSerialNumberDMA;
1064 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1065 .ScatterGatherSegments[0]
1066 .SegmentByteCount =
1067 CommandMailbox->SCSI_10.DataTransferSize;
1068}
1069
1070
1071/*
1072 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1073 Inquiry command to a SCSI device identified by Channel number,
1074 Target id, Logical Unit Number. This function Waits for completion
1075 of the command.
1076
1077 The return data includes Unit Serial Number information for the
1078 specified device.
1079
1080 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1081 memory buffer.
1082*/
1083
1084static boolean DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1085 int Channel, int TargetID, int LogicalUnit)
1086{
1087 DAC960_Command_T *Command;
1088 DAC960_V2_CommandMailbox_T *CommandMailbox;
1089 DAC960_V2_CommandStatus_T CommandStatus;
1090
1091 Command = DAC960_AllocateCommand(Controller);
1092 CommandMailbox = &Command->V2.CommandMailbox;
1093 DAC960_V2_ClearCommand(Command);
1094 Command->CommandType = DAC960_ImmediateCommand;
1095
1096 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1097 Channel, TargetID, LogicalUnit);
1098
1099 DAC960_ExecuteCommand(Command);
1100 CommandStatus = Command->V2.CommandStatus;
1101 DAC960_DeallocateCommand(Command);
1102 return (CommandStatus == DAC960_V2_NormalCompletion);
1103}
1104
1105
1106/*
1107 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1108 Operation IOCTL Command and waits for completion. It returns true on
1109 success and false on failure.
1110*/
1111
1112static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1113 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1114 DAC960_V2_OperationDevice_T
1115 OperationDevice)
1116{
1117 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1118 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1119 DAC960_V2_CommandStatus_T CommandStatus;
1120 DAC960_V2_ClearCommand(Command);
1121 Command->CommandType = DAC960_ImmediateCommand;
1122 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1123 CommandMailbox->DeviceOperation.CommandControlBits
1124 .DataTransferControllerToHost = true;
1125 CommandMailbox->DeviceOperation.CommandControlBits
1126 .NoAutoRequestSense = true;
1127 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1128 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1129 DAC960_ExecuteCommand(Command);
1130 CommandStatus = Command->V2.CommandStatus;
1131 DAC960_DeallocateCommand(Command);
1132 return (CommandStatus == DAC960_V2_NormalCompletion);
1133}
1134
1135
1136/*
1137 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1138 for DAC960 V1 Firmware Controllers.
1139
1140 PD and P controller types have no memory mailbox, but still need the
1141 other dma mapped memory.
1142*/
1143
1144static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1145 *Controller)
1146{
1147 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1148 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1149 struct pci_dev *PCI_Device = Controller->PCIDevice;
1150 struct dma_loaf *DmaPages = &Controller->DmaPages;
1151 size_t DmaPagesSize;
1152 size_t CommandMailboxesSize;
1153 size_t StatusMailboxesSize;
1154
1155 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1156 dma_addr_t CommandMailboxesMemoryDMA;
1157
1158 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1159 dma_addr_t StatusMailboxesMemoryDMA;
1160
1161 DAC960_V1_CommandMailbox_T CommandMailbox;
1162 DAC960_V1_CommandStatus_T CommandStatus;
1163 int TimeoutCounter;
1164 int i;
1165
1166
1167 if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask))
1168 return DAC960_Failure(Controller, "DMA mask out of range");
1169 Controller->BounceBufferLimit = DAC690_V1_PciDmaMask;
1170
1171 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1172 CommandMailboxesSize = 0;
1173 StatusMailboxesSize = 0;
1174 } else {
1175 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1176 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1177 }
1178 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1179 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1180 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1181 sizeof(DAC960_V1_RebuildProgress_T) +
1182 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1183 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1184 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1185 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1186
1187 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1188 return false;
1189
1190
1191 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1192 goto skip_mailboxes;
1193
1194 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1195 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1196
1197 /* These are the base addresses for the command memory mailbox array */
1198 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1199 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1200
1201 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1202 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1203 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1204 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1205 Controller->V1.PreviousCommandMailbox2 =
1206 Controller->V1.LastCommandMailbox - 1;
1207
1208 /* These are the base addresses for the status memory mailbox array */
1209 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1210 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1211
1212 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1213 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1214 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1215 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1216 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1217
1218skip_mailboxes:
1219 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1220 sizeof(DAC960_V1_DCDB_T),
1221 &Controller->V1.MonitoringDCDB_DMA);
1222
1223 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1224 sizeof(DAC960_V1_Enquiry_T),
1225 &Controller->V1.NewEnquiryDMA);
1226
1227 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1228 sizeof(DAC960_V1_ErrorTable_T),
1229 &Controller->V1.NewErrorTableDMA);
1230
1231 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1232 sizeof(DAC960_V1_EventLogEntry_T),
1233 &Controller->V1.EventLogEntryDMA);
1234
1235 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1236 sizeof(DAC960_V1_RebuildProgress_T),
1237 &Controller->V1.RebuildProgressDMA);
1238
1239 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1240 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1241 &Controller->V1.NewLogicalDriveInformationDMA);
1242
1243 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1244 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1245 &Controller->V1.BackgroundInitializationStatusDMA);
1246
1247 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1248 sizeof(DAC960_V1_DeviceState_T),
1249 &Controller->V1.NewDeviceStateDMA);
1250
1251 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1252 sizeof(DAC960_SCSI_Inquiry_T),
1253 &Controller->V1.NewInquiryStandardDataDMA);
1254
1255 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1256 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1257 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1258
1259 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1260 return true;
1261
1262 /* Enable the Memory Mailbox Interface. */
1263 Controller->V1.DualModeMemoryMailboxInterface = true;
1264 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1265 CommandMailbox.TypeX.CommandIdentifier = 0;
1266 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1267 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1268 Controller->V1.FirstCommandMailboxDMA;
1269 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1270 Controller->V1.FirstStatusMailboxDMA;
1271#define TIMEOUT_COUNT 1000000
1272
1273 for (i = 0; i < 2; i++)
1274 switch (Controller->HardwareType)
1275 {
1276 case DAC960_LA_Controller:
1277 TimeoutCounter = TIMEOUT_COUNT;
1278 while (--TimeoutCounter >= 0)
1279 {
1280 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1281 break;
1282 udelay(10);
1283 }
1284 if (TimeoutCounter < 0) return false;
1285 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1286 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1287 TimeoutCounter = TIMEOUT_COUNT;
1288 while (--TimeoutCounter >= 0)
1289 {
1290 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1291 ControllerBaseAddress))
1292 break;
1293 udelay(10);
1294 }
1295 if (TimeoutCounter < 0) return false;
1296 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1297 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1298 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1299 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1300 Controller->V1.DualModeMemoryMailboxInterface = false;
1301 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1302 break;
1303 case DAC960_PG_Controller:
1304 TimeoutCounter = TIMEOUT_COUNT;
1305 while (--TimeoutCounter >= 0)
1306 {
1307 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1308 break;
1309 udelay(10);
1310 }
1311 if (TimeoutCounter < 0) return false;
1312 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1313 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1314
1315 TimeoutCounter = TIMEOUT_COUNT;
1316 while (--TimeoutCounter >= 0)
1317 {
1318 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1319 ControllerBaseAddress))
1320 break;
1321 udelay(10);
1322 }
1323 if (TimeoutCounter < 0) return false;
1324 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1325 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1326 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1327 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1328 Controller->V1.DualModeMemoryMailboxInterface = false;
1329 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1330 break;
1331 default:
1332 DAC960_Failure(Controller, "Unknown Controller Type\n");
1333 break;
1334 }
1335 return false;
1336}
1337
1338
1339/*
1340 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1341 for DAC960 V2 Firmware Controllers.
1342
1343 Aggregate the space needed for the controller's memory mailbox and
1344 the other data structures that will be targets of dma transfers with
1345 the controller. Allocate a dma-mapped region of memory to hold these
1346 structures. Then, save CPU pointers and dma_addr_t values to reference
1347 the structures that are contained in that region.
1348*/
1349
1350static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1351 *Controller)
1352{
1353 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1354 struct pci_dev *PCI_Device = Controller->PCIDevice;
1355 struct dma_loaf *DmaPages = &Controller->DmaPages;
1356 size_t DmaPagesSize;
1357 size_t CommandMailboxesSize;
1358 size_t StatusMailboxesSize;
1359
1360 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1361 dma_addr_t CommandMailboxesMemoryDMA;
1362
1363 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1364 dma_addr_t StatusMailboxesMemoryDMA;
1365
1366 DAC960_V2_CommandMailbox_T *CommandMailbox;
1367 dma_addr_t CommandMailboxDMA;
1368 DAC960_V2_CommandStatus_T CommandStatus;
1369
1370 if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask))
1371 return DAC960_Failure(Controller, "DMA mask out of range");
1372 Controller->BounceBufferLimit = DAC690_V2_PciDmaMask;
1373
1374 /* This is a temporary dma mapping, used only in the scope of this function */
1375 CommandMailbox =
1376 (DAC960_V2_CommandMailbox_T *)pci_alloc_consistent( PCI_Device,
1377 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1378 if (CommandMailbox == NULL)
1379 return false;
1380
1381 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1382 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1383 DmaPagesSize =
1384 CommandMailboxesSize + StatusMailboxesSize +
1385 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1386 sizeof(DAC960_V2_ControllerInfo_T) +
1387 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1388 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1389 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1390 sizeof(DAC960_V2_Event_T) +
1391 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1392
1393 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1394 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1395 CommandMailbox, CommandMailboxDMA);
1396 return false;
1397 }
1398
1399 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1400 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1401
1402 /* These are the base addresses for the command memory mailbox array */
1403 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1404 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1405
1406 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1407 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1408 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1409 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1410 Controller->V2.PreviousCommandMailbox2 =
1411 Controller->V2.LastCommandMailbox - 1;
1412
1413 /* These are the base addresses for the status memory mailbox array */
1414 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1415 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1416
1417 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1418 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1419 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1420 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1421 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1422
1423 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1424 sizeof(DAC960_V2_HealthStatusBuffer_T),
1425 &Controller->V2.HealthStatusBufferDMA);
1426
1427 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1428 sizeof(DAC960_V2_ControllerInfo_T),
1429 &Controller->V2.NewControllerInformationDMA);
1430
1431 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1432 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1433 &Controller->V2.NewLogicalDeviceInformationDMA);
1434
1435 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1436 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1437 &Controller->V2.NewPhysicalDeviceInformationDMA);
1438
1439 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1440 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1441 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1442
1443 Controller->V2.Event = slice_dma_loaf(DmaPages,
1444 sizeof(DAC960_V2_Event_T),
1445 &Controller->V2.EventDMA);
1446
1447 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1448 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1449 &Controller->V2.PhysicalToLogicalDeviceDMA);
1450
1451 /*
1452 Enable the Memory Mailbox Interface.
1453
1454 I don't know why we can't just use one of the memory mailboxes
1455 we just allocated to do this, instead of using this temporary one.
1456 Try this change later.
1457 */
1458 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1459 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1460 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1461 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1462 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1463 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1464 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1465 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1466 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1467 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1468 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1469 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1470 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1471 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1472 Controller->V2.HealthStatusBufferDMA;
1473 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1474 Controller->V2.FirstCommandMailboxDMA;
1475 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1476 Controller->V2.FirstStatusMailboxDMA;
1477 switch (Controller->HardwareType)
1478 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07001479 case DAC960_GEM_Controller:
1480 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1481 udelay(1);
1482 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1483 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1484 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1485 udelay(1);
1486 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1487 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1488 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1489 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001490 case DAC960_BA_Controller:
1491 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1492 udelay(1);
1493 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1494 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1495 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1496 udelay(1);
1497 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1498 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1499 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1500 break;
1501 case DAC960_LP_Controller:
1502 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1503 udelay(1);
1504 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1505 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1506 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1507 udelay(1);
1508 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1509 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1510 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1511 break;
1512 default:
1513 DAC960_Failure(Controller, "Unknown Controller Type\n");
1514 CommandStatus = DAC960_V2_AbormalCompletion;
1515 break;
1516 }
1517 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1518 CommandMailbox, CommandMailboxDMA);
1519 return (CommandStatus == DAC960_V2_NormalCompletion);
1520}
1521
1522
1523/*
1524 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1525 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1526*/
1527
1528static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1529 *Controller)
1530{
1531 DAC960_V1_Enquiry2_T *Enquiry2;
1532 dma_addr_t Enquiry2DMA;
1533 DAC960_V1_Config2_T *Config2;
1534 dma_addr_t Config2DMA;
1535 int LogicalDriveNumber, Channel, TargetID;
1536 struct dma_loaf local_dma;
1537
1538 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1539 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1540 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1541
1542 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1543 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1544
1545 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1546 Controller->V1.NewEnquiryDMA)) {
1547 free_dma_loaf(Controller->PCIDevice, &local_dma);
1548 return DAC960_Failure(Controller, "ENQUIRY");
1549 }
1550 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1551 sizeof(DAC960_V1_Enquiry_T));
1552
1553 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1554 free_dma_loaf(Controller->PCIDevice, &local_dma);
1555 return DAC960_Failure(Controller, "ENQUIRY2");
1556 }
1557
1558 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1559 free_dma_loaf(Controller->PCIDevice, &local_dma);
1560 return DAC960_Failure(Controller, "READ CONFIG2");
1561 }
1562
1563 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1564 Controller->V1.NewLogicalDriveInformationDMA)) {
1565 free_dma_loaf(Controller->PCIDevice, &local_dma);
1566 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1567 }
1568 memcpy(&Controller->V1.LogicalDriveInformation,
1569 Controller->V1.NewLogicalDriveInformation,
1570 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1571
1572 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1573 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1574 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1575 Channel, TargetID,
1576 Controller->V1.NewDeviceStateDMA)) {
1577 free_dma_loaf(Controller->PCIDevice, &local_dma);
1578 return DAC960_Failure(Controller, "GET DEVICE STATE");
1579 }
1580 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1581 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1582 }
1583 /*
1584 Initialize the Controller Model Name and Full Model Name fields.
1585 */
1586 switch (Enquiry2->HardwareID.SubModel)
1587 {
1588 case DAC960_V1_P_PD_PU:
1589 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1590 strcpy(Controller->ModelName, "DAC960PU");
1591 else strcpy(Controller->ModelName, "DAC960PD");
1592 break;
1593 case DAC960_V1_PL:
1594 strcpy(Controller->ModelName, "DAC960PL");
1595 break;
1596 case DAC960_V1_PG:
1597 strcpy(Controller->ModelName, "DAC960PG");
1598 break;
1599 case DAC960_V1_PJ:
1600 strcpy(Controller->ModelName, "DAC960PJ");
1601 break;
1602 case DAC960_V1_PR:
1603 strcpy(Controller->ModelName, "DAC960PR");
1604 break;
1605 case DAC960_V1_PT:
1606 strcpy(Controller->ModelName, "DAC960PT");
1607 break;
1608 case DAC960_V1_PTL0:
1609 strcpy(Controller->ModelName, "DAC960PTL0");
1610 break;
1611 case DAC960_V1_PRL:
1612 strcpy(Controller->ModelName, "DAC960PRL");
1613 break;
1614 case DAC960_V1_PTL1:
1615 strcpy(Controller->ModelName, "DAC960PTL1");
1616 break;
1617 case DAC960_V1_1164P:
1618 strcpy(Controller->ModelName, "DAC1164P");
1619 break;
1620 default:
1621 free_dma_loaf(Controller->PCIDevice, &local_dma);
1622 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1623 }
1624 strcpy(Controller->FullModelName, "Mylex ");
1625 strcat(Controller->FullModelName, Controller->ModelName);
1626 /*
1627 Initialize the Controller Firmware Version field and verify that it
1628 is a supported firmware version. The supported firmware versions are:
1629
1630 DAC1164P 5.06 and above
1631 DAC960PTL/PRL/PJ/PG 4.06 and above
1632 DAC960PU/PD/PL 3.51 and above
1633 DAC960PU/PD/PL/P 2.73 and above
1634 */
1635#if defined(CONFIG_ALPHA)
1636 /*
1637 DEC Alpha machines were often equipped with DAC960 cards that were
1638 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1639 the last custom FW revision to be released by DEC for these older
1640 controllers, appears to work quite well with this driver.
1641
1642 Cards tested successfully were several versions each of the PD and
1643 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1644 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1645 back of the board, of:
1646
1647 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1648 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1649 */
1650# define FIRMWARE_27X "2.70"
1651#else
1652# define FIRMWARE_27X "2.73"
1653#endif
1654
1655 if (Enquiry2->FirmwareID.MajorVersion == 0)
1656 {
1657 Enquiry2->FirmwareID.MajorVersion =
1658 Controller->V1.Enquiry.MajorFirmwareVersion;
1659 Enquiry2->FirmwareID.MinorVersion =
1660 Controller->V1.Enquiry.MinorFirmwareVersion;
1661 Enquiry2->FirmwareID.FirmwareType = '0';
1662 Enquiry2->FirmwareID.TurnID = 0;
1663 }
1664 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1665 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1666 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1667 if (!((Controller->FirmwareVersion[0] == '5' &&
1668 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1669 (Controller->FirmwareVersion[0] == '4' &&
1670 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1671 (Controller->FirmwareVersion[0] == '3' &&
1672 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1673 (Controller->FirmwareVersion[0] == '2' &&
1674 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1675 {
1676 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1677 DAC960_Error("Firmware Version = '%s'\n", Controller,
1678 Controller->FirmwareVersion);
1679 free_dma_loaf(Controller->PCIDevice, &local_dma);
1680 return false;
1681 }
1682 /*
1683 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1684 Enclosure Management Enabled fields.
1685 */
1686 Controller->Channels = Enquiry2->ActualChannels;
1687 Controller->Targets = Enquiry2->MaxTargets;
1688 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1689 Controller->V1.SAFTE_EnclosureManagementEnabled =
1690 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1691 /*
1692 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1693 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1694 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1695 less than the Controller Queue Depth to allow for an automatic drive
1696 rebuild operation.
1697 */
1698 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1699 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1700 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1701 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1702 Controller->LogicalDriveCount =
1703 Controller->V1.Enquiry.NumberOfLogicalDrives;
1704 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1705 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1706 Controller->DriverScatterGatherLimit =
1707 Controller->ControllerScatterGatherLimit;
1708 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1709 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1710 /*
1711 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1712 */
1713 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1714 >> (10 - DAC960_BlockSizeBits);
1715 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1716 >> (10 - DAC960_BlockSizeBits);
1717 switch (Config2->DriveGeometry)
1718 {
1719 case DAC960_V1_Geometry_128_32:
1720 Controller->V1.GeometryTranslationHeads = 128;
1721 Controller->V1.GeometryTranslationSectors = 32;
1722 break;
1723 case DAC960_V1_Geometry_255_63:
1724 Controller->V1.GeometryTranslationHeads = 255;
1725 Controller->V1.GeometryTranslationSectors = 63;
1726 break;
1727 default:
1728 free_dma_loaf(Controller->PCIDevice, &local_dma);
1729 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1730 }
1731 /*
1732 Initialize the Background Initialization Status.
1733 */
1734 if ((Controller->FirmwareVersion[0] == '4' &&
1735 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1736 (Controller->FirmwareVersion[0] == '5' &&
1737 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1738 {
1739 Controller->V1.BackgroundInitializationStatusSupported = true;
1740 DAC960_V1_ExecuteType3B(Controller,
1741 DAC960_V1_BackgroundInitializationControl, 0x20,
1742 Controller->
1743 V1.BackgroundInitializationStatusDMA);
1744 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1745 Controller->V1.BackgroundInitializationStatus,
1746 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1747 }
1748 /*
1749 Initialize the Logical Drive Initially Accessible flag.
1750 */
1751 for (LogicalDriveNumber = 0;
1752 LogicalDriveNumber < Controller->LogicalDriveCount;
1753 LogicalDriveNumber++)
1754 if (Controller->V1.LogicalDriveInformation
1755 [LogicalDriveNumber].LogicalDriveState !=
1756 DAC960_V1_LogicalDrive_Offline)
1757 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1758 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1759 free_dma_loaf(Controller->PCIDevice, &local_dma);
1760 return true;
1761}
1762
1763
1764/*
1765 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1766 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1767*/
1768
1769static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1770 *Controller)
1771{
1772 DAC960_V2_ControllerInfo_T *ControllerInfo =
1773 &Controller->V2.ControllerInformation;
1774 unsigned short LogicalDeviceNumber = 0;
1775 int ModelNameLength;
1776
1777 /* Get data into dma-able area, then copy into permanant location */
1778 if (!DAC960_V2_NewControllerInfo(Controller))
1779 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1780 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1781 sizeof(DAC960_V2_ControllerInfo_T));
1782
1783
1784 if (!DAC960_V2_GeneralInfo(Controller))
1785 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1786
1787 /*
1788 Initialize the Controller Model Name and Full Model Name fields.
1789 */
1790 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1791 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1792 ModelNameLength = sizeof(Controller->ModelName)-1;
1793 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1794 ModelNameLength);
1795 ModelNameLength--;
1796 while (Controller->ModelName[ModelNameLength] == ' ' ||
1797 Controller->ModelName[ModelNameLength] == '\0')
1798 ModelNameLength--;
1799 Controller->ModelName[++ModelNameLength] = '\0';
1800 strcpy(Controller->FullModelName, "Mylex ");
1801 strcat(Controller->FullModelName, Controller->ModelName);
1802 /*
1803 Initialize the Controller Firmware Version field.
1804 */
1805 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1806 ControllerInfo->FirmwareMajorVersion,
1807 ControllerInfo->FirmwareMinorVersion,
1808 ControllerInfo->FirmwareTurnNumber);
1809 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1810 ControllerInfo->FirmwareMinorVersion == 0 &&
1811 ControllerInfo->FirmwareTurnNumber < 1)
1812 {
1813 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1814 Controller, Controller->FirmwareVersion);
1815 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1816 Controller);
1817 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1818 Controller);
1819 }
1820 /*
1821 Initialize the Controller Channels, Targets, and Memory Size.
1822 */
1823 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1824 Controller->Targets =
1825 ControllerInfo->MaximumTargetsPerChannel
1826 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1827 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1828 /*
1829 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1830 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1831 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1832 less than the Controller Queue Depth to allow for an automatic drive
1833 rebuild operation.
1834 */
1835 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1836 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1837 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1838 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1839 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1840 Controller->MaxBlocksPerCommand =
1841 ControllerInfo->MaximumDataTransferSizeInBlocks;
1842 Controller->ControllerScatterGatherLimit =
1843 ControllerInfo->MaximumScatterGatherEntries;
1844 Controller->DriverScatterGatherLimit =
1845 Controller->ControllerScatterGatherLimit;
1846 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1847 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1848 /*
1849 Initialize the Logical Device Information.
1850 */
1851 while (true)
1852 {
1853 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1854 Controller->V2.NewLogicalDeviceInformation;
1855 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1856 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1857
1858 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1859 break;
1860 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1861 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1862 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1863 Controller, LogicalDeviceNumber);
1864 break;
1865 }
1866 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1867 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1868 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1869 LogicalDeviceNumber++;
1870 continue;
1871 }
1872 PhysicalDevice.Controller = 0;
1873 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1874 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1875 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1876 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1877 PhysicalDevice;
1878 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1879 DAC960_V2_LogicalDevice_Offline)
1880 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1881 LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
1882 kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
1883 if (LogicalDeviceInfo == NULL)
1884 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1885 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1886 LogicalDeviceInfo;
1887 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1888 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1889 LogicalDeviceNumber++;
1890 }
1891 return true;
1892}
1893
1894
1895/*
1896 DAC960_ReportControllerConfiguration reports the Configuration Information
1897 for Controller.
1898*/
1899
1900static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
1901 *Controller)
1902{
1903 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1904 Controller, Controller->ModelName);
1905 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1906 Controller, Controller->FirmwareVersion,
1907 Controller->Channels, Controller->MemorySize);
1908 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1909 Controller, Controller->Bus,
1910 Controller->Device, Controller->Function);
1911 if (Controller->IO_Address == 0)
1912 DAC960_Info("Unassigned\n", Controller);
1913 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1914 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1915 Controller, Controller->PCI_Address,
1916 (unsigned long) Controller->BaseAddress,
1917 Controller->IRQ_Channel);
1918 DAC960_Info(" Controller Queue Depth: %d, "
1919 "Maximum Blocks per Command: %d\n",
1920 Controller, Controller->ControllerQueueDepth,
1921 Controller->MaxBlocksPerCommand);
1922 DAC960_Info(" Driver Queue Depth: %d, "
1923 "Scatter/Gather Limit: %d of %d Segments\n",
1924 Controller, Controller->DriverQueueDepth,
1925 Controller->DriverScatterGatherLimit,
1926 Controller->ControllerScatterGatherLimit);
1927 if (Controller->FirmwareType == DAC960_V1_Controller)
1928 {
1929 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1930 "BIOS Geometry: %d/%d\n", Controller,
1931 Controller->V1.StripeSize,
1932 Controller->V1.SegmentSize,
1933 Controller->V1.GeometryTranslationHeads,
1934 Controller->V1.GeometryTranslationSectors);
1935 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1936 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1937 }
1938 return true;
1939}
1940
1941
1942/*
1943 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1944 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1945 Inquiry Unit Serial Number information for each device connected to
1946 Controller.
1947*/
1948
1949static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1950 *Controller)
1951{
1952 struct dma_loaf local_dma;
1953
1954 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1955 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1956
1957 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1958 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1959
1960 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1961 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1962
1963 struct completion Completions[DAC960_V1_MaxChannels];
1964 unsigned long flags;
1965 int Channel, TargetID;
1966
1967 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1968 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1969 sizeof(DAC960_SCSI_Inquiry_T) +
1970 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1971 return DAC960_Failure(Controller,
1972 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1973
1974 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1975 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1976 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1977 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1978 sizeof(DAC960_SCSI_Inquiry_T),
1979 SCSI_Inquiry_dma + Channel);
1980 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1981 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1982 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1983 }
1984
1985 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1986 {
1987 /*
1988 * For each channel, submit a probe for a device on that channel.
1989 * The timeout interval for a device that is present is 10 seconds.
1990 * With this approach, the timeout periods can elapse in parallel
1991 * on each channel.
1992 */
1993 for (Channel = 0; Channel < Controller->Channels; Channel++)
1994 {
1995 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
1996 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
1997 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
1998 DAC960_Command_T *Command = Controller->Commands[Channel];
1999 struct completion *Completion = &Completions[Channel];
2000
2001 init_completion(Completion);
2002 DAC960_V1_ClearCommand(Command);
2003 Command->CommandType = DAC960_ImmediateCommand;
2004 Command->Completion = Completion;
2005 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2006 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2007 DCDB->Channel = Channel;
2008 DCDB->TargetID = TargetID;
2009 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2010 DCDB->EarlyStatus = false;
2011 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2012 DCDB->NoAutomaticRequestSense = false;
2013 DCDB->DisconnectPermitted = true;
2014 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2015 DCDB->BusAddress = NewInquiryStandardDataDMA;
2016 DCDB->CDBLength = 6;
2017 DCDB->TransferLengthHigh4 = 0;
2018 DCDB->SenseLength = sizeof(DCDB->SenseData);
2019 DCDB->CDB[0] = 0x12; /* INQUIRY */
2020 DCDB->CDB[1] = 0; /* EVPD = 0 */
2021 DCDB->CDB[2] = 0; /* Page Code */
2022 DCDB->CDB[3] = 0; /* Reserved */
2023 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2024 DCDB->CDB[5] = 0; /* Control */
2025
2026 spin_lock_irqsave(&Controller->queue_lock, flags);
2027 DAC960_QueueCommand(Command);
2028 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2029 }
2030 /*
2031 * Wait for the problems submitted in the previous loop
2032 * to complete. On the probes that are successful,
2033 * get the serial number of the device that was found.
2034 */
2035 for (Channel = 0; Channel < Controller->Channels; Channel++)
2036 {
2037 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2038 &Controller->V1.InquiryStandardData[Channel][TargetID];
2039 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2040 dma_addr_t NewInquiryUnitSerialNumberDMA =
2041 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2042 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2043 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2044 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2045 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2046 DAC960_Command_T *Command = Controller->Commands[Channel];
2047 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2048 struct completion *Completion = &Completions[Channel];
2049
2050 wait_for_completion(Completion);
2051
2052 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2053 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2054 InquiryStandardData->PeripheralDeviceType = 0x1F;
2055 continue;
2056 } else
2057 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2058
2059 /* Preserve Channel and TargetID values from the previous loop */
2060 Command->Completion = Completion;
2061 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2062 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2063 DCDB->SenseLength = sizeof(DCDB->SenseData);
2064 DCDB->CDB[0] = 0x12; /* INQUIRY */
2065 DCDB->CDB[1] = 1; /* EVPD = 1 */
2066 DCDB->CDB[2] = 0x80; /* Page Code */
2067 DCDB->CDB[3] = 0; /* Reserved */
2068 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2069 DCDB->CDB[5] = 0; /* Control */
2070
2071 spin_lock_irqsave(&Controller->queue_lock, flags);
2072 DAC960_QueueCommand(Command);
2073 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2074 wait_for_completion(Completion);
2075
2076 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2077 memset(InquiryUnitSerialNumber, 0,
2078 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2079 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2080 } else
2081 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2082 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2083 }
2084 }
2085 free_dma_loaf(Controller->PCIDevice, &local_dma);
2086 return true;
2087}
2088
2089
2090/*
2091 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2092 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2093 Information and SCSI Inquiry Unit Serial Number information for each
2094 device connected to Controller.
2095*/
2096
2097static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2098 *Controller)
2099{
2100 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2101 unsigned short PhysicalDeviceIndex = 0;
2102
2103 while (true)
2104 {
2105 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2106 Controller->V2.NewPhysicalDeviceInformation;
2107 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2108 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2109 Controller->V2.NewInquiryUnitSerialNumber;
2110 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2111
2112 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2113 break;
2114
2115 PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
2116 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
2117 if (PhysicalDeviceInfo == NULL)
2118 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2119 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2120 PhysicalDeviceInfo;
2121 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2122 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2123
2124 InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
2125 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2126 if (InquiryUnitSerialNumber == NULL) {
2127 kfree(PhysicalDeviceInfo);
2128 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2129 }
2130 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2131 InquiryUnitSerialNumber;
2132
2133 Channel = NewPhysicalDeviceInfo->Channel;
2134 TargetID = NewPhysicalDeviceInfo->TargetID;
2135 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2136
2137 /*
2138 Some devices do NOT have Unit Serial Numbers.
2139 This command fails for them. But, we still want to
2140 remember those devices are there. Construct a
2141 UnitSerialNumber structure for the failure case.
2142 */
2143 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2144 memset(InquiryUnitSerialNumber, 0,
2145 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2146 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2147 } else
2148 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2149 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2150
2151 PhysicalDeviceIndex++;
2152 LogicalUnit++;
2153 }
2154 return true;
2155}
2156
2157
2158/*
2159 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2160 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2161 Unit Serial Number structures.
2162*/
2163
2164static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2165 *InquiryStandardData,
2166 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2167 *InquiryUnitSerialNumber,
2168 unsigned char *Vendor,
2169 unsigned char *Model,
2170 unsigned char *Revision,
2171 unsigned char *SerialNumber)
2172{
2173 int SerialNumberLength, i;
2174 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2175 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2176 {
2177 unsigned char VendorCharacter =
2178 InquiryStandardData->VendorIdentification[i];
2179 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2180 ? VendorCharacter : ' ');
2181 }
2182 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2183 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2184 {
2185 unsigned char ModelCharacter =
2186 InquiryStandardData->ProductIdentification[i];
2187 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2188 ? ModelCharacter : ' ');
2189 }
2190 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2191 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2192 {
2193 unsigned char RevisionCharacter =
2194 InquiryStandardData->ProductRevisionLevel[i];
2195 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2196 ? RevisionCharacter : ' ');
2197 }
2198 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2199 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2200 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2201 if (SerialNumberLength >
2202 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2203 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2204 for (i = 0; i < SerialNumberLength; i++)
2205 {
2206 unsigned char SerialNumberCharacter =
2207 InquiryUnitSerialNumber->ProductSerialNumber[i];
2208 SerialNumber[i] =
2209 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2210 ? SerialNumberCharacter : ' ');
2211 }
2212 SerialNumber[SerialNumberLength] = '\0';
2213}
2214
2215
2216/*
2217 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2218 Information for DAC960 V1 Firmware Controllers.
2219*/
2220
2221static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2222 *Controller)
2223{
2224 int LogicalDriveNumber, Channel, TargetID;
2225 DAC960_Info(" Physical Devices:\n", Controller);
2226 for (Channel = 0; Channel < Controller->Channels; Channel++)
2227 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2228 {
2229 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2230 &Controller->V1.InquiryStandardData[Channel][TargetID];
2231 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2232 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2233 DAC960_V1_DeviceState_T *DeviceState =
2234 &Controller->V1.DeviceState[Channel][TargetID];
2235 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2236 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2237 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2238 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2239 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2240 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2241 ->ProductSerialNumber)];
2242 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2243 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2244 Vendor, Model, Revision, SerialNumber);
2245 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2246 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2247 Vendor, Model, Revision);
2248 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2249 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2250 if (DeviceState->Present &&
2251 DeviceState->DeviceType == DAC960_V1_DiskType)
2252 {
2253 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2254 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2255 Controller,
2256 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2257 ? "Dead"
2258 : DeviceState->DeviceState
2259 == DAC960_V1_Device_WriteOnly
2260 ? "Write-Only"
2261 : DeviceState->DeviceState
2262 == DAC960_V1_Device_Online
2263 ? "Online" : "Standby"),
2264 DeviceState->DiskSize,
2265 Controller->V1.DeviceResetCount[Channel][TargetID]);
2266 else
2267 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2268 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2269 ? "Dead"
2270 : DeviceState->DeviceState
2271 == DAC960_V1_Device_WriteOnly
2272 ? "Write-Only"
2273 : DeviceState->DeviceState
2274 == DAC960_V1_Device_Online
2275 ? "Online" : "Standby"),
2276 DeviceState->DiskSize);
2277 }
2278 if (ErrorEntry->ParityErrorCount > 0 ||
2279 ErrorEntry->SoftErrorCount > 0 ||
2280 ErrorEntry->HardErrorCount > 0 ||
2281 ErrorEntry->MiscErrorCount > 0)
2282 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2283 "Hard: %d, Misc: %d\n", Controller,
2284 ErrorEntry->ParityErrorCount,
2285 ErrorEntry->SoftErrorCount,
2286 ErrorEntry->HardErrorCount,
2287 ErrorEntry->MiscErrorCount);
2288 }
2289 DAC960_Info(" Logical Drives:\n", Controller);
2290 for (LogicalDriveNumber = 0;
2291 LogicalDriveNumber < Controller->LogicalDriveCount;
2292 LogicalDriveNumber++)
2293 {
2294 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2295 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2296 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2297 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2298 LogicalDriveInformation->RAIDLevel,
2299 (LogicalDriveInformation->LogicalDriveState
2300 == DAC960_V1_LogicalDrive_Online
2301 ? "Online"
2302 : LogicalDriveInformation->LogicalDriveState
2303 == DAC960_V1_LogicalDrive_Critical
2304 ? "Critical" : "Offline"),
2305 LogicalDriveInformation->LogicalDriveSize,
2306 (LogicalDriveInformation->WriteBack
2307 ? "Write Back" : "Write Thru"));
2308 }
2309 return true;
2310}
2311
2312
2313/*
2314 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2315 Information for DAC960 V2 Firmware Controllers.
2316*/
2317
2318static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2319 *Controller)
2320{
2321 int PhysicalDeviceIndex, LogicalDriveNumber;
2322 DAC960_Info(" Physical Devices:\n", Controller);
2323 for (PhysicalDeviceIndex = 0;
2324 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2325 PhysicalDeviceIndex++)
2326 {
2327 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2328 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2329 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2330 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2331 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2332 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2333 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2334 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2335 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2336 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2337 if (PhysicalDeviceInfo == NULL) break;
2338 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2339 Vendor, Model, Revision, SerialNumber);
2340 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2341 Controller,
2342 PhysicalDeviceInfo->Channel,
2343 PhysicalDeviceInfo->TargetID,
2344 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2345 Vendor, Model, Revision);
2346 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2347 DAC960_Info(" %sAsynchronous\n", Controller,
2348 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2349 ? "Wide " :""));
2350 else
2351 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2352 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2353 ? "Wide " :""),
2354 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2355 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2356 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2357 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2358 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2359 DAC960_V2_Device_Unconfigured)
2360 continue;
2361 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2362 (PhysicalDeviceInfo->PhysicalDeviceState
2363 == DAC960_V2_Device_Online
2364 ? "Online"
2365 : PhysicalDeviceInfo->PhysicalDeviceState
2366 == DAC960_V2_Device_Rebuild
2367 ? "Rebuild"
2368 : PhysicalDeviceInfo->PhysicalDeviceState
2369 == DAC960_V2_Device_Missing
2370 ? "Missing"
2371 : PhysicalDeviceInfo->PhysicalDeviceState
2372 == DAC960_V2_Device_Critical
2373 ? "Critical"
2374 : PhysicalDeviceInfo->PhysicalDeviceState
2375 == DAC960_V2_Device_Dead
2376 ? "Dead"
2377 : PhysicalDeviceInfo->PhysicalDeviceState
2378 == DAC960_V2_Device_SuspectedDead
2379 ? "Suspected-Dead"
2380 : PhysicalDeviceInfo->PhysicalDeviceState
2381 == DAC960_V2_Device_CommandedOffline
2382 ? "Commanded-Offline"
2383 : PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_Standby
2385 ? "Standby" : "Unknown"),
2386 PhysicalDeviceInfo->ConfigurableDeviceSize);
2387 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2388 PhysicalDeviceInfo->SoftErrors == 0 &&
2389 PhysicalDeviceInfo->HardErrors == 0 &&
2390 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2391 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2392 PhysicalDeviceInfo->Retries == 0 &&
2393 PhysicalDeviceInfo->Aborts == 0 &&
2394 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2395 continue;
2396 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2397 "Hard: %d, Misc: %d\n", Controller,
2398 PhysicalDeviceInfo->ParityErrors,
2399 PhysicalDeviceInfo->SoftErrors,
2400 PhysicalDeviceInfo->HardErrors,
2401 PhysicalDeviceInfo->MiscellaneousErrors);
2402 DAC960_Info(" Timeouts: %d, Retries: %d, "
2403 "Aborts: %d, Predicted: %d\n", Controller,
2404 PhysicalDeviceInfo->CommandTimeouts,
2405 PhysicalDeviceInfo->Retries,
2406 PhysicalDeviceInfo->Aborts,
2407 PhysicalDeviceInfo->PredictedFailuresDetected);
2408 }
2409 DAC960_Info(" Logical Drives:\n", Controller);
2410 for (LogicalDriveNumber = 0;
2411 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2412 LogicalDriveNumber++)
2413 {
2414 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2415 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2416 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2417 "Read Cache Enabled",
2418 "Read Ahead Enabled",
2419 "Intelligent Read Ahead Enabled",
2420 "-", "-", "-", "-" };
2421 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2422 "Logical Device Read Only",
2423 "Write Cache Enabled",
2424 "Intelligent Write Cache Enabled",
2425 "-", "-", "-", "-" };
2426 unsigned char *GeometryTranslation;
2427 if (LogicalDeviceInfo == NULL) continue;
2428 switch (LogicalDeviceInfo->DriveGeometry)
2429 {
2430 case DAC960_V2_Geometry_128_32:
2431 GeometryTranslation = "128/32";
2432 break;
2433 case DAC960_V2_Geometry_255_63:
2434 GeometryTranslation = "255/63";
2435 break;
2436 default:
2437 GeometryTranslation = "Invalid";
2438 DAC960_Error("Illegal Logical Device Geometry %d\n",
2439 Controller, LogicalDeviceInfo->DriveGeometry);
2440 break;
2441 }
2442 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2443 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2444 LogicalDeviceInfo->RAIDLevel,
2445 (LogicalDeviceInfo->LogicalDeviceState
2446 == DAC960_V2_LogicalDevice_Online
2447 ? "Online"
2448 : LogicalDeviceInfo->LogicalDeviceState
2449 == DAC960_V2_LogicalDevice_Critical
2450 ? "Critical" : "Offline"),
2451 LogicalDeviceInfo->ConfigurableDeviceSize);
2452 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2453 Controller,
2454 (LogicalDeviceInfo->LogicalDeviceControl
2455 .LogicalDeviceInitialized
2456 ? "Initialized" : "Uninitialized"),
2457 GeometryTranslation);
2458 if (LogicalDeviceInfo->StripeSize == 0)
2459 {
2460 if (LogicalDeviceInfo->CacheLineSize == 0)
2461 DAC960_Info(" Stripe Size: N/A, "
2462 "Segment Size: N/A\n", Controller);
2463 else
2464 DAC960_Info(" Stripe Size: N/A, "
2465 "Segment Size: %dKB\n", Controller,
2466 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2467 }
2468 else
2469 {
2470 if (LogicalDeviceInfo->CacheLineSize == 0)
2471 DAC960_Info(" Stripe Size: %dKB, "
2472 "Segment Size: N/A\n", Controller,
2473 1 << (LogicalDeviceInfo->StripeSize - 2));
2474 else
2475 DAC960_Info(" Stripe Size: %dKB, "
2476 "Segment Size: %dKB\n", Controller,
2477 1 << (LogicalDeviceInfo->StripeSize - 2),
2478 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2479 }
2480 DAC960_Info(" %s, %s\n", Controller,
2481 ReadCacheStatus[
2482 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2483 WriteCacheStatus[
2484 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2485 if (LogicalDeviceInfo->SoftErrors > 0 ||
2486 LogicalDeviceInfo->CommandsFailed > 0 ||
2487 LogicalDeviceInfo->DeferredWriteErrors)
2488 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2489 "Deferred Write: %d\n", Controller,
2490 LogicalDeviceInfo->SoftErrors,
2491 LogicalDeviceInfo->CommandsFailed,
2492 LogicalDeviceInfo->DeferredWriteErrors);
2493
2494 }
2495 return true;
2496}
2497
2498/*
2499 DAC960_RegisterBlockDevice registers the Block Device structures
2500 associated with Controller.
2501*/
2502
2503static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2504{
2505 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2506 int n;
2507
2508 /*
2509 Register the Block Device Major Number for this DAC960 Controller.
2510 */
2511 if (register_blkdev(MajorNumber, "dac960") < 0)
2512 return false;
2513
2514 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2515 struct gendisk *disk = Controller->disks[n];
2516 struct request_queue *RequestQueue;
2517
2518 /* for now, let all request queues share controller's lock */
2519 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2520 if (!RequestQueue) {
2521 printk("DAC960: failure to allocate request queue\n");
2522 continue;
2523 }
2524 Controller->RequestQueue[n] = RequestQueue;
2525 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2526 RequestQueue->queuedata = Controller;
2527 blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2528 blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2529 blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2530 disk->queue = RequestQueue;
2531 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2532 sprintf(disk->devfs_name, "rd/host%d/target%d", Controller->ControllerNumber, n);
2533 disk->major = MajorNumber;
2534 disk->first_minor = n << DAC960_MaxPartitionsBits;
2535 disk->fops = &DAC960_BlockDeviceOperations;
2536 }
2537 /*
2538 Indicate the Block Device Registration completed successfully,
2539 */
2540 return true;
2541}
2542
2543
2544/*
2545 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2546 associated with Controller.
2547*/
2548
2549static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2550{
2551 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2552 int disk;
2553
2554 /* does order matter when deleting gendisk and cleanup in request queue? */
2555 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2556 del_gendisk(Controller->disks[disk]);
2557 blk_cleanup_queue(Controller->RequestQueue[disk]);
2558 Controller->RequestQueue[disk] = NULL;
2559 }
2560
2561 /*
2562 Unregister the Block Device Major Number for this DAC960 Controller.
2563 */
2564 unregister_blkdev(MajorNumber, "dac960");
2565}
2566
2567/*
2568 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2569 Information Partition Sector Counts and Block Sizes.
2570*/
2571
2572static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2573{
2574 int disk;
2575 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2576 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2577}
2578
2579/*
2580 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2581 the Error Status Register when the driver performs the BIOS handshaking.
2582 It returns true for fatal errors and false otherwise.
2583*/
2584
2585static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2586 unsigned char ErrorStatus,
2587 unsigned char Parameter0,
2588 unsigned char Parameter1)
2589{
2590 switch (ErrorStatus)
2591 {
2592 case 0x00:
2593 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2594 Controller, Parameter1, Parameter0);
2595 break;
2596 case 0x08:
2597 if (Controller->DriveSpinUpMessageDisplayed) break;
2598 DAC960_Notice("Spinning Up Drives\n", Controller);
2599 Controller->DriveSpinUpMessageDisplayed = true;
2600 break;
2601 case 0x30:
2602 DAC960_Notice("Configuration Checksum Error\n", Controller);
2603 break;
2604 case 0x60:
2605 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2606 break;
2607 case 0x70:
2608 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2609 break;
2610 case 0x90:
2611 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2612 Controller, Parameter1, Parameter0);
2613 break;
2614 case 0xA0:
2615 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2616 break;
2617 case 0xB0:
2618 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2619 break;
2620 case 0xD0:
2621 DAC960_Notice("New Controller Configuration Found\n", Controller);
2622 break;
2623 case 0xF0:
2624 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2625 return true;
2626 default:
2627 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2628 Controller, ErrorStatus);
2629 return true;
2630 }
2631 return false;
2632}
2633
2634
2635/*
2636 * DAC960_DetectCleanup releases the resources that were allocated
2637 * during DAC960_DetectController(). DAC960_DetectController can
2638 * has several internal failure points, so not ALL resources may
2639 * have been allocated. It's important to free only
2640 * resources that HAVE been allocated. The code below always
2641 * tests that the resource has been allocated before attempting to
2642 * free it.
2643 */
2644static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2645{
2646 int i;
2647
2648 /* Free the memory mailbox, status, and related structures */
2649 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2650 if (Controller->MemoryMappedAddress) {
2651 switch(Controller->HardwareType)
2652 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07002653 case DAC960_GEM_Controller:
2654 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2655 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002656 case DAC960_BA_Controller:
2657 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2658 break;
2659 case DAC960_LP_Controller:
2660 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2661 break;
2662 case DAC960_LA_Controller:
2663 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2664 break;
2665 case DAC960_PG_Controller:
2666 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2667 break;
2668 case DAC960_PD_Controller:
2669 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2670 break;
2671 case DAC960_P_Controller:
2672 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2673 break;
2674 }
2675 iounmap(Controller->MemoryMappedAddress);
2676 }
2677 if (Controller->IRQ_Channel)
2678 free_irq(Controller->IRQ_Channel, Controller);
2679 if (Controller->IO_Address)
2680 release_region(Controller->IO_Address, 0x80);
2681 pci_disable_device(Controller->PCIDevice);
2682 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2683 put_disk(Controller->disks[i]);
2684 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2685 kfree(Controller);
2686}
2687
2688
2689/*
2690 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2691 PCI RAID Controllers by interrogating the PCI Configuration Space for
2692 Controller Type.
2693*/
2694
2695static DAC960_Controller_T *
2696DAC960_DetectController(struct pci_dev *PCI_Device,
2697 const struct pci_device_id *entry)
2698{
2699 struct DAC960_privdata *privdata =
2700 (struct DAC960_privdata *)entry->driver_data;
2701 irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) =
2702 privdata->InterruptHandler;
2703 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2704 DAC960_Controller_T *Controller = NULL;
2705 unsigned char DeviceFunction = PCI_Device->devfn;
2706 unsigned char ErrorStatus, Parameter0, Parameter1;
2707 unsigned int IRQ_Channel;
2708 void __iomem *BaseAddress;
2709 int i;
2710
Eric Sesterhenn06ff37f2006-03-08 11:21:52 +01002711 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002712 if (Controller == NULL) {
2713 DAC960_Error("Unable to allocate Controller structure for "
2714 "Controller at\n", NULL);
2715 return NULL;
2716 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002717 Controller->ControllerNumber = DAC960_ControllerCount;
2718 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2719 Controller->Bus = PCI_Device->bus->number;
2720 Controller->FirmwareType = privdata->FirmwareType;
2721 Controller->HardwareType = privdata->HardwareType;
2722 Controller->Device = DeviceFunction >> 3;
2723 Controller->Function = DeviceFunction & 0x7;
2724 Controller->PCIDevice = PCI_Device;
2725 strcpy(Controller->FullModelName, "DAC960");
2726
2727 if (pci_enable_device(PCI_Device))
2728 goto Failure;
2729
2730 switch (Controller->HardwareType)
2731 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07002732 case DAC960_GEM_Controller:
2733 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2734 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002735 case DAC960_BA_Controller:
2736 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2737 break;
2738 case DAC960_LP_Controller:
2739 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2740 break;
2741 case DAC960_LA_Controller:
2742 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2743 break;
2744 case DAC960_PG_Controller:
2745 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2746 break;
2747 case DAC960_PD_Controller:
2748 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2749 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2750 break;
2751 case DAC960_P_Controller:
2752 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2753 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2754 break;
2755 }
2756
2757 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2758 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2759 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2760 if (!Controller->disks[i])
2761 goto Failure;
2762 Controller->disks[i]->private_data = (void *)((long)i);
2763 }
2764 init_waitqueue_head(&Controller->CommandWaitQueue);
2765 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2766 spin_lock_init(&Controller->queue_lock);
2767 DAC960_AnnounceDriver(Controller);
2768 /*
2769 Map the Controller Register Window.
2770 */
2771 if (MemoryWindowSize < PAGE_SIZE)
2772 MemoryWindowSize = PAGE_SIZE;
2773 Controller->MemoryMappedAddress =
2774 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2775 Controller->BaseAddress =
2776 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2777 if (Controller->MemoryMappedAddress == NULL)
2778 {
2779 DAC960_Error("Unable to map Controller Register Window for "
2780 "Controller at\n", Controller);
2781 goto Failure;
2782 }
2783 BaseAddress = Controller->BaseAddress;
2784 switch (Controller->HardwareType)
2785 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07002786 case DAC960_GEM_Controller:
2787 DAC960_GEM_DisableInterrupts(BaseAddress);
2788 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2789 udelay(1000);
2790 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2791 {
2792 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2793 &Parameter0, &Parameter1) &&
2794 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2795 Parameter0, Parameter1))
2796 goto Failure;
2797 udelay(10);
2798 }
2799 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2800 {
2801 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2802 "for Controller at\n", Controller);
2803 goto Failure;
2804 }
2805 DAC960_GEM_EnableInterrupts(BaseAddress);
2806 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2807 Controller->ReadControllerConfiguration =
2808 DAC960_V2_ReadControllerConfiguration;
2809 Controller->ReadDeviceConfiguration =
2810 DAC960_V2_ReadDeviceConfiguration;
2811 Controller->ReportDeviceConfiguration =
2812 DAC960_V2_ReportDeviceConfiguration;
2813 Controller->QueueReadWriteCommand =
2814 DAC960_V2_QueueReadWriteCommand;
2815 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002816 case DAC960_BA_Controller:
2817 DAC960_BA_DisableInterrupts(BaseAddress);
2818 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2819 udelay(1000);
2820 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2821 {
2822 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2823 &Parameter0, &Parameter1) &&
2824 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2825 Parameter0, Parameter1))
2826 goto Failure;
2827 udelay(10);
2828 }
2829 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2830 {
2831 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2832 "for Controller at\n", Controller);
2833 goto Failure;
2834 }
2835 DAC960_BA_EnableInterrupts(BaseAddress);
2836 Controller->QueueCommand = DAC960_BA_QueueCommand;
2837 Controller->ReadControllerConfiguration =
2838 DAC960_V2_ReadControllerConfiguration;
2839 Controller->ReadDeviceConfiguration =
2840 DAC960_V2_ReadDeviceConfiguration;
2841 Controller->ReportDeviceConfiguration =
2842 DAC960_V2_ReportDeviceConfiguration;
2843 Controller->QueueReadWriteCommand =
2844 DAC960_V2_QueueReadWriteCommand;
2845 break;
2846 case DAC960_LP_Controller:
2847 DAC960_LP_DisableInterrupts(BaseAddress);
2848 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2849 udelay(1000);
2850 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2851 {
2852 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2853 &Parameter0, &Parameter1) &&
2854 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2855 Parameter0, Parameter1))
2856 goto Failure;
2857 udelay(10);
2858 }
2859 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2860 {
2861 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2862 "for Controller at\n", Controller);
2863 goto Failure;
2864 }
2865 DAC960_LP_EnableInterrupts(BaseAddress);
2866 Controller->QueueCommand = DAC960_LP_QueueCommand;
2867 Controller->ReadControllerConfiguration =
2868 DAC960_V2_ReadControllerConfiguration;
2869 Controller->ReadDeviceConfiguration =
2870 DAC960_V2_ReadDeviceConfiguration;
2871 Controller->ReportDeviceConfiguration =
2872 DAC960_V2_ReportDeviceConfiguration;
2873 Controller->QueueReadWriteCommand =
2874 DAC960_V2_QueueReadWriteCommand;
2875 break;
2876 case DAC960_LA_Controller:
2877 DAC960_LA_DisableInterrupts(BaseAddress);
2878 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2879 udelay(1000);
2880 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2881 {
2882 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2883 &Parameter0, &Parameter1) &&
2884 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2885 Parameter0, Parameter1))
2886 goto Failure;
2887 udelay(10);
2888 }
2889 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2890 {
2891 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2892 "for Controller at\n", Controller);
2893 goto Failure;
2894 }
2895 DAC960_LA_EnableInterrupts(BaseAddress);
2896 if (Controller->V1.DualModeMemoryMailboxInterface)
2897 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2898 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2899 Controller->ReadControllerConfiguration =
2900 DAC960_V1_ReadControllerConfiguration;
2901 Controller->ReadDeviceConfiguration =
2902 DAC960_V1_ReadDeviceConfiguration;
2903 Controller->ReportDeviceConfiguration =
2904 DAC960_V1_ReportDeviceConfiguration;
2905 Controller->QueueReadWriteCommand =
2906 DAC960_V1_QueueReadWriteCommand;
2907 break;
2908 case DAC960_PG_Controller:
2909 DAC960_PG_DisableInterrupts(BaseAddress);
2910 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2911 udelay(1000);
2912 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2913 {
2914 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2915 &Parameter0, &Parameter1) &&
2916 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2917 Parameter0, Parameter1))
2918 goto Failure;
2919 udelay(10);
2920 }
2921 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2922 {
2923 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2924 "for Controller at\n", Controller);
2925 goto Failure;
2926 }
2927 DAC960_PG_EnableInterrupts(BaseAddress);
2928 if (Controller->V1.DualModeMemoryMailboxInterface)
2929 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2930 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2931 Controller->ReadControllerConfiguration =
2932 DAC960_V1_ReadControllerConfiguration;
2933 Controller->ReadDeviceConfiguration =
2934 DAC960_V1_ReadDeviceConfiguration;
2935 Controller->ReportDeviceConfiguration =
2936 DAC960_V1_ReportDeviceConfiguration;
2937 Controller->QueueReadWriteCommand =
2938 DAC960_V1_QueueReadWriteCommand;
2939 break;
2940 case DAC960_PD_Controller:
2941 if (!request_region(Controller->IO_Address, 0x80,
2942 Controller->FullModelName)) {
2943 DAC960_Error("IO port 0x%d busy for Controller at\n",
2944 Controller, Controller->IO_Address);
2945 goto Failure;
2946 }
2947 DAC960_PD_DisableInterrupts(BaseAddress);
2948 DAC960_PD_AcknowledgeStatus(BaseAddress);
2949 udelay(1000);
2950 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2951 {
2952 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2953 &Parameter0, &Parameter1) &&
2954 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2955 Parameter0, Parameter1))
2956 goto Failure;
2957 udelay(10);
2958 }
2959 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2960 {
2961 DAC960_Error("Unable to allocate DMA mapped memory "
2962 "for Controller at\n", Controller);
2963 goto Failure;
2964 }
2965 DAC960_PD_EnableInterrupts(BaseAddress);
2966 Controller->QueueCommand = DAC960_PD_QueueCommand;
2967 Controller->ReadControllerConfiguration =
2968 DAC960_V1_ReadControllerConfiguration;
2969 Controller->ReadDeviceConfiguration =
2970 DAC960_V1_ReadDeviceConfiguration;
2971 Controller->ReportDeviceConfiguration =
2972 DAC960_V1_ReportDeviceConfiguration;
2973 Controller->QueueReadWriteCommand =
2974 DAC960_V1_QueueReadWriteCommand;
2975 break;
2976 case DAC960_P_Controller:
2977 if (!request_region(Controller->IO_Address, 0x80,
2978 Controller->FullModelName)){
2979 DAC960_Error("IO port 0x%d busy for Controller at\n",
2980 Controller, Controller->IO_Address);
2981 goto Failure;
2982 }
2983 DAC960_PD_DisableInterrupts(BaseAddress);
2984 DAC960_PD_AcknowledgeStatus(BaseAddress);
2985 udelay(1000);
2986 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2987 {
2988 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2989 &Parameter0, &Parameter1) &&
2990 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2991 Parameter0, Parameter1))
2992 goto Failure;
2993 udelay(10);
2994 }
2995 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2996 {
2997 DAC960_Error("Unable to allocate DMA mapped memory"
2998 "for Controller at\n", Controller);
2999 goto Failure;
3000 }
3001 DAC960_PD_EnableInterrupts(BaseAddress);
3002 Controller->QueueCommand = DAC960_P_QueueCommand;
3003 Controller->ReadControllerConfiguration =
3004 DAC960_V1_ReadControllerConfiguration;
3005 Controller->ReadDeviceConfiguration =
3006 DAC960_V1_ReadDeviceConfiguration;
3007 Controller->ReportDeviceConfiguration =
3008 DAC960_V1_ReportDeviceConfiguration;
3009 Controller->QueueReadWriteCommand =
3010 DAC960_V1_QueueReadWriteCommand;
3011 break;
3012 }
3013 /*
3014 Acquire shared access to the IRQ Channel.
3015 */
3016 IRQ_Channel = PCI_Device->irq;
3017 if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
3018 Controller->FullModelName, Controller) < 0)
3019 {
3020 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3021 Controller, Controller->IRQ_Channel);
3022 goto Failure;
3023 }
3024 Controller->IRQ_Channel = IRQ_Channel;
3025 Controller->InitialCommand.CommandIdentifier = 1;
3026 Controller->InitialCommand.Controller = Controller;
3027 Controller->Commands[0] = &Controller->InitialCommand;
3028 Controller->FreeCommands = &Controller->InitialCommand;
3029 return Controller;
3030
3031Failure:
3032 if (Controller->IO_Address == 0)
3033 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3034 "PCI Address 0x%X\n", Controller,
3035 Controller->Bus, Controller->Device,
3036 Controller->Function, Controller->PCI_Address);
3037 else
3038 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3039 "0x%X PCI Address 0x%X\n", Controller,
3040 Controller->Bus, Controller->Device,
3041 Controller->Function, Controller->IO_Address,
3042 Controller->PCI_Address);
3043 DAC960_DetectCleanup(Controller);
3044 DAC960_ControllerCount--;
3045 return NULL;
3046}
3047
3048/*
3049 DAC960_InitializeController initializes Controller.
3050*/
3051
3052static boolean
3053DAC960_InitializeController(DAC960_Controller_T *Controller)
3054{
3055 if (DAC960_ReadControllerConfiguration(Controller) &&
3056 DAC960_ReportControllerConfiguration(Controller) &&
3057 DAC960_CreateAuxiliaryStructures(Controller) &&
3058 DAC960_ReadDeviceConfiguration(Controller) &&
3059 DAC960_ReportDeviceConfiguration(Controller) &&
3060 DAC960_RegisterBlockDevice(Controller))
3061 {
3062 /*
3063 Initialize the Monitoring Timer.
3064 */
3065 init_timer(&Controller->MonitoringTimer);
3066 Controller->MonitoringTimer.expires =
3067 jiffies + DAC960_MonitoringTimerInterval;
3068 Controller->MonitoringTimer.data = (unsigned long) Controller;
3069 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3070 add_timer(&Controller->MonitoringTimer);
3071 Controller->ControllerInitialized = true;
3072 return true;
3073 }
3074 return false;
3075}
3076
3077
3078/*
3079 DAC960_FinalizeController finalizes Controller.
3080*/
3081
3082static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3083{
3084 if (Controller->ControllerInitialized)
3085 {
3086 unsigned long flags;
3087
3088 /*
3089 * Acquiring and releasing lock here eliminates
3090 * a very low probability race.
3091 *
3092 * The code below allocates controller command structures
3093 * from the free list without holding the controller lock.
3094 * This is safe assuming there is no other activity on
3095 * the controller at the time.
3096 *
3097 * But, there might be a monitoring command still
3098 * in progress. Setting the Shutdown flag while holding
3099 * the lock ensures that there is no monitoring command
3100 * in the interrupt handler currently, and any monitoring
3101 * commands that complete from this time on will NOT return
3102 * their command structure to the free list.
3103 */
3104
3105 spin_lock_irqsave(&Controller->queue_lock, flags);
3106 Controller->ShutdownMonitoringTimer = 1;
3107 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3108
3109 del_timer_sync(&Controller->MonitoringTimer);
3110 if (Controller->FirmwareType == DAC960_V1_Controller)
3111 {
3112 DAC960_Notice("Flushing Cache...", Controller);
3113 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3114 DAC960_Notice("done\n", Controller);
3115
3116 if (Controller->HardwareType == DAC960_PD_Controller)
3117 release_region(Controller->IO_Address, 0x80);
3118 }
3119 else
3120 {
3121 DAC960_Notice("Flushing Cache...", Controller);
3122 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3123 DAC960_V2_RAID_Controller);
3124 DAC960_Notice("done\n", Controller);
3125 }
3126 }
3127 DAC960_UnregisterBlockDevice(Controller);
3128 DAC960_DestroyAuxiliaryStructures(Controller);
3129 DAC960_DestroyProcEntries(Controller);
3130 DAC960_DetectCleanup(Controller);
3131}
3132
3133
3134/*
3135 DAC960_Probe verifies controller's existence and
3136 initializes the DAC960 Driver for that controller.
3137*/
3138
3139static int
3140DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3141{
3142 int disk;
3143 DAC960_Controller_T *Controller;
3144
3145 if (DAC960_ControllerCount == DAC960_MaxControllers)
3146 {
3147 DAC960_Error("More than %d DAC960 Controllers detected - "
3148 "ignoring from Controller at\n",
3149 NULL, DAC960_MaxControllers);
3150 return -ENODEV;
3151 }
3152
3153 Controller = DAC960_DetectController(dev, entry);
3154 if (!Controller)
3155 return -ENODEV;
3156
3157 if (!DAC960_InitializeController(Controller)) {
3158 DAC960_FinalizeController(Controller);
3159 return -ENODEV;
3160 }
3161
3162 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3163 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3164 add_disk(Controller->disks[disk]);
3165 }
3166 DAC960_CreateProcEntries(Controller);
3167 return 0;
3168}
3169
3170
3171/*
3172 DAC960_Finalize finalizes the DAC960 Driver.
3173*/
3174
3175static void DAC960_Remove(struct pci_dev *PCI_Device)
3176{
3177 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3178 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3179 if (Controller != NULL)
3180 DAC960_FinalizeController(Controller);
3181}
3182
3183
3184/*
3185 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3186 DAC960 V1 Firmware Controllers.
3187*/
3188
3189static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3190{
3191 DAC960_Controller_T *Controller = Command->Controller;
3192 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3193 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3194 Command->V1.ScatterGatherList;
3195 struct scatterlist *ScatterList = Command->V1.ScatterList;
3196
3197 DAC960_V1_ClearCommand(Command);
3198
3199 if (Command->SegmentCount == 1)
3200 {
3201 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3202 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3203 else
3204 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3205
3206 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3207 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3208 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3209 CommandMailbox->Type5.BusAddress =
3210 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3211 }
3212 else
3213 {
3214 int i;
3215
3216 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3217 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3218 else
3219 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3220
3221 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3222 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3223 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3224 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3225
3226 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3227
3228 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3229 ScatterGatherList->SegmentDataPointer =
3230 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3231 ScatterGatherList->SegmentByteCount =
3232 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3233 }
3234 }
3235 DAC960_QueueCommand(Command);
3236}
3237
3238
3239/*
3240 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3241 DAC960 V2 Firmware Controllers.
3242*/
3243
3244static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3245{
3246 DAC960_Controller_T *Controller = Command->Controller;
3247 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3248 struct scatterlist *ScatterList = Command->V2.ScatterList;
3249
3250 DAC960_V2_ClearCommand(Command);
3251
3252 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3253 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3254 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3255 CommandMailbox->SCSI_10.DataTransferSize =
3256 Command->BlockCount << DAC960_BlockSizeBits;
3257 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3258 CommandMailbox->SCSI_10.PhysicalDevice =
3259 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3260 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3261 CommandMailbox->SCSI_10.CDBLength = 10;
3262 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3263 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3264 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3265 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3266 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3267 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3268 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3269 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3270
3271 if (Command->SegmentCount == 1)
3272 {
3273 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3274 .ScatterGatherSegments[0]
3275 .SegmentDataPointer =
3276 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3277 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3278 .ScatterGatherSegments[0]
3279 .SegmentByteCount =
3280 CommandMailbox->SCSI_10.DataTransferSize;
3281 }
3282 else
3283 {
3284 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3285 int i;
3286
3287 if (Command->SegmentCount > 2)
3288 {
3289 ScatterGatherList = Command->V2.ScatterGatherList;
3290 CommandMailbox->SCSI_10.CommandControlBits
3291 .AdditionalScatterGatherListMemory = true;
3292 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3293 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3294 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3295 .ExtendedScatterGather.ScatterGatherList0Address =
3296 Command->V2.ScatterGatherListDMA;
3297 }
3298 else
3299 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3300 .ScatterGatherSegments;
3301
3302 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3303 ScatterGatherList->SegmentDataPointer =
3304 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3305 ScatterGatherList->SegmentByteCount =
3306 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3307 }
3308 }
3309 DAC960_QueueCommand(Command);
3310}
3311
3312
3313static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3314{
3315 struct request *Request;
3316 DAC960_Command_T *Command;
3317
3318 while(1) {
3319 Request = elv_next_request(req_q);
3320 if (!Request)
3321 return 1;
3322
3323 Command = DAC960_AllocateCommand(Controller);
3324 if (Command == NULL)
3325 return 0;
3326
3327 if (rq_data_dir(Request) == READ) {
3328 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3329 Command->CommandType = DAC960_ReadCommand;
3330 } else {
3331 Command->DmaDirection = PCI_DMA_TODEVICE;
3332 Command->CommandType = DAC960_WriteCommand;
3333 }
3334 Command->Completion = Request->waiting;
3335 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3336 Command->BlockNumber = Request->sector;
3337 Command->BlockCount = Request->nr_sectors;
3338 Command->Request = Request;
3339 blkdev_dequeue_request(Request);
3340 Command->SegmentCount = blk_rq_map_sg(req_q,
3341 Command->Request, Command->cmd_sglist);
3342 /* pci_map_sg MAY change the value of SegCount */
3343 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3344 Command->SegmentCount, Command->DmaDirection);
3345
3346 DAC960_QueueReadWriteCommand(Command);
3347 }
3348}
3349
3350/*
3351 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3352 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3353 this function should wait for a Command to become available if necessary.
3354 This function returns true if an I/O Request was queued and false otherwise.
3355*/
3356static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3357{
3358 int i;
3359
3360 if (!controller->ControllerInitialized)
3361 return;
3362
3363 /* Do this better later! */
3364 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3365 struct request_queue *req_q = controller->RequestQueue[i];
3366
3367 if (req_q == NULL)
3368 continue;
3369
3370 if (!DAC960_process_queue(controller, req_q)) {
3371 controller->req_q_index = i;
3372 return;
3373 }
3374 }
3375
3376 if (controller->req_q_index == 0)
3377 return;
3378
3379 for (i = 0; i < controller->req_q_index; i++) {
3380 struct request_queue *req_q = controller->RequestQueue[i];
3381
3382 if (req_q == NULL)
3383 continue;
3384
3385 if (!DAC960_process_queue(controller, req_q)) {
3386 controller->req_q_index = i;
3387 return;
3388 }
3389 }
3390}
3391
3392
3393/*
3394 DAC960_queue_partial_rw extracts one bio from the request already
3395 associated with argument command, and construct a new command block to retry I/O
3396 only on that bio. Queue that command to the controller.
3397
3398 This function re-uses a previously-allocated Command,
3399 there is no failure mode from trying to allocate a command.
3400*/
3401
3402static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3403{
3404 DAC960_Controller_T *Controller = Command->Controller;
3405 struct request *Request = Command->Request;
3406 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3407
3408 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3409 Command->CommandType = DAC960_ReadRetryCommand;
3410 else
3411 Command->CommandType = DAC960_WriteRetryCommand;
3412
3413 /*
3414 * We could be more efficient with these mapping requests
3415 * and map only the portions that we need. But since this
3416 * code should almost never be called, just go with a
3417 * simple coding.
3418 */
3419 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3420
3421 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3422 /*
3423 * Resubmitting the request sector at a time is really tedious.
3424 * But, this should almost never happen. So, we're willing to pay
3425 * this price so that in the end, as much of the transfer is completed
3426 * successfully as possible.
3427 */
3428 Command->SegmentCount = 1;
3429 Command->BlockNumber = Request->sector;
3430 Command->BlockCount = 1;
3431 DAC960_QueueReadWriteCommand(Command);
3432 return;
3433}
3434
3435/*
3436 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3437*/
3438
3439static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3440{
3441 DAC960_ProcessRequest(RequestQueue->queuedata);
3442}
3443
3444/*
3445 DAC960_ProcessCompletedBuffer performs completion processing for an
3446 individual Buffer.
3447*/
3448
3449static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3450 boolean SuccessfulIO)
3451{
3452 struct request *Request = Command->Request;
3453 int UpToDate;
3454
3455 UpToDate = 0;
3456 if (SuccessfulIO)
3457 UpToDate = 1;
3458
3459 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3460 Command->SegmentCount, Command->DmaDirection);
3461
3462 if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
Matt Mackall62287fb2006-03-07 21:55:47 -08003463 add_disk_randomness(Request->rq_disk);
Tejun Heo8ffdc652006-01-06 09:49:03 +01003464 end_that_request_last(Request, UpToDate);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003465
3466 if (Command->Completion) {
3467 complete(Command->Completion);
3468 Command->Completion = NULL;
3469 }
3470 return true;
3471 }
3472 return false;
3473}
3474
3475/*
3476 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3477 when an error occurs on a Read or Write operation.
3478*/
3479
3480static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3481{
3482 DAC960_Controller_T *Controller = Command->Controller;
3483 unsigned char *CommandName = "UNKNOWN";
3484 switch (Command->CommandType)
3485 {
3486 case DAC960_ReadCommand:
3487 case DAC960_ReadRetryCommand:
3488 CommandName = "READ";
3489 break;
3490 case DAC960_WriteCommand:
3491 case DAC960_WriteRetryCommand:
3492 CommandName = "WRITE";
3493 break;
3494 case DAC960_MonitoringCommand:
3495 case DAC960_ImmediateCommand:
3496 case DAC960_QueuedCommand:
3497 break;
3498 }
3499 switch (Command->V1.CommandStatus)
3500 {
3501 case DAC960_V1_IrrecoverableDataError:
3502 DAC960_Error("Irrecoverable Data Error on %s:\n",
3503 Controller, CommandName);
3504 break;
3505 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3506 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3507 Controller, CommandName);
3508 break;
3509 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3510 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3511 "on %s:\n", Controller, CommandName);
3512 break;
3513 case DAC960_V1_BadDataEncountered:
3514 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3515 break;
3516 default:
3517 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3518 Controller, Command->V1.CommandStatus, CommandName);
3519 break;
3520 }
3521 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3522 Controller, Controller->ControllerNumber,
3523 Command->LogicalDriveNumber, Command->BlockNumber,
3524 Command->BlockNumber + Command->BlockCount - 1);
3525}
3526
3527
3528/*
3529 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3530 for DAC960 V1 Firmware Controllers.
3531*/
3532
3533static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3534{
3535 DAC960_Controller_T *Controller = Command->Controller;
3536 DAC960_CommandType_T CommandType = Command->CommandType;
3537 DAC960_V1_CommandOpcode_T CommandOpcode =
3538 Command->V1.CommandMailbox.Common.CommandOpcode;
3539 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3540
3541 if (CommandType == DAC960_ReadCommand ||
3542 CommandType == DAC960_WriteCommand)
3543 {
3544
3545#ifdef FORCE_RETRY_DEBUG
3546 CommandStatus = DAC960_V1_IrrecoverableDataError;
3547#endif
3548
3549 if (CommandStatus == DAC960_V1_NormalCompletion) {
3550
3551 if (!DAC960_ProcessCompletedRequest(Command, true))
3552 BUG();
3553
3554 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3555 CommandStatus == DAC960_V1_BadDataEncountered)
3556 {
3557 /*
3558 * break the command down into pieces and resubmit each
3559 * piece, hoping that some of them will succeed.
3560 */
3561 DAC960_queue_partial_rw(Command);
3562 return;
3563 }
3564 else
3565 {
3566 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3567 DAC960_V1_ReadWriteError(Command);
3568
3569 if (!DAC960_ProcessCompletedRequest(Command, false))
3570 BUG();
3571 }
3572 }
3573 else if (CommandType == DAC960_ReadRetryCommand ||
3574 CommandType == DAC960_WriteRetryCommand)
3575 {
3576 boolean normal_completion;
3577#ifdef FORCE_RETRY_FAILURE_DEBUG
3578 static int retry_count = 1;
3579#endif
3580 /*
3581 Perform completion processing for the portion that was
3582 retried, and submit the next portion, if any.
3583 */
3584 normal_completion = true;
3585 if (CommandStatus != DAC960_V1_NormalCompletion) {
3586 normal_completion = false;
3587 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3588 DAC960_V1_ReadWriteError(Command);
3589 }
3590
3591#ifdef FORCE_RETRY_FAILURE_DEBUG
3592 if (!(++retry_count % 10000)) {
3593 printk("V1 error retry failure test\n");
3594 normal_completion = false;
3595 DAC960_V1_ReadWriteError(Command);
3596 }
3597#endif
3598
3599 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3600 DAC960_queue_partial_rw(Command);
3601 return;
3602 }
3603 }
3604
3605 else if (CommandType == DAC960_MonitoringCommand)
3606 {
3607 if (Controller->ShutdownMonitoringTimer)
3608 return;
3609 if (CommandOpcode == DAC960_V1_Enquiry)
3610 {
3611 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3612 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3613 unsigned int OldCriticalLogicalDriveCount =
3614 OldEnquiry->CriticalLogicalDriveCount;
3615 unsigned int NewCriticalLogicalDriveCount =
3616 NewEnquiry->CriticalLogicalDriveCount;
3617 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3618 {
3619 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3620 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3621 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3622 "Now Exists\n", Controller,
3623 LogicalDriveNumber,
3624 Controller->ControllerNumber,
3625 LogicalDriveNumber);
3626 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3627 DAC960_ComputeGenericDiskInfo(Controller);
3628 }
3629 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3630 {
3631 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3632 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3633 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3634 "No Longer Exists\n", Controller,
3635 LogicalDriveNumber,
3636 Controller->ControllerNumber,
3637 LogicalDriveNumber);
3638 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3639 DAC960_ComputeGenericDiskInfo(Controller);
3640 }
3641 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3642 OldEnquiry->StatusFlags.DeferredWriteError)
3643 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3644 (NewEnquiry->StatusFlags.DeferredWriteError
3645 ? "TRUE" : "FALSE"));
3646 if ((NewCriticalLogicalDriveCount > 0 ||
3647 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3648 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3649 NewEnquiry->OfflineLogicalDriveCount !=
3650 OldEnquiry->OfflineLogicalDriveCount) ||
3651 (NewEnquiry->DeadDriveCount > 0 ||
3652 NewEnquiry->DeadDriveCount !=
3653 OldEnquiry->DeadDriveCount) ||
3654 (NewEnquiry->EventLogSequenceNumber !=
3655 OldEnquiry->EventLogSequenceNumber) ||
3656 Controller->MonitoringTimerCount == 0 ||
3657 (jiffies - Controller->SecondaryMonitoringTime
3658 >= DAC960_SecondaryMonitoringInterval))
3659 {
3660 Controller->V1.NeedLogicalDriveInformation = true;
3661 Controller->V1.NewEventLogSequenceNumber =
3662 NewEnquiry->EventLogSequenceNumber;
3663 Controller->V1.NeedErrorTableInformation = true;
3664 Controller->V1.NeedDeviceStateInformation = true;
3665 Controller->V1.StartDeviceStateScan = true;
3666 Controller->V1.NeedBackgroundInitializationStatus =
3667 Controller->V1.BackgroundInitializationStatusSupported;
3668 Controller->SecondaryMonitoringTime = jiffies;
3669 }
3670 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3671 NewEnquiry->RebuildFlag
3672 == DAC960_V1_BackgroundRebuildInProgress ||
3673 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3674 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3675 {
3676 Controller->V1.NeedRebuildProgress = true;
3677 Controller->V1.RebuildProgressFirst =
3678 (NewEnquiry->CriticalLogicalDriveCount <
3679 OldEnquiry->CriticalLogicalDriveCount);
3680 }
3681 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3682 switch (NewEnquiry->RebuildFlag)
3683 {
3684 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3685 DAC960_Progress("Consistency Check Completed Successfully\n",
3686 Controller);
3687 break;
3688 case DAC960_V1_StandbyRebuildInProgress:
3689 case DAC960_V1_BackgroundRebuildInProgress:
3690 break;
3691 case DAC960_V1_BackgroundCheckInProgress:
3692 Controller->V1.NeedConsistencyCheckProgress = true;
3693 break;
3694 case DAC960_V1_StandbyRebuildCompletedWithError:
3695 DAC960_Progress("Consistency Check Completed with Error\n",
3696 Controller);
3697 break;
3698 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3699 DAC960_Progress("Consistency Check Failed - "
3700 "Physical Device Failed\n", Controller);
3701 break;
3702 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3703 DAC960_Progress("Consistency Check Failed - "
3704 "Logical Drive Failed\n", Controller);
3705 break;
3706 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3707 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3708 Controller);
3709 break;
3710 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3711 DAC960_Progress("Consistency Check Successfully Terminated\n",
3712 Controller);
3713 break;
3714 }
3715 else if (NewEnquiry->RebuildFlag
3716 == DAC960_V1_BackgroundCheckInProgress)
3717 Controller->V1.NeedConsistencyCheckProgress = true;
3718 Controller->MonitoringAlertMode =
3719 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3720 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3721 NewEnquiry->DeadDriveCount > 0);
3722 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3723 {
3724 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3725 Controller->V1.RebuildFlagPending = true;
3726 }
3727 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3728 sizeof(DAC960_V1_Enquiry_T));
3729 }
3730 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3731 {
3732 static char
3733 *DAC960_EventMessages[] =
3734 { "killed because write recovery failed",
3735 "killed because of SCSI bus reset failure",
3736 "killed because of double check condition",
3737 "killed because it was removed",
3738 "killed because of gross error on SCSI chip",
3739 "killed because of bad tag returned from drive",
3740 "killed because of timeout on SCSI command",
3741 "killed because of reset SCSI command issued from system",
3742 "killed because busy or parity error count exceeded limit",
3743 "killed because of 'kill drive' command from system",
3744 "killed because of selection timeout",
3745 "killed due to SCSI phase sequence error",
3746 "killed due to unknown status" };
3747 DAC960_V1_EventLogEntry_T *EventLogEntry =
3748 Controller->V1.EventLogEntry;
3749 if (EventLogEntry->SequenceNumber ==
3750 Controller->V1.OldEventLogSequenceNumber)
3751 {
3752 unsigned char SenseKey = EventLogEntry->SenseKey;
3753 unsigned char AdditionalSenseCode =
3754 EventLogEntry->AdditionalSenseCode;
3755 unsigned char AdditionalSenseCodeQualifier =
3756 EventLogEntry->AdditionalSenseCodeQualifier;
3757 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3758 AdditionalSenseCode == 0x80 &&
3759 AdditionalSenseCodeQualifier <
Tobias Klauser945f3902006-01-08 01:05:11 -08003760 ARRAY_SIZE(DAC960_EventMessages))
Linus Torvalds1da177e2005-04-16 15:20:36 -07003761 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3762 EventLogEntry->Channel,
3763 EventLogEntry->TargetID,
3764 DAC960_EventMessages[
3765 AdditionalSenseCodeQualifier]);
3766 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3767 AdditionalSenseCode == 0x29)
3768 {
3769 if (Controller->MonitoringTimerCount > 0)
3770 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3771 [EventLogEntry->TargetID]++;
3772 }
3773 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3774 (SenseKey == DAC960_SenseKey_NotReady &&
3775 AdditionalSenseCode == 0x04 &&
3776 (AdditionalSenseCodeQualifier == 0x01 ||
3777 AdditionalSenseCodeQualifier == 0x02))))
3778 {
3779 DAC960_Critical("Physical Device %d:%d Error Log: "
3780 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3781 Controller,
3782 EventLogEntry->Channel,
3783 EventLogEntry->TargetID,
3784 SenseKey,
3785 AdditionalSenseCode,
3786 AdditionalSenseCodeQualifier);
3787 DAC960_Critical("Physical Device %d:%d Error Log: "
3788 "Information = %02X%02X%02X%02X "
3789 "%02X%02X%02X%02X\n",
3790 Controller,
3791 EventLogEntry->Channel,
3792 EventLogEntry->TargetID,
3793 EventLogEntry->Information[0],
3794 EventLogEntry->Information[1],
3795 EventLogEntry->Information[2],
3796 EventLogEntry->Information[3],
3797 EventLogEntry->CommandSpecificInformation[0],
3798 EventLogEntry->CommandSpecificInformation[1],
3799 EventLogEntry->CommandSpecificInformation[2],
3800 EventLogEntry->CommandSpecificInformation[3]);
3801 }
3802 }
3803 Controller->V1.OldEventLogSequenceNumber++;
3804 }
3805 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3806 {
3807 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3808 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3809 int Channel, TargetID;
3810 for (Channel = 0; Channel < Controller->Channels; Channel++)
3811 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3812 {
3813 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3814 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3815 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3816 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3817 if ((NewErrorEntry->ParityErrorCount !=
3818 OldErrorEntry->ParityErrorCount) ||
3819 (NewErrorEntry->SoftErrorCount !=
3820 OldErrorEntry->SoftErrorCount) ||
3821 (NewErrorEntry->HardErrorCount !=
3822 OldErrorEntry->HardErrorCount) ||
3823 (NewErrorEntry->MiscErrorCount !=
3824 OldErrorEntry->MiscErrorCount))
3825 DAC960_Critical("Physical Device %d:%d Errors: "
3826 "Parity = %d, Soft = %d, "
3827 "Hard = %d, Misc = %d\n",
3828 Controller, Channel, TargetID,
3829 NewErrorEntry->ParityErrorCount,
3830 NewErrorEntry->SoftErrorCount,
3831 NewErrorEntry->HardErrorCount,
3832 NewErrorEntry->MiscErrorCount);
3833 }
3834 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3835 sizeof(DAC960_V1_ErrorTable_T));
3836 }
3837 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3838 {
3839 DAC960_V1_DeviceState_T *OldDeviceState =
3840 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3841 [Controller->V1.DeviceStateTargetID];
3842 DAC960_V1_DeviceState_T *NewDeviceState =
3843 Controller->V1.NewDeviceState;
3844 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3845 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3846 Controller->V1.DeviceStateChannel,
3847 Controller->V1.DeviceStateTargetID,
3848 (NewDeviceState->DeviceState
3849 == DAC960_V1_Device_Dead
3850 ? "DEAD"
3851 : NewDeviceState->DeviceState
3852 == DAC960_V1_Device_WriteOnly
3853 ? "WRITE-ONLY"
3854 : NewDeviceState->DeviceState
3855 == DAC960_V1_Device_Online
3856 ? "ONLINE" : "STANDBY"));
3857 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3858 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3859 {
3860 Controller->V1.NeedDeviceInquiryInformation = true;
3861 Controller->V1.NeedDeviceSerialNumberInformation = true;
3862 Controller->V1.DeviceResetCount
3863 [Controller->V1.DeviceStateChannel]
3864 [Controller->V1.DeviceStateTargetID] = 0;
3865 }
3866 memcpy(OldDeviceState, NewDeviceState,
3867 sizeof(DAC960_V1_DeviceState_T));
3868 }
3869 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3870 {
3871 int LogicalDriveNumber;
3872 for (LogicalDriveNumber = 0;
3873 LogicalDriveNumber < Controller->LogicalDriveCount;
3874 LogicalDriveNumber++)
3875 {
3876 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3877 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3878 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3879 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3880 if (NewLogicalDriveInformation->LogicalDriveState !=
3881 OldLogicalDriveInformation->LogicalDriveState)
3882 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3883 "is now %s\n", Controller,
3884 LogicalDriveNumber,
3885 Controller->ControllerNumber,
3886 LogicalDriveNumber,
3887 (NewLogicalDriveInformation->LogicalDriveState
3888 == DAC960_V1_LogicalDrive_Online
3889 ? "ONLINE"
3890 : NewLogicalDriveInformation->LogicalDriveState
3891 == DAC960_V1_LogicalDrive_Critical
3892 ? "CRITICAL" : "OFFLINE"));
3893 if (NewLogicalDriveInformation->WriteBack !=
3894 OldLogicalDriveInformation->WriteBack)
3895 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3896 "is now %s\n", Controller,
3897 LogicalDriveNumber,
3898 Controller->ControllerNumber,
3899 LogicalDriveNumber,
3900 (NewLogicalDriveInformation->WriteBack
3901 ? "WRITE BACK" : "WRITE THRU"));
3902 }
3903 memcpy(&Controller->V1.LogicalDriveInformation,
3904 Controller->V1.NewLogicalDriveInformation,
3905 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3906 }
3907 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3908 {
3909 unsigned int LogicalDriveNumber =
3910 Controller->V1.RebuildProgress->LogicalDriveNumber;
3911 unsigned int LogicalDriveSize =
3912 Controller->V1.RebuildProgress->LogicalDriveSize;
3913 unsigned int BlocksCompleted =
3914 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3915 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3916 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3917 CommandStatus = DAC960_V1_RebuildSuccessful;
3918 switch (CommandStatus)
3919 {
3920 case DAC960_V1_NormalCompletion:
3921 Controller->EphemeralProgressMessage = true;
3922 DAC960_Progress("Rebuild in Progress: "
3923 "Logical Drive %d (/dev/rd/c%dd%d) "
3924 "%d%% completed\n",
3925 Controller, LogicalDriveNumber,
3926 Controller->ControllerNumber,
3927 LogicalDriveNumber,
3928 (100 * (BlocksCompleted >> 7))
3929 / (LogicalDriveSize >> 7));
3930 Controller->EphemeralProgressMessage = false;
3931 break;
3932 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3933 DAC960_Progress("Rebuild Failed due to "
3934 "Logical Drive Failure\n", Controller);
3935 break;
3936 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3937 DAC960_Progress("Rebuild Failed due to "
3938 "Bad Blocks on Other Drives\n", Controller);
3939 break;
3940 case DAC960_V1_RebuildFailed_NewDriveFailed:
3941 DAC960_Progress("Rebuild Failed due to "
3942 "Failure of Drive Being Rebuilt\n", Controller);
3943 break;
3944 case DAC960_V1_NoRebuildOrCheckInProgress:
3945 break;
3946 case DAC960_V1_RebuildSuccessful:
3947 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3948 break;
3949 case DAC960_V1_RebuildSuccessfullyTerminated:
3950 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3951 break;
3952 }
3953 Controller->V1.LastRebuildStatus = CommandStatus;
3954 if (CommandType != DAC960_MonitoringCommand &&
3955 Controller->V1.RebuildStatusPending)
3956 {
3957 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3958 Controller->V1.RebuildStatusPending = false;
3959 }
3960 else if (CommandType == DAC960_MonitoringCommand &&
3961 CommandStatus != DAC960_V1_NormalCompletion &&
3962 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3963 {
3964 Controller->V1.PendingRebuildStatus = CommandStatus;
3965 Controller->V1.RebuildStatusPending = true;
3966 }
3967 }
3968 else if (CommandOpcode == DAC960_V1_RebuildStat)
3969 {
3970 unsigned int LogicalDriveNumber =
3971 Controller->V1.RebuildProgress->LogicalDriveNumber;
3972 unsigned int LogicalDriveSize =
3973 Controller->V1.RebuildProgress->LogicalDriveSize;
3974 unsigned int BlocksCompleted =
3975 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3976 if (CommandStatus == DAC960_V1_NormalCompletion)
3977 {
3978 Controller->EphemeralProgressMessage = true;
3979 DAC960_Progress("Consistency Check in Progress: "
3980 "Logical Drive %d (/dev/rd/c%dd%d) "
3981 "%d%% completed\n",
3982 Controller, LogicalDriveNumber,
3983 Controller->ControllerNumber,
3984 LogicalDriveNumber,
3985 (100 * (BlocksCompleted >> 7))
3986 / (LogicalDriveSize >> 7));
3987 Controller->EphemeralProgressMessage = false;
3988 }
3989 }
3990 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3991 {
3992 unsigned int LogicalDriveNumber =
3993 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3994 unsigned int LogicalDriveSize =
3995 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
3996 unsigned int BlocksCompleted =
3997 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
3998 switch (CommandStatus)
3999 {
4000 case DAC960_V1_NormalCompletion:
4001 switch (Controller->V1.BackgroundInitializationStatus->Status)
4002 {
4003 case DAC960_V1_BackgroundInitializationInvalid:
4004 break;
4005 case DAC960_V1_BackgroundInitializationStarted:
4006 DAC960_Progress("Background Initialization Started\n",
4007 Controller);
4008 break;
4009 case DAC960_V1_BackgroundInitializationInProgress:
4010 if (BlocksCompleted ==
4011 Controller->V1.LastBackgroundInitializationStatus.
4012 BlocksCompleted &&
4013 LogicalDriveNumber ==
4014 Controller->V1.LastBackgroundInitializationStatus.
4015 LogicalDriveNumber)
4016 break;
4017 Controller->EphemeralProgressMessage = true;
4018 DAC960_Progress("Background Initialization in Progress: "
4019 "Logical Drive %d (/dev/rd/c%dd%d) "
4020 "%d%% completed\n",
4021 Controller, LogicalDriveNumber,
4022 Controller->ControllerNumber,
4023 LogicalDriveNumber,
4024 (100 * (BlocksCompleted >> 7))
4025 / (LogicalDriveSize >> 7));
4026 Controller->EphemeralProgressMessage = false;
4027 break;
4028 case DAC960_V1_BackgroundInitializationSuspended:
4029 DAC960_Progress("Background Initialization Suspended\n",
4030 Controller);
4031 break;
4032 case DAC960_V1_BackgroundInitializationCancelled:
4033 DAC960_Progress("Background Initialization Cancelled\n",
4034 Controller);
4035 break;
4036 }
4037 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4038 Controller->V1.BackgroundInitializationStatus,
4039 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4040 break;
4041 case DAC960_V1_BackgroundInitSuccessful:
4042 if (Controller->V1.BackgroundInitializationStatus->Status ==
4043 DAC960_V1_BackgroundInitializationInProgress)
4044 DAC960_Progress("Background Initialization "
4045 "Completed Successfully\n", Controller);
4046 Controller->V1.BackgroundInitializationStatus->Status =
4047 DAC960_V1_BackgroundInitializationInvalid;
4048 break;
4049 case DAC960_V1_BackgroundInitAborted:
4050 if (Controller->V1.BackgroundInitializationStatus->Status ==
4051 DAC960_V1_BackgroundInitializationInProgress)
4052 DAC960_Progress("Background Initialization Aborted\n",
4053 Controller);
4054 Controller->V1.BackgroundInitializationStatus->Status =
4055 DAC960_V1_BackgroundInitializationInvalid;
4056 break;
4057 case DAC960_V1_NoBackgroundInitInProgress:
4058 break;
4059 }
4060 }
4061 else if (CommandOpcode == DAC960_V1_DCDB)
4062 {
4063 /*
4064 This is a bit ugly.
4065
4066 The InquiryStandardData and
4067 the InquiryUntitSerialNumber information
4068 retrieval operations BOTH use the DAC960_V1_DCDB
4069 commands. the test above can't distinguish between
4070 these two cases.
4071
4072 Instead, we rely on the order of code later in this
4073 function to ensure that DeviceInquiryInformation commands
4074 are submitted before DeviceSerialNumber commands.
4075 */
4076 if (Controller->V1.NeedDeviceInquiryInformation)
4077 {
4078 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4079 &Controller->V1.InquiryStandardData
4080 [Controller->V1.DeviceStateChannel]
4081 [Controller->V1.DeviceStateTargetID];
4082 if (CommandStatus != DAC960_V1_NormalCompletion)
4083 {
4084 memset(InquiryStandardData, 0,
4085 sizeof(DAC960_SCSI_Inquiry_T));
4086 InquiryStandardData->PeripheralDeviceType = 0x1F;
4087 }
4088 else
4089 memcpy(InquiryStandardData,
4090 Controller->V1.NewInquiryStandardData,
4091 sizeof(DAC960_SCSI_Inquiry_T));
4092 Controller->V1.NeedDeviceInquiryInformation = false;
4093 }
4094 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4095 {
4096 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4097 &Controller->V1.InquiryUnitSerialNumber
4098 [Controller->V1.DeviceStateChannel]
4099 [Controller->V1.DeviceStateTargetID];
4100 if (CommandStatus != DAC960_V1_NormalCompletion)
4101 {
4102 memset(InquiryUnitSerialNumber, 0,
4103 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4104 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4105 }
4106 else
4107 memcpy(InquiryUnitSerialNumber,
4108 Controller->V1.NewInquiryUnitSerialNumber,
4109 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4110 Controller->V1.NeedDeviceSerialNumberInformation = false;
4111 }
4112 }
4113 /*
4114 Begin submitting new monitoring commands.
4115 */
4116 if (Controller->V1.NewEventLogSequenceNumber
4117 - Controller->V1.OldEventLogSequenceNumber > 0)
4118 {
4119 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4120 DAC960_V1_PerformEventLogOperation;
4121 Command->V1.CommandMailbox.Type3E.OperationType =
4122 DAC960_V1_GetEventLogEntry;
4123 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4124 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4125 Controller->V1.OldEventLogSequenceNumber;
4126 Command->V1.CommandMailbox.Type3E.BusAddress =
4127 Controller->V1.EventLogEntryDMA;
4128 DAC960_QueueCommand(Command);
4129 return;
4130 }
4131 if (Controller->V1.NeedErrorTableInformation)
4132 {
4133 Controller->V1.NeedErrorTableInformation = false;
4134 Command->V1.CommandMailbox.Type3.CommandOpcode =
4135 DAC960_V1_GetErrorTable;
4136 Command->V1.CommandMailbox.Type3.BusAddress =
4137 Controller->V1.NewErrorTableDMA;
4138 DAC960_QueueCommand(Command);
4139 return;
4140 }
4141 if (Controller->V1.NeedRebuildProgress &&
4142 Controller->V1.RebuildProgressFirst)
4143 {
4144 Controller->V1.NeedRebuildProgress = false;
4145 Command->V1.CommandMailbox.Type3.CommandOpcode =
4146 DAC960_V1_GetRebuildProgress;
4147 Command->V1.CommandMailbox.Type3.BusAddress =
4148 Controller->V1.RebuildProgressDMA;
4149 DAC960_QueueCommand(Command);
4150 return;
4151 }
4152 if (Controller->V1.NeedDeviceStateInformation)
4153 {
4154 if (Controller->V1.NeedDeviceInquiryInformation)
4155 {
4156 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4157 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4158
4159 dma_addr_t NewInquiryStandardDataDMA =
4160 Controller->V1.NewInquiryStandardDataDMA;
4161
4162 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4163 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4164 DCDB->Channel = Controller->V1.DeviceStateChannel;
4165 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4166 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4167 DCDB->EarlyStatus = false;
4168 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4169 DCDB->NoAutomaticRequestSense = false;
4170 DCDB->DisconnectPermitted = true;
4171 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4172 DCDB->BusAddress = NewInquiryStandardDataDMA;
4173 DCDB->CDBLength = 6;
4174 DCDB->TransferLengthHigh4 = 0;
4175 DCDB->SenseLength = sizeof(DCDB->SenseData);
4176 DCDB->CDB[0] = 0x12; /* INQUIRY */
4177 DCDB->CDB[1] = 0; /* EVPD = 0 */
4178 DCDB->CDB[2] = 0; /* Page Code */
4179 DCDB->CDB[3] = 0; /* Reserved */
4180 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4181 DCDB->CDB[5] = 0; /* Control */
4182 DAC960_QueueCommand(Command);
4183 return;
4184 }
4185 if (Controller->V1.NeedDeviceSerialNumberInformation)
4186 {
4187 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4188 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4189 dma_addr_t NewInquiryUnitSerialNumberDMA =
4190 Controller->V1.NewInquiryUnitSerialNumberDMA;
4191
4192 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4193 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4194 DCDB->Channel = Controller->V1.DeviceStateChannel;
4195 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4196 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4197 DCDB->EarlyStatus = false;
4198 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4199 DCDB->NoAutomaticRequestSense = false;
4200 DCDB->DisconnectPermitted = true;
4201 DCDB->TransferLength =
4202 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4203 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4204 DCDB->CDBLength = 6;
4205 DCDB->TransferLengthHigh4 = 0;
4206 DCDB->SenseLength = sizeof(DCDB->SenseData);
4207 DCDB->CDB[0] = 0x12; /* INQUIRY */
4208 DCDB->CDB[1] = 1; /* EVPD = 1 */
4209 DCDB->CDB[2] = 0x80; /* Page Code */
4210 DCDB->CDB[3] = 0; /* Reserved */
4211 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4212 DCDB->CDB[5] = 0; /* Control */
4213 DAC960_QueueCommand(Command);
4214 return;
4215 }
4216 if (Controller->V1.StartDeviceStateScan)
4217 {
4218 Controller->V1.DeviceStateChannel = 0;
4219 Controller->V1.DeviceStateTargetID = 0;
4220 Controller->V1.StartDeviceStateScan = false;
4221 }
4222 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4223 {
4224 Controller->V1.DeviceStateChannel++;
4225 Controller->V1.DeviceStateTargetID = 0;
4226 }
4227 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4228 {
4229 Controller->V1.NewDeviceState->DeviceState =
4230 DAC960_V1_Device_Dead;
4231 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4232 DAC960_V1_GetDeviceState;
4233 Command->V1.CommandMailbox.Type3D.Channel =
4234 Controller->V1.DeviceStateChannel;
4235 Command->V1.CommandMailbox.Type3D.TargetID =
4236 Controller->V1.DeviceStateTargetID;
4237 Command->V1.CommandMailbox.Type3D.BusAddress =
4238 Controller->V1.NewDeviceStateDMA;
4239 DAC960_QueueCommand(Command);
4240 return;
4241 }
4242 Controller->V1.NeedDeviceStateInformation = false;
4243 }
4244 if (Controller->V1.NeedLogicalDriveInformation)
4245 {
4246 Controller->V1.NeedLogicalDriveInformation = false;
4247 Command->V1.CommandMailbox.Type3.CommandOpcode =
4248 DAC960_V1_GetLogicalDriveInformation;
4249 Command->V1.CommandMailbox.Type3.BusAddress =
4250 Controller->V1.NewLogicalDriveInformationDMA;
4251 DAC960_QueueCommand(Command);
4252 return;
4253 }
4254 if (Controller->V1.NeedRebuildProgress)
4255 {
4256 Controller->V1.NeedRebuildProgress = false;
4257 Command->V1.CommandMailbox.Type3.CommandOpcode =
4258 DAC960_V1_GetRebuildProgress;
4259 Command->V1.CommandMailbox.Type3.BusAddress =
4260 Controller->V1.RebuildProgressDMA;
4261 DAC960_QueueCommand(Command);
4262 return;
4263 }
4264 if (Controller->V1.NeedConsistencyCheckProgress)
4265 {
4266 Controller->V1.NeedConsistencyCheckProgress = false;
4267 Command->V1.CommandMailbox.Type3.CommandOpcode =
4268 DAC960_V1_RebuildStat;
4269 Command->V1.CommandMailbox.Type3.BusAddress =
4270 Controller->V1.RebuildProgressDMA;
4271 DAC960_QueueCommand(Command);
4272 return;
4273 }
4274 if (Controller->V1.NeedBackgroundInitializationStatus)
4275 {
4276 Controller->V1.NeedBackgroundInitializationStatus = false;
4277 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4278 DAC960_V1_BackgroundInitializationControl;
4279 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4280 Command->V1.CommandMailbox.Type3B.BusAddress =
4281 Controller->V1.BackgroundInitializationStatusDMA;
4282 DAC960_QueueCommand(Command);
4283 return;
4284 }
4285 Controller->MonitoringTimerCount++;
4286 Controller->MonitoringTimer.expires =
4287 jiffies + DAC960_MonitoringTimerInterval;
4288 add_timer(&Controller->MonitoringTimer);
4289 }
4290 if (CommandType == DAC960_ImmediateCommand)
4291 {
4292 complete(Command->Completion);
4293 Command->Completion = NULL;
4294 return;
4295 }
4296 if (CommandType == DAC960_QueuedCommand)
4297 {
4298 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4299 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4300 Command->V1.KernelCommand = NULL;
4301 if (CommandOpcode == DAC960_V1_DCDB)
4302 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4303 [KernelCommand->DCDB->TargetID] =
4304 false;
4305 DAC960_DeallocateCommand(Command);
4306 KernelCommand->CompletionFunction(KernelCommand);
4307 return;
4308 }
4309 /*
4310 Queue a Status Monitoring Command to the Controller using the just
4311 completed Command if one was deferred previously due to lack of a
4312 free Command when the Monitoring Timer Function was called.
4313 */
4314 if (Controller->MonitoringCommandDeferred)
4315 {
4316 Controller->MonitoringCommandDeferred = false;
4317 DAC960_V1_QueueMonitoringCommand(Command);
4318 return;
4319 }
4320 /*
4321 Deallocate the Command.
4322 */
4323 DAC960_DeallocateCommand(Command);
4324 /*
4325 Wake up any processes waiting on a free Command.
4326 */
4327 wake_up(&Controller->CommandWaitQueue);
4328}
4329
4330
4331/*
4332 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4333 when an error occurs on a Read or Write operation.
4334*/
4335
4336static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4337{
4338 DAC960_Controller_T *Controller = Command->Controller;
4339 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4340 "NOT READY", "MEDIUM ERROR",
4341 "HARDWARE ERROR", "ILLEGAL REQUEST",
4342 "UNIT ATTENTION", "DATA PROTECT",
4343 "BLANK CHECK", "VENDOR-SPECIFIC",
4344 "COPY ABORTED", "ABORTED COMMAND",
4345 "EQUAL", "VOLUME OVERFLOW",
4346 "MISCOMPARE", "RESERVED" };
4347 unsigned char *CommandName = "UNKNOWN";
4348 switch (Command->CommandType)
4349 {
4350 case DAC960_ReadCommand:
4351 case DAC960_ReadRetryCommand:
4352 CommandName = "READ";
4353 break;
4354 case DAC960_WriteCommand:
4355 case DAC960_WriteRetryCommand:
4356 CommandName = "WRITE";
4357 break;
4358 case DAC960_MonitoringCommand:
4359 case DAC960_ImmediateCommand:
4360 case DAC960_QueuedCommand:
4361 break;
4362 }
4363 DAC960_Error("Error Condition %s on %s:\n", Controller,
4364 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4365 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4366 Controller, Controller->ControllerNumber,
4367 Command->LogicalDriveNumber, Command->BlockNumber,
4368 Command->BlockNumber + Command->BlockCount - 1);
4369}
4370
4371
4372/*
4373 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4374 occurs.
4375*/
4376
4377static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4378 DAC960_V2_Event_T *Event)
4379{
4380 DAC960_SCSI_RequestSense_T *RequestSense =
4381 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4382 unsigned char MessageBuffer[DAC960_LineBufferSize];
4383 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4384 { /* Physical Device Events (0x0000 - 0x007F) */
4385 { 0x0001, "P Online" },
4386 { 0x0002, "P Standby" },
4387 { 0x0005, "P Automatic Rebuild Started" },
4388 { 0x0006, "P Manual Rebuild Started" },
4389 { 0x0007, "P Rebuild Completed" },
4390 { 0x0008, "P Rebuild Cancelled" },
4391 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4392 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4393 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4394 { 0x000C, "S Offline" },
4395 { 0x000D, "P Found" },
4396 { 0x000E, "P Removed" },
4397 { 0x000F, "P Unconfigured" },
4398 { 0x0010, "P Expand Capacity Started" },
4399 { 0x0011, "P Expand Capacity Completed" },
4400 { 0x0012, "P Expand Capacity Failed" },
4401 { 0x0013, "P Command Timed Out" },
4402 { 0x0014, "P Command Aborted" },
4403 { 0x0015, "P Command Retried" },
4404 { 0x0016, "P Parity Error" },
4405 { 0x0017, "P Soft Error" },
4406 { 0x0018, "P Miscellaneous Error" },
4407 { 0x0019, "P Reset" },
4408 { 0x001A, "P Active Spare Found" },
4409 { 0x001B, "P Warm Spare Found" },
4410 { 0x001C, "S Sense Data Received" },
4411 { 0x001D, "P Initialization Started" },
4412 { 0x001E, "P Initialization Completed" },
4413 { 0x001F, "P Initialization Failed" },
4414 { 0x0020, "P Initialization Cancelled" },
4415 { 0x0021, "P Failed because Write Recovery Failed" },
4416 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4417 { 0x0023, "P Failed because of Double Check Condition" },
4418 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4419 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4420 { 0x0026, "P Failed because of Bad Tag from Device" },
4421 { 0x0027, "P Failed because of Command Timeout" },
4422 { 0x0028, "P Failed because of System Reset" },
4423 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4424 { 0x002A, "P Failed because Host Set Device to Failed State" },
4425 { 0x002B, "P Failed because of Selection Timeout" },
4426 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4427 { 0x002D, "P Failed because Device Returned Unknown Status" },
4428 { 0x002E, "P Failed because Device Not Ready" },
4429 { 0x002F, "P Failed because Device Not Found at Startup" },
4430 { 0x0030, "P Failed because COD Write Operation Failed" },
4431 { 0x0031, "P Failed because BDT Write Operation Failed" },
4432 { 0x0039, "P Missing at Startup" },
4433 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4434 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4435 { 0x003D, "P Standby Rebuild Started" },
4436 /* Logical Device Events (0x0080 - 0x00FF) */
4437 { 0x0080, "M Consistency Check Started" },
4438 { 0x0081, "M Consistency Check Completed" },
4439 { 0x0082, "M Consistency Check Cancelled" },
4440 { 0x0083, "M Consistency Check Completed With Errors" },
4441 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4442 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4443 { 0x0086, "L Offline" },
4444 { 0x0087, "L Critical" },
4445 { 0x0088, "L Online" },
4446 { 0x0089, "M Automatic Rebuild Started" },
4447 { 0x008A, "M Manual Rebuild Started" },
4448 { 0x008B, "M Rebuild Completed" },
4449 { 0x008C, "M Rebuild Cancelled" },
4450 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4451 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4452 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4453 { 0x0090, "M Initialization Started" },
4454 { 0x0091, "M Initialization Completed" },
4455 { 0x0092, "M Initialization Cancelled" },
4456 { 0x0093, "M Initialization Failed" },
4457 { 0x0094, "L Found" },
4458 { 0x0095, "L Deleted" },
4459 { 0x0096, "M Expand Capacity Started" },
4460 { 0x0097, "M Expand Capacity Completed" },
4461 { 0x0098, "M Expand Capacity Failed" },
4462 { 0x0099, "L Bad Block Found" },
4463 { 0x009A, "L Size Changed" },
4464 { 0x009B, "L Type Changed" },
4465 { 0x009C, "L Bad Data Block Found" },
4466 { 0x009E, "L Read of Data Block in BDT" },
4467 { 0x009F, "L Write Back Data for Disk Block Lost" },
4468 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4469 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4470 { 0x00A2, "L Standby Rebuild Started" },
4471 /* Fault Management Events (0x0100 - 0x017F) */
4472 { 0x0140, "E Fan %d Failed" },
4473 { 0x0141, "E Fan %d OK" },
4474 { 0x0142, "E Fan %d Not Present" },
4475 { 0x0143, "E Power Supply %d Failed" },
4476 { 0x0144, "E Power Supply %d OK" },
4477 { 0x0145, "E Power Supply %d Not Present" },
4478 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4479 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4480 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4481 { 0x0149, "E Temperature Sensor %d Not Present" },
4482 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4483 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4484 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4485 /* Controller Events (0x0180 - 0x01FF) */
4486 { 0x0181, "C Cache Write Back Error" },
4487 { 0x0188, "C Battery Backup Unit Found" },
4488 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4489 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4490 { 0x0193, "C Installation Aborted" },
4491 { 0x0195, "C Battery Backup Unit Physically Removed" },
4492 { 0x0196, "C Memory Error During Warm Boot" },
4493 { 0x019E, "C Memory Soft ECC Error Corrected" },
4494 { 0x019F, "C Memory Hard ECC Error Corrected" },
4495 { 0x01A2, "C Battery Backup Unit Failed" },
4496 { 0x01AB, "C Mirror Race Recovery Failed" },
4497 { 0x01AC, "C Mirror Race on Critical Drive" },
4498 /* Controller Internal Processor Events */
4499 { 0x0380, "C Internal Controller Hung" },
4500 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4501 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4502 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4503 { 0, "" } };
4504 int EventListIndex = 0, EventCode;
4505 unsigned char EventType, *EventMessage;
4506 if (Event->EventCode == 0x1C &&
4507 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4508 (RequestSense->AdditionalSenseCode == 0x80 ||
4509 RequestSense->AdditionalSenseCode == 0x81))
4510 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4511 RequestSense->AdditionalSenseCodeQualifier;
4512 while (true)
4513 {
4514 EventCode = EventList[EventListIndex].EventCode;
4515 if (EventCode == Event->EventCode || EventCode == 0) break;
4516 EventListIndex++;
4517 }
4518 EventType = EventList[EventListIndex].EventMessage[0];
4519 EventMessage = &EventList[EventListIndex].EventMessage[2];
4520 if (EventCode == 0)
4521 {
4522 DAC960_Critical("Unknown Controller Event Code %04X\n",
4523 Controller, Event->EventCode);
4524 return;
4525 }
4526 switch (EventType)
4527 {
4528 case 'P':
4529 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4530 Event->Channel, Event->TargetID, EventMessage);
4531 break;
4532 case 'L':
4533 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4534 Event->LogicalUnit, Controller->ControllerNumber,
4535 Event->LogicalUnit, EventMessage);
4536 break;
4537 case 'M':
4538 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4539 Event->LogicalUnit, Controller->ControllerNumber,
4540 Event->LogicalUnit, EventMessage);
4541 break;
4542 case 'S':
4543 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4544 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4545 RequestSense->AdditionalSenseCode == 0x04 &&
4546 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4547 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4548 break;
4549 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4550 Event->Channel, Event->TargetID, EventMessage);
4551 DAC960_Critical("Physical Device %d:%d Request Sense: "
4552 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4553 Controller,
4554 Event->Channel,
4555 Event->TargetID,
4556 RequestSense->SenseKey,
4557 RequestSense->AdditionalSenseCode,
4558 RequestSense->AdditionalSenseCodeQualifier);
4559 DAC960_Critical("Physical Device %d:%d Request Sense: "
4560 "Information = %02X%02X%02X%02X "
4561 "%02X%02X%02X%02X\n",
4562 Controller,
4563 Event->Channel,
4564 Event->TargetID,
4565 RequestSense->Information[0],
4566 RequestSense->Information[1],
4567 RequestSense->Information[2],
4568 RequestSense->Information[3],
4569 RequestSense->CommandSpecificInformation[0],
4570 RequestSense->CommandSpecificInformation[1],
4571 RequestSense->CommandSpecificInformation[2],
4572 RequestSense->CommandSpecificInformation[3]);
4573 break;
4574 case 'E':
4575 if (Controller->SuppressEnclosureMessages) break;
4576 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4577 DAC960_Critical("Enclosure %d %s\n", Controller,
4578 Event->TargetID, MessageBuffer);
4579 break;
4580 case 'C':
4581 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4582 break;
4583 default:
4584 DAC960_Critical("Unknown Controller Event Code %04X\n",
4585 Controller, Event->EventCode);
4586 break;
4587 }
4588}
4589
4590
4591/*
4592 DAC960_V2_ReportProgress prints an appropriate progress message for
4593 Logical Device Long Operations.
4594*/
4595
4596static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4597 unsigned char *MessageString,
4598 unsigned int LogicalDeviceNumber,
4599 unsigned long BlocksCompleted,
4600 unsigned long LogicalDeviceSize)
4601{
4602 Controller->EphemeralProgressMessage = true;
4603 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4604 "%d%% completed\n", Controller,
4605 MessageString,
4606 LogicalDeviceNumber,
4607 Controller->ControllerNumber,
4608 LogicalDeviceNumber,
4609 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4610 Controller->EphemeralProgressMessage = false;
4611}
4612
4613
4614/*
4615 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4616 for DAC960 V2 Firmware Controllers.
4617*/
4618
4619static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4620{
4621 DAC960_Controller_T *Controller = Command->Controller;
4622 DAC960_CommandType_T CommandType = Command->CommandType;
4623 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4624 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4625 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4626
4627 if (CommandType == DAC960_ReadCommand ||
4628 CommandType == DAC960_WriteCommand)
4629 {
4630
4631#ifdef FORCE_RETRY_DEBUG
4632 CommandStatus = DAC960_V2_AbormalCompletion;
4633#endif
4634 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4635
4636 if (CommandStatus == DAC960_V2_NormalCompletion) {
4637
4638 if (!DAC960_ProcessCompletedRequest(Command, true))
4639 BUG();
4640
4641 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4642 {
4643 /*
4644 * break the command down into pieces and resubmit each
4645 * piece, hoping that some of them will succeed.
4646 */
4647 DAC960_queue_partial_rw(Command);
4648 return;
4649 }
4650 else
4651 {
4652 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4653 DAC960_V2_ReadWriteError(Command);
4654 /*
4655 Perform completion processing for all buffers in this I/O Request.
4656 */
4657 (void)DAC960_ProcessCompletedRequest(Command, false);
4658 }
4659 }
4660 else if (CommandType == DAC960_ReadRetryCommand ||
4661 CommandType == DAC960_WriteRetryCommand)
4662 {
4663 boolean normal_completion;
4664
4665#ifdef FORCE_RETRY_FAILURE_DEBUG
4666 static int retry_count = 1;
4667#endif
4668 /*
4669 Perform completion processing for the portion that was
4670 retried, and submit the next portion, if any.
4671 */
4672 normal_completion = true;
4673 if (CommandStatus != DAC960_V2_NormalCompletion) {
4674 normal_completion = false;
4675 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4676 DAC960_V2_ReadWriteError(Command);
4677 }
4678
4679#ifdef FORCE_RETRY_FAILURE_DEBUG
4680 if (!(++retry_count % 10000)) {
4681 printk("V2 error retry failure test\n");
4682 normal_completion = false;
4683 DAC960_V2_ReadWriteError(Command);
4684 }
4685#endif
4686
4687 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4688 DAC960_queue_partial_rw(Command);
4689 return;
4690 }
4691 }
4692 else if (CommandType == DAC960_MonitoringCommand)
4693 {
4694 if (Controller->ShutdownMonitoringTimer)
4695 return;
4696 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4697 {
4698 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4699 Controller->V2.NewControllerInformation;
4700 DAC960_V2_ControllerInfo_T *ControllerInfo =
4701 &Controller->V2.ControllerInformation;
4702 Controller->LogicalDriveCount =
4703 NewControllerInfo->LogicalDevicesPresent;
4704 Controller->V2.NeedLogicalDeviceInformation = true;
4705 Controller->V2.NeedPhysicalDeviceInformation = true;
4706 Controller->V2.StartLogicalDeviceInformationScan = true;
4707 Controller->V2.StartPhysicalDeviceInformationScan = true;
4708 Controller->MonitoringAlertMode =
4709 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4710 NewControllerInfo->LogicalDevicesOffline > 0 ||
4711 NewControllerInfo->PhysicalDisksCritical > 0 ||
4712 NewControllerInfo->PhysicalDisksOffline > 0);
4713 memcpy(ControllerInfo, NewControllerInfo,
4714 sizeof(DAC960_V2_ControllerInfo_T));
4715 }
4716 else if (CommandOpcode == DAC960_V2_GetEvent)
4717 {
4718 if (CommandStatus == DAC960_V2_NormalCompletion) {
4719 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4720 }
4721 Controller->V2.NextEventSequenceNumber++;
4722 }
4723 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4724 CommandStatus == DAC960_V2_NormalCompletion)
4725 {
4726 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4727 Controller->V2.NewPhysicalDeviceInformation;
4728 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4729 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4730 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4731 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4732 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4733 unsigned int DeviceIndex;
4734 while (PhysicalDeviceInfo != NULL &&
4735 (NewPhysicalDeviceInfo->Channel >
4736 PhysicalDeviceInfo->Channel ||
4737 (NewPhysicalDeviceInfo->Channel ==
4738 PhysicalDeviceInfo->Channel &&
4739 (NewPhysicalDeviceInfo->TargetID >
4740 PhysicalDeviceInfo->TargetID ||
4741 (NewPhysicalDeviceInfo->TargetID ==
4742 PhysicalDeviceInfo->TargetID &&
4743 NewPhysicalDeviceInfo->LogicalUnit >
4744 PhysicalDeviceInfo->LogicalUnit)))))
4745 {
4746 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4747 Controller,
4748 PhysicalDeviceInfo->Channel,
4749 PhysicalDeviceInfo->TargetID);
4750 Controller->V2.PhysicalDeviceInformation
4751 [PhysicalDeviceIndex] = NULL;
4752 Controller->V2.InquiryUnitSerialNumber
4753 [PhysicalDeviceIndex] = NULL;
4754 kfree(PhysicalDeviceInfo);
4755 kfree(InquiryUnitSerialNumber);
4756 for (DeviceIndex = PhysicalDeviceIndex;
4757 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4758 DeviceIndex++)
4759 {
4760 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4761 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4762 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4763 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4764 }
4765 Controller->V2.PhysicalDeviceInformation
4766 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4767 Controller->V2.InquiryUnitSerialNumber
4768 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4769 PhysicalDeviceInfo =
4770 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4771 InquiryUnitSerialNumber =
4772 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4773 }
4774 if (PhysicalDeviceInfo == NULL ||
4775 (NewPhysicalDeviceInfo->Channel !=
4776 PhysicalDeviceInfo->Channel) ||
4777 (NewPhysicalDeviceInfo->TargetID !=
4778 PhysicalDeviceInfo->TargetID) ||
4779 (NewPhysicalDeviceInfo->LogicalUnit !=
4780 PhysicalDeviceInfo->LogicalUnit))
4781 {
4782 PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
4783 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4784 InquiryUnitSerialNumber =
4785 (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
4786 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4787 GFP_ATOMIC);
4788 if (InquiryUnitSerialNumber == NULL &&
4789 PhysicalDeviceInfo != NULL)
4790 {
4791 kfree(PhysicalDeviceInfo);
4792 PhysicalDeviceInfo = NULL;
4793 }
4794 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4795 Controller,
4796 NewPhysicalDeviceInfo->Channel,
4797 NewPhysicalDeviceInfo->TargetID,
4798 (PhysicalDeviceInfo != NULL
4799 ? "" : " - Allocation Failed"));
4800 if (PhysicalDeviceInfo != NULL)
4801 {
4802 memset(PhysicalDeviceInfo, 0,
4803 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4804 PhysicalDeviceInfo->PhysicalDeviceState =
4805 DAC960_V2_Device_InvalidState;
4806 memset(InquiryUnitSerialNumber, 0,
4807 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4808 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4809 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4810 DeviceIndex > PhysicalDeviceIndex;
4811 DeviceIndex--)
4812 {
4813 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4814 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4815 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4816 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4817 }
4818 Controller->V2.PhysicalDeviceInformation
4819 [PhysicalDeviceIndex] =
4820 PhysicalDeviceInfo;
4821 Controller->V2.InquiryUnitSerialNumber
4822 [PhysicalDeviceIndex] =
4823 InquiryUnitSerialNumber;
4824 Controller->V2.NeedDeviceSerialNumberInformation = true;
4825 }
4826 }
4827 if (PhysicalDeviceInfo != NULL)
4828 {
4829 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4830 PhysicalDeviceInfo->PhysicalDeviceState)
4831 DAC960_Critical(
4832 "Physical Device %d:%d is now %s\n", Controller,
4833 NewPhysicalDeviceInfo->Channel,
4834 NewPhysicalDeviceInfo->TargetID,
4835 (NewPhysicalDeviceInfo->PhysicalDeviceState
4836 == DAC960_V2_Device_Online
4837 ? "ONLINE"
4838 : NewPhysicalDeviceInfo->PhysicalDeviceState
4839 == DAC960_V2_Device_Rebuild
4840 ? "REBUILD"
4841 : NewPhysicalDeviceInfo->PhysicalDeviceState
4842 == DAC960_V2_Device_Missing
4843 ? "MISSING"
4844 : NewPhysicalDeviceInfo->PhysicalDeviceState
4845 == DAC960_V2_Device_Critical
4846 ? "CRITICAL"
4847 : NewPhysicalDeviceInfo->PhysicalDeviceState
4848 == DAC960_V2_Device_Dead
4849 ? "DEAD"
4850 : NewPhysicalDeviceInfo->PhysicalDeviceState
4851 == DAC960_V2_Device_SuspectedDead
4852 ? "SUSPECTED-DEAD"
4853 : NewPhysicalDeviceInfo->PhysicalDeviceState
4854 == DAC960_V2_Device_CommandedOffline
4855 ? "COMMANDED-OFFLINE"
4856 : NewPhysicalDeviceInfo->PhysicalDeviceState
4857 == DAC960_V2_Device_Standby
4858 ? "STANDBY" : "UNKNOWN"));
4859 if ((NewPhysicalDeviceInfo->ParityErrors !=
4860 PhysicalDeviceInfo->ParityErrors) ||
4861 (NewPhysicalDeviceInfo->SoftErrors !=
4862 PhysicalDeviceInfo->SoftErrors) ||
4863 (NewPhysicalDeviceInfo->HardErrors !=
4864 PhysicalDeviceInfo->HardErrors) ||
4865 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4866 PhysicalDeviceInfo->MiscellaneousErrors) ||
4867 (NewPhysicalDeviceInfo->CommandTimeouts !=
4868 PhysicalDeviceInfo->CommandTimeouts) ||
4869 (NewPhysicalDeviceInfo->Retries !=
4870 PhysicalDeviceInfo->Retries) ||
4871 (NewPhysicalDeviceInfo->Aborts !=
4872 PhysicalDeviceInfo->Aborts) ||
4873 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4874 PhysicalDeviceInfo->PredictedFailuresDetected))
4875 {
4876 DAC960_Critical("Physical Device %d:%d Errors: "
4877 "Parity = %d, Soft = %d, "
4878 "Hard = %d, Misc = %d\n",
4879 Controller,
4880 NewPhysicalDeviceInfo->Channel,
4881 NewPhysicalDeviceInfo->TargetID,
4882 NewPhysicalDeviceInfo->ParityErrors,
4883 NewPhysicalDeviceInfo->SoftErrors,
4884 NewPhysicalDeviceInfo->HardErrors,
4885 NewPhysicalDeviceInfo->MiscellaneousErrors);
4886 DAC960_Critical("Physical Device %d:%d Errors: "
4887 "Timeouts = %d, Retries = %d, "
4888 "Aborts = %d, Predicted = %d\n",
4889 Controller,
4890 NewPhysicalDeviceInfo->Channel,
4891 NewPhysicalDeviceInfo->TargetID,
4892 NewPhysicalDeviceInfo->CommandTimeouts,
4893 NewPhysicalDeviceInfo->Retries,
4894 NewPhysicalDeviceInfo->Aborts,
4895 NewPhysicalDeviceInfo
4896 ->PredictedFailuresDetected);
4897 }
4898 if ((PhysicalDeviceInfo->PhysicalDeviceState
4899 == DAC960_V2_Device_Dead ||
4900 PhysicalDeviceInfo->PhysicalDeviceState
4901 == DAC960_V2_Device_InvalidState) &&
4902 NewPhysicalDeviceInfo->PhysicalDeviceState
4903 != DAC960_V2_Device_Dead)
4904 Controller->V2.NeedDeviceSerialNumberInformation = true;
4905 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4906 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4907 }
4908 NewPhysicalDeviceInfo->LogicalUnit++;
4909 Controller->V2.PhysicalDeviceIndex++;
4910 }
4911 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4912 {
4913 unsigned int DeviceIndex;
4914 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4915 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4916 DeviceIndex++)
4917 {
4918 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4919 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4920 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4921 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4922 if (PhysicalDeviceInfo == NULL) break;
4923 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4924 Controller,
4925 PhysicalDeviceInfo->Channel,
4926 PhysicalDeviceInfo->TargetID);
4927 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4928 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4929 kfree(PhysicalDeviceInfo);
4930 kfree(InquiryUnitSerialNumber);
4931 }
4932 Controller->V2.NeedPhysicalDeviceInformation = false;
4933 }
4934 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4935 CommandStatus == DAC960_V2_NormalCompletion)
4936 {
4937 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4938 Controller->V2.NewLogicalDeviceInformation;
4939 unsigned short LogicalDeviceNumber =
4940 NewLogicalDeviceInfo->LogicalDeviceNumber;
4941 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4942 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4943 if (LogicalDeviceInfo == NULL)
4944 {
4945 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4946 PhysicalDevice.Controller = 0;
4947 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4948 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4949 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4950 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4951 PhysicalDevice;
4952 LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
4953 kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
4954 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4955 LogicalDeviceInfo;
4956 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4957 "Now Exists%s\n", Controller,
4958 LogicalDeviceNumber,
4959 Controller->ControllerNumber,
4960 LogicalDeviceNumber,
4961 (LogicalDeviceInfo != NULL
4962 ? "" : " - Allocation Failed"));
4963 if (LogicalDeviceInfo != NULL)
4964 {
4965 memset(LogicalDeviceInfo, 0,
4966 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4967 DAC960_ComputeGenericDiskInfo(Controller);
4968 }
4969 }
4970 if (LogicalDeviceInfo != NULL)
4971 {
4972 unsigned long LogicalDeviceSize =
4973 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4974 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4975 LogicalDeviceInfo->LogicalDeviceState)
4976 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4977 "is now %s\n", Controller,
4978 LogicalDeviceNumber,
4979 Controller->ControllerNumber,
4980 LogicalDeviceNumber,
4981 (NewLogicalDeviceInfo->LogicalDeviceState
4982 == DAC960_V2_LogicalDevice_Online
4983 ? "ONLINE"
4984 : NewLogicalDeviceInfo->LogicalDeviceState
4985 == DAC960_V2_LogicalDevice_Critical
4986 ? "CRITICAL" : "OFFLINE"));
4987 if ((NewLogicalDeviceInfo->SoftErrors !=
4988 LogicalDeviceInfo->SoftErrors) ||
4989 (NewLogicalDeviceInfo->CommandsFailed !=
4990 LogicalDeviceInfo->CommandsFailed) ||
4991 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4992 LogicalDeviceInfo->DeferredWriteErrors))
4993 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
4994 "Soft = %d, Failed = %d, Deferred Write = %d\n",
4995 Controller, LogicalDeviceNumber,
4996 Controller->ControllerNumber,
4997 LogicalDeviceNumber,
4998 NewLogicalDeviceInfo->SoftErrors,
4999 NewLogicalDeviceInfo->CommandsFailed,
5000 NewLogicalDeviceInfo->DeferredWriteErrors);
5001 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5002 DAC960_V2_ReportProgress(Controller,
5003 "Consistency Check",
5004 LogicalDeviceNumber,
5005 NewLogicalDeviceInfo
5006 ->ConsistencyCheckBlockNumber,
5007 LogicalDeviceSize);
5008 else if (NewLogicalDeviceInfo->RebuildInProgress)
5009 DAC960_V2_ReportProgress(Controller,
5010 "Rebuild",
5011 LogicalDeviceNumber,
5012 NewLogicalDeviceInfo
5013 ->RebuildBlockNumber,
5014 LogicalDeviceSize);
5015 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5016 DAC960_V2_ReportProgress(Controller,
5017 "Background Initialization",
5018 LogicalDeviceNumber,
5019 NewLogicalDeviceInfo
5020 ->BackgroundInitializationBlockNumber,
5021 LogicalDeviceSize);
5022 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5023 DAC960_V2_ReportProgress(Controller,
5024 "Foreground Initialization",
5025 LogicalDeviceNumber,
5026 NewLogicalDeviceInfo
5027 ->ForegroundInitializationBlockNumber,
5028 LogicalDeviceSize);
5029 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5030 DAC960_V2_ReportProgress(Controller,
5031 "Data Migration",
5032 LogicalDeviceNumber,
5033 NewLogicalDeviceInfo
5034 ->DataMigrationBlockNumber,
5035 LogicalDeviceSize);
5036 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5037 DAC960_V2_ReportProgress(Controller,
5038 "Patrol Operation",
5039 LogicalDeviceNumber,
5040 NewLogicalDeviceInfo
5041 ->PatrolOperationBlockNumber,
5042 LogicalDeviceSize);
5043 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5044 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5045 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5046 "Background Initialization %s\n",
5047 Controller,
5048 LogicalDeviceNumber,
5049 Controller->ControllerNumber,
5050 LogicalDeviceNumber,
5051 (NewLogicalDeviceInfo->LogicalDeviceControl
5052 .LogicalDeviceInitialized
5053 ? "Completed" : "Failed"));
5054 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5055 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5056 }
5057 Controller->V2.LogicalDriveFoundDuringScan
5058 [LogicalDeviceNumber] = true;
5059 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5060 }
5061 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5062 {
5063 int LogicalDriveNumber;
5064 for (LogicalDriveNumber = 0;
5065 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5066 LogicalDriveNumber++)
5067 {
5068 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5069 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5070 if (LogicalDeviceInfo == NULL ||
5071 Controller->V2.LogicalDriveFoundDuringScan
5072 [LogicalDriveNumber])
5073 continue;
5074 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5075 "No Longer Exists\n", Controller,
5076 LogicalDriveNumber,
5077 Controller->ControllerNumber,
5078 LogicalDriveNumber);
5079 Controller->V2.LogicalDeviceInformation
5080 [LogicalDriveNumber] = NULL;
5081 kfree(LogicalDeviceInfo);
5082 Controller->LogicalDriveInitiallyAccessible
5083 [LogicalDriveNumber] = false;
5084 DAC960_ComputeGenericDiskInfo(Controller);
5085 }
5086 Controller->V2.NeedLogicalDeviceInformation = false;
5087 }
5088 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5089 {
5090 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5091 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5092
5093 if (CommandStatus != DAC960_V2_NormalCompletion) {
5094 memset(InquiryUnitSerialNumber,
5095 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5096 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5097 } else
5098 memcpy(InquiryUnitSerialNumber,
5099 Controller->V2.NewInquiryUnitSerialNumber,
5100 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5101
5102 Controller->V2.NeedDeviceSerialNumberInformation = false;
5103 }
5104
5105 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5106 - Controller->V2.NextEventSequenceNumber > 0)
5107 {
5108 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5109 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5110 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5111 Controller->V2.NextEventSequenceNumber >> 16;
5112 CommandMailbox->GetEvent.ControllerNumber = 0;
5113 CommandMailbox->GetEvent.IOCTL_Opcode =
5114 DAC960_V2_GetEvent;
5115 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5116 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5117 CommandMailbox->GetEvent.DataTransferMemoryAddress
5118 .ScatterGatherSegments[0]
5119 .SegmentDataPointer =
5120 Controller->V2.EventDMA;
5121 CommandMailbox->GetEvent.DataTransferMemoryAddress
5122 .ScatterGatherSegments[0]
5123 .SegmentByteCount =
5124 CommandMailbox->GetEvent.DataTransferSize;
5125 DAC960_QueueCommand(Command);
5126 return;
5127 }
5128 if (Controller->V2.NeedPhysicalDeviceInformation)
5129 {
5130 if (Controller->V2.NeedDeviceSerialNumberInformation)
5131 {
5132 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5133 Controller->V2.NewInquiryUnitSerialNumber;
5134 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5135
5136 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5137 Controller->V2.NewPhysicalDeviceInformation->Channel,
5138 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5139 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5140
5141
5142 DAC960_QueueCommand(Command);
5143 return;
5144 }
5145 if (Controller->V2.StartPhysicalDeviceInformationScan)
5146 {
5147 Controller->V2.PhysicalDeviceIndex = 0;
5148 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5149 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5150 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5151 Controller->V2.StartPhysicalDeviceInformationScan = false;
5152 }
5153 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5154 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5155 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5156 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5157 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5158 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5159 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5160 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5161 Controller->V2.NewPhysicalDeviceInformation->Channel;
5162 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5163 DAC960_V2_GetPhysicalDeviceInfoValid;
5164 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5165 .ScatterGatherSegments[0]
5166 .SegmentDataPointer =
5167 Controller->V2.NewPhysicalDeviceInformationDMA;
5168 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5169 .ScatterGatherSegments[0]
5170 .SegmentByteCount =
5171 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5172 DAC960_QueueCommand(Command);
5173 return;
5174 }
5175 if (Controller->V2.NeedLogicalDeviceInformation)
5176 {
5177 if (Controller->V2.StartLogicalDeviceInformationScan)
5178 {
5179 int LogicalDriveNumber;
5180 for (LogicalDriveNumber = 0;
5181 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5182 LogicalDriveNumber++)
5183 Controller->V2.LogicalDriveFoundDuringScan
5184 [LogicalDriveNumber] = false;
5185 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5186 Controller->V2.StartLogicalDeviceInformationScan = false;
5187 }
5188 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5189 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5190 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5191 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5192 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5193 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5194 DAC960_V2_GetLogicalDeviceInfoValid;
5195 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5196 .ScatterGatherSegments[0]
5197 .SegmentDataPointer =
5198 Controller->V2.NewLogicalDeviceInformationDMA;
5199 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5200 .ScatterGatherSegments[0]
5201 .SegmentByteCount =
5202 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5203 DAC960_QueueCommand(Command);
5204 return;
5205 }
5206 Controller->MonitoringTimerCount++;
5207 Controller->MonitoringTimer.expires =
5208 jiffies + DAC960_HealthStatusMonitoringInterval;
5209 add_timer(&Controller->MonitoringTimer);
5210 }
5211 if (CommandType == DAC960_ImmediateCommand)
5212 {
5213 complete(Command->Completion);
5214 Command->Completion = NULL;
5215 return;
5216 }
5217 if (CommandType == DAC960_QueuedCommand)
5218 {
5219 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5220 KernelCommand->CommandStatus = CommandStatus;
5221 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5222 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5223 Command->V2.KernelCommand = NULL;
5224 DAC960_DeallocateCommand(Command);
5225 KernelCommand->CompletionFunction(KernelCommand);
5226 return;
5227 }
5228 /*
5229 Queue a Status Monitoring Command to the Controller using the just
5230 completed Command if one was deferred previously due to lack of a
5231 free Command when the Monitoring Timer Function was called.
5232 */
5233 if (Controller->MonitoringCommandDeferred)
5234 {
5235 Controller->MonitoringCommandDeferred = false;
5236 DAC960_V2_QueueMonitoringCommand(Command);
5237 return;
5238 }
5239 /*
5240 Deallocate the Command.
5241 */
5242 DAC960_DeallocateCommand(Command);
5243 /*
5244 Wake up any processes waiting on a free Command.
5245 */
5246 wake_up(&Controller->CommandWaitQueue);
5247}
5248
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07005249/*
5250 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5251 Controllers.
5252*/
5253
5254static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5255 void *DeviceIdentifier,
5256 struct pt_regs *InterruptRegisters)
5257{
5258 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5259 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5260 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5261 unsigned long flags;
5262
5263 spin_lock_irqsave(&Controller->queue_lock, flags);
5264 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5265 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5266 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5267 {
5268 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5269 NextStatusMailbox->Fields.CommandIdentifier;
5270 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5271 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5272 Command->V2.RequestSenseLength =
5273 NextStatusMailbox->Fields.RequestSenseLength;
5274 Command->V2.DataTransferResidue =
5275 NextStatusMailbox->Fields.DataTransferResidue;
5276 NextStatusMailbox->Words[0] = 0;
5277 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5278 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5279 DAC960_V2_ProcessCompletedCommand(Command);
5280 }
5281 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5282 /*
5283 Attempt to remove additional I/O Requests from the Controller's
5284 I/O Request Queue and queue them to the Controller.
5285 */
5286 DAC960_ProcessRequest(Controller);
5287 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5288 return IRQ_HANDLED;
5289}
Linus Torvalds1da177e2005-04-16 15:20:36 -07005290
5291/*
5292 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5293 Controllers.
5294*/
5295
5296static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5297 void *DeviceIdentifier,
5298 struct pt_regs *InterruptRegisters)
5299{
5300 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5301 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5302 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5303 unsigned long flags;
5304
5305 spin_lock_irqsave(&Controller->queue_lock, flags);
5306 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5307 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5308 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5309 {
5310 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5311 NextStatusMailbox->Fields.CommandIdentifier;
5312 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5313 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5314 Command->V2.RequestSenseLength =
5315 NextStatusMailbox->Fields.RequestSenseLength;
5316 Command->V2.DataTransferResidue =
5317 NextStatusMailbox->Fields.DataTransferResidue;
5318 NextStatusMailbox->Words[0] = 0;
5319 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5320 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5321 DAC960_V2_ProcessCompletedCommand(Command);
5322 }
5323 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5324 /*
5325 Attempt to remove additional I/O Requests from the Controller's
5326 I/O Request Queue and queue them to the Controller.
5327 */
5328 DAC960_ProcessRequest(Controller);
5329 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5330 return IRQ_HANDLED;
5331}
5332
5333
5334/*
5335 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5336 Controllers.
5337*/
5338
5339static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5340 void *DeviceIdentifier,
5341 struct pt_regs *InterruptRegisters)
5342{
5343 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5344 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5345 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5346 unsigned long flags;
5347
5348 spin_lock_irqsave(&Controller->queue_lock, flags);
5349 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5350 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5351 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5352 {
5353 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5354 NextStatusMailbox->Fields.CommandIdentifier;
5355 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5356 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5357 Command->V2.RequestSenseLength =
5358 NextStatusMailbox->Fields.RequestSenseLength;
5359 Command->V2.DataTransferResidue =
5360 NextStatusMailbox->Fields.DataTransferResidue;
5361 NextStatusMailbox->Words[0] = 0;
5362 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5363 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5364 DAC960_V2_ProcessCompletedCommand(Command);
5365 }
5366 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5367 /*
5368 Attempt to remove additional I/O Requests from the Controller's
5369 I/O Request Queue and queue them to the Controller.
5370 */
5371 DAC960_ProcessRequest(Controller);
5372 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5373 return IRQ_HANDLED;
5374}
5375
5376
5377/*
5378 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5379 Controllers.
5380*/
5381
5382static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5383 void *DeviceIdentifier,
5384 struct pt_regs *InterruptRegisters)
5385{
5386 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5387 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5388 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5389 unsigned long flags;
5390
5391 spin_lock_irqsave(&Controller->queue_lock, flags);
5392 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5393 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5394 while (NextStatusMailbox->Fields.Valid)
5395 {
5396 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5397 NextStatusMailbox->Fields.CommandIdentifier;
5398 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5399 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5400 NextStatusMailbox->Word = 0;
5401 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5402 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5403 DAC960_V1_ProcessCompletedCommand(Command);
5404 }
5405 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5406 /*
5407 Attempt to remove additional I/O Requests from the Controller's
5408 I/O Request Queue and queue them to the Controller.
5409 */
5410 DAC960_ProcessRequest(Controller);
5411 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5412 return IRQ_HANDLED;
5413}
5414
5415
5416/*
5417 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5418 Controllers.
5419*/
5420
5421static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5422 void *DeviceIdentifier,
5423 struct pt_regs *InterruptRegisters)
5424{
5425 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5426 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5427 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5428 unsigned long flags;
5429
5430 spin_lock_irqsave(&Controller->queue_lock, flags);
5431 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5432 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5433 while (NextStatusMailbox->Fields.Valid)
5434 {
5435 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5436 NextStatusMailbox->Fields.CommandIdentifier;
5437 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5438 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5439 NextStatusMailbox->Word = 0;
5440 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5441 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5442 DAC960_V1_ProcessCompletedCommand(Command);
5443 }
5444 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5445 /*
5446 Attempt to remove additional I/O Requests from the Controller's
5447 I/O Request Queue and queue them to the Controller.
5448 */
5449 DAC960_ProcessRequest(Controller);
5450 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5451 return IRQ_HANDLED;
5452}
5453
5454
5455/*
5456 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5457 Controllers.
5458*/
5459
5460static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5461 void *DeviceIdentifier,
5462 struct pt_regs *InterruptRegisters)
5463{
5464 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5465 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5466 unsigned long flags;
5467
5468 spin_lock_irqsave(&Controller->queue_lock, flags);
5469 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5470 {
5471 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5472 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5473 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5474 Command->V1.CommandStatus =
5475 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5476 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5477 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5478 DAC960_V1_ProcessCompletedCommand(Command);
5479 }
5480 /*
5481 Attempt to remove additional I/O Requests from the Controller's
5482 I/O Request Queue and queue them to the Controller.
5483 */
5484 DAC960_ProcessRequest(Controller);
5485 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5486 return IRQ_HANDLED;
5487}
5488
5489
5490/*
5491 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5492 Controllers.
5493
5494 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5495 on the data having been placed into DAC960_Controller_T, rather than
5496 an arbitrary buffer.
5497*/
5498
5499static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5500 void *DeviceIdentifier,
5501 struct pt_regs *InterruptRegisters)
5502{
5503 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5504 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5505 unsigned long flags;
5506
5507 spin_lock_irqsave(&Controller->queue_lock, flags);
5508 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5509 {
5510 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5511 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5512 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5513 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5514 DAC960_V1_CommandOpcode_T CommandOpcode =
5515 CommandMailbox->Common.CommandOpcode;
5516 Command->V1.CommandStatus =
5517 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5518 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5519 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5520 switch (CommandOpcode)
5521 {
5522 case DAC960_V1_Enquiry_Old:
5523 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5524 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5525 break;
5526 case DAC960_V1_GetDeviceState_Old:
5527 Command->V1.CommandMailbox.Common.CommandOpcode =
5528 DAC960_V1_GetDeviceState;
5529 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5530 break;
5531 case DAC960_V1_Read_Old:
5532 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5533 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5534 break;
5535 case DAC960_V1_Write_Old:
5536 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5537 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5538 break;
5539 case DAC960_V1_ReadWithScatterGather_Old:
5540 Command->V1.CommandMailbox.Common.CommandOpcode =
5541 DAC960_V1_ReadWithScatterGather;
5542 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5543 break;
5544 case DAC960_V1_WriteWithScatterGather_Old:
5545 Command->V1.CommandMailbox.Common.CommandOpcode =
5546 DAC960_V1_WriteWithScatterGather;
5547 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5548 break;
5549 default:
5550 break;
5551 }
5552 DAC960_V1_ProcessCompletedCommand(Command);
5553 }
5554 /*
5555 Attempt to remove additional I/O Requests from the Controller's
5556 I/O Request Queue and queue them to the Controller.
5557 */
5558 DAC960_ProcessRequest(Controller);
5559 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5560 return IRQ_HANDLED;
5561}
5562
5563
5564/*
5565 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5566 Firmware Controllers.
5567*/
5568
5569static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5570{
5571 DAC960_Controller_T *Controller = Command->Controller;
5572 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5573 DAC960_V1_ClearCommand(Command);
5574 Command->CommandType = DAC960_MonitoringCommand;
5575 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5576 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5577 DAC960_QueueCommand(Command);
5578}
5579
5580
5581/*
5582 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5583 Firmware Controllers.
5584*/
5585
5586static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5587{
5588 DAC960_Controller_T *Controller = Command->Controller;
5589 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5590 DAC960_V2_ClearCommand(Command);
5591 Command->CommandType = DAC960_MonitoringCommand;
5592 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5593 CommandMailbox->ControllerInfo.CommandControlBits
5594 .DataTransferControllerToHost = true;
5595 CommandMailbox->ControllerInfo.CommandControlBits
5596 .NoAutoRequestSense = true;
5597 CommandMailbox->ControllerInfo.DataTransferSize =
5598 sizeof(DAC960_V2_ControllerInfo_T);
5599 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5600 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5601 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5602 .ScatterGatherSegments[0]
5603 .SegmentDataPointer =
5604 Controller->V2.NewControllerInformationDMA;
5605 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5606 .ScatterGatherSegments[0]
5607 .SegmentByteCount =
5608 CommandMailbox->ControllerInfo.DataTransferSize;
5609 DAC960_QueueCommand(Command);
5610}
5611
5612
5613/*
5614 DAC960_MonitoringTimerFunction is the timer function for monitoring
5615 the status of DAC960 Controllers.
5616*/
5617
5618static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5619{
5620 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5621 DAC960_Command_T *Command;
5622 unsigned long flags;
5623
5624 if (Controller->FirmwareType == DAC960_V1_Controller)
5625 {
5626 spin_lock_irqsave(&Controller->queue_lock, flags);
5627 /*
5628 Queue a Status Monitoring Command to Controller.
5629 */
5630 Command = DAC960_AllocateCommand(Controller);
5631 if (Command != NULL)
5632 DAC960_V1_QueueMonitoringCommand(Command);
5633 else Controller->MonitoringCommandDeferred = true;
5634 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5635 }
5636 else
5637 {
5638 DAC960_V2_ControllerInfo_T *ControllerInfo =
5639 &Controller->V2.ControllerInformation;
5640 unsigned int StatusChangeCounter =
5641 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5642 boolean ForceMonitoringCommand = false;
5643 if (jiffies - Controller->SecondaryMonitoringTime
5644 > DAC960_SecondaryMonitoringInterval)
5645 {
5646 int LogicalDriveNumber;
5647 for (LogicalDriveNumber = 0;
5648 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5649 LogicalDriveNumber++)
5650 {
5651 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5652 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5653 if (LogicalDeviceInfo == NULL) continue;
5654 if (!LogicalDeviceInfo->LogicalDeviceControl
5655 .LogicalDeviceInitialized)
5656 {
5657 ForceMonitoringCommand = true;
5658 break;
5659 }
5660 }
5661 Controller->SecondaryMonitoringTime = jiffies;
5662 }
5663 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5664 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5665 == Controller->V2.NextEventSequenceNumber &&
5666 (ControllerInfo->BackgroundInitializationsActive +
5667 ControllerInfo->LogicalDeviceInitializationsActive +
5668 ControllerInfo->PhysicalDeviceInitializationsActive +
5669 ControllerInfo->ConsistencyChecksActive +
5670 ControllerInfo->RebuildsActive +
5671 ControllerInfo->OnlineExpansionsActive == 0 ||
5672 jiffies - Controller->PrimaryMonitoringTime
5673 < DAC960_MonitoringTimerInterval) &&
5674 !ForceMonitoringCommand)
5675 {
5676 Controller->MonitoringTimer.expires =
5677 jiffies + DAC960_HealthStatusMonitoringInterval;
5678 add_timer(&Controller->MonitoringTimer);
5679 return;
5680 }
5681 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5682 Controller->PrimaryMonitoringTime = jiffies;
5683
5684 spin_lock_irqsave(&Controller->queue_lock, flags);
5685 /*
5686 Queue a Status Monitoring Command to Controller.
5687 */
5688 Command = DAC960_AllocateCommand(Controller);
5689 if (Command != NULL)
5690 DAC960_V2_QueueMonitoringCommand(Command);
5691 else Controller->MonitoringCommandDeferred = true;
5692 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5693 /*
5694 Wake up any processes waiting on a Health Status Buffer change.
5695 */
5696 wake_up(&Controller->HealthStatusWaitQueue);
5697 }
5698}
5699
5700/*
5701 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5702 additional bytes in the Combined Status Buffer and grows the buffer if
5703 necessary. It returns true if there is enough room and false otherwise.
5704*/
5705
5706static boolean DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5707 unsigned int ByteCount)
5708{
5709 unsigned char *NewStatusBuffer;
5710 if (Controller->InitialStatusLength + 1 +
5711 Controller->CurrentStatusLength + ByteCount + 1 <=
5712 Controller->CombinedStatusBufferLength)
5713 return true;
5714 if (Controller->CombinedStatusBufferLength == 0)
5715 {
5716 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5717 while (NewStatusBufferLength < ByteCount)
5718 NewStatusBufferLength *= 2;
5719 Controller->CombinedStatusBuffer =
5720 (unsigned char *) kmalloc(NewStatusBufferLength, GFP_ATOMIC);
5721 if (Controller->CombinedStatusBuffer == NULL) return false;
5722 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5723 return true;
5724 }
5725 NewStatusBuffer = (unsigned char *)
5726 kmalloc(2 * Controller->CombinedStatusBufferLength, GFP_ATOMIC);
5727 if (NewStatusBuffer == NULL)
5728 {
5729 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5730 Controller);
5731 return false;
5732 }
5733 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5734 Controller->CombinedStatusBufferLength);
5735 kfree(Controller->CombinedStatusBuffer);
5736 Controller->CombinedStatusBuffer = NewStatusBuffer;
5737 Controller->CombinedStatusBufferLength *= 2;
5738 Controller->CurrentStatusBuffer =
5739 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5740 return true;
5741}
5742
5743
5744/*
5745 DAC960_Message prints Driver Messages.
5746*/
5747
5748static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5749 unsigned char *Format,
5750 DAC960_Controller_T *Controller,
5751 ...)
5752{
5753 static unsigned char Buffer[DAC960_LineBufferSize];
5754 static boolean BeginningOfLine = true;
5755 va_list Arguments;
5756 int Length = 0;
5757 va_start(Arguments, Controller);
5758 Length = vsprintf(Buffer, Format, Arguments);
5759 va_end(Arguments);
5760 if (Controller == NULL)
5761 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5762 DAC960_ControllerCount, Buffer);
5763 else if (MessageLevel == DAC960_AnnounceLevel ||
5764 MessageLevel == DAC960_InfoLevel)
5765 {
5766 if (!Controller->ControllerInitialized)
5767 {
5768 if (DAC960_CheckStatusBuffer(Controller, Length))
5769 {
5770 strcpy(&Controller->CombinedStatusBuffer
5771 [Controller->InitialStatusLength],
5772 Buffer);
5773 Controller->InitialStatusLength += Length;
5774 Controller->CurrentStatusBuffer =
5775 &Controller->CombinedStatusBuffer
5776 [Controller->InitialStatusLength + 1];
5777 }
5778 if (MessageLevel == DAC960_AnnounceLevel)
5779 {
5780 static int AnnouncementLines = 0;
5781 if (++AnnouncementLines <= 2)
5782 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5783 Buffer);
5784 }
5785 else
5786 {
5787 if (BeginningOfLine)
5788 {
5789 if (Buffer[0] != '\n' || Length > 1)
5790 printk("%sDAC960#%d: %s",
5791 DAC960_MessageLevelMap[MessageLevel],
5792 Controller->ControllerNumber, Buffer);
5793 }
5794 else printk("%s", Buffer);
5795 }
5796 }
5797 else if (DAC960_CheckStatusBuffer(Controller, Length))
5798 {
5799 strcpy(&Controller->CurrentStatusBuffer[
5800 Controller->CurrentStatusLength], Buffer);
5801 Controller->CurrentStatusLength += Length;
5802 }
5803 }
5804 else if (MessageLevel == DAC960_ProgressLevel)
5805 {
5806 strcpy(Controller->ProgressBuffer, Buffer);
5807 Controller->ProgressBufferLength = Length;
5808 if (Controller->EphemeralProgressMessage)
5809 {
5810 if (jiffies - Controller->LastProgressReportTime
5811 >= DAC960_ProgressReportingInterval)
5812 {
5813 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5814 Controller->ControllerNumber, Buffer);
5815 Controller->LastProgressReportTime = jiffies;
5816 }
5817 }
5818 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5819 Controller->ControllerNumber, Buffer);
5820 }
5821 else if (MessageLevel == DAC960_UserCriticalLevel)
5822 {
5823 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5824 Buffer);
5825 Controller->UserStatusLength += Length;
5826 if (Buffer[0] != '\n' || Length > 1)
5827 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5828 Controller->ControllerNumber, Buffer);
5829 }
5830 else
5831 {
5832 if (BeginningOfLine)
5833 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5834 Controller->ControllerNumber, Buffer);
5835 else printk("%s", Buffer);
5836 }
5837 BeginningOfLine = (Buffer[Length-1] == '\n');
5838}
5839
5840
5841/*
5842 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5843 Channel:TargetID specification from a User Command string. It updates
5844 Channel and TargetID and returns true on success and false on failure.
5845*/
5846
5847static boolean DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5848 char *UserCommandString,
5849 unsigned char *Channel,
5850 unsigned char *TargetID)
5851{
5852 char *NewUserCommandString = UserCommandString;
5853 unsigned long XChannel, XTargetID;
5854 while (*UserCommandString == ' ') UserCommandString++;
5855 if (UserCommandString == NewUserCommandString)
5856 return false;
5857 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5858 if (NewUserCommandString == UserCommandString ||
5859 *NewUserCommandString != ':' ||
5860 XChannel >= Controller->Channels)
5861 return false;
5862 UserCommandString = ++NewUserCommandString;
5863 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5864 if (NewUserCommandString == UserCommandString ||
5865 *NewUserCommandString != '\0' ||
5866 XTargetID >= Controller->Targets)
5867 return false;
5868 *Channel = XChannel;
5869 *TargetID = XTargetID;
5870 return true;
5871}
5872
5873
5874/*
5875 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5876 specification from a User Command string. It updates LogicalDriveNumber and
5877 returns true on success and false on failure.
5878*/
5879
5880static boolean DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5881 char *UserCommandString,
5882 unsigned char *LogicalDriveNumber)
5883{
5884 char *NewUserCommandString = UserCommandString;
5885 unsigned long XLogicalDriveNumber;
5886 while (*UserCommandString == ' ') UserCommandString++;
5887 if (UserCommandString == NewUserCommandString)
5888 return false;
5889 XLogicalDriveNumber =
5890 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5891 if (NewUserCommandString == UserCommandString ||
5892 *NewUserCommandString != '\0' ||
5893 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5894 return false;
5895 *LogicalDriveNumber = XLogicalDriveNumber;
5896 return true;
5897}
5898
5899
5900/*
5901 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5902 DAC960 V1 Firmware Controllers.
5903*/
5904
5905static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5906 DAC960_Command_T *Command,
5907 unsigned char Channel,
5908 unsigned char TargetID,
5909 DAC960_V1_PhysicalDeviceState_T
5910 DeviceState,
5911 const unsigned char *DeviceStateString)
5912{
5913 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5914 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5915 CommandMailbox->Type3D.Channel = Channel;
5916 CommandMailbox->Type3D.TargetID = TargetID;
5917 CommandMailbox->Type3D.DeviceState = DeviceState;
5918 CommandMailbox->Type3D.Modifier = 0;
5919 DAC960_ExecuteCommand(Command);
5920 switch (Command->V1.CommandStatus)
5921 {
5922 case DAC960_V1_NormalCompletion:
5923 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5924 DeviceStateString, Channel, TargetID);
5925 break;
5926 case DAC960_V1_UnableToStartDevice:
5927 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5928 "Unable to Start Device\n", Controller,
5929 DeviceStateString, Channel, TargetID);
5930 break;
5931 case DAC960_V1_NoDeviceAtAddress:
5932 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5933 "No Device at Address\n", Controller,
5934 DeviceStateString, Channel, TargetID);
5935 break;
5936 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5937 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5938 "Invalid Channel or Target or Modifier\n",
5939 Controller, DeviceStateString, Channel, TargetID);
5940 break;
5941 case DAC960_V1_ChannelBusy:
5942 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5943 "Channel Busy\n", Controller,
5944 DeviceStateString, Channel, TargetID);
5945 break;
5946 default:
5947 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5948 "Unexpected Status %04X\n", Controller,
5949 DeviceStateString, Channel, TargetID,
5950 Command->V1.CommandStatus);
5951 break;
5952 }
5953}
5954
5955
5956/*
5957 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5958 Controllers.
5959*/
5960
5961static boolean DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5962 unsigned char *UserCommand)
5963{
5964 DAC960_Command_T *Command;
5965 DAC960_V1_CommandMailbox_T *CommandMailbox;
5966 unsigned long flags;
5967 unsigned char Channel, TargetID, LogicalDriveNumber;
5968
5969 spin_lock_irqsave(&Controller->queue_lock, flags);
5970 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5971 DAC960_WaitForCommand(Controller);
5972 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5973 Controller->UserStatusLength = 0;
5974 DAC960_V1_ClearCommand(Command);
5975 Command->CommandType = DAC960_ImmediateCommand;
5976 CommandMailbox = &Command->V1.CommandMailbox;
5977 if (strcmp(UserCommand, "flush-cache") == 0)
5978 {
5979 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5980 DAC960_ExecuteCommand(Command);
5981 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5982 }
5983 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5984 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5985 &Channel, &TargetID))
5986 {
5987 DAC960_V1_DeviceState_T *DeviceState =
5988 &Controller->V1.DeviceState[Channel][TargetID];
5989 if (DeviceState->Present &&
5990 DeviceState->DeviceType == DAC960_V1_DiskType &&
5991 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5992 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5993 DAC960_V1_Device_Dead, "Kill");
5994 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5995 Controller, Channel, TargetID);
5996 }
5997 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5998 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5999 &Channel, &TargetID))
6000 {
6001 DAC960_V1_DeviceState_T *DeviceState =
6002 &Controller->V1.DeviceState[Channel][TargetID];
6003 if (DeviceState->Present &&
6004 DeviceState->DeviceType == DAC960_V1_DiskType &&
6005 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6006 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6007 DAC960_V1_Device_Online, "Make Online");
6008 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6009 Controller, Channel, TargetID);
6010
6011 }
6012 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6013 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6014 &Channel, &TargetID))
6015 {
6016 DAC960_V1_DeviceState_T *DeviceState =
6017 &Controller->V1.DeviceState[Channel][TargetID];
6018 if (DeviceState->Present &&
6019 DeviceState->DeviceType == DAC960_V1_DiskType &&
6020 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6021 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6022 DAC960_V1_Device_Standby, "Make Standby");
6023 else DAC960_UserCritical("Make Standby of Physical "
6024 "Device %d:%d Illegal\n",
6025 Controller, Channel, TargetID);
6026 }
6027 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6028 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6029 &Channel, &TargetID))
6030 {
6031 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6032 CommandMailbox->Type3D.Channel = Channel;
6033 CommandMailbox->Type3D.TargetID = TargetID;
6034 DAC960_ExecuteCommand(Command);
6035 switch (Command->V1.CommandStatus)
6036 {
6037 case DAC960_V1_NormalCompletion:
6038 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6039 Controller, Channel, TargetID);
6040 break;
6041 case DAC960_V1_AttemptToRebuildOnlineDrive:
6042 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6043 "Attempt to Rebuild Online or "
6044 "Unresponsive Drive\n",
6045 Controller, Channel, TargetID);
6046 break;
6047 case DAC960_V1_NewDiskFailedDuringRebuild:
6048 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6049 "New Disk Failed During Rebuild\n",
6050 Controller, Channel, TargetID);
6051 break;
6052 case DAC960_V1_InvalidDeviceAddress:
6053 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6054 "Invalid Device Address\n",
6055 Controller, Channel, TargetID);
6056 break;
6057 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6058 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6059 "Rebuild or Consistency Check Already "
6060 "in Progress\n", Controller, Channel, TargetID);
6061 break;
6062 default:
6063 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6064 "Unexpected Status %04X\n", Controller,
6065 Channel, TargetID, Command->V1.CommandStatus);
6066 break;
6067 }
6068 }
6069 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6070 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6071 &LogicalDriveNumber))
6072 {
6073 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6074 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6075 CommandMailbox->Type3C.AutoRestore = true;
6076 DAC960_ExecuteCommand(Command);
6077 switch (Command->V1.CommandStatus)
6078 {
6079 case DAC960_V1_NormalCompletion:
6080 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6081 "(/dev/rd/c%dd%d) Initiated\n",
6082 Controller, LogicalDriveNumber,
6083 Controller->ControllerNumber,
6084 LogicalDriveNumber);
6085 break;
6086 case DAC960_V1_DependentDiskIsDead:
6087 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6088 "(/dev/rd/c%dd%d) Failed - "
6089 "Dependent Physical Device is DEAD\n",
6090 Controller, LogicalDriveNumber,
6091 Controller->ControllerNumber,
6092 LogicalDriveNumber);
6093 break;
6094 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6095 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6096 "(/dev/rd/c%dd%d) Failed - "
6097 "Invalid or Nonredundant Logical Drive\n",
6098 Controller, LogicalDriveNumber,
6099 Controller->ControllerNumber,
6100 LogicalDriveNumber);
6101 break;
6102 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6103 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6104 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6105 "Consistency Check Already in Progress\n",
6106 Controller, LogicalDriveNumber,
6107 Controller->ControllerNumber,
6108 LogicalDriveNumber);
6109 break;
6110 default:
6111 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6112 "(/dev/rd/c%dd%d) Failed - "
6113 "Unexpected Status %04X\n",
6114 Controller, LogicalDriveNumber,
6115 Controller->ControllerNumber,
6116 LogicalDriveNumber, Command->V1.CommandStatus);
6117 break;
6118 }
6119 }
6120 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6121 strcmp(UserCommand, "cancel-consistency-check") == 0)
6122 {
6123 /*
6124 the OldRebuildRateConstant is never actually used
6125 once its value is retrieved from the controller.
6126 */
6127 unsigned char *OldRebuildRateConstant;
6128 dma_addr_t OldRebuildRateConstantDMA;
6129
6130 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6131 sizeof(char), &OldRebuildRateConstantDMA);
6132 if (OldRebuildRateConstant == NULL) {
6133 DAC960_UserCritical("Cancellation of Rebuild or "
6134 "Consistency Check Failed - "
6135 "Out of Memory",
6136 Controller);
6137 goto failure;
6138 }
6139 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6140 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6141 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6142 DAC960_ExecuteCommand(Command);
6143 switch (Command->V1.CommandStatus)
6144 {
6145 case DAC960_V1_NormalCompletion:
6146 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6147 Controller);
6148 break;
6149 default:
6150 DAC960_UserCritical("Cancellation of Rebuild or "
6151 "Consistency Check Failed - "
6152 "Unexpected Status %04X\n",
6153 Controller, Command->V1.CommandStatus);
6154 break;
6155 }
6156failure:
6157 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6158 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6159 }
6160 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6161 Controller, UserCommand);
6162
6163 spin_lock_irqsave(&Controller->queue_lock, flags);
6164 DAC960_DeallocateCommand(Command);
6165 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6166 return true;
6167}
6168
6169
6170/*
6171 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6172 TargetID into a Logical Device. It returns true on success and false
6173 on failure.
6174*/
6175
6176static boolean DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6177 unsigned char Channel,
6178 unsigned char TargetID,
6179 unsigned short
6180 *LogicalDeviceNumber)
6181{
6182 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6183 DAC960_Controller_T *Controller = Command->Controller;
6184
6185 CommandMailbox = &Command->V2.CommandMailbox;
6186 memcpy(&SavedCommandMailbox, CommandMailbox,
6187 sizeof(DAC960_V2_CommandMailbox_T));
6188
6189 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6190 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6191 .DataTransferControllerToHost = true;
6192 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6193 .NoAutoRequestSense = true;
6194 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6195 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6196 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6197 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6198 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6199 DAC960_V2_TranslatePhysicalToLogicalDevice;
6200 CommandMailbox->Common.DataTransferMemoryAddress
6201 .ScatterGatherSegments[0]
6202 .SegmentDataPointer =
6203 Controller->V2.PhysicalToLogicalDeviceDMA;
6204 CommandMailbox->Common.DataTransferMemoryAddress
6205 .ScatterGatherSegments[0]
6206 .SegmentByteCount =
6207 CommandMailbox->Common.DataTransferSize;
6208
6209 DAC960_ExecuteCommand(Command);
6210 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6211
6212 memcpy(CommandMailbox, &SavedCommandMailbox,
6213 sizeof(DAC960_V2_CommandMailbox_T));
6214 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6215}
6216
6217
6218/*
6219 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6220 Controllers.
6221*/
6222
6223static boolean DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6224 unsigned char *UserCommand)
6225{
6226 DAC960_Command_T *Command;
6227 DAC960_V2_CommandMailbox_T *CommandMailbox;
6228 unsigned long flags;
6229 unsigned char Channel, TargetID, LogicalDriveNumber;
6230 unsigned short LogicalDeviceNumber;
6231
6232 spin_lock_irqsave(&Controller->queue_lock, flags);
6233 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6234 DAC960_WaitForCommand(Controller);
6235 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6236 Controller->UserStatusLength = 0;
6237 DAC960_V2_ClearCommand(Command);
6238 Command->CommandType = DAC960_ImmediateCommand;
6239 CommandMailbox = &Command->V2.CommandMailbox;
6240 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6241 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6242 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6243 if (strcmp(UserCommand, "flush-cache") == 0)
6244 {
6245 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6246 CommandMailbox->DeviceOperation.OperationDevice =
6247 DAC960_V2_RAID_Controller;
6248 DAC960_ExecuteCommand(Command);
6249 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6250 }
6251 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6252 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6253 &Channel, &TargetID) &&
6254 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6255 &LogicalDeviceNumber))
6256 {
6257 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6258 LogicalDeviceNumber;
6259 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6260 DAC960_V2_SetDeviceState;
6261 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6262 DAC960_V2_Device_Dead;
6263 DAC960_ExecuteCommand(Command);
6264 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6265 Controller, Channel, TargetID,
6266 (Command->V2.CommandStatus
6267 == DAC960_V2_NormalCompletion
6268 ? "Succeeded" : "Failed"));
6269 }
6270 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6271 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6272 &Channel, &TargetID) &&
6273 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6274 &LogicalDeviceNumber))
6275 {
6276 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6277 LogicalDeviceNumber;
6278 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6279 DAC960_V2_SetDeviceState;
6280 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6281 DAC960_V2_Device_Online;
6282 DAC960_ExecuteCommand(Command);
6283 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6284 Controller, Channel, TargetID,
6285 (Command->V2.CommandStatus
6286 == DAC960_V2_NormalCompletion
6287 ? "Succeeded" : "Failed"));
6288 }
6289 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6290 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6291 &Channel, &TargetID) &&
6292 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6293 &LogicalDeviceNumber))
6294 {
6295 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6296 LogicalDeviceNumber;
6297 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6298 DAC960_V2_SetDeviceState;
6299 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6300 DAC960_V2_Device_Standby;
6301 DAC960_ExecuteCommand(Command);
6302 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6303 Controller, Channel, TargetID,
6304 (Command->V2.CommandStatus
6305 == DAC960_V2_NormalCompletion
6306 ? "Succeeded" : "Failed"));
6307 }
6308 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6309 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6310 &Channel, &TargetID) &&
6311 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6312 &LogicalDeviceNumber))
6313 {
6314 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6315 LogicalDeviceNumber;
6316 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6317 DAC960_V2_RebuildDeviceStart;
6318 DAC960_ExecuteCommand(Command);
6319 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6320 Controller, Channel, TargetID,
6321 (Command->V2.CommandStatus
6322 == DAC960_V2_NormalCompletion
6323 ? "Initiated" : "Not Initiated"));
6324 }
6325 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6326 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6327 &Channel, &TargetID) &&
6328 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6329 &LogicalDeviceNumber))
6330 {
6331 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6332 LogicalDeviceNumber;
6333 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6334 DAC960_V2_RebuildDeviceStop;
6335 DAC960_ExecuteCommand(Command);
6336 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6337 Controller, Channel, TargetID,
6338 (Command->V2.CommandStatus
6339 == DAC960_V2_NormalCompletion
6340 ? "Cancelled" : "Not Cancelled"));
6341 }
6342 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6343 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6344 &LogicalDriveNumber))
6345 {
6346 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6347 LogicalDriveNumber;
6348 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6349 DAC960_V2_ConsistencyCheckStart;
6350 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6351 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6352 DAC960_ExecuteCommand(Command);
6353 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6354 "(/dev/rd/c%dd%d) %s\n",
6355 Controller, LogicalDriveNumber,
6356 Controller->ControllerNumber,
6357 LogicalDriveNumber,
6358 (Command->V2.CommandStatus
6359 == DAC960_V2_NormalCompletion
6360 ? "Initiated" : "Not Initiated"));
6361 }
6362 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6363 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6364 &LogicalDriveNumber))
6365 {
6366 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6367 LogicalDriveNumber;
6368 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6369 DAC960_V2_ConsistencyCheckStop;
6370 DAC960_ExecuteCommand(Command);
6371 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6372 "(/dev/rd/c%dd%d) %s\n",
6373 Controller, LogicalDriveNumber,
6374 Controller->ControllerNumber,
6375 LogicalDriveNumber,
6376 (Command->V2.CommandStatus
6377 == DAC960_V2_NormalCompletion
6378 ? "Cancelled" : "Not Cancelled"));
6379 }
6380 else if (strcmp(UserCommand, "perform-discovery") == 0)
6381 {
6382 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6383 DAC960_ExecuteCommand(Command);
6384 DAC960_UserCritical("Discovery %s\n", Controller,
6385 (Command->V2.CommandStatus
6386 == DAC960_V2_NormalCompletion
6387 ? "Initiated" : "Not Initiated"));
6388 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6389 {
6390 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6391 CommandMailbox->ControllerInfo.CommandControlBits
6392 .DataTransferControllerToHost = true;
6393 CommandMailbox->ControllerInfo.CommandControlBits
6394 .NoAutoRequestSense = true;
6395 CommandMailbox->ControllerInfo.DataTransferSize =
6396 sizeof(DAC960_V2_ControllerInfo_T);
6397 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6398 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6399 DAC960_V2_GetControllerInfo;
6400 /*
6401 * How does this NOT race with the queued Monitoring
6402 * usage of this structure?
6403 */
6404 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6405 .ScatterGatherSegments[0]
6406 .SegmentDataPointer =
6407 Controller->V2.NewControllerInformationDMA;
6408 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6409 .ScatterGatherSegments[0]
6410 .SegmentByteCount =
6411 CommandMailbox->ControllerInfo.DataTransferSize;
6412 DAC960_ExecuteCommand(Command);
6413 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6414 {
6415 DAC960_ExecuteCommand(Command);
6416 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6417 }
6418 DAC960_UserCritical("Discovery Completed\n", Controller);
6419 }
6420 }
6421 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6422 Controller->SuppressEnclosureMessages = true;
6423 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6424 Controller, UserCommand);
6425
6426 spin_lock_irqsave(&Controller->queue_lock, flags);
6427 DAC960_DeallocateCommand(Command);
6428 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6429 return true;
6430}
6431
6432
6433/*
6434 DAC960_ProcReadStatus implements reading /proc/rd/status.
6435*/
6436
6437static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset,
6438 int Count, int *EOF, void *Data)
6439{
6440 unsigned char *StatusMessage = "OK\n";
6441 int ControllerNumber, BytesAvailable;
6442 for (ControllerNumber = 0;
6443 ControllerNumber < DAC960_ControllerCount;
6444 ControllerNumber++)
6445 {
6446 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6447 if (Controller == NULL) continue;
6448 if (Controller->MonitoringAlertMode)
6449 {
6450 StatusMessage = "ALERT\n";
6451 break;
6452 }
6453 }
6454 BytesAvailable = strlen(StatusMessage) - Offset;
6455 if (Count >= BytesAvailable)
6456 {
6457 Count = BytesAvailable;
6458 *EOF = true;
6459 }
6460 if (Count <= 0) return 0;
6461 *Start = Page;
6462 memcpy(Page, &StatusMessage[Offset], Count);
6463 return Count;
6464}
6465
6466
6467/*
6468 DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status.
6469*/
6470
6471static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset,
6472 int Count, int *EOF, void *Data)
6473{
6474 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6475 int BytesAvailable = Controller->InitialStatusLength - Offset;
6476 if (Count >= BytesAvailable)
6477 {
6478 Count = BytesAvailable;
6479 *EOF = true;
6480 }
6481 if (Count <= 0) return 0;
6482 *Start = Page;
6483 memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count);
6484 return Count;
6485}
6486
6487
6488/*
6489 DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status.
6490*/
6491
6492static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset,
6493 int Count, int *EOF, void *Data)
6494{
6495 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6496 unsigned char *StatusMessage =
6497 "No Rebuild or Consistency Check in Progress\n";
6498 int ProgressMessageLength = strlen(StatusMessage);
6499 int BytesAvailable;
6500 if (jiffies != Controller->LastCurrentStatusTime)
6501 {
6502 Controller->CurrentStatusLength = 0;
6503 DAC960_AnnounceDriver(Controller);
6504 DAC960_ReportControllerConfiguration(Controller);
6505 DAC960_ReportDeviceConfiguration(Controller);
6506 if (Controller->ProgressBufferLength > 0)
6507 ProgressMessageLength = Controller->ProgressBufferLength;
6508 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6509 {
6510 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6511 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6512 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6513 if (Controller->ProgressBufferLength > 0)
6514 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6515 Controller->ProgressBuffer);
6516 else
6517 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6518 StatusMessage);
6519 Controller->CurrentStatusLength += ProgressMessageLength;
6520 }
6521 Controller->LastCurrentStatusTime = jiffies;
6522 }
6523 BytesAvailable = Controller->CurrentStatusLength - Offset;
6524 if (Count >= BytesAvailable)
6525 {
6526 Count = BytesAvailable;
6527 *EOF = true;
6528 }
6529 if (Count <= 0) return 0;
6530 *Start = Page;
6531 memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count);
6532 return Count;
6533}
6534
6535
6536/*
6537 DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command.
6538*/
6539
6540static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset,
6541 int Count, int *EOF, void *Data)
6542{
6543 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6544 int BytesAvailable = Controller->UserStatusLength - Offset;
6545 if (Count >= BytesAvailable)
6546 {
6547 Count = BytesAvailable;
6548 *EOF = true;
6549 }
6550 if (Count <= 0) return 0;
6551 *Start = Page;
6552 memcpy(Page, &Controller->UserStatusBuffer[Offset], Count);
6553 return Count;
6554}
6555
6556
6557/*
6558 DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command.
6559*/
6560
6561static int DAC960_ProcWriteUserCommand(struct file *file,
6562 const char __user *Buffer,
6563 unsigned long Count, void *Data)
6564{
6565 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6566 unsigned char CommandBuffer[80];
6567 int Length;
6568 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6569 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6570 CommandBuffer[Count] = '\0';
6571 Length = strlen(CommandBuffer);
6572 if (CommandBuffer[Length-1] == '\n')
6573 CommandBuffer[--Length] = '\0';
6574 if (Controller->FirmwareType == DAC960_V1_Controller)
6575 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6576 ? Count : -EBUSY);
6577 else
6578 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6579 ? Count : -EBUSY);
6580}
6581
6582
6583/*
6584 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6585 DAC960 Driver.
6586*/
6587
6588static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6589{
6590 struct proc_dir_entry *StatusProcEntry;
6591 struct proc_dir_entry *ControllerProcEntry;
6592 struct proc_dir_entry *UserCommandProcEntry;
6593
6594 if (DAC960_ProcDirectoryEntry == NULL) {
6595 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6596 StatusProcEntry = create_proc_read_entry("status", 0,
6597 DAC960_ProcDirectoryEntry,
6598 DAC960_ProcReadStatus, NULL);
6599 }
6600
6601 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6602 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6603 DAC960_ProcDirectoryEntry);
6604 create_proc_read_entry("initial_status", 0, ControllerProcEntry,
6605 DAC960_ProcReadInitialStatus, Controller);
6606 create_proc_read_entry("current_status", 0, ControllerProcEntry,
6607 DAC960_ProcReadCurrentStatus, Controller);
6608 UserCommandProcEntry =
6609 create_proc_read_entry("user_command", S_IWUSR | S_IRUSR,
6610 ControllerProcEntry, DAC960_ProcReadUserCommand,
6611 Controller);
6612 UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand;
6613 Controller->ControllerProcEntry = ControllerProcEntry;
6614}
6615
6616
6617/*
6618 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6619 DAC960 Driver.
6620*/
6621
6622static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6623{
6624 if (Controller->ControllerProcEntry == NULL)
6625 return;
6626 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6627 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6628 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6629 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6630 Controller->ControllerProcEntry = NULL;
6631}
6632
6633#ifdef DAC960_GAM_MINOR
6634
6635/*
6636 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6637*/
6638
6639static int DAC960_gam_ioctl(struct inode *inode, struct file *file,
6640 unsigned int Request, unsigned long Argument)
6641{
6642 int ErrorCode = 0;
6643 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6644 switch (Request)
6645 {
6646 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6647 return DAC960_ControllerCount;
6648 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6649 {
6650 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6651 (DAC960_ControllerInfo_T __user *) Argument;
6652 DAC960_ControllerInfo_T ControllerInfo;
6653 DAC960_Controller_T *Controller;
6654 int ControllerNumber;
6655 if (UserSpaceControllerInfo == NULL) return -EINVAL;
6656 ErrorCode = get_user(ControllerNumber,
6657 &UserSpaceControllerInfo->ControllerNumber);
6658 if (ErrorCode != 0) return ErrorCode;
6659 if (ControllerNumber < 0 ||
6660 ControllerNumber > DAC960_ControllerCount - 1)
6661 return -ENXIO;
6662 Controller = DAC960_Controllers[ControllerNumber];
6663 if (Controller == NULL) return -ENXIO;
6664 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6665 ControllerInfo.ControllerNumber = ControllerNumber;
6666 ControllerInfo.FirmwareType = Controller->FirmwareType;
6667 ControllerInfo.Channels = Controller->Channels;
6668 ControllerInfo.Targets = Controller->Targets;
6669 ControllerInfo.PCI_Bus = Controller->Bus;
6670 ControllerInfo.PCI_Device = Controller->Device;
6671 ControllerInfo.PCI_Function = Controller->Function;
6672 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6673 ControllerInfo.PCI_Address = Controller->PCI_Address;
6674 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6675 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6676 return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6677 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6678 }
6679 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6680 {
6681 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6682 (DAC960_V1_UserCommand_T __user *) Argument;
6683 DAC960_V1_UserCommand_T UserCommand;
6684 DAC960_Controller_T *Controller;
6685 DAC960_Command_T *Command = NULL;
6686 DAC960_V1_CommandOpcode_T CommandOpcode;
6687 DAC960_V1_CommandStatus_T CommandStatus;
6688 DAC960_V1_DCDB_T DCDB;
6689 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6690 dma_addr_t DCDB_IOBUFDMA;
6691 unsigned long flags;
6692 int ControllerNumber, DataTransferLength;
6693 unsigned char *DataTransferBuffer = NULL;
6694 dma_addr_t DataTransferBufferDMA;
6695 if (UserSpaceUserCommand == NULL) return -EINVAL;
6696 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6697 sizeof(DAC960_V1_UserCommand_T))) {
6698 ErrorCode = -EFAULT;
6699 goto Failure1a;
6700 }
6701 ControllerNumber = UserCommand.ControllerNumber;
6702 if (ControllerNumber < 0 ||
6703 ControllerNumber > DAC960_ControllerCount - 1)
6704 return -ENXIO;
6705 Controller = DAC960_Controllers[ControllerNumber];
6706 if (Controller == NULL) return -ENXIO;
6707 if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL;
6708 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6709 DataTransferLength = UserCommand.DataTransferLength;
6710 if (CommandOpcode & 0x80) return -EINVAL;
6711 if (CommandOpcode == DAC960_V1_DCDB)
6712 {
6713 if (copy_from_user(&DCDB, UserCommand.DCDB,
6714 sizeof(DAC960_V1_DCDB_T))) {
6715 ErrorCode = -EFAULT;
6716 goto Failure1a;
6717 }
6718 if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL;
6719 if (!((DataTransferLength == 0 &&
6720 DCDB.Direction
6721 == DAC960_V1_DCDB_NoDataTransfer) ||
6722 (DataTransferLength > 0 &&
6723 DCDB.Direction
6724 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6725 (DataTransferLength < 0 &&
6726 DCDB.Direction
6727 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6728 return -EINVAL;
6729 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6730 != abs(DataTransferLength))
6731 return -EINVAL;
6732 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6733 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6734 if (DCDB_IOBUF == NULL)
6735 return -ENOMEM;
6736 }
6737 if (DataTransferLength > 0)
6738 {
6739 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6740 DataTransferLength, &DataTransferBufferDMA);
6741 if (DataTransferBuffer == NULL) {
6742 ErrorCode = -ENOMEM;
6743 goto Failure1;
6744 }
6745 memset(DataTransferBuffer, 0, DataTransferLength);
6746 }
6747 else if (DataTransferLength < 0)
6748 {
6749 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6750 -DataTransferLength, &DataTransferBufferDMA);
6751 if (DataTransferBuffer == NULL) {
6752 ErrorCode = -ENOMEM;
6753 goto Failure1;
6754 }
6755 if (copy_from_user(DataTransferBuffer,
6756 UserCommand.DataTransferBuffer,
6757 -DataTransferLength)) {
6758 ErrorCode = -EFAULT;
6759 goto Failure1;
6760 }
6761 }
6762 if (CommandOpcode == DAC960_V1_DCDB)
6763 {
6764 spin_lock_irqsave(&Controller->queue_lock, flags);
6765 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6766 DAC960_WaitForCommand(Controller);
6767 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6768 [DCDB.TargetID])
6769 {
6770 spin_unlock_irq(&Controller->queue_lock);
6771 __wait_event(Controller->CommandWaitQueue,
6772 !Controller->V1.DirectCommandActive
6773 [DCDB.Channel][DCDB.TargetID]);
6774 spin_lock_irq(&Controller->queue_lock);
6775 }
6776 Controller->V1.DirectCommandActive[DCDB.Channel]
6777 [DCDB.TargetID] = true;
6778 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6779 DAC960_V1_ClearCommand(Command);
6780 Command->CommandType = DAC960_ImmediateCommand;
6781 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6782 sizeof(DAC960_V1_CommandMailbox_T));
6783 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6784 DCDB.BusAddress = DataTransferBufferDMA;
6785 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6786 }
6787 else
6788 {
6789 spin_lock_irqsave(&Controller->queue_lock, flags);
6790 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6791 DAC960_WaitForCommand(Controller);
6792 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6793 DAC960_V1_ClearCommand(Command);
6794 Command->CommandType = DAC960_ImmediateCommand;
6795 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6796 sizeof(DAC960_V1_CommandMailbox_T));
6797 if (DataTransferBuffer != NULL)
6798 Command->V1.CommandMailbox.Type3.BusAddress =
6799 DataTransferBufferDMA;
6800 }
6801 DAC960_ExecuteCommand(Command);
6802 CommandStatus = Command->V1.CommandStatus;
6803 spin_lock_irqsave(&Controller->queue_lock, flags);
6804 DAC960_DeallocateCommand(Command);
6805 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6806 if (DataTransferLength > 0)
6807 {
6808 if (copy_to_user(UserCommand.DataTransferBuffer,
6809 DataTransferBuffer, DataTransferLength)) {
6810 ErrorCode = -EFAULT;
6811 goto Failure1;
6812 }
6813 }
6814 if (CommandOpcode == DAC960_V1_DCDB)
6815 {
6816 /*
6817 I don't believe Target or Channel in the DCDB_IOBUF
6818 should be any different from the contents of DCDB.
6819 */
6820 Controller->V1.DirectCommandActive[DCDB.Channel]
6821 [DCDB.TargetID] = false;
6822 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6823 sizeof(DAC960_V1_DCDB_T))) {
6824 ErrorCode = -EFAULT;
6825 goto Failure1;
6826 }
6827 }
6828 ErrorCode = CommandStatus;
6829 Failure1:
6830 if (DataTransferBuffer != NULL)
6831 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6832 DataTransferBuffer, DataTransferBufferDMA);
6833 if (DCDB_IOBUF != NULL)
6834 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6835 DCDB_IOBUF, DCDB_IOBUFDMA);
6836 Failure1a:
6837 return ErrorCode;
6838 }
6839 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6840 {
6841 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6842 (DAC960_V2_UserCommand_T __user *) Argument;
6843 DAC960_V2_UserCommand_T UserCommand;
6844 DAC960_Controller_T *Controller;
6845 DAC960_Command_T *Command = NULL;
6846 DAC960_V2_CommandMailbox_T *CommandMailbox;
6847 DAC960_V2_CommandStatus_T CommandStatus;
6848 unsigned long flags;
6849 int ControllerNumber, DataTransferLength;
6850 int DataTransferResidue, RequestSenseLength;
6851 unsigned char *DataTransferBuffer = NULL;
6852 dma_addr_t DataTransferBufferDMA;
6853 unsigned char *RequestSenseBuffer = NULL;
6854 dma_addr_t RequestSenseBufferDMA;
6855 if (UserSpaceUserCommand == NULL) return -EINVAL;
6856 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6857 sizeof(DAC960_V2_UserCommand_T))) {
6858 ErrorCode = -EFAULT;
6859 goto Failure2a;
6860 }
6861 ControllerNumber = UserCommand.ControllerNumber;
6862 if (ControllerNumber < 0 ||
6863 ControllerNumber > DAC960_ControllerCount - 1)
6864 return -ENXIO;
6865 Controller = DAC960_Controllers[ControllerNumber];
6866 if (Controller == NULL) return -ENXIO;
6867 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
6868 DataTransferLength = UserCommand.DataTransferLength;
6869 if (DataTransferLength > 0)
6870 {
6871 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6872 DataTransferLength, &DataTransferBufferDMA);
6873 if (DataTransferBuffer == NULL) return -ENOMEM;
6874 memset(DataTransferBuffer, 0, DataTransferLength);
6875 }
6876 else if (DataTransferLength < 0)
6877 {
6878 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6879 -DataTransferLength, &DataTransferBufferDMA);
6880 if (DataTransferBuffer == NULL) return -ENOMEM;
6881 if (copy_from_user(DataTransferBuffer,
6882 UserCommand.DataTransferBuffer,
6883 -DataTransferLength)) {
6884 ErrorCode = -EFAULT;
6885 goto Failure2;
6886 }
6887 }
6888 RequestSenseLength = UserCommand.RequestSenseLength;
6889 if (RequestSenseLength > 0)
6890 {
6891 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6892 RequestSenseLength, &RequestSenseBufferDMA);
6893 if (RequestSenseBuffer == NULL)
6894 {
6895 ErrorCode = -ENOMEM;
6896 goto Failure2;
6897 }
6898 memset(RequestSenseBuffer, 0, RequestSenseLength);
6899 }
6900 spin_lock_irqsave(&Controller->queue_lock, flags);
6901 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6902 DAC960_WaitForCommand(Controller);
6903 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6904 DAC960_V2_ClearCommand(Command);
6905 Command->CommandType = DAC960_ImmediateCommand;
6906 CommandMailbox = &Command->V2.CommandMailbox;
6907 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6908 sizeof(DAC960_V2_CommandMailbox_T));
6909 CommandMailbox->Common.CommandControlBits
6910 .AdditionalScatterGatherListMemory = false;
6911 CommandMailbox->Common.CommandControlBits
6912 .NoAutoRequestSense = true;
6913 CommandMailbox->Common.DataTransferSize = 0;
6914 CommandMailbox->Common.DataTransferPageNumber = 0;
6915 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6916 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6917 if (DataTransferLength != 0)
6918 {
6919 if (DataTransferLength > 0)
6920 {
6921 CommandMailbox->Common.CommandControlBits
6922 .DataTransferControllerToHost = true;
6923 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6924 }
6925 else
6926 {
6927 CommandMailbox->Common.CommandControlBits
6928 .DataTransferControllerToHost = false;
6929 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6930 }
6931 CommandMailbox->Common.DataTransferMemoryAddress
6932 .ScatterGatherSegments[0]
6933 .SegmentDataPointer = DataTransferBufferDMA;
6934 CommandMailbox->Common.DataTransferMemoryAddress
6935 .ScatterGatherSegments[0]
6936 .SegmentByteCount =
6937 CommandMailbox->Common.DataTransferSize;
6938 }
6939 if (RequestSenseLength > 0)
6940 {
6941 CommandMailbox->Common.CommandControlBits
6942 .NoAutoRequestSense = false;
6943 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6944 CommandMailbox->Common.RequestSenseBusAddress =
6945 RequestSenseBufferDMA;
6946 }
6947 DAC960_ExecuteCommand(Command);
6948 CommandStatus = Command->V2.CommandStatus;
6949 RequestSenseLength = Command->V2.RequestSenseLength;
6950 DataTransferResidue = Command->V2.DataTransferResidue;
6951 spin_lock_irqsave(&Controller->queue_lock, flags);
6952 DAC960_DeallocateCommand(Command);
6953 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6954 if (RequestSenseLength > UserCommand.RequestSenseLength)
6955 RequestSenseLength = UserCommand.RequestSenseLength;
6956 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6957 &DataTransferResidue,
6958 sizeof(DataTransferResidue))) {
6959 ErrorCode = -EFAULT;
6960 goto Failure2;
6961 }
6962 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6963 &RequestSenseLength, sizeof(RequestSenseLength))) {
6964 ErrorCode = -EFAULT;
6965 goto Failure2;
6966 }
6967 if (DataTransferLength > 0)
6968 {
6969 if (copy_to_user(UserCommand.DataTransferBuffer,
6970 DataTransferBuffer, DataTransferLength)) {
6971 ErrorCode = -EFAULT;
6972 goto Failure2;
6973 }
6974 }
6975 if (RequestSenseLength > 0)
6976 {
6977 if (copy_to_user(UserCommand.RequestSenseBuffer,
6978 RequestSenseBuffer, RequestSenseLength)) {
6979 ErrorCode = -EFAULT;
6980 goto Failure2;
6981 }
6982 }
6983 ErrorCode = CommandStatus;
6984 Failure2:
6985 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6986 DataTransferBuffer, DataTransferBufferDMA);
6987 if (RequestSenseBuffer != NULL)
6988 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6989 RequestSenseBuffer, RequestSenseBufferDMA);
6990 Failure2a:
6991 return ErrorCode;
6992 }
6993 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
6994 {
6995 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
6996 (DAC960_V2_GetHealthStatus_T __user *) Argument;
6997 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6998 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6999 DAC960_Controller_T *Controller;
7000 int ControllerNumber;
7001 if (UserSpaceGetHealthStatus == NULL) return -EINVAL;
7002 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7003 sizeof(DAC960_V2_GetHealthStatus_T)))
7004 return -EFAULT;
7005 ControllerNumber = GetHealthStatus.ControllerNumber;
7006 if (ControllerNumber < 0 ||
7007 ControllerNumber > DAC960_ControllerCount - 1)
7008 return -ENXIO;
7009 Controller = DAC960_Controllers[ControllerNumber];
7010 if (Controller == NULL) return -ENXIO;
7011 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
7012 if (copy_from_user(&HealthStatusBuffer,
7013 GetHealthStatus.HealthStatusBuffer,
7014 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7015 return -EFAULT;
7016 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7017 == HealthStatusBuffer.StatusChangeCounter &&
7018 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7019 == HealthStatusBuffer.NextEventSequenceNumber)
7020 {
7021 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7022 DAC960_MonitoringTimerInterval);
7023 if (signal_pending(current)) return -EINTR;
7024 }
7025 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7026 Controller->V2.HealthStatusBuffer,
7027 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7028 return -EFAULT;
7029 return 0;
7030 }
7031 }
7032 return -EINVAL;
7033}
7034
7035static struct file_operations DAC960_gam_fops = {
7036 .owner = THIS_MODULE,
7037 .ioctl = DAC960_gam_ioctl
7038};
7039
7040static struct miscdevice DAC960_gam_dev = {
7041 DAC960_GAM_MINOR,
7042 "dac960_gam",
7043 &DAC960_gam_fops
7044};
7045
7046static int DAC960_gam_init(void)
7047{
7048 int ret;
7049
7050 ret = misc_register(&DAC960_gam_dev);
7051 if (ret)
7052 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7053 return ret;
7054}
7055
7056static void DAC960_gam_cleanup(void)
7057{
7058 misc_deregister(&DAC960_gam_dev);
7059}
7060
7061#endif /* DAC960_GAM_MINOR */
7062
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07007063static struct DAC960_privdata DAC960_GEM_privdata = {
7064 .HardwareType = DAC960_GEM_Controller,
7065 .FirmwareType = DAC960_V2_Controller,
7066 .InterruptHandler = DAC960_GEM_InterruptHandler,
7067 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7068};
7069
7070
Linus Torvalds1da177e2005-04-16 15:20:36 -07007071static struct DAC960_privdata DAC960_BA_privdata = {
7072 .HardwareType = DAC960_BA_Controller,
7073 .FirmwareType = DAC960_V2_Controller,
7074 .InterruptHandler = DAC960_BA_InterruptHandler,
7075 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7076};
7077
7078static struct DAC960_privdata DAC960_LP_privdata = {
7079 .HardwareType = DAC960_LP_Controller,
7080 .FirmwareType = DAC960_LP_Controller,
7081 .InterruptHandler = DAC960_LP_InterruptHandler,
7082 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7083};
7084
7085static struct DAC960_privdata DAC960_LA_privdata = {
7086 .HardwareType = DAC960_LA_Controller,
7087 .FirmwareType = DAC960_V1_Controller,
7088 .InterruptHandler = DAC960_LA_InterruptHandler,
7089 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7090};
7091
7092static struct DAC960_privdata DAC960_PG_privdata = {
7093 .HardwareType = DAC960_PG_Controller,
7094 .FirmwareType = DAC960_V1_Controller,
7095 .InterruptHandler = DAC960_PG_InterruptHandler,
7096 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7097};
7098
7099static struct DAC960_privdata DAC960_PD_privdata = {
7100 .HardwareType = DAC960_PD_Controller,
7101 .FirmwareType = DAC960_V1_Controller,
7102 .InterruptHandler = DAC960_PD_InterruptHandler,
7103 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7104};
7105
7106static struct DAC960_privdata DAC960_P_privdata = {
7107 .HardwareType = DAC960_P_Controller,
7108 .FirmwareType = DAC960_V1_Controller,
7109 .InterruptHandler = DAC960_P_InterruptHandler,
7110 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7111};
7112
7113static struct pci_device_id DAC960_id_table[] = {
7114 {
7115 .vendor = PCI_VENDOR_ID_MYLEX,
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07007116 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7117 .subvendor = PCI_ANY_ID,
7118 .subdevice = PCI_ANY_ID,
7119 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7120 },
7121 {
7122 .vendor = PCI_VENDOR_ID_MYLEX,
Linus Torvalds1da177e2005-04-16 15:20:36 -07007123 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7124 .subvendor = PCI_ANY_ID,
7125 .subdevice = PCI_ANY_ID,
7126 .driver_data = (unsigned long) &DAC960_BA_privdata,
7127 },
7128 {
7129 .vendor = PCI_VENDOR_ID_MYLEX,
7130 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7131 .subvendor = PCI_ANY_ID,
7132 .subdevice = PCI_ANY_ID,
7133 .driver_data = (unsigned long) &DAC960_LP_privdata,
7134 },
7135 {
7136 .vendor = PCI_VENDOR_ID_DEC,
7137 .device = PCI_DEVICE_ID_DEC_21285,
7138 .subvendor = PCI_VENDOR_ID_MYLEX,
7139 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7140 .driver_data = (unsigned long) &DAC960_LA_privdata,
7141 },
7142 {
7143 .vendor = PCI_VENDOR_ID_MYLEX,
7144 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7145 .subvendor = PCI_ANY_ID,
7146 .subdevice = PCI_ANY_ID,
7147 .driver_data = (unsigned long) &DAC960_PG_privdata,
7148 },
7149 {
7150 .vendor = PCI_VENDOR_ID_MYLEX,
7151 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7152 .subvendor = PCI_ANY_ID,
7153 .subdevice = PCI_ANY_ID,
7154 .driver_data = (unsigned long) &DAC960_PD_privdata,
7155 },
7156 {
7157 .vendor = PCI_VENDOR_ID_MYLEX,
7158 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7159 .subvendor = PCI_ANY_ID,
7160 .subdevice = PCI_ANY_ID,
7161 .driver_data = (unsigned long) &DAC960_P_privdata,
7162 },
7163 {0, },
7164};
7165
7166MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7167
7168static struct pci_driver DAC960_pci_driver = {
7169 .name = "DAC960",
7170 .id_table = DAC960_id_table,
7171 .probe = DAC960_Probe,
7172 .remove = DAC960_Remove,
7173};
7174
7175static int DAC960_init_module(void)
7176{
7177 int ret;
7178
Richard Knutsson9bfab8c2005-11-30 00:59:34 +01007179 ret = pci_register_driver(&DAC960_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007180#ifdef DAC960_GAM_MINOR
7181 if (!ret)
7182 DAC960_gam_init();
7183#endif
7184 return ret;
7185}
7186
7187static void DAC960_cleanup_module(void)
7188{
7189 int i;
7190
7191#ifdef DAC960_GAM_MINOR
7192 DAC960_gam_cleanup();
7193#endif
7194
7195 for (i = 0; i < DAC960_ControllerCount; i++) {
7196 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7197 if (Controller == NULL)
7198 continue;
7199 DAC960_FinalizeController(Controller);
7200 }
7201 if (DAC960_ProcDirectoryEntry != NULL) {
7202 remove_proc_entry("rd/status", NULL);
7203 remove_proc_entry("rd", NULL);
7204 }
7205 DAC960_ControllerCount = 0;
7206 pci_unregister_driver(&DAC960_pci_driver);
7207}
7208
7209module_init(DAC960_init_module);
7210module_exit(DAC960_cleanup_module);
7211
7212MODULE_LICENSE("GPL");