| commit | a65217a4bcdb654e04fcc42b302d8a15708e14ce | [log] [tgz] |
|---|---|---|
| author | Will Deacon <will.deacon@arm.com> | Tue Jun 24 18:26:26 2014 +0100 |
| committer | Will Deacon <will.deacon@arm.com> | Wed Jul 02 11:55:49 2014 +0100 |
| tree | 1affd8e038912b297f888f0ed84631a758968816 | |
| parent | 7171511eaec5bf23fb06078f59784a3a0626b38f [diff] |
iommu/arm-smmu: fix calculation of TCR.T0SZ T0SZ controls the input address range for TTBR0, so use the input address range rather than the output address range for the calculation. For stage-2, this means using the output size of stage-1. Signed-off-by: Will Deacon <will.deacon@arm.com>