tree 1affd8e038912b297f888f0ed84631a758968816
parent 7171511eaec5bf23fb06078f59784a3a0626b38f
author Will Deacon <will.deacon@arm.com> 1403630786 +0100
committer Will Deacon <will.deacon@arm.com> 1404298549 +0100

iommu/arm-smmu: fix calculation of TCR.T0SZ

T0SZ controls the input address range for TTBR0, so use the input
address range rather than the output address range for the calculation.
For stage-2, this means using the output size of stage-1.

Signed-off-by: Will Deacon <will.deacon@arm.com>