commit | 43450673944c088deac75802123e5cec902b278b | [log] [tgz] |
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author | Shengjiu Wang <shengjiu.wang@freescale.com> | Fri Apr 28 16:36:05 2017 +0800 |
committer | Shengjiu Wang <shengjiu.wang@freescale.com> | Wed May 03 15:43:39 2017 +0800 |
tree | 45e91ac798bb398c64b9caeb1b70f6c0d5c2a1ed | |
parent | e3718a6c35e0abac65cbaeb79ee521a41c4fb007 [diff] |
MLK-14784: ASoC: fsl_esai: fix esai register setting issue in RIGHT_J mode The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit. driver set it to wrong register, correct it in this patch. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> (cherry picked from commit f9950f2b0790de194a7684a43cbf126b2f4a59e5)