| commit | e3bdd49521f06e1384be30b0b7b1a2143a586702 | [log] [tgz] |
|---|---|---|
| author | Liang Chen <chl@marvell.com> | Fri Jun 26 13:42:24 2015 +0800 |
| committer | Tim Wang <wangtt@marvell.com> | Mon Jul 06 17:15:38 2015 +0800 |
| tree | c9ffcce6ba8f995d9b9edd0cfbaa81414dac3a36 | |
| parent | 4923b2fe7c64c698d601a2fa1128c5cfd80f1a79 [diff] |
clk: mmp: update the TSMC B0 svc 1.6 version for helan3 This patch applies APSE_HELAN3_TSMC_B0_SVC_Helan3_ template_based_SVCSpec_1.6 data. main change in the list below. 1. Adjustment made to account for the shift in DRO from A0 to B0. 2. cluster1 1248M and DDR800M support all profile chip. Change-Id: I179e3b591509267d9489738726b35a7e5e5013fa Signed-off-by: Liang Chen <chl@marvell.com>